Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / cputable.c

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 87aa0f3c60475aeaa71474ded7d46c2f34078ffb..1f9123f412ec3c5a7a817f58e6316298d6ce7e05 100644 (file)
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1364,10 +1364,10 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_4xx,
                .platform               = "ppc405",
        },
-       {       /* 405EX */
-               .pvr_mask               = 0xffff0004,
-               .pvr_value              = 0x12910004,
-               .cpu_name               = "405EX",
+       {       /* 405EX Rev. A/B with Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x12910007,
+               .cpu_name               = "405EX Rev. A/B",
                .cpu_features           = CPU_FTRS_40X,
                .cpu_user_features      = PPC_FEATURE_32 |
                        PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
@@ -1377,10 +1377,114 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_4xx,
                .platform               = "ppc405",
        },
-       {       /* 405EXr */
-               .pvr_mask               = 0xffff0004,
+       {       /* 405EX Rev. C without Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x1291000d,
+               .cpu_name               = "405EX Rev. C",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EX Rev. C with Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x1291000f,
+               .cpu_name               = "405EX Rev. C",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EX Rev. D without Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x12910003,
+               .cpu_name               = "405EX Rev. D",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EX Rev. D with Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x12910005,
+               .cpu_name               = "405EX Rev. D",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EXr Rev. A/B without Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x12910001,
+               .cpu_name               = "405EXr Rev. A/B",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EXr Rev. C without Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x12910009,
+               .cpu_name               = "405EXr Rev. C",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EXr Rev. C with Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x1291000b,
+               .cpu_name               = "405EXr Rev. C",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EXr Rev. D without Security */
+               .pvr_mask               = 0xffff000f,
                .pvr_value              = 0x12910000,
-               .cpu_name               = "405EXr",
+               .cpu_name               = "405EXr Rev. D",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .mmu_features           = MMU_FTR_TYPE_40x,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       },
+       {       /* 405EXr Rev. D with Security */
+               .pvr_mask               = 0xffff000f,
+               .pvr_value              = 0x12910002,
+               .cpu_name               = "405EXr Rev. D",
                .cpu_features           = CPU_FTRS_40X,
                .cpu_user_features      = PPC_FEATURE_32 |
                        PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
@@ -1722,7 +1826,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_features           = CPU_FTRS_47X,
                .cpu_user_features      = COMMON_USER_BOOKE |
                        PPC_FEATURE_HAS_FPU,
-               .cpu_user_features      = COMMON_USER_BOOKE,
                .mmu_features           = MMU_FTR_TYPE_47x |
                        MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
                .icache_bsize           = 32,