ARM: S3C64XX: Add usb otg phy control

[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / arch / arm / plat-samsung / include / plat / regs-usb-hsotg-phy.h

diff --git a/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
index a111ad871833dae9e586fdb6705b9341ad644a35..fcf27966206795c78ec8a3732b2b8cd799a0f398 100644 (file)
--- a/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
+++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
@@ -25,8 +25,9 @@
 #define S3C_HSOTG_PHYREG(x)    ((x) + S3C_VA_USB_HSPHY)
 
 #define S3C_PHYPWR                             S3C_HSOTG_PHYREG(0x00)
-#define SRC_PHYPWR_OTG_DISABLE                 (1 << 4)
-#define SRC_PHYPWR_ANALOG_POWERDOWN            (1 << 3)
+#define S3C_PHYPWR_NORMAL_MASK                 (0x19 << 0)
+#define S3C_PHYPWR_OTG_DISABLE                 (1 << 4)
+#define S3C_PHYPWR_ANALOG_POWERDOWN            (1 << 3)
 #define SRC_PHYPWR_FORCE_SUSPEND               (1 << 1)
 
 #define S3C_PHYCLK                             S3C_HSOTG_PHYREG(0x04)
@@ -42,7 +43,7 @@
 
 #define S3C_RSTCON                             S3C_HSOTG_PHYREG(0x08)
 #define S3C_RSTCON_PHYCLK                      (1 << 2)
-#define S3C_RSTCON_HCLK                                (1 << 2)
+#define S3C_RSTCON_HCLK                                (1 << 1)
 #define S3C_RSTCON_PHY                         (1 << 0)
 
 #define S3C_PHYTUNE                            S3C_HSOTG_PHYREG(0x20)