ARM: dts: mvebu: fix cpus section indentation

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / boot / dts / armada-xp-mv78460.dtsi

diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index 23a5ac4490a858b7be95b035a69d76b24f24463c..b9da5b8ae288d0df3415ac54f5989934d9f3aa4c 100644 (file)
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -27,36 +27,36 @@
 
 
        cpus {
-           #address-cells = <1>;
-           #size-cells = <0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
 
-           cpu@0 {
-               device_type = "cpu";
-               compatible = "marvell,sheeva-v7";
-               reg = <0>;
-               clocks = <&cpuclk 0>;
-           };
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "marvell,sheeva-v7";
+                       reg = <0>;
+                       clocks = <&cpuclk 0>;
+               };
 
-           cpu@1 {
-               device_type = "cpu";
-               compatible = "marvell,sheeva-v7";
-               reg = <1>;
-               clocks = <&cpuclk 1>;
-           };
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "marvell,sheeva-v7";
+                       reg = <1>;
+                       clocks = <&cpuclk 1>;
+               };
 
-           cpu@2 {
-               device_type = "cpu";
-               compatible = "marvell,sheeva-v7";
-               reg = <2>;
-               clocks = <&cpuclk 2>;
-           };
+               cpu@2 {
+                       device_type = "cpu";
+                       compatible = "marvell,sheeva-v7";
+                       reg = <2>;
+                       clocks = <&cpuclk 2>;
+               };
 
-           cpu@3 {
-               device_type = "cpu";
-               compatible = "marvell,sheeva-v7";
-               reg = <3>;
-               clocks = <&cpuclk 3>;
-           };
+               cpu@3 {
+                       device_type = "cpu";
+                       compatible = "marvell,sheeva-v7";
+                       reg = <3>;
+                       clocks = <&cpuclk 3>;
+               };
        };
 
        soc {
@@ -300,4 +300,4 @@
                        };
                };
        };
- };
+};