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   1 /*
   2  * Samsung Exynos5 SoC series EEPROM driver
   3  *
   4  *
   5  * Copyright (c) 2018 Samsung Electronics Co., Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #ifndef FIMC_IS_EEPROM_12A10FF_H
  13 #define FIMC_IS_EEPROM_12A10FF_H
  14
  15 #define EEPROM_DATA_PATH                "/data/vendor/camera/dump_12a10ff_eeprom_data.bin"
  16 #define EEPROM_SERIAL_NUM_DATA_PATH     "/data/vendor/camera/serial_number_12a10ff.bin"
  17
  18 /* Total Cal data size */
  19 #define EEPROM_DATA_SIZE                SZ_8K
  20
  21 /* Big endian Checksum */
  22 /* Address */
  23 #define EEPROM_ADD_CRC_FST              0x00
  24 #define EEPROM_ADD_CRC_SEC              0x01
  25 #define EEPROM_ADD_CRC_CHK_START        0x04
  26 #define EEPROM_ADD_CRC_CHK_SIZE         0x48
  27 #define EEPROM_ADD_CAL_SIZE             0x4C
  28
  29 /* Information Cal */
  30 #define EEPROM_INFO_CRC_FST             0x60
  31 #define EEPROM_INFO_CRC_SEC             0x61
  32 #define EEPROM_INFO_CRC_CHK_START       0x64
  33 #define EEPROM_INFO_CRC_CHK_SIZE        0x36
  34 #define EEPROM_INFO_SERIAL_NUM_START    0x89
  35 #define EEPROM_INFO_SERIAL_NUM_SIZE     0x10
  36 #define EEPROM_INFO_CAL_SIZE            0x3A
  37
  38 /* AWB Cal */
  39 #define EEPROM_AWB_CRC_FST              0xB0
  40 #define EEPROM_AWB_CRC_SEC              0xB1
  41 #define EEPROM_AWB_CRC_CHK_START        0xB4
  42 #define EEPROM_AWB_CRC_CHK_SIZE         0x50
  43 #define EEPROM_AWB_CAL_SIZE             0x54
  44 #define EEPROM_AWB_LIMIT_OFFSET         0xD8
  45 #define EEPROM_AWB_GOLDEN_OFFSET        0xDC
  46 #define EEPROM_AWB_UNIT_OFFSET          0xE2
  47
  48 /* LSC Cal */
  49 #define EEPROM_LSC_CRC_FST              0x120
  50 #define EEPROM_LSC_CRC_SEC              0x121
  51 #define EEPROM_LSC_CRC_CHK_START        0x124
  52 #define EEPROM_LSC_CRC_CHK_SIZE         0x1374
  53 #define EEPROM_LSC_CAL_SIZE             0x1378
  54
  55 /* SFR Cal */
  56 #define EEPROM_SFR_CRC_FST              0x1500
  57 #define EEPROM_SFR_CRC_SEC              0x1501
  58 #define EEPROM_SFR_CRC_CHK_START        0x1504
  59 #define EEPROM_SFR_CRC_CHK_SIZE         0x64
  60 #define EEPROM_SFR_CAL_SIZE             0x68
  61
  62 #endif