51790b0
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] /
1 /*
2 * Handles the Intel 27x USB Device Controller (UDC)
3 *
4 * Inspired by original driver by Frank Becker, David Brownell, and others.
5 * Copyright (C) 2008 Robert Jarzmik
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27 #include <linux/delay.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/proc_fs.h>
31 #include <linux/clk.h>
32 #include <linux/irq.h>
33 #include <linux/gpio.h>
34
35 #include <asm/byteorder.h>
36 #include <mach/hardware.h>
37
38 #include <linux/usb.h>
39 #include <linux/usb/ch9.h>
40 #include <linux/usb/gadget.h>
41 #include <mach/udc.h>
42
43 #include "pxa27x_udc.h"
44
45 /*
46 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
47 * series processors.
48 *
49 * Such controller drivers work with a gadget driver. The gadget driver
50 * returns descriptors, implements configuration and data protocols used
51 * by the host to interact with this device, and allocates endpoints to
52 * the different protocol interfaces. The controller driver virtualizes
53 * usb hardware so that the gadget drivers will be more portable.
54 *
55 * This UDC hardware wants to implement a bit too much USB protocol. The
56 * biggest issues are: that the endpoints have to be set up before the
57 * controller can be enabled (minor, and not uncommon); and each endpoint
58 * can only have one configuration, interface and alternative interface
59 * number (major, and very unusual). Once set up, these cannot be changed
60 * without a controller reset.
61 *
62 * The workaround is to setup all combinations necessary for the gadgets which
63 * will work with this driver. This is done in pxa_udc structure, statically.
64 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
65 * (You could modify this if needed. Some drivers have a "fifo_mode" module
66 * parameter to facilitate such changes.)
67 *
68 * The combinations have been tested with these gadgets :
69 * - zero gadget
70 * - file storage gadget
71 * - ether gadget
72 *
73 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
74 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
75 *
76 * All the requests are handled the same way :
77 * - the drivers tries to handle the request directly to the IO
78 * - if the IO fifo is not big enough, the remaining is send/received in
79 * interrupt handling.
80 */
81
82 #define DRIVER_VERSION "2008-04-18"
83 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
84
85 static const char driver_name[] = "pxa27x_udc";
86 static struct pxa_udc *the_controller;
87
88 static void handle_ep(struct pxa_ep *ep);
89
90 /*
91 * Debug filesystem
92 */
93 #ifdef CONFIG_USB_GADGET_DEBUG_FS
94
95 #include <linux/debugfs.h>
96 #include <linux/uaccess.h>
97 #include <linux/seq_file.h>
98
99 static int state_dbg_show(struct seq_file *s, void *p)
100 {
101 struct pxa_udc *udc = s->private;
102 int pos = 0, ret;
103 u32 tmp;
104
105 ret = -ENODEV;
106 if (!udc->driver)
107 goto out;
108
109 /* basic device status */
110 pos += seq_printf(s, DRIVER_DESC "\n"
111 "%s version: %s\nGadget driver: %s\n",
112 driver_name, DRIVER_VERSION,
113 udc->driver ? udc->driver->driver.name : "(none)");
114
115 tmp = udc_readl(udc, UDCCR);
116 pos += seq_printf(s,
117 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
118 "con=%d,inter=%d,altinter=%d\n", tmp,
119 (tmp & UDCCR_OEN) ? " oen":"",
120 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
121 (tmp & UDCCR_AHNP) ? " rem" : "",
122 (tmp & UDCCR_BHNP) ? " rstir" : "",
123 (tmp & UDCCR_DWRE) ? " dwre" : "",
124 (tmp & UDCCR_SMAC) ? " smac" : "",
125 (tmp & UDCCR_EMCE) ? " emce" : "",
126 (tmp & UDCCR_UDR) ? " udr" : "",
127 (tmp & UDCCR_UDA) ? " uda" : "",
128 (tmp & UDCCR_UDE) ? " ude" : "",
129 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
130 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
131 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
132 /* registers for device and ep0 */
133 pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
134 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
135 pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
136 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
137 pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
138 pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
139 "reconfig=%lu\n",
140 udc->stats.irqs_reset, udc->stats.irqs_suspend,
141 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
142
143 ret = 0;
144 out:
145 return ret;
146 }
147
148 static int queues_dbg_show(struct seq_file *s, void *p)
149 {
150 struct pxa_udc *udc = s->private;
151 struct pxa_ep *ep;
152 struct pxa27x_request *req;
153 int pos = 0, i, maxpkt, ret;
154
155 ret = -ENODEV;
156 if (!udc->driver)
157 goto out;
158
159 /* dump endpoint queues */
160 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
161 ep = &udc->pxa_ep[i];
162 maxpkt = ep->fifo_size;
163 pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
164 EPNAME(ep), maxpkt, "pio");
165
166 if (list_empty(&ep->queue)) {
167 pos += seq_printf(s, "\t(nothing queued)\n");
168 continue;
169 }
170
171 list_for_each_entry(req, &ep->queue, queue) {
172 pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
173 &req->req, req->req.actual,
174 req->req.length, req->req.buf);
175 }
176 }
177
178 ret = 0;
179 out:
180 return ret;
181 }
182
183 static int eps_dbg_show(struct seq_file *s, void *p)
184 {
185 struct pxa_udc *udc = s->private;
186 struct pxa_ep *ep;
187 int pos = 0, i, ret;
188 u32 tmp;
189
190 ret = -ENODEV;
191 if (!udc->driver)
192 goto out;
193
194 ep = &udc->pxa_ep[0];
195 tmp = udc_ep_readl(ep, UDCCSR);
196 pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
197 (tmp & UDCCSR0_SA) ? " sa" : "",
198 (tmp & UDCCSR0_RNE) ? " rne" : "",
199 (tmp & UDCCSR0_FST) ? " fst" : "",
200 (tmp & UDCCSR0_SST) ? " sst" : "",
201 (tmp & UDCCSR0_DME) ? " dme" : "",
202 (tmp & UDCCSR0_IPR) ? " ipr" : "",
203 (tmp & UDCCSR0_OPC) ? " opc" : "");
204 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
205 ep = &udc->pxa_ep[i];
206 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
207 pos += seq_printf(s, "%-12s: "
208 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
209 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
210 "udcbcr=%d\n",
211 EPNAME(ep),
212 ep->stats.in_bytes, ep->stats.in_ops,
213 ep->stats.out_bytes, ep->stats.out_ops,
214 ep->stats.irqs,
215 tmp, udc_ep_readl(ep, UDCCSR),
216 udc_ep_readl(ep, UDCBCR));
217 }
218
219 ret = 0;
220 out:
221 return ret;
222 }
223
224 static int eps_dbg_open(struct inode *inode, struct file *file)
225 {
226 return single_open(file, eps_dbg_show, inode->i_private);
227 }
228
229 static int queues_dbg_open(struct inode *inode, struct file *file)
230 {
231 return single_open(file, queues_dbg_show, inode->i_private);
232 }
233
234 static int state_dbg_open(struct inode *inode, struct file *file)
235 {
236 return single_open(file, state_dbg_show, inode->i_private);
237 }
238
239 static const struct file_operations state_dbg_fops = {
240 .owner = THIS_MODULE,
241 .open = state_dbg_open,
242 .llseek = seq_lseek,
243 .read = seq_read,
244 .release = single_release,
245 };
246
247 static const struct file_operations queues_dbg_fops = {
248 .owner = THIS_MODULE,
249 .open = queues_dbg_open,
250 .llseek = seq_lseek,
251 .read = seq_read,
252 .release = single_release,
253 };
254
255 static const struct file_operations eps_dbg_fops = {
256 .owner = THIS_MODULE,
257 .open = eps_dbg_open,
258 .llseek = seq_lseek,
259 .read = seq_read,
260 .release = single_release,
261 };
262
263 static void pxa_init_debugfs(struct pxa_udc *udc)
264 {
265 struct dentry *root, *state, *queues, *eps;
266
267 root = debugfs_create_dir(udc->gadget.name, NULL);
268 if (IS_ERR(root) || !root)
269 goto err_root;
270
271 state = debugfs_create_file("udcstate", 0400, root, udc,
272 &state_dbg_fops);
273 if (!state)
274 goto err_state;
275 queues = debugfs_create_file("queues", 0400, root, udc,
276 &queues_dbg_fops);
277 if (!queues)
278 goto err_queues;
279 eps = debugfs_create_file("epstate", 0400, root, udc,
280 &eps_dbg_fops);
281 if (!eps)
282 goto err_eps;
283
284 udc->debugfs_root = root;
285 udc->debugfs_state = state;
286 udc->debugfs_queues = queues;
287 udc->debugfs_eps = eps;
288 return;
289 err_eps:
290 debugfs_remove(eps);
291 err_queues:
292 debugfs_remove(queues);
293 err_state:
294 debugfs_remove(root);
295 err_root:
296 dev_err(udc->dev, "debugfs is not available\n");
297 }
298
299 static void pxa_cleanup_debugfs(struct pxa_udc *udc)
300 {
301 debugfs_remove(udc->debugfs_eps);
302 debugfs_remove(udc->debugfs_queues);
303 debugfs_remove(udc->debugfs_state);
304 debugfs_remove(udc->debugfs_root);
305 udc->debugfs_eps = NULL;
306 udc->debugfs_queues = NULL;
307 udc->debugfs_state = NULL;
308 udc->debugfs_root = NULL;
309 }
310
311 #else
312 static inline void pxa_init_debugfs(struct pxa_udc *udc)
313 {
314 }
315
316 static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
317 {
318 }
319 #endif
320
321 /**
322 * is_match_usb_pxa - check if usb_ep and pxa_ep match
323 * @udc_usb_ep: usb endpoint
324 * @ep: pxa endpoint
325 * @config: configuration required in pxa_ep
326 * @interface: interface required in pxa_ep
327 * @altsetting: altsetting required in pxa_ep
328 *
329 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
330 */
331 static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
332 int config, int interface, int altsetting)
333 {
334 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
335 return 0;
336 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
337 return 0;
338 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
339 return 0;
340 if ((ep->config != config) || (ep->interface != interface)
341 || (ep->alternate != altsetting))
342 return 0;
343 return 1;
344 }
345
346 /**
347 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
348 * @udc: pxa udc
349 * @udc_usb_ep: udc_usb_ep structure
350 *
351 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
352 * This is necessary because of the strong pxa hardware restriction requiring
353 * that once pxa endpoints are initialized, their configuration is freezed, and
354 * no change can be made to their address, direction, or in which configuration,
355 * interface or altsetting they are active ... which differs from more usual
356 * models which have endpoints be roughly just addressable fifos, and leave
357 * configuration events up to gadget drivers (like all control messages).
358 *
359 * Note that there is still a blurred point here :
360 * - we rely on UDCCR register "active interface" and "active altsetting".
361 * This is a nonsense in regard of USB spec, where multiple interfaces are
362 * active at the same time.
363 * - if we knew for sure that the pxa can handle multiple interface at the
364 * same time, assuming Intel's Developer Guide is wrong, this function
365 * should be reviewed, and a cache of couples (iface, altsetting) should
366 * be kept in the pxa_udc structure. In this case this function would match
367 * against the cache of couples instead of the "last altsetting" set up.
368 *
369 * Returns the matched pxa_ep structure or NULL if none found
370 */
371 static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
372 struct udc_usb_ep *udc_usb_ep)
373 {
374 int i;
375 struct pxa_ep *ep;
376 int cfg = udc->config;
377 int iface = udc->last_interface;
378 int alt = udc->last_alternate;
379
380 if (udc_usb_ep == &udc->udc_usb_ep[0])
381 return &udc->pxa_ep[0];
382
383 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
384 ep = &udc->pxa_ep[i];
385 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
386 return ep;
387 }
388 return NULL;
389 }
390
391 /**
392 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
393 * @udc: pxa udc
394 *
395 * Context: in_interrupt()
396 *
397 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
398 * previously set up (and is not NULL). The update is necessary is a
399 * configuration change or altsetting change was issued by the USB host.
400 */
401 static void update_pxa_ep_matches(struct pxa_udc *udc)
402 {
403 int i;
404 struct udc_usb_ep *udc_usb_ep;
405
406 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
407 udc_usb_ep = &udc->udc_usb_ep[i];
408 if (udc_usb_ep->pxa_ep)
409 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
410 }
411 }
412
413 /**
414 * pio_irq_enable - Enables irq generation for one endpoint
415 * @ep: udc endpoint
416 */
417 static void pio_irq_enable(struct pxa_ep *ep)
418 {
419 struct pxa_udc *udc = ep->dev;
420 int index = EPIDX(ep);
421 u32 udcicr0 = udc_readl(udc, UDCICR0);
422 u32 udcicr1 = udc_readl(udc, UDCICR1);
423
424 if (index < 16)
425 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
426 else
427 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
428 }
429
430 /**
431 * pio_irq_disable - Disables irq generation for one endpoint
432 * @ep: udc endpoint
433 */
434 static void pio_irq_disable(struct pxa_ep *ep)
435 {
436 struct pxa_udc *udc = ep->dev;
437 int index = EPIDX(ep);
438 u32 udcicr0 = udc_readl(udc, UDCICR0);
439 u32 udcicr1 = udc_readl(udc, UDCICR1);
440
441 if (index < 16)
442 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
443 else
444 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
445 }
446
447 /**
448 * udc_set_mask_UDCCR - set bits in UDCCR
449 * @udc: udc device
450 * @mask: bits to set in UDCCR
451 *
452 * Sets bits in UDCCR, leaving DME and FST bits as they were.
453 */
454 static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
455 {
456 u32 udccr = udc_readl(udc, UDCCR);
457 udc_writel(udc, UDCCR,
458 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
459 }
460
461 /**
462 * udc_clear_mask_UDCCR - clears bits in UDCCR
463 * @udc: udc device
464 * @mask: bit to clear in UDCCR
465 *
466 * Clears bits in UDCCR, leaving DME and FST bits as they were.
467 */
468 static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
469 {
470 u32 udccr = udc_readl(udc, UDCCR);
471 udc_writel(udc, UDCCR,
472 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
473 }
474
475 /**
476 * ep_count_bytes_remain - get how many bytes in udc endpoint
477 * @ep: udc endpoint
478 *
479 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
480 */
481 static int ep_count_bytes_remain(struct pxa_ep *ep)
482 {
483 if (ep->dir_in)
484 return -EOPNOTSUPP;
485 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
486 }
487
488 /**
489 * ep_is_empty - checks if ep has byte ready for reading
490 * @ep: udc endpoint
491 *
492 * If endpoint is the control endpoint, checks if there are bytes in the
493 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
494 * are ready for reading on OUT endpoint.
495 *
496 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
497 */
498 static int ep_is_empty(struct pxa_ep *ep)
499 {
500 int ret;
501
502 if (!is_ep0(ep) && ep->dir_in)
503 return -EOPNOTSUPP;
504 if (is_ep0(ep))
505 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
506 else
507 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
508 return ret;
509 }
510
511 /**
512 * ep_is_full - checks if ep has place to write bytes
513 * @ep: udc endpoint
514 *
515 * If endpoint is not the control endpoint and is an IN endpoint, checks if
516 * there is place to write bytes into the endpoint.
517 *
518 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
519 */
520 static int ep_is_full(struct pxa_ep *ep)
521 {
522 if (is_ep0(ep))
523 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
524 if (!ep->dir_in)
525 return -EOPNOTSUPP;
526 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
527 }
528
529 /**
530 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
531 * @ep: pxa endpoint
532 *
533 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
534 */
535 static int epout_has_pkt(struct pxa_ep *ep)
536 {
537 if (!is_ep0(ep) && ep->dir_in)
538 return -EOPNOTSUPP;
539 if (is_ep0(ep))
540 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
541 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
542 }
543
544 /**
545 * set_ep0state - Set ep0 automata state
546 * @dev: udc device
547 * @state: state
548 */
549 static void set_ep0state(struct pxa_udc *udc, int state)
550 {
551 struct pxa_ep *ep = &udc->pxa_ep[0];
552 char *old_stname = EP0_STNAME(udc);
553
554 udc->ep0state = state;
555 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
556 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
557 udc_ep_readl(ep, UDCBCR));
558 }
559
560 /**
561 * ep0_idle - Put control endpoint into idle state
562 * @dev: udc device
563 */
564 static void ep0_idle(struct pxa_udc *dev)
565 {
566 set_ep0state(dev, WAIT_FOR_SETUP);
567 }
568
569 /**
570 * inc_ep_stats_reqs - Update ep stats counts
571 * @ep: physical endpoint
572 * @req: usb request
573 * @is_in: ep direction (USB_DIR_IN or 0)
574 *
575 */
576 static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
577 {
578 if (is_in)
579 ep->stats.in_ops++;
580 else
581 ep->stats.out_ops++;
582 }
583
584 /**
585 * inc_ep_stats_bytes - Update ep stats counts
586 * @ep: physical endpoint
587 * @count: bytes transfered on endpoint
588 * @is_in: ep direction (USB_DIR_IN or 0)
589 */
590 static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
591 {
592 if (is_in)
593 ep->stats.in_bytes += count;
594 else
595 ep->stats.out_bytes += count;
596 }
597
598 /**
599 * pxa_ep_setup - Sets up an usb physical endpoint
600 * @ep: pxa27x physical endpoint
601 *
602 * Find the physical pxa27x ep, and setup its UDCCR
603 */
604 static __init void pxa_ep_setup(struct pxa_ep *ep)
605 {
606 u32 new_udccr;
607
608 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
609 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
610 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
611 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
612 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
613 | ((ep->dir_in) ? UDCCONR_ED : 0)
614 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
615 | UDCCONR_EE;
616
617 udc_ep_writel(ep, UDCCR, new_udccr);
618 }
619
620 /**
621 * pxa_eps_setup - Sets up all usb physical endpoints
622 * @dev: udc device
623 *
624 * Setup all pxa physical endpoints, except ep0
625 */
626 static __init void pxa_eps_setup(struct pxa_udc *dev)
627 {
628 unsigned int i;
629
630 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
631
632 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
633 pxa_ep_setup(&dev->pxa_ep[i]);
634 }
635
636 /**
637 * pxa_ep_alloc_request - Allocate usb request
638 * @_ep: usb endpoint
639 * @gfp_flags:
640 *
641 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
642 * must still pass correctly initialized endpoints, since other controller
643 * drivers may care about how it's currently set up (dma issues etc).
644 */
645 static struct usb_request *
646 pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
647 {
648 struct pxa27x_request *req;
649
650 req = kzalloc(sizeof *req, gfp_flags);
651 if (!req)
652 return NULL;
653
654 INIT_LIST_HEAD(&req->queue);
655 req->in_use = 0;
656 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
657
658 return &req->req;
659 }
660
661 /**
662 * pxa_ep_free_request - Free usb request
663 * @_ep: usb endpoint
664 * @_req: usb request
665 *
666 * Wrapper around kfree to free _req
667 */
668 static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
669 {
670 struct pxa27x_request *req;
671
672 req = container_of(_req, struct pxa27x_request, req);
673 WARN_ON(!list_empty(&req->queue));
674 kfree(req);
675 }
676
677 /**
678 * ep_add_request - add a request to the endpoint's queue
679 * @ep: usb endpoint
680 * @req: usb request
681 *
682 * Context: ep->lock held
683 *
684 * Queues the request in the endpoint's queue, and enables the interrupts
685 * on the endpoint.
686 */
687 static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
688 {
689 if (unlikely(!req))
690 return;
691 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
692 req->req.length, udc_ep_readl(ep, UDCCSR));
693
694 req->in_use = 1;
695 list_add_tail(&req->queue, &ep->queue);
696 pio_irq_enable(ep);
697 }
698
699 /**
700 * ep_del_request - removes a request from the endpoint's queue
701 * @ep: usb endpoint
702 * @req: usb request
703 *
704 * Context: ep->lock held
705 *
706 * Unqueue the request from the endpoint's queue. If there are no more requests
707 * on the endpoint, and if it's not the control endpoint, interrupts are
708 * disabled on the endpoint.
709 */
710 static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
711 {
712 if (unlikely(!req))
713 return;
714 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
715 req->req.length, udc_ep_readl(ep, UDCCSR));
716
717 list_del_init(&req->queue);
718 req->in_use = 0;
719 if (!is_ep0(ep) && list_empty(&ep->queue))
720 pio_irq_disable(ep);
721 }
722
723 /**
724 * req_done - Complete an usb request
725 * @ep: pxa physical endpoint
726 * @req: pxa request
727 * @status: usb request status sent to gadget API
728 *
729 * Context: ep->lock held
730 *
731 * Retire a pxa27x usb request. Endpoint must be locked.
732 */
733 static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status)
734 {
735 ep_del_request(ep, req);
736 if (likely(req->req.status == -EINPROGRESS))
737 req->req.status = status;
738 else
739 status = req->req.status;
740
741 if (status && status != -ESHUTDOWN)
742 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
743 &req->req, status,
744 req->req.actual, req->req.length);
745
746 req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
747 }
748
749 /**
750 * ep_end_out_req - Ends endpoint OUT request
751 * @ep: physical endpoint
752 * @req: pxa request
753 *
754 * Context: ep->lock held
755 *
756 * Ends endpoint OUT request (completes usb request).
757 */
758 static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req)
759 {
760 inc_ep_stats_reqs(ep, !USB_DIR_IN);
761 req_done(ep, req, 0);
762 }
763
764 /**
765 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
766 * @ep: physical endpoint
767 * @req: pxa request
768 *
769 * Context: ep->lock held
770 *
771 * Ends control endpoint OUT request (completes usb request), and puts
772 * control endpoint into idle state
773 */
774 static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req)
775 {
776 set_ep0state(ep->dev, OUT_STATUS_STAGE);
777 ep_end_out_req(ep, req);
778 ep0_idle(ep->dev);
779 }
780
781 /**
782 * ep_end_in_req - Ends endpoint IN request
783 * @ep: physical endpoint
784 * @req: pxa request
785 *
786 * Context: ep->lock held
787 *
788 * Ends endpoint IN request (completes usb request).
789 */
790 static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req)
791 {
792 inc_ep_stats_reqs(ep, USB_DIR_IN);
793 req_done(ep, req, 0);
794 }
795
796 /**
797 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
798 * @ep: physical endpoint
799 * @req: pxa request
800 *
801 * Context: ep->lock held
802 *
803 * Ends control endpoint IN request (completes usb request), and puts
804 * control endpoint into status state
805 */
806 static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req)
807 {
808 set_ep0state(ep->dev, IN_STATUS_STAGE);
809 ep_end_in_req(ep, req);
810 }
811
812 /**
813 * nuke - Dequeue all requests
814 * @ep: pxa endpoint
815 * @status: usb request status
816 *
817 * Context: ep->lock held
818 *
819 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
820 * disabled on that endpoint (because no more requests).
821 */
822 static void nuke(struct pxa_ep *ep, int status)
823 {
824 struct pxa27x_request *req;
825
826 while (!list_empty(&ep->queue)) {
827 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
828 req_done(ep, req, status);
829 }
830 }
831
832 /**
833 * read_packet - transfer 1 packet from an OUT endpoint into request
834 * @ep: pxa physical endpoint
835 * @req: usb request
836 *
837 * Takes bytes from OUT endpoint and transfers them info the usb request.
838 * If there is less space in request than bytes received in OUT endpoint,
839 * bytes are left in the OUT endpoint.
840 *
841 * Returns how many bytes were actually transfered
842 */
843 static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
844 {
845 u32 *buf;
846 int bytes_ep, bufferspace, count, i;
847
848 bytes_ep = ep_count_bytes_remain(ep);
849 bufferspace = req->req.length - req->req.actual;
850
851 buf = (u32 *)(req->req.buf + req->req.actual);
852 prefetchw(buf);
853
854 if (likely(!ep_is_empty(ep)))
855 count = min(bytes_ep, bufferspace);
856 else /* zlp */
857 count = 0;
858
859 for (i = count; i > 0; i -= 4)
860 *buf++ = udc_ep_readl(ep, UDCDR);
861 req->req.actual += count;
862
863 udc_ep_writel(ep, UDCCSR, UDCCSR_PC);
864
865 return count;
866 }
867
868 /**
869 * write_packet - transfer 1 packet from request into an IN endpoint
870 * @ep: pxa physical endpoint
871 * @req: usb request
872 * @max: max bytes that fit into endpoint
873 *
874 * Takes bytes from usb request, and transfers them into the physical
875 * endpoint. If there are no bytes to transfer, doesn't write anything
876 * to physical endpoint.
877 *
878 * Returns how many bytes were actually transfered.
879 */
880 static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
881 unsigned int max)
882 {
883 int length, count, remain, i;
884 u32 *buf;
885 u8 *buf_8;
886
887 buf = (u32 *)(req->req.buf + req->req.actual);
888 prefetch(buf);
889
890 length = min(req->req.length - req->req.actual, max);
891 req->req.actual += length;
892
893 remain = length & 0x3;
894 count = length & ~(0x3);
895 for (i = count; i > 0 ; i -= 4)
896 udc_ep_writel(ep, UDCDR, *buf++);
897
898 buf_8 = (u8 *)buf;
899 for (i = remain; i > 0; i--)
900 udc_ep_writeb(ep, UDCDR, *buf_8++);
901
902 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
903 udc_ep_readl(ep, UDCCSR));
904
905 return length;
906 }
907
908 /**
909 * read_fifo - Transfer packets from OUT endpoint into usb request
910 * @ep: pxa physical endpoint
911 * @req: usb request
912 *
913 * Context: callable when in_interrupt()
914 *
915 * Unload as many packets as possible from the fifo we use for usb OUT
916 * transfers and put them into the request. Caller should have made sure
917 * there's at least one packet ready.
918 * Doesn't complete the request, that's the caller's job
919 *
920 * Returns 1 if the request completed, 0 otherwise
921 */
922 static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
923 {
924 int count, is_short, completed = 0;
925
926 while (epout_has_pkt(ep)) {
927 count = read_packet(ep, req);
928 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
929
930 is_short = (count < ep->fifo_size);
931 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
932 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
933 &req->req, req->req.actual, req->req.length);
934
935 /* completion */
936 if (is_short || req->req.actual == req->req.length) {
937 completed = 1;
938 break;
939 }
940 /* finished that packet. the next one may be waiting... */
941 }
942 return completed;
943 }
944
945 /**
946 * write_fifo - transfer packets from usb request into an IN endpoint
947 * @ep: pxa physical endpoint
948 * @req: pxa usb request
949 *
950 * Write to an IN endpoint fifo, as many packets as possible.
951 * irqs will use this to write the rest later.
952 * caller guarantees at least one packet buffer is ready (or a zlp).
953 * Doesn't complete the request, that's the caller's job
954 *
955 * Returns 1 if request fully transfered, 0 if partial transfer
956 */
957 static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
958 {
959 unsigned max;
960 int count, is_short, is_last = 0, completed = 0, totcount = 0;
961 u32 udccsr;
962
963 max = ep->fifo_size;
964 do {
965 is_short = 0;
966
967 udccsr = udc_ep_readl(ep, UDCCSR);
968 if (udccsr & UDCCSR_PC) {
969 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
970 udccsr);
971 udc_ep_writel(ep, UDCCSR, UDCCSR_PC);
972 }
973 if (udccsr & UDCCSR_TRN) {
974 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
975 udccsr);
976 udc_ep_writel(ep, UDCCSR, UDCCSR_TRN);
977 }
978
979 count = write_packet(ep, req, max);
980 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
981 totcount += count;
982
983 /* last packet is usually short (or a zlp) */
984 if (unlikely(count < max)) {
985 is_last = 1;
986 is_short = 1;
987 } else {
988 if (likely(req->req.length > req->req.actual)
989 || req->req.zero)
990 is_last = 0;
991 else
992 is_last = 1;
993 /* interrupt/iso maxpacket may not fill the fifo */
994 is_short = unlikely(max < ep->fifo_size);
995 }
996
997 if (is_short)
998 udc_ep_writel(ep, UDCCSR, UDCCSR_SP);
999
1000 /* requests complete when all IN data is in the FIFO */
1001 if (is_last) {
1002 completed = 1;
1003 break;
1004 }
1005 } while (!ep_is_full(ep));
1006
1007 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1008 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1009 req->req.length - req->req.actual, &req->req);
1010
1011 return completed;
1012 }
1013
1014 /**
1015 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1016 * @ep: control endpoint
1017 * @req: pxa usb request
1018 *
1019 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1020 * endpoint as can be read, and stores them into usb request (limited by request
1021 * maximum length).
1022 *
1023 * Returns 0 if usb request only partially filled, 1 if fully filled
1024 */
1025 static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1026 {
1027 int count, is_short, completed = 0;
1028
1029 while (epout_has_pkt(ep)) {
1030 count = read_packet(ep, req);
1031 udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC);
1032 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1033
1034 is_short = (count < ep->fifo_size);
1035 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1036 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1037 &req->req, req->req.actual, req->req.length);
1038
1039 if (is_short || req->req.actual >= req->req.length) {
1040 completed = 1;
1041 break;
1042 }
1043 }
1044
1045 return completed;
1046 }
1047
1048 /**
1049 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1050 * @ep: control endpoint
1051 * @req: request
1052 *
1053 * Context: callable when in_interrupt()
1054 *
1055 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1056 * If the request doesn't fit, the remaining part will be sent from irq.
1057 * The request is considered fully written only if either :
1058 * - last write transfered all remaining bytes, but fifo was not fully filled
1059 * - last write was a 0 length write
1060 *
1061 * Returns 1 if request fully written, 0 if request only partially sent
1062 */
1063 static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1064 {
1065 unsigned count;
1066 int is_last, is_short;
1067
1068 count = write_packet(ep, req, EP0_FIFO_SIZE);
1069 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1070
1071 is_short = (count < EP0_FIFO_SIZE);
1072 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1073
1074 /* Sends either a short packet or a 0 length packet */
1075 if (unlikely(is_short))
1076 udc_ep_writel(ep, UDCCSR, UDCCSR0_IPR);
1077
1078 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1079 count, is_short ? "/S" : "", is_last ? "/L" : "",
1080 req->req.length - req->req.actual,
1081 &req->req, udc_ep_readl(ep, UDCCSR));
1082
1083 return is_last;
1084 }
1085
1086 /**
1087 * pxa_ep_queue - Queue a request into an IN endpoint
1088 * @_ep: usb endpoint
1089 * @_req: usb request
1090 * @gfp_flags: flags
1091 *
1092 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1093 * in the special case of ep0 setup :
1094 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1095 *
1096 * Returns 0 if succedeed, error otherwise
1097 */
1098 static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1099 gfp_t gfp_flags)
1100 {
1101 struct udc_usb_ep *udc_usb_ep;
1102 struct pxa_ep *ep;
1103 struct pxa27x_request *req;
1104 struct pxa_udc *dev;
1105 unsigned long flags;
1106 int rc = 0;
1107 int is_first_req;
1108 unsigned length;
1109
1110 req = container_of(_req, struct pxa27x_request, req);
1111 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1112
1113 if (unlikely(!_req || !_req->complete || !_req->buf))
1114 return -EINVAL;
1115
1116 if (unlikely(!_ep))
1117 return -EINVAL;
1118
1119 dev = udc_usb_ep->dev;
1120 ep = udc_usb_ep->pxa_ep;
1121 if (unlikely(!ep))
1122 return -EINVAL;
1123
1124 dev = ep->dev;
1125 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1126 ep_dbg(ep, "bogus device state\n");
1127 return -ESHUTDOWN;
1128 }
1129
1130 /* iso is always one packet per request, that's the only way
1131 * we can report per-packet status. that also helps with dma.
1132 */
1133 if (unlikely(EPXFERTYPE_is_ISO(ep)
1134 && req->req.length > ep->fifo_size))
1135 return -EMSGSIZE;
1136
1137 spin_lock_irqsave(&ep->lock, flags);
1138
1139 is_first_req = list_empty(&ep->queue);
1140 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1141 _req, is_first_req ? "yes" : "no",
1142 _req->length, _req->buf);
1143
1144 if (!ep->enabled) {
1145 _req->status = -ESHUTDOWN;
1146 rc = -ESHUTDOWN;
1147 goto out;
1148 }
1149
1150 if (req->in_use) {
1151 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1152 goto out;
1153 }
1154
1155 length = _req->length;
1156 _req->status = -EINPROGRESS;
1157 _req->actual = 0;
1158
1159 ep_add_request(ep, req);
1160
1161 if (is_ep0(ep)) {
1162 switch (dev->ep0state) {
1163 case WAIT_ACK_SET_CONF_INTERF:
1164 if (length == 0) {
1165 ep_end_in_req(ep, req);
1166 } else {
1167 ep_err(ep, "got a request of %d bytes while"
1168 "in state WAIT_ACK_SET_CONF_INTERF\n",
1169 length);
1170 ep_del_request(ep, req);
1171 rc = -EL2HLT;
1172 }
1173 ep0_idle(ep->dev);
1174 break;
1175 case IN_DATA_STAGE:
1176 if (!ep_is_full(ep))
1177 if (write_ep0_fifo(ep, req))
1178 ep0_end_in_req(ep, req);
1179 break;
1180 case OUT_DATA_STAGE:
1181 if ((length == 0) || !epout_has_pkt(ep))
1182 if (read_ep0_fifo(ep, req))
1183 ep0_end_out_req(ep, req);
1184 break;
1185 default:
1186 ep_err(ep, "odd state %s to send me a request\n",
1187 EP0_STNAME(ep->dev));
1188 ep_del_request(ep, req);
1189 rc = -EL2HLT;
1190 break;
1191 }
1192 } else {
1193 handle_ep(ep);
1194 }
1195
1196 out:
1197 spin_unlock_irqrestore(&ep->lock, flags);
1198 return rc;
1199 }
1200
1201 /**
1202 * pxa_ep_dequeue - Dequeue one request
1203 * @_ep: usb endpoint
1204 * @_req: usb request
1205 *
1206 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1207 */
1208 static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1209 {
1210 struct pxa_ep *ep;
1211 struct udc_usb_ep *udc_usb_ep;
1212 struct pxa27x_request *req;
1213 unsigned long flags;
1214 int rc = -EINVAL;
1215
1216 if (!_ep)
1217 return rc;
1218 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1219 ep = udc_usb_ep->pxa_ep;
1220 if (!ep || is_ep0(ep))
1221 return rc;
1222
1223 spin_lock_irqsave(&ep->lock, flags);
1224
1225 /* make sure it's actually queued on this endpoint */
1226 list_for_each_entry(req, &ep->queue, queue) {
1227 if (&req->req == _req) {
1228 req_done(ep, req, -ECONNRESET);
1229 rc = 0;
1230 break;
1231 }
1232 }
1233
1234 spin_unlock_irqrestore(&ep->lock, flags);
1235 return rc;
1236 }
1237
1238 /**
1239 * pxa_ep_set_halt - Halts operations on one endpoint
1240 * @_ep: usb endpoint
1241 * @value:
1242 *
1243 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1244 */
1245 static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1246 {
1247 struct pxa_ep *ep;
1248 struct udc_usb_ep *udc_usb_ep;
1249 unsigned long flags;
1250 int rc;
1251
1252
1253 if (!_ep)
1254 return -EINVAL;
1255 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1256 ep = udc_usb_ep->pxa_ep;
1257 if (!ep || is_ep0(ep))
1258 return -EINVAL;
1259
1260 if (value == 0) {
1261 /*
1262 * This path (reset toggle+halt) is needed to implement
1263 * SET_INTERFACE on normal hardware. but it can't be
1264 * done from software on the PXA UDC, and the hardware
1265 * forgets to do it as part of SET_INTERFACE automagic.
1266 */
1267 ep_dbg(ep, "only host can clear halt\n");
1268 return -EROFS;
1269 }
1270
1271 spin_lock_irqsave(&ep->lock, flags);
1272
1273 rc = -EAGAIN;
1274 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1275 goto out;
1276
1277 /* FST, FEF bits are the same for control and non control endpoints */
1278 rc = 0;
1279 udc_ep_writel(ep, UDCCSR, UDCCSR_FST | UDCCSR_FEF);
1280 if (is_ep0(ep))
1281 set_ep0state(ep->dev, STALL);
1282
1283 out:
1284 spin_unlock_irqrestore(&ep->lock, flags);
1285 return rc;
1286 }
1287
1288 /**
1289 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1290 * @_ep: usb endpoint
1291 *
1292 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1293 */
1294 static int pxa_ep_fifo_status(struct usb_ep *_ep)
1295 {
1296 struct pxa_ep *ep;
1297 struct udc_usb_ep *udc_usb_ep;
1298
1299 if (!_ep)
1300 return -ENODEV;
1301 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1302 ep = udc_usb_ep->pxa_ep;
1303 if (!ep || is_ep0(ep))
1304 return -ENODEV;
1305
1306 if (ep->dir_in)
1307 return -EOPNOTSUPP;
1308 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1309 return 0;
1310 else
1311 return ep_count_bytes_remain(ep) + 1;
1312 }
1313
1314 /**
1315 * pxa_ep_fifo_flush - Flushes one endpoint
1316 * @_ep: usb endpoint
1317 *
1318 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1319 */
1320 static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1321 {
1322 struct pxa_ep *ep;
1323 struct udc_usb_ep *udc_usb_ep;
1324 unsigned long flags;
1325
1326 if (!_ep)
1327 return;
1328 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1329 ep = udc_usb_ep->pxa_ep;
1330 if (!ep || is_ep0(ep))
1331 return;
1332
1333 spin_lock_irqsave(&ep->lock, flags);
1334
1335 if (unlikely(!list_empty(&ep->queue)))
1336 ep_dbg(ep, "called while queue list not empty\n");
1337 ep_dbg(ep, "called\n");
1338
1339 /* for OUT, just read and discard the FIFO contents. */
1340 if (!ep->dir_in) {
1341 while (!ep_is_empty(ep))
1342 udc_ep_readl(ep, UDCDR);
1343 } else {
1344 /* most IN status is the same, but ISO can't stall */
1345 udc_ep_writel(ep, UDCCSR,
1346 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1347 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1348 }
1349
1350 spin_unlock_irqrestore(&ep->lock, flags);
1351
1352 return;
1353 }
1354
1355 /**
1356 * pxa_ep_enable - Enables usb endpoint
1357 * @_ep: usb endpoint
1358 * @desc: usb endpoint descriptor
1359 *
1360 * Nothing much to do here, as ep configuration is done once and for all
1361 * before udc is enabled. After udc enable, no physical endpoint configuration
1362 * can be changed.
1363 * Function makes sanity checks and flushes the endpoint.
1364 */
1365 static int pxa_ep_enable(struct usb_ep *_ep,
1366 const struct usb_endpoint_descriptor *desc)
1367 {
1368 struct pxa_ep *ep;
1369 struct udc_usb_ep *udc_usb_ep;
1370 struct pxa_udc *udc;
1371
1372 if (!_ep || !desc)
1373 return -EINVAL;
1374
1375 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1376 if (udc_usb_ep->pxa_ep) {
1377 ep = udc_usb_ep->pxa_ep;
1378 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1379 _ep->name);
1380 } else {
1381 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1382 }
1383
1384 if (!ep || is_ep0(ep)) {
1385 dev_err(udc_usb_ep->dev->dev,
1386 "unable to match pxa_ep for ep %s\n",
1387 _ep->name);
1388 return -EINVAL;
1389 }
1390
1391 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1392 || (ep->type != usb_endpoint_type(desc))) {
1393 ep_err(ep, "type mismatch\n");
1394 return -EINVAL;
1395 }
1396
1397 if (ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) {
1398 ep_err(ep, "bad maxpacket\n");
1399 return -ERANGE;
1400 }
1401
1402 udc_usb_ep->pxa_ep = ep;
1403 udc = ep->dev;
1404
1405 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1406 ep_err(ep, "bogus device state\n");
1407 return -ESHUTDOWN;
1408 }
1409
1410 ep->enabled = 1;
1411
1412 /* flush fifo (mostly for OUT buffers) */
1413 pxa_ep_fifo_flush(_ep);
1414
1415 ep_dbg(ep, "enabled\n");
1416 return 0;
1417 }
1418
1419 /**
1420 * pxa_ep_disable - Disable usb endpoint
1421 * @_ep: usb endpoint
1422 *
1423 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1424 * changed.
1425 * Function flushes the endpoint and related requests.
1426 */
1427 static int pxa_ep_disable(struct usb_ep *_ep)
1428 {
1429 struct pxa_ep *ep;
1430 struct udc_usb_ep *udc_usb_ep;
1431 unsigned long flags;
1432
1433 if (!_ep)
1434 return -EINVAL;
1435
1436 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1437 ep = udc_usb_ep->pxa_ep;
1438 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1439 return -EINVAL;
1440
1441 spin_lock_irqsave(&ep->lock, flags);
1442 ep->enabled = 0;
1443 nuke(ep, -ESHUTDOWN);
1444 spin_unlock_irqrestore(&ep->lock, flags);
1445
1446 pxa_ep_fifo_flush(_ep);
1447 udc_usb_ep->pxa_ep = NULL;
1448
1449 ep_dbg(ep, "disabled\n");
1450 return 0;
1451 }
1452
1453 static struct usb_ep_ops pxa_ep_ops = {
1454 .enable = pxa_ep_enable,
1455 .disable = pxa_ep_disable,
1456
1457 .alloc_request = pxa_ep_alloc_request,
1458 .free_request = pxa_ep_free_request,
1459
1460 .queue = pxa_ep_queue,
1461 .dequeue = pxa_ep_dequeue,
1462
1463 .set_halt = pxa_ep_set_halt,
1464 .fifo_status = pxa_ep_fifo_status,
1465 .fifo_flush = pxa_ep_fifo_flush,
1466 };
1467
1468 /**
1469 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1470 * @udc: udc device
1471 * @on: 0 if disconnect pullup resistor, 1 otherwise
1472 * Context: any
1473 *
1474 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1475 * declare it as a full speed usb device
1476 */
1477 static void dplus_pullup(struct pxa_udc *udc, int on)
1478 {
1479 if (on) {
1480 if (gpio_is_valid(udc->mach->gpio_pullup))
1481 gpio_set_value(udc->mach->gpio_pullup,
1482 !udc->mach->gpio_pullup_inverted);
1483 if (udc->mach->udc_command)
1484 udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1485 } else {
1486 if (gpio_is_valid(udc->mach->gpio_pullup))
1487 gpio_set_value(udc->mach->gpio_pullup,
1488 udc->mach->gpio_pullup_inverted);
1489 if (udc->mach->udc_command)
1490 udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1491 }
1492 udc->pullup_on = on;
1493 }
1494
1495 /**
1496 * pxa_udc_get_frame - Returns usb frame number
1497 * @_gadget: usb gadget
1498 */
1499 static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1500 {
1501 struct pxa_udc *udc = to_gadget_udc(_gadget);
1502
1503 return (udc_readl(udc, UDCFNR) & 0x7ff);
1504 }
1505
1506 /**
1507 * pxa_udc_wakeup - Force udc device out of suspend
1508 * @_gadget: usb gadget
1509 *
1510 * Returns 0 if succesfull, error code otherwise
1511 */
1512 static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1513 {
1514 struct pxa_udc *udc = to_gadget_udc(_gadget);
1515
1516 /* host may not have enabled remote wakeup */
1517 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1518 return -EHOSTUNREACH;
1519 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1520 return 0;
1521 }
1522
1523 static void udc_enable(struct pxa_udc *udc);
1524 static void udc_disable(struct pxa_udc *udc);
1525
1526 /**
1527 * should_enable_udc - Tells if UDC should be enabled
1528 * @udc: udc device
1529 * Context: any
1530 *
1531 * The UDC should be enabled if :
1532
1533 * - the pullup resistor is connected
1534 * - and a gadget driver is bound
1535 * - and vbus is sensed (or no vbus sense is available)
1536 *
1537 * Returns 1 if UDC should be enabled, 0 otherwise
1538 */
1539 static int should_enable_udc(struct pxa_udc *udc)
1540 {
1541 int put_on;
1542
1543 put_on = ((udc->pullup_on) && (udc->driver));
1544 put_on &= ((udc->vbus_sensed) || (!udc->transceiver));
1545 return put_on;
1546 }
1547
1548 /**
1549 * should_disable_udc - Tells if UDC should be disabled
1550 * @udc: udc device
1551 * Context: any
1552 *
1553 * The UDC should be disabled if :
1554 * - the pullup resistor is not connected
1555 * - or no gadget driver is bound
1556 * - or no vbus is sensed (when vbus sesing is available)
1557 *
1558 * Returns 1 if UDC should be disabled
1559 */
1560 static int should_disable_udc(struct pxa_udc *udc)
1561 {
1562 int put_off;
1563
1564 put_off = ((!udc->pullup_on) || (!udc->driver));
1565 put_off |= ((!udc->vbus_sensed) && (udc->transceiver));
1566 return put_off;
1567 }
1568
1569 /**
1570 * pxa_udc_pullup - Offer manual D+ pullup control
1571 * @_gadget: usb gadget using the control
1572 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1573 * Context: !in_interrupt()
1574 *
1575 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1576 */
1577 static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1578 {
1579 struct pxa_udc *udc = to_gadget_udc(_gadget);
1580
1581 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1582 return -EOPNOTSUPP;
1583
1584 dplus_pullup(udc, is_active);
1585
1586 if (should_enable_udc(udc))
1587 udc_enable(udc);
1588 if (should_disable_udc(udc))
1589 udc_disable(udc);
1590 return 0;
1591 }
1592
1593 static void udc_enable(struct pxa_udc *udc);
1594 static void udc_disable(struct pxa_udc *udc);
1595
1596 /**
1597 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1598 * @_gadget: usb gadget
1599 * @is_active: 0 if should disable the udc, 1 if should enable
1600 *
1601 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1602 * udc, and deactivates D+ pullup resistor.
1603 *
1604 * Returns 0
1605 */
1606 static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1607 {
1608 struct pxa_udc *udc = to_gadget_udc(_gadget);
1609
1610 udc->vbus_sensed = is_active;
1611 if (should_enable_udc(udc))
1612 udc_enable(udc);
1613 if (should_disable_udc(udc))
1614 udc_disable(udc);
1615
1616 return 0;
1617 }
1618
1619 /**
1620 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1621 * @_gadget: usb gadget
1622 * @mA: current drawn
1623 *
1624 * Context: !in_interrupt()
1625 *
1626 * Called after a configuration was chosen by a USB host, to inform how much
1627 * current can be drawn by the device from VBus line.
1628 *
1629 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1630 */
1631 static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1632 {
1633 struct pxa_udc *udc;
1634
1635 udc = to_gadget_udc(_gadget);
1636 if (udc->transceiver)
1637 return otg_set_power(udc->transceiver, mA);
1638 return -EOPNOTSUPP;
1639 }
1640
1641 static const struct usb_gadget_ops pxa_udc_ops = {
1642 .get_frame = pxa_udc_get_frame,
1643 .wakeup = pxa_udc_wakeup,
1644 .pullup = pxa_udc_pullup,
1645 .vbus_session = pxa_udc_vbus_session,
1646 .vbus_draw = pxa_udc_vbus_draw,
1647 };
1648
1649 /**
1650 * udc_disable - disable udc device controller
1651 * @udc: udc device
1652 * Context: any
1653 *
1654 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1655 * interrupts.
1656 */
1657 static void udc_disable(struct pxa_udc *udc)
1658 {
1659 if (!udc->enabled)
1660 return;
1661
1662 udc_writel(udc, UDCICR0, 0);
1663 udc_writel(udc, UDCICR1, 0);
1664
1665 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1666 clk_disable(udc->clk);
1667
1668 ep0_idle(udc);
1669 udc->gadget.speed = USB_SPEED_UNKNOWN;
1670
1671 udc->enabled = 0;
1672 }
1673
1674 /**
1675 * udc_init_data - Initialize udc device data structures
1676 * @dev: udc device
1677 *
1678 * Initializes gadget endpoint list, endpoints locks. No action is taken
1679 * on the hardware.
1680 */
1681 static __init void udc_init_data(struct pxa_udc *dev)
1682 {
1683 int i;
1684 struct pxa_ep *ep;
1685
1686 /* device/ep0 records init */
1687 INIT_LIST_HEAD(&dev->gadget.ep_list);
1688 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1689 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1690 ep0_idle(dev);
1691
1692 /* PXA endpoints init */
1693 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1694 ep = &dev->pxa_ep[i];
1695
1696 ep->enabled = is_ep0(ep);
1697 INIT_LIST_HEAD(&ep->queue);
1698 spin_lock_init(&ep->lock);
1699 }
1700
1701 /* USB endpoints init */
1702 for (i = 1; i < NR_USB_ENDPOINTS; i++)
1703 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1704 &dev->gadget.ep_list);
1705 }
1706
1707 /**
1708 * udc_enable - Enables the udc device
1709 * @dev: udc device
1710 *
1711 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1712 * interrupts, sets usb as UDC client and setups endpoints.
1713 */
1714 static void udc_enable(struct pxa_udc *udc)
1715 {
1716 if (udc->enabled)
1717 return;
1718
1719 udc_writel(udc, UDCICR0, 0);
1720 udc_writel(udc, UDCICR1, 0);
1721 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1722
1723 clk_enable(udc->clk);
1724
1725 ep0_idle(udc);
1726 udc->gadget.speed = USB_SPEED_FULL;
1727 memset(&udc->stats, 0, sizeof(udc->stats));
1728
1729 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1730 udelay(2);
1731 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1732 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1733
1734 /*
1735 * Caller must be able to sleep in order to cope with startup transients
1736 */
1737 msleep(100);
1738
1739 /* enable suspend/resume and reset irqs */
1740 udc_writel(udc, UDCICR1,
1741 UDCICR1_IECC | UDCICR1_IERU
1742 | UDCICR1_IESU | UDCICR1_IERS);
1743
1744 /* enable ep0 irqs */
1745 pio_irq_enable(&udc->pxa_ep[0]);
1746
1747 udc->enabled = 1;
1748 }
1749
1750 /**
1751 * usb_gadget_register_driver - Register gadget driver
1752 * @driver: gadget driver
1753 *
1754 * When a driver is successfully registered, it will receive control requests
1755 * including set_configuration(), which enables non-control requests. Then
1756 * usb traffic follows until a disconnect is reported. Then a host may connect
1757 * again, or the driver might get unbound.
1758 *
1759 * Note that the udc is not automatically enabled. Check function
1760 * should_enable_udc().
1761 *
1762 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1763 */
1764 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1765 {
1766 struct pxa_udc *udc = the_controller;
1767 int retval;
1768
1769 if (!driver || driver->speed < USB_SPEED_FULL || !driver->bind
1770 || !driver->disconnect || !driver->setup)
1771 return -EINVAL;
1772 if (!udc)
1773 return -ENODEV;
1774 if (udc->driver)
1775 return -EBUSY;
1776
1777 /* first hook up the driver ... */
1778 udc->driver = driver;
1779 udc->gadget.dev.driver = &driver->driver;
1780 dplus_pullup(udc, 1);
1781
1782 retval = device_add(&udc->gadget.dev);
1783 if (retval) {
1784 dev_err(udc->dev, "device_add error %d\n", retval);
1785 goto add_fail;
1786 }
1787 retval = driver->bind(&udc->gadget);
1788 if (retval) {
1789 dev_err(udc->dev, "bind to driver %s --> error %d\n",
1790 driver->driver.name, retval);
1791 goto bind_fail;
1792 }
1793 dev_dbg(udc->dev, "registered gadget driver '%s'\n",
1794 driver->driver.name);
1795
1796 if (udc->transceiver) {
1797 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
1798 if (retval) {
1799 dev_err(udc->dev, "can't bind to transceiver\n");
1800 goto transceiver_fail;
1801 }
1802 }
1803
1804 if (should_enable_udc(udc))
1805 udc_enable(udc);
1806 return 0;
1807
1808 transceiver_fail:
1809 if (driver->unbind)
1810 driver->unbind(&udc->gadget);
1811 bind_fail:
1812 device_del(&udc->gadget.dev);
1813 add_fail:
1814 udc->driver = NULL;
1815 udc->gadget.dev.driver = NULL;
1816 return retval;
1817 }
1818 EXPORT_SYMBOL(usb_gadget_register_driver);
1819
1820
1821 /**
1822 * stop_activity - Stops udc endpoints
1823 * @udc: udc device
1824 * @driver: gadget driver
1825 *
1826 * Disables all udc endpoints (even control endpoint), report disconnect to
1827 * the gadget user.
1828 */
1829 static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1830 {
1831 int i;
1832
1833 /* don't disconnect drivers more than once */
1834 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1835 driver = NULL;
1836 udc->gadget.speed = USB_SPEED_UNKNOWN;
1837
1838 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1839 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1840
1841 if (driver)
1842 driver->disconnect(&udc->gadget);
1843 }
1844
1845 /**
1846 * usb_gadget_unregister_driver - Unregister the gadget driver
1847 * @driver: gadget driver
1848 *
1849 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1850 */
1851 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1852 {
1853 struct pxa_udc *udc = the_controller;
1854
1855 if (!udc)
1856 return -ENODEV;
1857 if (!driver || driver != udc->driver || !driver->unbind)
1858 return -EINVAL;
1859
1860 stop_activity(udc, driver);
1861 udc_disable(udc);
1862 dplus_pullup(udc, 0);
1863
1864 driver->unbind(&udc->gadget);
1865 udc->driver = NULL;
1866
1867 device_del(&udc->gadget.dev);
1868 dev_info(udc->dev, "unregistered gadget driver '%s'\n",
1869 driver->driver.name);
1870
1871 if (udc->transceiver)
1872 return otg_set_peripheral(udc->transceiver, NULL);
1873 return 0;
1874 }
1875 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1876
1877 /**
1878 * handle_ep0_ctrl_req - handle control endpoint control request
1879 * @udc: udc device
1880 * @req: control request
1881 */
1882 static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1883 struct pxa27x_request *req)
1884 {
1885 struct pxa_ep *ep = &udc->pxa_ep[0];
1886 union {
1887 struct usb_ctrlrequest r;
1888 u32 word[2];
1889 } u;
1890 int i;
1891 int have_extrabytes = 0;
1892
1893 nuke(ep, -EPROTO);
1894
1895 /*
1896 * In the PXA320 manual, in the section about Back-to-Back setup
1897 * packets, it describes this situation. The solution is to set OPC to
1898 * get rid of the status packet, and then continue with the setup
1899 * packet. Generalize to pxa27x CPUs.
1900 */
1901 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1902 udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC);
1903
1904 /* read SETUP packet */
1905 for (i = 0; i < 2; i++) {
1906 if (unlikely(ep_is_empty(ep)))
1907 goto stall;
1908 u.word[i] = udc_ep_readl(ep, UDCDR);
1909 }
1910
1911 have_extrabytes = !ep_is_empty(ep);
1912 while (!ep_is_empty(ep)) {
1913 i = udc_ep_readl(ep, UDCDR);
1914 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1915 }
1916
1917 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1918 u.r.bRequestType, u.r.bRequest,
1919 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1920 le16_to_cpu(u.r.wLength));
1921 if (unlikely(have_extrabytes))
1922 goto stall;
1923
1924 if (u.r.bRequestType & USB_DIR_IN)
1925 set_ep0state(udc, IN_DATA_STAGE);
1926 else
1927 set_ep0state(udc, OUT_DATA_STAGE);
1928
1929 /* Tell UDC to enter Data Stage */
1930 udc_ep_writel(ep, UDCCSR, UDCCSR0_SA | UDCCSR0_OPC);
1931
1932 i = udc->driver->setup(&udc->gadget, &u.r);
1933 if (i < 0)
1934 goto stall;
1935 out:
1936 return;
1937 stall:
1938 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1939 udc_ep_readl(ep, UDCCSR), i);
1940 udc_ep_writel(ep, UDCCSR, UDCCSR0_FST | UDCCSR0_FTF);
1941 set_ep0state(udc, STALL);
1942 goto out;
1943 }
1944
1945 /**
1946 * handle_ep0 - Handle control endpoint data transfers
1947 * @udc: udc device
1948 * @fifo_irq: 1 if triggered by fifo service type irq
1949 * @opc_irq: 1 if triggered by output packet complete type irq
1950 *
1951 * Context : when in_interrupt() or with ep->lock held
1952 *
1953 * Tries to transfer all pending request data into the endpoint and/or
1954 * transfer all pending data in the endpoint into usb requests.
1955 * Handles states of ep0 automata.
1956 *
1957 * PXA27x hardware handles several standard usb control requests without
1958 * driver notification. The requests fully handled by hardware are :
1959 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
1960 * GET_STATUS
1961 * The requests handled by hardware, but with irq notification are :
1962 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
1963 * The remaining standard requests really handled by handle_ep0 are :
1964 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
1965 * Requests standardized outside of USB 2.0 chapter 9 are handled more
1966 * uniformly, by gadget drivers.
1967 *
1968 * The control endpoint state machine is _not_ USB spec compliant, it's even
1969 * hardly compliant with Intel PXA270 developers guide.
1970 * The key points which inferred this state machine are :
1971 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
1972 * software.
1973 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
1974 * cleared by software.
1975 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
1976 * before reading ep0.
1977 * This is true only for PXA27x. This is not true anymore for PXA3xx family
1978 * (check Back-to-Back setup packet in developers guide).
1979 * - irq can be called on a "packet complete" event (opc_irq=1), while
1980 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
1981 * from experimentation).
1982 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
1983 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
1984 * => we never actually read the "status stage" packet of an IN data stage
1985 * => this is not documented in Intel documentation
1986 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
1987 * STAGE. The driver add STATUS STAGE to send last zero length packet in
1988 * OUT_STATUS_STAGE.
1989 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
1990 * event is detected, we terminate the status stage without ackowledging the
1991 * packet (not to risk to loose a potential SETUP packet)
1992 */
1993 static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
1994 {
1995 u32 udccsr0;
1996 struct pxa_ep *ep = &udc->pxa_ep[0];
1997 struct pxa27x_request *req = NULL;
1998 int completed = 0;
1999
2000 if (!list_empty(&ep->queue))
2001 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2002
2003 udccsr0 = udc_ep_readl(ep, UDCCSR);
2004 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2005 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2006 (fifo_irq << 1 | opc_irq));
2007
2008 if (udccsr0 & UDCCSR0_SST) {
2009 ep_dbg(ep, "clearing stall status\n");
2010 nuke(ep, -EPIPE);
2011 udc_ep_writel(ep, UDCCSR, UDCCSR0_SST);
2012 ep0_idle(udc);
2013 }
2014
2015 if (udccsr0 & UDCCSR0_SA) {
2016 nuke(ep, 0);
2017 set_ep0state(udc, SETUP_STAGE);
2018 }
2019
2020 switch (udc->ep0state) {
2021 case WAIT_FOR_SETUP:
2022 /*
2023 * Hardware bug : beware, we cannot clear OPC, since we would
2024 * miss a potential OPC irq for a setup packet.
2025 * So, we only do ... nothing, and hope for a next irq with
2026 * UDCCSR0_SA set.
2027 */
2028 break;
2029 case SETUP_STAGE:
2030 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2031 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2032 handle_ep0_ctrl_req(udc, req);
2033 break;
2034 case IN_DATA_STAGE: /* GET_DESCRIPTOR */
2035 if (epout_has_pkt(ep))
2036 udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC);
2037 if (req && !ep_is_full(ep))
2038 completed = write_ep0_fifo(ep, req);
2039 if (completed)
2040 ep0_end_in_req(ep, req);
2041 break;
2042 case OUT_DATA_STAGE: /* SET_DESCRIPTOR */
2043 if (epout_has_pkt(ep) && req)
2044 completed = read_ep0_fifo(ep, req);
2045 if (completed)
2046 ep0_end_out_req(ep, req);
2047 break;
2048 case STALL:
2049 udc_ep_writel(ep, UDCCSR, UDCCSR0_FST);
2050 break;
2051 case IN_STATUS_STAGE:
2052 /*
2053 * Hardware bug : beware, we cannot clear OPC, since we would
2054 * miss a potential PC irq for a setup packet.
2055 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2056 */
2057 if (opc_irq)
2058 ep0_idle(udc);
2059 break;
2060 case OUT_STATUS_STAGE:
2061 case WAIT_ACK_SET_CONF_INTERF:
2062 ep_warn(ep, "should never get in %s state here!!!\n",
2063 EP0_STNAME(ep->dev));
2064 ep0_idle(udc);
2065 break;
2066 }
2067 }
2068
2069 /**
2070 * handle_ep - Handle endpoint data tranfers
2071 * @ep: pxa physical endpoint
2072 *
2073 * Tries to transfer all pending request data into the endpoint and/or
2074 * transfer all pending data in the endpoint into usb requests.
2075 *
2076 * Is always called when in_interrupt() or with ep->lock held.
2077 */
2078 static void handle_ep(struct pxa_ep *ep)
2079 {
2080 struct pxa27x_request *req;
2081 int completed;
2082 u32 udccsr;
2083 int is_in = ep->dir_in;
2084 int loop = 0;
2085
2086 do {
2087 completed = 0;
2088 udccsr = udc_ep_readl(ep, UDCCSR);
2089 if (likely(!list_empty(&ep->queue)))
2090 req = list_entry(ep->queue.next,
2091 struct pxa27x_request, queue);
2092 else
2093 req = NULL;
2094
2095 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2096 req, udccsr, loop++);
2097
2098 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2099 udc_ep_writel(ep, UDCCSR,
2100 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2101 if (!req)
2102 break;
2103
2104 if (unlikely(is_in)) {
2105 if (likely(!ep_is_full(ep)))
2106 completed = write_fifo(ep, req);
2107 if (completed)
2108 ep_end_in_req(ep, req);
2109 } else {
2110 if (likely(epout_has_pkt(ep)))
2111 completed = read_fifo(ep, req);
2112 if (completed)
2113 ep_end_out_req(ep, req);
2114 }
2115 } while (completed);
2116 }
2117
2118 /**
2119 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2120 * @udc: udc device
2121 * @config: usb configuration
2122 *
2123 * Post the request to upper level.
2124 * Don't use any pxa specific harware configuration capabilities
2125 */
2126 static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2127 {
2128 struct usb_ctrlrequest req ;
2129
2130 dev_dbg(udc->dev, "config=%d\n", config);
2131
2132 udc->config = config;
2133 udc->last_interface = 0;
2134 udc->last_alternate = 0;
2135
2136 req.bRequestType = 0;
2137 req.bRequest = USB_REQ_SET_CONFIGURATION;
2138 req.wValue = config;
2139 req.wIndex = 0;
2140 req.wLength = 0;
2141
2142 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2143 udc->driver->setup(&udc->gadget, &req);
2144 }
2145
2146 /**
2147 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2148 * @udc: udc device
2149 * @iface: interface number
2150 * @alt: alternate setting number
2151 *
2152 * Post the request to upper level.
2153 * Don't use any pxa specific harware configuration capabilities
2154 */
2155 static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2156 {
2157 struct usb_ctrlrequest req;
2158
2159 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2160
2161 udc->last_interface = iface;
2162 udc->last_alternate = alt;
2163
2164 req.bRequestType = USB_RECIP_INTERFACE;
2165 req.bRequest = USB_REQ_SET_INTERFACE;
2166 req.wValue = alt;
2167 req.wIndex = iface;
2168 req.wLength = 0;
2169
2170 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2171 udc->driver->setup(&udc->gadget, &req);
2172 }
2173
2174 /*
2175 * irq_handle_data - Handle data transfer
2176 * @irq: irq IRQ number
2177 * @udc: dev pxa_udc device structure
2178 *
2179 * Called from irq handler, transferts data to or from endpoint to queue
2180 */
2181 static void irq_handle_data(int irq, struct pxa_udc *udc)
2182 {
2183 int i;
2184 struct pxa_ep *ep;
2185 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2186 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2187
2188 if (udcisr0 & UDCISR_INT_MASK) {
2189 udc->pxa_ep[0].stats.irqs++;
2190 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2191 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2192 !!(udcisr0 & UDCICR_PKTCOMPL));
2193 }
2194
2195 udcisr0 >>= 2;
2196 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2197 if (!(udcisr0 & UDCISR_INT_MASK))
2198 continue;
2199
2200 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2201 ep = &udc->pxa_ep[i];
2202 ep->stats.irqs++;
2203 handle_ep(ep);
2204 }
2205
2206 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2207 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2208 if (!(udcisr1 & UDCISR_INT_MASK))
2209 continue;
2210
2211 ep = &udc->pxa_ep[i];
2212 ep->stats.irqs++;
2213 handle_ep(ep);
2214 }
2215
2216 }
2217
2218 /**
2219 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2220 * @udc: udc device
2221 */
2222 static void irq_udc_suspend(struct pxa_udc *udc)
2223 {
2224 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2225 udc->stats.irqs_suspend++;
2226
2227 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2228 && udc->driver && udc->driver->suspend)
2229 udc->driver->suspend(&udc->gadget);
2230 ep0_idle(udc);
2231 }
2232
2233 /**
2234 * irq_udc_resume - Handle IRQ "UDC Resume"
2235 * @udc: udc device
2236 */
2237 static void irq_udc_resume(struct pxa_udc *udc)
2238 {
2239 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2240 udc->stats.irqs_resume++;
2241
2242 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2243 && udc->driver && udc->driver->resume)
2244 udc->driver->resume(&udc->gadget);
2245 }
2246
2247 /**
2248 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2249 * @udc: udc device
2250 */
2251 static void irq_udc_reconfig(struct pxa_udc *udc)
2252 {
2253 unsigned config, interface, alternate, config_change;
2254 u32 udccr = udc_readl(udc, UDCCR);
2255
2256 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2257 udc->stats.irqs_reconfig++;
2258
2259 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2260 config_change = (config != udc->config);
2261 pxa27x_change_configuration(udc, config);
2262
2263 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2264 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2265 pxa27x_change_interface(udc, interface, alternate);
2266
2267 if (config_change)
2268 update_pxa_ep_matches(udc);
2269 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2270 }
2271
2272 /**
2273 * irq_udc_reset - Handle IRQ "UDC Reset"
2274 * @udc: udc device
2275 */
2276 static void irq_udc_reset(struct pxa_udc *udc)
2277 {
2278 u32 udccr = udc_readl(udc, UDCCR);
2279 struct pxa_ep *ep = &udc->pxa_ep[0];
2280
2281 dev_info(udc->dev, "USB reset\n");
2282 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2283 udc->stats.irqs_reset++;
2284
2285 if ((udccr & UDCCR_UDA) == 0) {
2286 dev_dbg(udc->dev, "USB reset start\n");
2287 stop_activity(udc, udc->driver);
2288 }
2289 udc->gadget.speed = USB_SPEED_FULL;
2290 memset(&udc->stats, 0, sizeof udc->stats);
2291
2292 nuke(ep, -EPROTO);
2293 udc_ep_writel(ep, UDCCSR, UDCCSR0_FTF | UDCCSR0_OPC);
2294 ep0_idle(udc);
2295 }
2296
2297 /**
2298 * pxa_udc_irq - Main irq handler
2299 * @irq: irq number
2300 * @_dev: udc device
2301 *
2302 * Handles all udc interrupts
2303 */
2304 static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2305 {
2306 struct pxa_udc *udc = _dev;
2307 u32 udcisr0 = udc_readl(udc, UDCISR0);
2308 u32 udcisr1 = udc_readl(udc, UDCISR1);
2309 u32 udccr = udc_readl(udc, UDCCR);
2310 u32 udcisr1_spec;
2311
2312 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2313 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2314
2315 udcisr1_spec = udcisr1 & 0xf8000000;
2316 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2317 irq_udc_suspend(udc);
2318 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2319 irq_udc_resume(udc);
2320 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2321 irq_udc_reconfig(udc);
2322 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2323 irq_udc_reset(udc);
2324
2325 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2326 irq_handle_data(irq, udc);
2327
2328 return IRQ_HANDLED;
2329 }
2330
2331 static struct pxa_udc memory = {
2332 .gadget = {
2333 .ops = &pxa_udc_ops,
2334 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2335 .name = driver_name,
2336 .dev = {
2337 .init_name = "gadget",
2338 },
2339 },
2340
2341 .udc_usb_ep = {
2342 USB_EP_CTRL,
2343 USB_EP_OUT_BULK(1),
2344 USB_EP_IN_BULK(2),
2345 USB_EP_IN_ISO(3),
2346 USB_EP_OUT_ISO(4),
2347 USB_EP_IN_INT(5),
2348 },
2349
2350 .pxa_ep = {
2351 PXA_EP_CTRL,
2352 /* Endpoints for gadget zero */
2353 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2354 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2355 /* Endpoints for ether gadget, file storage gadget */
2356 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2357 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2358 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2359 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2360 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2361 /* Endpoints for RNDIS, serial */
2362 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2363 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2364 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2365 /*
2366 * All the following endpoints are only for completion. They
2367 * won't never work, as multiple interfaces are really broken on
2368 * the pxa.
2369 */
2370 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2371 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2372 /* Endpoint for CDC Ether */
2373 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2374 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2375 }
2376 };
2377
2378 /**
2379 * pxa_udc_probe - probes the udc device
2380 * @_dev: platform device
2381 *
2382 * Perform basic init : allocates udc clock, creates sysfs files, requests
2383 * irq.
2384 */
2385 static int __init pxa_udc_probe(struct platform_device *pdev)
2386 {
2387 struct resource *regs;
2388 struct pxa_udc *udc = &memory;
2389 int retval = 0, gpio;
2390
2391 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2392 if (!regs)
2393 return -ENXIO;
2394 udc->irq = platform_get_irq(pdev, 0);
2395 if (udc->irq < 0)
2396 return udc->irq;
2397
2398 udc->dev = &pdev->dev;
2399 udc->mach = pdev->dev.platform_data;
2400 udc->transceiver = otg_get_transceiver();
2401
2402 gpio = udc->mach->gpio_pullup;
2403 if (gpio_is_valid(gpio)) {
2404 retval = gpio_request(gpio, "USB D+ pullup");
2405 if (retval == 0)
2406 gpio_direction_output(gpio,
2407 udc->mach->gpio_pullup_inverted);
2408 }
2409 if (retval) {
2410 dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2411 gpio, retval);
2412 return retval;
2413 }
2414
2415 udc->clk = clk_get(&pdev->dev, NULL);
2416 if (IS_ERR(udc->clk)) {
2417 retval = PTR_ERR(udc->clk);
2418 goto err_clk;
2419 }
2420
2421 retval = -ENOMEM;
2422 udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
2423 if (!udc->regs) {
2424 dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2425 goto err_map;
2426 }
2427
2428 device_initialize(&udc->gadget.dev);
2429 udc->gadget.dev.parent = &pdev->dev;
2430 udc->gadget.dev.dma_mask = NULL;
2431 udc->vbus_sensed = 0;
2432
2433 the_controller = udc;
2434 platform_set_drvdata(pdev, udc);
2435 udc_init_data(udc);
2436 pxa_eps_setup(udc);
2437
2438 /* irq setup after old hardware state is cleaned up */
2439 retval = request_irq(udc->irq, pxa_udc_irq,
2440 IRQF_SHARED, driver_name, udc);
2441 if (retval != 0) {
2442 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2443 driver_name, IRQ_USB, retval);
2444 goto err_irq;
2445 }
2446
2447 pxa_init_debugfs(udc);
2448 return 0;
2449 err_irq:
2450 iounmap(udc->regs);
2451 err_map:
2452 clk_put(udc->clk);
2453 udc->clk = NULL;
2454 err_clk:
2455 return retval;
2456 }
2457
2458 /**
2459 * pxa_udc_remove - removes the udc device driver
2460 * @_dev: platform device
2461 */
2462 static int __exit pxa_udc_remove(struct platform_device *_dev)
2463 {
2464 struct pxa_udc *udc = platform_get_drvdata(_dev);
2465 int gpio = udc->mach->gpio_pullup;
2466
2467 usb_gadget_unregister_driver(udc->driver);
2468 free_irq(udc->irq, udc);
2469 pxa_cleanup_debugfs(udc);
2470 if (gpio_is_valid(gpio))
2471 gpio_free(gpio);
2472
2473 otg_put_transceiver(udc->transceiver);
2474
2475 udc->transceiver = NULL;
2476 platform_set_drvdata(_dev, NULL);
2477 the_controller = NULL;
2478 clk_put(udc->clk);
2479 iounmap(udc->regs);
2480
2481 return 0;
2482 }
2483
2484 static void pxa_udc_shutdown(struct platform_device *_dev)
2485 {
2486 struct pxa_udc *udc = platform_get_drvdata(_dev);
2487
2488 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2489 udc_disable(udc);
2490 }
2491
2492 #ifdef CONFIG_CPU_PXA27x
2493 extern void pxa27x_clear_otgph(void);
2494 #else
2495 #define pxa27x_clear_otgph() do {} while (0)
2496 #endif
2497
2498 #ifdef CONFIG_PM
2499 /**
2500 * pxa_udc_suspend - Suspend udc device
2501 * @_dev: platform device
2502 * @state: suspend state
2503 *
2504 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2505 * device.
2506 */
2507 static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2508 {
2509 int i;
2510 struct pxa_udc *udc = platform_get_drvdata(_dev);
2511 struct pxa_ep *ep;
2512
2513 ep = &udc->pxa_ep[0];
2514 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2515 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2516 ep = &udc->pxa_ep[i];
2517 ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2518 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2519 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2520 ep->udccsr_value, ep->udccr_value);
2521 }
2522
2523 udc_disable(udc);
2524 udc->pullup_resume = udc->pullup_on;
2525 dplus_pullup(udc, 0);
2526
2527 return 0;
2528 }
2529
2530 /**
2531 * pxa_udc_resume - Resume udc device
2532 * @_dev: platform device
2533 *
2534 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2535 * device.
2536 */
2537 static int pxa_udc_resume(struct platform_device *_dev)
2538 {
2539 int i;
2540 struct pxa_udc *udc = platform_get_drvdata(_dev);
2541 struct pxa_ep *ep;
2542
2543 ep = &udc->pxa_ep[0];
2544 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2545 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2546 ep = &udc->pxa_ep[i];
2547 udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2548 udc_ep_writel(ep, UDCCR, ep->udccr_value);
2549 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2550 ep->udccsr_value, ep->udccr_value);
2551 }
2552
2553 dplus_pullup(udc, udc->pullup_resume);
2554 if (should_enable_udc(udc))
2555 udc_enable(udc);
2556 /*
2557 * We do not handle OTG yet.
2558 *
2559 * OTGPH bit is set when sleep mode is entered.
2560 * it indicates that OTG pad is retaining its state.
2561 * Upon exit from sleep mode and before clearing OTGPH,
2562 * Software must configure the USB OTG pad, UDC, and UHC
2563 * to the state they were in before entering sleep mode.
2564 */
2565 pxa27x_clear_otgph();
2566
2567 return 0;
2568 }
2569 #endif
2570
2571 /* work with hotplug and coldplug */
2572 MODULE_ALIAS("platform:pxa27x-udc");
2573
2574 static struct platform_driver udc_driver = {
2575 .driver = {
2576 .name = "pxa27x-udc",
2577 .owner = THIS_MODULE,
2578 },
2579 .remove = __exit_p(pxa_udc_remove),
2580 .shutdown = pxa_udc_shutdown,
2581 #ifdef CONFIG_PM
2582 .suspend = pxa_udc_suspend,
2583 .resume = pxa_udc_resume
2584 #endif
2585 };
2586
2587 static int __init udc_init(void)
2588 {
2589 if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
2590 return -ENODEV;
2591
2592 printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2593 return platform_driver_probe(&udc_driver, pxa_udc_probe);
2594 }
2595 module_init(udc_init);
2596
2597
2598 static void __exit udc_exit(void)
2599 {
2600 platform_driver_unregister(&udc_driver);
2601 }
2602 module_exit(udc_exit);
2603
2604 MODULE_DESCRIPTION(DRIVER_DESC);
2605 MODULE_AUTHOR("Robert Jarzmik");
2606 MODULE_LICENSE("GPL");