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[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / sound / sparc / cs4231.c
1 /*
2 * Driver for CS4231 sound chips found on Sparcs.
3 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
4 *
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
7 * and also sound/isa/cs423x/cs4231_lib.c which is:
8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/moduleparam.h>
17 #include <linux/irq.h>
18 #include <linux/io.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/info.h>
25 #include <sound/control.h>
26 #include <sound/timer.h>
27 #include <sound/initval.h>
28 #include <sound/pcm_params.h>
29
30 #ifdef CONFIG_SBUS
31 #define SBUS_SUPPORT
32 #endif
33
34 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
35 #define EBUS_SUPPORT
36 #include <linux/pci.h>
37 #include <asm/ebus_dma.h>
38 #endif
39
40 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
41 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
42 /* Enable this card */
43 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
44
45 module_param_array(index, int, NULL, 0444);
46 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
47 module_param_array(id, charp, NULL, 0444);
48 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
49 module_param_array(enable, bool, NULL, 0444);
50 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
51 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
52 MODULE_DESCRIPTION("Sun CS4231");
53 MODULE_LICENSE("GPL");
54 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
55
56 #ifdef SBUS_SUPPORT
57 struct sbus_dma_info {
58 spinlock_t lock; /* DMA access lock */
59 int dir;
60 void __iomem *regs;
61 };
62 #endif
63
64 struct snd_cs4231;
65 struct cs4231_dma_control {
66 void (*prepare)(struct cs4231_dma_control *dma_cont,
67 int dir);
68 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
69 int (*request)(struct cs4231_dma_control *dma_cont,
70 dma_addr_t bus_addr, size_t len);
71 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
72 #ifdef EBUS_SUPPORT
73 struct ebus_dma_info ebus_info;
74 #endif
75 #ifdef SBUS_SUPPORT
76 struct sbus_dma_info sbus_info;
77 #endif
78 };
79
80 struct snd_cs4231 {
81 spinlock_t lock; /* registers access lock */
82 void __iomem *port;
83
84 struct cs4231_dma_control p_dma;
85 struct cs4231_dma_control c_dma;
86
87 u32 flags;
88 #define CS4231_FLAG_EBUS 0x00000001
89 #define CS4231_FLAG_PLAYBACK 0x00000002
90 #define CS4231_FLAG_CAPTURE 0x00000004
91
92 struct snd_card *card;
93 struct snd_pcm *pcm;
94 struct snd_pcm_substream *playback_substream;
95 unsigned int p_periods_sent;
96 struct snd_pcm_substream *capture_substream;
97 unsigned int c_periods_sent;
98 struct snd_timer *timer;
99
100 unsigned short mode;
101 #define CS4231_MODE_NONE 0x0000
102 #define CS4231_MODE_PLAY 0x0001
103 #define CS4231_MODE_RECORD 0x0002
104 #define CS4231_MODE_TIMER 0x0004
105 #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
106 CS4231_MODE_TIMER)
107
108 unsigned char image[32]; /* registers image */
109 int mce_bit;
110 int calibrate_mute;
111 struct mutex mce_mutex; /* mutex for mce register */
112 struct mutex open_mutex; /* mutex for ALSA open/close */
113
114 struct platform_device *op;
115 unsigned int irq[2];
116 unsigned int regs_size;
117 struct snd_cs4231 *next;
118 };
119
120 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
121 * now.... -DaveM
122 */
123
124 /* IO ports */
125 #include <sound/cs4231-regs.h>
126
127 /* XXX offsets are different than PC ISA chips... */
128 #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
129
130 /* SBUS DMA register defines. */
131
132 #define APCCSR 0x10UL /* APC DMA CSR */
133 #define APCCVA 0x20UL /* APC Capture DMA Address */
134 #define APCCC 0x24UL /* APC Capture Count */
135 #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
136 #define APCCNC 0x2cUL /* APC Capture Next Count */
137 #define APCPVA 0x30UL /* APC Play DMA Address */
138 #define APCPC 0x34UL /* APC Play Count */
139 #define APCPNVA 0x38UL /* APC Play DMA Next Address */
140 #define APCPNC 0x3cUL /* APC Play Next Count */
141
142 /* Defines for SBUS DMA-routines */
143
144 #define APCVA 0x0UL /* APC DMA Address */
145 #define APCC 0x4UL /* APC Count */
146 #define APCNVA 0x8UL /* APC DMA Next Address */
147 #define APCNC 0xcUL /* APC Next Count */
148 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
149 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
150
151 /* APCCSR bits */
152
153 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
154 #define APC_PLAY_INT 0x400000 /* Playback interrupt */
155 #define APC_CAPT_INT 0x200000 /* Capture interrupt */
156 #define APC_GENL_INT 0x100000 /* General interrupt */
157 #define APC_XINT_ENA 0x80000 /* General ext int. enable */
158 #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
159 #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
160 #define APC_XINT_GENL 0x10000 /* Error ext intr */
161 #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
162 #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
163 #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
164 #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
165 #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
166 #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
167 #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
168 #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
169 #define APC_PPAUSE 0x80 /* Pause the play DMA */
170 #define APC_CPAUSE 0x40 /* Pause the capture DMA */
171 #define APC_CDC_RESET 0x20 /* CODEC RESET */
172 #define APC_PDMA_READY 0x08 /* Play DMA Go */
173 #define APC_CDMA_READY 0x04 /* Capture DMA Go */
174 #define APC_CHIP_RESET 0x01 /* Reset the chip */
175
176 /* EBUS DMA register offsets */
177
178 #define EBDMA_CSR 0x00UL /* Control/Status */
179 #define EBDMA_ADDR 0x04UL /* DMA Address */
180 #define EBDMA_COUNT 0x08UL /* DMA Count */
181
182 /*
183 * Some variables
184 */
185
186 static unsigned char freq_bits[14] = {
187 /* 5510 */ 0x00 | CS4231_XTAL2,
188 /* 6620 */ 0x0E | CS4231_XTAL2,
189 /* 8000 */ 0x00 | CS4231_XTAL1,
190 /* 9600 */ 0x0E | CS4231_XTAL1,
191 /* 11025 */ 0x02 | CS4231_XTAL2,
192 /* 16000 */ 0x02 | CS4231_XTAL1,
193 /* 18900 */ 0x04 | CS4231_XTAL2,
194 /* 22050 */ 0x06 | CS4231_XTAL2,
195 /* 27042 */ 0x04 | CS4231_XTAL1,
196 /* 32000 */ 0x06 | CS4231_XTAL1,
197 /* 33075 */ 0x0C | CS4231_XTAL2,
198 /* 37800 */ 0x08 | CS4231_XTAL2,
199 /* 44100 */ 0x0A | CS4231_XTAL2,
200 /* 48000 */ 0x0C | CS4231_XTAL1
201 };
202
203 static const unsigned int rates[14] = {
204 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
205 27042, 32000, 33075, 37800, 44100, 48000
206 };
207
208 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
209 .count = ARRAY_SIZE(rates),
210 .list = rates,
211 };
212
213 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
214 {
215 return snd_pcm_hw_constraint_list(runtime, 0,
216 SNDRV_PCM_HW_PARAM_RATE,
217 &hw_constraints_rates);
218 }
219
220 static unsigned char snd_cs4231_original_image[32] =
221 {
222 0x00, /* 00/00 - lic */
223 0x00, /* 01/01 - ric */
224 0x9f, /* 02/02 - la1ic */
225 0x9f, /* 03/03 - ra1ic */
226 0x9f, /* 04/04 - la2ic */
227 0x9f, /* 05/05 - ra2ic */
228 0xbf, /* 06/06 - loc */
229 0xbf, /* 07/07 - roc */
230 0x20, /* 08/08 - pdfr */
231 CS4231_AUTOCALIB, /* 09/09 - ic */
232 0x00, /* 0a/10 - pc */
233 0x00, /* 0b/11 - ti */
234 CS4231_MODE2, /* 0c/12 - mi */
235 0x00, /* 0d/13 - lbc */
236 0x00, /* 0e/14 - pbru */
237 0x00, /* 0f/15 - pbrl */
238 0x80, /* 10/16 - afei */
239 0x01, /* 11/17 - afeii */
240 0x9f, /* 12/18 - llic */
241 0x9f, /* 13/19 - rlic */
242 0x00, /* 14/20 - tlb */
243 0x00, /* 15/21 - thb */
244 0x00, /* 16/22 - la3mic/reserved */
245 0x00, /* 17/23 - ra3mic/reserved */
246 0x00, /* 18/24 - afs */
247 0x00, /* 19/25 - lamoc/version */
248 0x00, /* 1a/26 - mioc */
249 0x00, /* 1b/27 - ramoc/reserved */
250 0x20, /* 1c/28 - cdfr */
251 0x00, /* 1d/29 - res4 */
252 0x00, /* 1e/30 - cbru */
253 0x00, /* 1f/31 - cbrl */
254 };
255
256 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
257 {
258 if (cp->flags & CS4231_FLAG_EBUS)
259 return readb(reg_addr);
260 else
261 return sbus_readb(reg_addr);
262 }
263
264 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
265 void __iomem *reg_addr)
266 {
267 if (cp->flags & CS4231_FLAG_EBUS)
268 return writeb(val, reg_addr);
269 else
270 return sbus_writeb(val, reg_addr);
271 }
272
273 /*
274 * Basic I/O functions
275 */
276
277 static void snd_cs4231_ready(struct snd_cs4231 *chip)
278 {
279 int timeout;
280
281 for (timeout = 250; timeout > 0; timeout--) {
282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
283 if ((val & CS4231_INIT) == 0)
284 break;
285 udelay(100);
286 }
287 }
288
289 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
290 unsigned char value)
291 {
292 snd_cs4231_ready(chip);
293 #ifdef CONFIG_SND_DEBUG
294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
295 snd_printdd("out: auto calibration time out - reg = 0x%x, "
296 "value = 0x%x\n",
297 reg, value);
298 #endif
299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
300 wmb();
301 __cs4231_writeb(chip, value, CS4231U(chip, REG));
302 mb();
303 }
304
305 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
306 unsigned char mask, unsigned char value)
307 {
308 unsigned char tmp = (chip->image[reg] & mask) | value;
309
310 chip->image[reg] = tmp;
311 if (!chip->calibrate_mute)
312 snd_cs4231_dout(chip, reg, tmp);
313 }
314
315 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
316 unsigned char value)
317 {
318 snd_cs4231_dout(chip, reg, value);
319 chip->image[reg] = value;
320 mb();
321 }
322
323 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
324 {
325 snd_cs4231_ready(chip);
326 #ifdef CONFIG_SND_DEBUG
327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
328 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
329 reg);
330 #endif
331 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
332 mb();
333 return __cs4231_readb(chip, CS4231U(chip, REG));
334 }
335
336 /*
337 * CS4231 detection / MCE routines
338 */
339
340 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
341 {
342 int timeout;
343
344 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
345 for (timeout = 5; timeout > 0; timeout--)
346 __cs4231_readb(chip, CS4231U(chip, REGSEL));
347
348 /* end of cleanup sequence */
349 for (timeout = 500; timeout > 0; timeout--) {
350 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
351 if ((val & CS4231_INIT) == 0)
352 break;
353 msleep(1);
354 }
355 }
356
357 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
358 {
359 unsigned long flags;
360 int timeout;
361
362 spin_lock_irqsave(&chip->lock, flags);
363 snd_cs4231_ready(chip);
364 #ifdef CONFIG_SND_DEBUG
365 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
366 snd_printdd("mce_up - auto calibration time out (0)\n");
367 #endif
368 chip->mce_bit |= CS4231_MCE;
369 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
370 if (timeout == 0x80)
371 snd_printdd("mce_up [%p]: serious init problem - "
372 "codec still busy\n",
373 chip->port);
374 if (!(timeout & CS4231_MCE))
375 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
376 CS4231U(chip, REGSEL));
377 spin_unlock_irqrestore(&chip->lock, flags);
378 }
379
380 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
381 {
382 unsigned long flags, timeout;
383 int reg;
384
385 snd_cs4231_busy_wait(chip);
386 spin_lock_irqsave(&chip->lock, flags);
387 #ifdef CONFIG_SND_DEBUG
388 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
389 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
390 CS4231U(chip, REGSEL));
391 #endif
392 chip->mce_bit &= ~CS4231_MCE;
393 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
394 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
395 CS4231U(chip, REGSEL));
396 if (reg == 0x80)
397 snd_printdd("mce_down [%p]: serious init problem "
398 "- codec still busy\n", chip->port);
399 if ((reg & CS4231_MCE) == 0) {
400 spin_unlock_irqrestore(&chip->lock, flags);
401 return;
402 }
403
404 /*
405 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
406 */
407 timeout = jiffies + msecs_to_jiffies(250);
408 do {
409 spin_unlock_irqrestore(&chip->lock, flags);
410 msleep(1);
411 spin_lock_irqsave(&chip->lock, flags);
412 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
413 reg &= CS4231_CALIB_IN_PROGRESS;
414 } while (reg && time_before(jiffies, timeout));
415 spin_unlock_irqrestore(&chip->lock, flags);
416
417 if (reg)
418 snd_printk(KERN_ERR
419 "mce_down - auto calibration time out (2)\n");
420 }
421
422 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
423 struct snd_pcm_substream *substream,
424 unsigned int *periods_sent)
425 {
426 struct snd_pcm_runtime *runtime = substream->runtime;
427
428 while (1) {
429 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
430 unsigned int offset = period_size * (*periods_sent);
431
432 if (WARN_ON(period_size >= (1 << 24)))
433 return;
434
435 if (dma_cont->request(dma_cont,
436 runtime->dma_addr + offset, period_size))
437 return;
438 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
439 }
440 }
441
442 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
443 unsigned int what, int on)
444 {
445 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
446 struct cs4231_dma_control *dma_cont;
447
448 if (what & CS4231_PLAYBACK_ENABLE) {
449 dma_cont = &chip->p_dma;
450 if (on) {
451 dma_cont->prepare(dma_cont, 0);
452 dma_cont->enable(dma_cont, 1);
453 snd_cs4231_advance_dma(dma_cont,
454 chip->playback_substream,
455 &chip->p_periods_sent);
456 } else {
457 dma_cont->enable(dma_cont, 0);
458 }
459 }
460 if (what & CS4231_RECORD_ENABLE) {
461 dma_cont = &chip->c_dma;
462 if (on) {
463 dma_cont->prepare(dma_cont, 1);
464 dma_cont->enable(dma_cont, 1);
465 snd_cs4231_advance_dma(dma_cont,
466 chip->capture_substream,
467 &chip->c_periods_sent);
468 } else {
469 dma_cont->enable(dma_cont, 0);
470 }
471 }
472 }
473
474 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
475 {
476 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
477 int result = 0;
478
479 switch (cmd) {
480 case SNDRV_PCM_TRIGGER_START:
481 case SNDRV_PCM_TRIGGER_STOP:
482 {
483 unsigned int what = 0;
484 struct snd_pcm_substream *s;
485 unsigned long flags;
486
487 snd_pcm_group_for_each_entry(s, substream) {
488 if (s == chip->playback_substream) {
489 what |= CS4231_PLAYBACK_ENABLE;
490 snd_pcm_trigger_done(s, substream);
491 } else if (s == chip->capture_substream) {
492 what |= CS4231_RECORD_ENABLE;
493 snd_pcm_trigger_done(s, substream);
494 }
495 }
496
497 spin_lock_irqsave(&chip->lock, flags);
498 if (cmd == SNDRV_PCM_TRIGGER_START) {
499 cs4231_dma_trigger(substream, what, 1);
500 chip->image[CS4231_IFACE_CTRL] |= what;
501 } else {
502 cs4231_dma_trigger(substream, what, 0);
503 chip->image[CS4231_IFACE_CTRL] &= ~what;
504 }
505 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
506 chip->image[CS4231_IFACE_CTRL]);
507 spin_unlock_irqrestore(&chip->lock, flags);
508 break;
509 }
510 default:
511 result = -EINVAL;
512 break;
513 }
514
515 return result;
516 }
517
518 /*
519 * CODEC I/O
520 */
521
522 static unsigned char snd_cs4231_get_rate(unsigned int rate)
523 {
524 int i;
525
526 for (i = 0; i < 14; i++)
527 if (rate == rates[i])
528 return freq_bits[i];
529
530 return freq_bits[13];
531 }
532
533 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
534 int channels)
535 {
536 unsigned char rformat;
537
538 rformat = CS4231_LINEAR_8;
539 switch (format) {
540 case SNDRV_PCM_FORMAT_MU_LAW:
541 rformat = CS4231_ULAW_8;
542 break;
543 case SNDRV_PCM_FORMAT_A_LAW:
544 rformat = CS4231_ALAW_8;
545 break;
546 case SNDRV_PCM_FORMAT_S16_LE:
547 rformat = CS4231_LINEAR_16;
548 break;
549 case SNDRV_PCM_FORMAT_S16_BE:
550 rformat = CS4231_LINEAR_16_BIG;
551 break;
552 case SNDRV_PCM_FORMAT_IMA_ADPCM:
553 rformat = CS4231_ADPCM_16;
554 break;
555 }
556 if (channels > 1)
557 rformat |= CS4231_STEREO;
558 return rformat;
559 }
560
561 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
562 {
563 unsigned long flags;
564
565 mute = mute ? 1 : 0;
566 spin_lock_irqsave(&chip->lock, flags);
567 if (chip->calibrate_mute == mute) {
568 spin_unlock_irqrestore(&chip->lock, flags);
569 return;
570 }
571 if (!mute) {
572 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
573 chip->image[CS4231_LEFT_INPUT]);
574 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
575 chip->image[CS4231_RIGHT_INPUT]);
576 snd_cs4231_dout(chip, CS4231_LOOPBACK,
577 chip->image[CS4231_LOOPBACK]);
578 }
579 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
580 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
581 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
582 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
583 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
584 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
585 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
586 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
587 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
588 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
589 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
590 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
591 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
592 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
593 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
594 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
595 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
596 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
597 chip->calibrate_mute = mute;
598 spin_unlock_irqrestore(&chip->lock, flags);
599 }
600
601 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
602 struct snd_pcm_hw_params *params,
603 unsigned char pdfr)
604 {
605 unsigned long flags;
606
607 mutex_lock(&chip->mce_mutex);
608 snd_cs4231_calibrate_mute(chip, 1);
609
610 snd_cs4231_mce_up(chip);
611
612 spin_lock_irqsave(&chip->lock, flags);
613 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
614 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
615 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
616 pdfr);
617 spin_unlock_irqrestore(&chip->lock, flags);
618
619 snd_cs4231_mce_down(chip);
620
621 snd_cs4231_calibrate_mute(chip, 0);
622 mutex_unlock(&chip->mce_mutex);
623 }
624
625 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
626 struct snd_pcm_hw_params *params,
627 unsigned char cdfr)
628 {
629 unsigned long flags;
630
631 mutex_lock(&chip->mce_mutex);
632 snd_cs4231_calibrate_mute(chip, 1);
633
634 snd_cs4231_mce_up(chip);
635
636 spin_lock_irqsave(&chip->lock, flags);
637 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
638 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
639 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
640 (cdfr & 0x0f));
641 spin_unlock_irqrestore(&chip->lock, flags);
642 snd_cs4231_mce_down(chip);
643 snd_cs4231_mce_up(chip);
644 spin_lock_irqsave(&chip->lock, flags);
645 }
646 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
647 spin_unlock_irqrestore(&chip->lock, flags);
648
649 snd_cs4231_mce_down(chip);
650
651 snd_cs4231_calibrate_mute(chip, 0);
652 mutex_unlock(&chip->mce_mutex);
653 }
654
655 /*
656 * Timer interface
657 */
658
659 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
660 {
661 struct snd_cs4231 *chip = snd_timer_chip(timer);
662
663 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
664 }
665
666 static int snd_cs4231_timer_start(struct snd_timer *timer)
667 {
668 unsigned long flags;
669 unsigned int ticks;
670 struct snd_cs4231 *chip = snd_timer_chip(timer);
671
672 spin_lock_irqsave(&chip->lock, flags);
673 ticks = timer->sticks;
674 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
675 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
676 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
677 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
678 chip->image[CS4231_TIMER_HIGH] =
679 (unsigned char) (ticks >> 8));
680 snd_cs4231_out(chip, CS4231_TIMER_LOW,
681 chip->image[CS4231_TIMER_LOW] =
682 (unsigned char) ticks);
683 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
684 chip->image[CS4231_ALT_FEATURE_1] |
685 CS4231_TIMER_ENABLE);
686 }
687 spin_unlock_irqrestore(&chip->lock, flags);
688
689 return 0;
690 }
691
692 static int snd_cs4231_timer_stop(struct snd_timer *timer)
693 {
694 unsigned long flags;
695 struct snd_cs4231 *chip = snd_timer_chip(timer);
696
697 spin_lock_irqsave(&chip->lock, flags);
698 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
699 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
700 chip->image[CS4231_ALT_FEATURE_1]);
701 spin_unlock_irqrestore(&chip->lock, flags);
702
703 return 0;
704 }
705
706 static void snd_cs4231_init(struct snd_cs4231 *chip)
707 {
708 unsigned long flags;
709
710 snd_cs4231_mce_down(chip);
711
712 #ifdef SNDRV_DEBUG_MCE
713 snd_printdd("init: (1)\n");
714 #endif
715 snd_cs4231_mce_up(chip);
716 spin_lock_irqsave(&chip->lock, flags);
717 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
718 CS4231_PLAYBACK_PIO |
719 CS4231_RECORD_ENABLE |
720 CS4231_RECORD_PIO |
721 CS4231_CALIB_MODE);
722 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
723 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
724 spin_unlock_irqrestore(&chip->lock, flags);
725 snd_cs4231_mce_down(chip);
726
727 #ifdef SNDRV_DEBUG_MCE
728 snd_printdd("init: (2)\n");
729 #endif
730
731 snd_cs4231_mce_up(chip);
732 spin_lock_irqsave(&chip->lock, flags);
733 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
734 chip->image[CS4231_ALT_FEATURE_1]);
735 spin_unlock_irqrestore(&chip->lock, flags);
736 snd_cs4231_mce_down(chip);
737
738 #ifdef SNDRV_DEBUG_MCE
739 snd_printdd("init: (3) - afei = 0x%x\n",
740 chip->image[CS4231_ALT_FEATURE_1]);
741 #endif
742
743 spin_lock_irqsave(&chip->lock, flags);
744 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
745 chip->image[CS4231_ALT_FEATURE_2]);
746 spin_unlock_irqrestore(&chip->lock, flags);
747
748 snd_cs4231_mce_up(chip);
749 spin_lock_irqsave(&chip->lock, flags);
750 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
751 chip->image[CS4231_PLAYBK_FORMAT]);
752 spin_unlock_irqrestore(&chip->lock, flags);
753 snd_cs4231_mce_down(chip);
754
755 #ifdef SNDRV_DEBUG_MCE
756 snd_printdd("init: (4)\n");
757 #endif
758
759 snd_cs4231_mce_up(chip);
760 spin_lock_irqsave(&chip->lock, flags);
761 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
762 spin_unlock_irqrestore(&chip->lock, flags);
763 snd_cs4231_mce_down(chip);
764
765 #ifdef SNDRV_DEBUG_MCE
766 snd_printdd("init: (5)\n");
767 #endif
768 }
769
770 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
771 {
772 unsigned long flags;
773
774 mutex_lock(&chip->open_mutex);
775 if ((chip->mode & mode)) {
776 mutex_unlock(&chip->open_mutex);
777 return -EAGAIN;
778 }
779 if (chip->mode & CS4231_MODE_OPEN) {
780 chip->mode |= mode;
781 mutex_unlock(&chip->open_mutex);
782 return 0;
783 }
784 /* ok. now enable and ack CODEC IRQ */
785 spin_lock_irqsave(&chip->lock, flags);
786 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
787 CS4231_RECORD_IRQ |
788 CS4231_TIMER_IRQ);
789 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
792
793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
794 CS4231_RECORD_IRQ |
795 CS4231_TIMER_IRQ);
796 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
797
798 spin_unlock_irqrestore(&chip->lock, flags);
799
800 chip->mode = mode;
801 mutex_unlock(&chip->open_mutex);
802 return 0;
803 }
804
805 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
806 {
807 unsigned long flags;
808
809 mutex_lock(&chip->open_mutex);
810 chip->mode &= ~mode;
811 if (chip->mode & CS4231_MODE_OPEN) {
812 mutex_unlock(&chip->open_mutex);
813 return;
814 }
815 snd_cs4231_calibrate_mute(chip, 1);
816
817 /* disable IRQ */
818 spin_lock_irqsave(&chip->lock, flags);
819 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
822
823 /* now disable record & playback */
824
825 if (chip->image[CS4231_IFACE_CTRL] &
826 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
827 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
828 spin_unlock_irqrestore(&chip->lock, flags);
829 snd_cs4231_mce_up(chip);
830 spin_lock_irqsave(&chip->lock, flags);
831 chip->image[CS4231_IFACE_CTRL] &=
832 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
833 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
834 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
835 chip->image[CS4231_IFACE_CTRL]);
836 spin_unlock_irqrestore(&chip->lock, flags);
837 snd_cs4231_mce_down(chip);
838 spin_lock_irqsave(&chip->lock, flags);
839 }
840
841 /* clear IRQ again */
842 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
845 spin_unlock_irqrestore(&chip->lock, flags);
846
847 snd_cs4231_calibrate_mute(chip, 0);
848
849 chip->mode = 0;
850 mutex_unlock(&chip->open_mutex);
851 }
852
853 /*
854 * timer open/close
855 */
856
857 static int snd_cs4231_timer_open(struct snd_timer *timer)
858 {
859 struct snd_cs4231 *chip = snd_timer_chip(timer);
860 snd_cs4231_open(chip, CS4231_MODE_TIMER);
861 return 0;
862 }
863
864 static int snd_cs4231_timer_close(struct snd_timer *timer)
865 {
866 struct snd_cs4231 *chip = snd_timer_chip(timer);
867 snd_cs4231_close(chip, CS4231_MODE_TIMER);
868 return 0;
869 }
870
871 static struct snd_timer_hardware snd_cs4231_timer_table = {
872 .flags = SNDRV_TIMER_HW_AUTO,
873 .resolution = 9945,
874 .ticks = 65535,
875 .open = snd_cs4231_timer_open,
876 .close = snd_cs4231_timer_close,
877 .c_resolution = snd_cs4231_timer_resolution,
878 .start = snd_cs4231_timer_start,
879 .stop = snd_cs4231_timer_stop,
880 };
881
882 /*
883 * ok.. exported functions..
884 */
885
886 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
887 struct snd_pcm_hw_params *hw_params)
888 {
889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
890 unsigned char new_pdfr;
891 int err;
892
893 err = snd_pcm_lib_malloc_pages(substream,
894 params_buffer_bytes(hw_params));
895 if (err < 0)
896 return err;
897 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
898 params_channels(hw_params)) |
899 snd_cs4231_get_rate(params_rate(hw_params));
900 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
901
902 return 0;
903 }
904
905 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
906 {
907 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
908 struct snd_pcm_runtime *runtime = substream->runtime;
909 unsigned long flags;
910 int ret = 0;
911
912 spin_lock_irqsave(&chip->lock, flags);
913
914 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
915 CS4231_PLAYBACK_PIO);
916
917 if (WARN_ON(runtime->period_size > 0xffff + 1)) {
918 ret = -EINVAL;
919 goto out;
920 }
921
922 chip->p_periods_sent = 0;
923
924 out:
925 spin_unlock_irqrestore(&chip->lock, flags);
926
927 return ret;
928 }
929
930 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
931 struct snd_pcm_hw_params *hw_params)
932 {
933 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
934 unsigned char new_cdfr;
935 int err;
936
937 err = snd_pcm_lib_malloc_pages(substream,
938 params_buffer_bytes(hw_params));
939 if (err < 0)
940 return err;
941 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
942 params_channels(hw_params)) |
943 snd_cs4231_get_rate(params_rate(hw_params));
944 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
945
946 return 0;
947 }
948
949 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
950 {
951 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
952 unsigned long flags;
953
954 spin_lock_irqsave(&chip->lock, flags);
955 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
956 CS4231_RECORD_PIO);
957
958
959 chip->c_periods_sent = 0;
960 spin_unlock_irqrestore(&chip->lock, flags);
961
962 return 0;
963 }
964
965 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
966 {
967 unsigned long flags;
968 unsigned char res;
969
970 spin_lock_irqsave(&chip->lock, flags);
971 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
972 spin_unlock_irqrestore(&chip->lock, flags);
973
974 /* detect overrange only above 0dB; may be user selectable? */
975 if (res & (0x08 | 0x02))
976 chip->capture_substream->runtime->overrange++;
977 }
978
979 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
980 {
981 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
982 snd_pcm_period_elapsed(chip->playback_substream);
983 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
984 &chip->p_periods_sent);
985 }
986 }
987
988 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
989 {
990 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
991 snd_pcm_period_elapsed(chip->capture_substream);
992 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
993 &chip->c_periods_sent);
994 }
995 }
996
997 static snd_pcm_uframes_t snd_cs4231_playback_pointer(
998 struct snd_pcm_substream *substream)
999 {
1000 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1001 struct cs4231_dma_control *dma_cont = &chip->p_dma;
1002 size_t ptr;
1003
1004 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1005 return 0;
1006 ptr = dma_cont->address(dma_cont);
1007 if (ptr != 0)
1008 ptr -= substream->runtime->dma_addr;
1009
1010 return bytes_to_frames(substream->runtime, ptr);
1011 }
1012
1013 static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1014 struct snd_pcm_substream *substream)
1015 {
1016 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1017 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1018 size_t ptr;
1019
1020 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1021 return 0;
1022 ptr = dma_cont->address(dma_cont);
1023 if (ptr != 0)
1024 ptr -= substream->runtime->dma_addr;
1025
1026 return bytes_to_frames(substream->runtime, ptr);
1027 }
1028
1029 static int snd_cs4231_probe(struct snd_cs4231 *chip)
1030 {
1031 unsigned long flags;
1032 int i;
1033 int id = 0;
1034 int vers = 0;
1035 unsigned char *ptr;
1036
1037 for (i = 0; i < 50; i++) {
1038 mb();
1039 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1040 msleep(2);
1041 else {
1042 spin_lock_irqsave(&chip->lock, flags);
1043 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1044 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1045 vers = snd_cs4231_in(chip, CS4231_VERSION);
1046 spin_unlock_irqrestore(&chip->lock, flags);
1047 if (id == 0x0a)
1048 break; /* this is valid value */
1049 }
1050 }
1051 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1052 if (id != 0x0a)
1053 return -ENODEV; /* no valid device found */
1054
1055 spin_lock_irqsave(&chip->lock, flags);
1056
1057 /* clear any pendings IRQ */
1058 __cs4231_readb(chip, CS4231U(chip, STATUS));
1059 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1060 mb();
1061
1062 spin_unlock_irqrestore(&chip->lock, flags);
1063
1064 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1065 chip->image[CS4231_IFACE_CTRL] =
1066 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1067 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1068 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1069 if (vers & 0x20)
1070 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1071
1072 ptr = (unsigned char *) &chip->image;
1073
1074 snd_cs4231_mce_down(chip);
1075
1076 spin_lock_irqsave(&chip->lock, flags);
1077
1078 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1079 snd_cs4231_out(chip, i, *ptr++);
1080
1081 spin_unlock_irqrestore(&chip->lock, flags);
1082
1083 snd_cs4231_mce_up(chip);
1084
1085 snd_cs4231_mce_down(chip);
1086
1087 mdelay(2);
1088
1089 return 0; /* all things are ok.. */
1090 }
1091
1092 static const struct snd_pcm_hardware snd_cs4231_playback = {
1093 .info = SNDRV_PCM_INFO_MMAP |
1094 SNDRV_PCM_INFO_INTERLEAVED |
1095 SNDRV_PCM_INFO_MMAP_VALID |
1096 SNDRV_PCM_INFO_SYNC_START,
1097 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1098 SNDRV_PCM_FMTBIT_A_LAW |
1099 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1100 SNDRV_PCM_FMTBIT_U8 |
1101 SNDRV_PCM_FMTBIT_S16_LE |
1102 SNDRV_PCM_FMTBIT_S16_BE,
1103 .rates = SNDRV_PCM_RATE_KNOT |
1104 SNDRV_PCM_RATE_8000_48000,
1105 .rate_min = 5510,
1106 .rate_max = 48000,
1107 .channels_min = 1,
1108 .channels_max = 2,
1109 .buffer_bytes_max = 32 * 1024,
1110 .period_bytes_min = 64,
1111 .period_bytes_max = 32 * 1024,
1112 .periods_min = 1,
1113 .periods_max = 1024,
1114 };
1115
1116 static const struct snd_pcm_hardware snd_cs4231_capture = {
1117 .info = SNDRV_PCM_INFO_MMAP |
1118 SNDRV_PCM_INFO_INTERLEAVED |
1119 SNDRV_PCM_INFO_MMAP_VALID |
1120 SNDRV_PCM_INFO_SYNC_START,
1121 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1122 SNDRV_PCM_FMTBIT_A_LAW |
1123 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1124 SNDRV_PCM_FMTBIT_U8 |
1125 SNDRV_PCM_FMTBIT_S16_LE |
1126 SNDRV_PCM_FMTBIT_S16_BE,
1127 .rates = SNDRV_PCM_RATE_KNOT |
1128 SNDRV_PCM_RATE_8000_48000,
1129 .rate_min = 5510,
1130 .rate_max = 48000,
1131 .channels_min = 1,
1132 .channels_max = 2,
1133 .buffer_bytes_max = 32 * 1024,
1134 .period_bytes_min = 64,
1135 .period_bytes_max = 32 * 1024,
1136 .periods_min = 1,
1137 .periods_max = 1024,
1138 };
1139
1140 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1141 {
1142 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1143 struct snd_pcm_runtime *runtime = substream->runtime;
1144 int err;
1145
1146 runtime->hw = snd_cs4231_playback;
1147
1148 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1149 if (err < 0)
1150 return err;
1151 chip->playback_substream = substream;
1152 chip->p_periods_sent = 0;
1153 snd_pcm_set_sync(substream);
1154 snd_cs4231_xrate(runtime);
1155
1156 return 0;
1157 }
1158
1159 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1160 {
1161 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1162 struct snd_pcm_runtime *runtime = substream->runtime;
1163 int err;
1164
1165 runtime->hw = snd_cs4231_capture;
1166
1167 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1168 if (err < 0)
1169 return err;
1170 chip->capture_substream = substream;
1171 chip->c_periods_sent = 0;
1172 snd_pcm_set_sync(substream);
1173 snd_cs4231_xrate(runtime);
1174
1175 return 0;
1176 }
1177
1178 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1179 {
1180 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1181
1182 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1183 chip->playback_substream = NULL;
1184
1185 return 0;
1186 }
1187
1188 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1189 {
1190 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1191
1192 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1193 chip->capture_substream = NULL;
1194
1195 return 0;
1196 }
1197
1198 /* XXX We can do some power-management, in particular on EBUS using
1199 * XXX the audio AUXIO register...
1200 */
1201
1202 static const struct snd_pcm_ops snd_cs4231_playback_ops = {
1203 .open = snd_cs4231_playback_open,
1204 .close = snd_cs4231_playback_close,
1205 .ioctl = snd_pcm_lib_ioctl,
1206 .hw_params = snd_cs4231_playback_hw_params,
1207 .hw_free = snd_pcm_lib_free_pages,
1208 .prepare = snd_cs4231_playback_prepare,
1209 .trigger = snd_cs4231_trigger,
1210 .pointer = snd_cs4231_playback_pointer,
1211 };
1212
1213 static const struct snd_pcm_ops snd_cs4231_capture_ops = {
1214 .open = snd_cs4231_capture_open,
1215 .close = snd_cs4231_capture_close,
1216 .ioctl = snd_pcm_lib_ioctl,
1217 .hw_params = snd_cs4231_capture_hw_params,
1218 .hw_free = snd_pcm_lib_free_pages,
1219 .prepare = snd_cs4231_capture_prepare,
1220 .trigger = snd_cs4231_trigger,
1221 .pointer = snd_cs4231_capture_pointer,
1222 };
1223
1224 static int snd_cs4231_pcm(struct snd_card *card)
1225 {
1226 struct snd_cs4231 *chip = card->private_data;
1227 struct snd_pcm *pcm;
1228 int err;
1229
1230 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1231 if (err < 0)
1232 return err;
1233
1234 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1235 &snd_cs4231_playback_ops);
1236 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1237 &snd_cs4231_capture_ops);
1238
1239 /* global setup */
1240 pcm->private_data = chip;
1241 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1242 strcpy(pcm->name, "CS4231");
1243
1244 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1245 &chip->op->dev,
1246 64 * 1024, 128 * 1024);
1247
1248 chip->pcm = pcm;
1249
1250 return 0;
1251 }
1252
1253 static int snd_cs4231_timer(struct snd_card *card)
1254 {
1255 struct snd_cs4231 *chip = card->private_data;
1256 struct snd_timer *timer;
1257 struct snd_timer_id tid;
1258 int err;
1259
1260 /* Timer initialization */
1261 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1262 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1263 tid.card = card->number;
1264 tid.device = 0;
1265 tid.subdevice = 0;
1266 err = snd_timer_new(card, "CS4231", &tid, &timer);
1267 if (err < 0)
1268 return err;
1269 strcpy(timer->name, "CS4231");
1270 timer->private_data = chip;
1271 timer->hw = snd_cs4231_timer_table;
1272 chip->timer = timer;
1273
1274 return 0;
1275 }
1276
1277 /*
1278 * MIXER part
1279 */
1280
1281 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1282 struct snd_ctl_elem_info *uinfo)
1283 {
1284 static const char * const texts[4] = {
1285 "Line", "CD", "Mic", "Mix"
1286 };
1287
1288 return snd_ctl_enum_info(uinfo, 2, 4, texts);
1289 }
1290
1291 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1292 struct snd_ctl_elem_value *ucontrol)
1293 {
1294 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1295 unsigned long flags;
1296
1297 spin_lock_irqsave(&chip->lock, flags);
1298 ucontrol->value.enumerated.item[0] =
1299 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1300 ucontrol->value.enumerated.item[1] =
1301 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1302 spin_unlock_irqrestore(&chip->lock, flags);
1303
1304 return 0;
1305 }
1306
1307 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1308 struct snd_ctl_elem_value *ucontrol)
1309 {
1310 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1311 unsigned long flags;
1312 unsigned short left, right;
1313 int change;
1314
1315 if (ucontrol->value.enumerated.item[0] > 3 ||
1316 ucontrol->value.enumerated.item[1] > 3)
1317 return -EINVAL;
1318 left = ucontrol->value.enumerated.item[0] << 6;
1319 right = ucontrol->value.enumerated.item[1] << 6;
1320
1321 spin_lock_irqsave(&chip->lock, flags);
1322
1323 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1324 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1325 change = left != chip->image[CS4231_LEFT_INPUT] ||
1326 right != chip->image[CS4231_RIGHT_INPUT];
1327 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1328 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1329
1330 spin_unlock_irqrestore(&chip->lock, flags);
1331
1332 return change;
1333 }
1334
1335 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1336 struct snd_ctl_elem_info *uinfo)
1337 {
1338 int mask = (kcontrol->private_value >> 16) & 0xff;
1339
1340 uinfo->type = (mask == 1) ?
1341 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1342 uinfo->count = 1;
1343 uinfo->value.integer.min = 0;
1344 uinfo->value.integer.max = mask;
1345
1346 return 0;
1347 }
1348
1349 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1350 struct snd_ctl_elem_value *ucontrol)
1351 {
1352 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1353 unsigned long flags;
1354 int reg = kcontrol->private_value & 0xff;
1355 int shift = (kcontrol->private_value >> 8) & 0xff;
1356 int mask = (kcontrol->private_value >> 16) & 0xff;
1357 int invert = (kcontrol->private_value >> 24) & 0xff;
1358
1359 spin_lock_irqsave(&chip->lock, flags);
1360
1361 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1362
1363 spin_unlock_irqrestore(&chip->lock, flags);
1364
1365 if (invert)
1366 ucontrol->value.integer.value[0] =
1367 (mask - ucontrol->value.integer.value[0]);
1368
1369 return 0;
1370 }
1371
1372 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1373 struct snd_ctl_elem_value *ucontrol)
1374 {
1375 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1376 unsigned long flags;
1377 int reg = kcontrol->private_value & 0xff;
1378 int shift = (kcontrol->private_value >> 8) & 0xff;
1379 int mask = (kcontrol->private_value >> 16) & 0xff;
1380 int invert = (kcontrol->private_value >> 24) & 0xff;
1381 int change;
1382 unsigned short val;
1383
1384 val = (ucontrol->value.integer.value[0] & mask);
1385 if (invert)
1386 val = mask - val;
1387 val <<= shift;
1388
1389 spin_lock_irqsave(&chip->lock, flags);
1390
1391 val = (chip->image[reg] & ~(mask << shift)) | val;
1392 change = val != chip->image[reg];
1393 snd_cs4231_out(chip, reg, val);
1394
1395 spin_unlock_irqrestore(&chip->lock, flags);
1396
1397 return change;
1398 }
1399
1400 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1401 struct snd_ctl_elem_info *uinfo)
1402 {
1403 int mask = (kcontrol->private_value >> 24) & 0xff;
1404
1405 uinfo->type = mask == 1 ?
1406 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1407 uinfo->count = 2;
1408 uinfo->value.integer.min = 0;
1409 uinfo->value.integer.max = mask;
1410
1411 return 0;
1412 }
1413
1414 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1415 struct snd_ctl_elem_value *ucontrol)
1416 {
1417 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1418 unsigned long flags;
1419 int left_reg = kcontrol->private_value & 0xff;
1420 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1421 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1422 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1423 int mask = (kcontrol->private_value >> 24) & 0xff;
1424 int invert = (kcontrol->private_value >> 22) & 1;
1425
1426 spin_lock_irqsave(&chip->lock, flags);
1427
1428 ucontrol->value.integer.value[0] =
1429 (chip->image[left_reg] >> shift_left) & mask;
1430 ucontrol->value.integer.value[1] =
1431 (chip->image[right_reg] >> shift_right) & mask;
1432
1433 spin_unlock_irqrestore(&chip->lock, flags);
1434
1435 if (invert) {
1436 ucontrol->value.integer.value[0] =
1437 (mask - ucontrol->value.integer.value[0]);
1438 ucontrol->value.integer.value[1] =
1439 (mask - ucontrol->value.integer.value[1]);
1440 }
1441
1442 return 0;
1443 }
1444
1445 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1446 struct snd_ctl_elem_value *ucontrol)
1447 {
1448 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1449 unsigned long flags;
1450 int left_reg = kcontrol->private_value & 0xff;
1451 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1452 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1453 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1454 int mask = (kcontrol->private_value >> 24) & 0xff;
1455 int invert = (kcontrol->private_value >> 22) & 1;
1456 int change;
1457 unsigned short val1, val2;
1458
1459 val1 = ucontrol->value.integer.value[0] & mask;
1460 val2 = ucontrol->value.integer.value[1] & mask;
1461 if (invert) {
1462 val1 = mask - val1;
1463 val2 = mask - val2;
1464 }
1465 val1 <<= shift_left;
1466 val2 <<= shift_right;
1467
1468 spin_lock_irqsave(&chip->lock, flags);
1469
1470 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1471 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1472 change = val1 != chip->image[left_reg];
1473 change |= val2 != chip->image[right_reg];
1474 snd_cs4231_out(chip, left_reg, val1);
1475 snd_cs4231_out(chip, right_reg, val2);
1476
1477 spin_unlock_irqrestore(&chip->lock, flags);
1478
1479 return change;
1480 }
1481
1482 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1483 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1484 .info = snd_cs4231_info_single, \
1485 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1486 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1487
1488 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1489 shift_right, mask, invert) \
1490 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1491 .info = snd_cs4231_info_double, \
1492 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1493 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1494 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1495
1496 static struct snd_kcontrol_new snd_cs4231_controls[] = {
1497 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1498 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1499 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1500 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1501 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1502 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1503 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1504 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1505 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1506 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1507 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1508 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1509 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1510 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1511 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1512 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1513 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1514 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1515 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1516 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1517 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1518 15, 0),
1519 {
1520 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1521 .name = "Capture Source",
1522 .info = snd_cs4231_info_mux,
1523 .get = snd_cs4231_get_mux,
1524 .put = snd_cs4231_put_mux,
1525 },
1526 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1527 1, 0),
1528 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1529 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1530 /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1531 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1532 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1533 };
1534
1535 static int snd_cs4231_mixer(struct snd_card *card)
1536 {
1537 struct snd_cs4231 *chip = card->private_data;
1538 int err, idx;
1539
1540 if (snd_BUG_ON(!chip || !chip->pcm))
1541 return -EINVAL;
1542
1543 strcpy(card->mixername, chip->pcm->name);
1544
1545 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1546 err = snd_ctl_add(card,
1547 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1548 if (err < 0)
1549 return err;
1550 }
1551 return 0;
1552 }
1553
1554 static int dev;
1555
1556 static int cs4231_attach_begin(struct platform_device *op,
1557 struct snd_card **rcard)
1558 {
1559 struct snd_card *card;
1560 struct snd_cs4231 *chip;
1561 int err;
1562
1563 *rcard = NULL;
1564
1565 if (dev >= SNDRV_CARDS)
1566 return -ENODEV;
1567
1568 if (!enable[dev]) {
1569 dev++;
1570 return -ENOENT;
1571 }
1572
1573 err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE,
1574 sizeof(struct snd_cs4231), &card);
1575 if (err < 0)
1576 return err;
1577
1578 strcpy(card->driver, "CS4231");
1579 strcpy(card->shortname, "Sun CS4231");
1580
1581 chip = card->private_data;
1582 chip->card = card;
1583
1584 *rcard = card;
1585 return 0;
1586 }
1587
1588 static int cs4231_attach_finish(struct snd_card *card)
1589 {
1590 struct snd_cs4231 *chip = card->private_data;
1591 int err;
1592
1593 err = snd_cs4231_pcm(card);
1594 if (err < 0)
1595 goto out_err;
1596
1597 err = snd_cs4231_mixer(card);
1598 if (err < 0)
1599 goto out_err;
1600
1601 err = snd_cs4231_timer(card);
1602 if (err < 0)
1603 goto out_err;
1604
1605 err = snd_card_register(card);
1606 if (err < 0)
1607 goto out_err;
1608
1609 dev_set_drvdata(&chip->op->dev, chip);
1610
1611 dev++;
1612 return 0;
1613
1614 out_err:
1615 snd_card_free(card);
1616 return err;
1617 }
1618
1619 #ifdef SBUS_SUPPORT
1620
1621 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1622 {
1623 unsigned long flags;
1624 unsigned char status;
1625 u32 csr;
1626 struct snd_cs4231 *chip = dev_id;
1627
1628 /*This is IRQ is not raised by the cs4231*/
1629 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1630 return IRQ_NONE;
1631
1632 /* ACK the APC interrupt. */
1633 csr = sbus_readl(chip->port + APCCSR);
1634
1635 sbus_writel(csr, chip->port + APCCSR);
1636
1637 if ((csr & APC_PDMA_READY) &&
1638 (csr & APC_PLAY_INT) &&
1639 (csr & APC_XINT_PNVA) &&
1640 !(csr & APC_XINT_EMPT))
1641 snd_cs4231_play_callback(chip);
1642
1643 if ((csr & APC_CDMA_READY) &&
1644 (csr & APC_CAPT_INT) &&
1645 (csr & APC_XINT_CNVA) &&
1646 !(csr & APC_XINT_EMPT))
1647 snd_cs4231_capture_callback(chip);
1648
1649 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1650
1651 if (status & CS4231_TIMER_IRQ) {
1652 if (chip->timer)
1653 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1654 }
1655
1656 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1657 snd_cs4231_overrange(chip);
1658
1659 /* ACK the CS4231 interrupt. */
1660 spin_lock_irqsave(&chip->lock, flags);
1661 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1662 spin_unlock_irqrestore(&chip->lock, flags);
1663
1664 return IRQ_HANDLED;
1665 }
1666
1667 /*
1668 * SBUS DMA routines
1669 */
1670
1671 static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1672 dma_addr_t bus_addr, size_t len)
1673 {
1674 unsigned long flags;
1675 u32 test, csr;
1676 int err;
1677 struct sbus_dma_info *base = &dma_cont->sbus_info;
1678
1679 if (len >= (1 << 24))
1680 return -EINVAL;
1681 spin_lock_irqsave(&base->lock, flags);
1682 csr = sbus_readl(base->regs + APCCSR);
1683 err = -EINVAL;
1684 test = APC_CDMA_READY;
1685 if (base->dir == APC_PLAY)
1686 test = APC_PDMA_READY;
1687 if (!(csr & test))
1688 goto out;
1689 err = -EBUSY;
1690 test = APC_XINT_CNVA;
1691 if (base->dir == APC_PLAY)
1692 test = APC_XINT_PNVA;
1693 if (!(csr & test))
1694 goto out;
1695 err = 0;
1696 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1697 sbus_writel(len, base->regs + base->dir + APCNC);
1698 out:
1699 spin_unlock_irqrestore(&base->lock, flags);
1700 return err;
1701 }
1702
1703 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1704 {
1705 unsigned long flags;
1706 u32 csr, test;
1707 struct sbus_dma_info *base = &dma_cont->sbus_info;
1708
1709 spin_lock_irqsave(&base->lock, flags);
1710 csr = sbus_readl(base->regs + APCCSR);
1711 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1712 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1713 APC_XINT_PENA;
1714 if (base->dir == APC_RECORD)
1715 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1716 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1717 csr |= test;
1718 sbus_writel(csr, base->regs + APCCSR);
1719 spin_unlock_irqrestore(&base->lock, flags);
1720 }
1721
1722 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1723 {
1724 unsigned long flags;
1725 u32 csr, shift;
1726 struct sbus_dma_info *base = &dma_cont->sbus_info;
1727
1728 spin_lock_irqsave(&base->lock, flags);
1729 if (!on) {
1730 sbus_writel(0, base->regs + base->dir + APCNC);
1731 sbus_writel(0, base->regs + base->dir + APCNVA);
1732 if (base->dir == APC_PLAY) {
1733 sbus_writel(0, base->regs + base->dir + APCC);
1734 sbus_writel(0, base->regs + base->dir + APCVA);
1735 }
1736
1737 udelay(1200);
1738 }
1739 csr = sbus_readl(base->regs + APCCSR);
1740 shift = 0;
1741 if (base->dir == APC_PLAY)
1742 shift = 1;
1743 if (on)
1744 csr &= ~(APC_CPAUSE << shift);
1745 else
1746 csr |= (APC_CPAUSE << shift);
1747 sbus_writel(csr, base->regs + APCCSR);
1748 if (on)
1749 csr |= (APC_CDMA_READY << shift);
1750 else
1751 csr &= ~(APC_CDMA_READY << shift);
1752 sbus_writel(csr, base->regs + APCCSR);
1753
1754 spin_unlock_irqrestore(&base->lock, flags);
1755 }
1756
1757 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1758 {
1759 struct sbus_dma_info *base = &dma_cont->sbus_info;
1760
1761 return sbus_readl(base->regs + base->dir + APCVA);
1762 }
1763
1764 /*
1765 * Init and exit routines
1766 */
1767
1768 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1769 {
1770 struct platform_device *op = chip->op;
1771
1772 if (chip->irq[0])
1773 free_irq(chip->irq[0], chip);
1774
1775 if (chip->port)
1776 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1777
1778 return 0;
1779 }
1780
1781 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1782 {
1783 struct snd_cs4231 *cp = device->device_data;
1784
1785 return snd_cs4231_sbus_free(cp);
1786 }
1787
1788 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1789 .dev_free = snd_cs4231_sbus_dev_free,
1790 };
1791
1792 static int snd_cs4231_sbus_create(struct snd_card *card,
1793 struct platform_device *op,
1794 int dev)
1795 {
1796 struct snd_cs4231 *chip = card->private_data;
1797 int err;
1798
1799 spin_lock_init(&chip->lock);
1800 spin_lock_init(&chip->c_dma.sbus_info.lock);
1801 spin_lock_init(&chip->p_dma.sbus_info.lock);
1802 mutex_init(&chip->mce_mutex);
1803 mutex_init(&chip->open_mutex);
1804 chip->op = op;
1805 chip->regs_size = resource_size(&op->resource[0]);
1806 memcpy(&chip->image, &snd_cs4231_original_image,
1807 sizeof(snd_cs4231_original_image));
1808
1809 chip->port = of_ioremap(&op->resource[0], 0,
1810 chip->regs_size, "cs4231");
1811 if (!chip->port) {
1812 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1813 return -EIO;
1814 }
1815
1816 chip->c_dma.sbus_info.regs = chip->port;
1817 chip->p_dma.sbus_info.regs = chip->port;
1818 chip->c_dma.sbus_info.dir = APC_RECORD;
1819 chip->p_dma.sbus_info.dir = APC_PLAY;
1820
1821 chip->p_dma.prepare = sbus_dma_prepare;
1822 chip->p_dma.enable = sbus_dma_enable;
1823 chip->p_dma.request = sbus_dma_request;
1824 chip->p_dma.address = sbus_dma_addr;
1825
1826 chip->c_dma.prepare = sbus_dma_prepare;
1827 chip->c_dma.enable = sbus_dma_enable;
1828 chip->c_dma.request = sbus_dma_request;
1829 chip->c_dma.address = sbus_dma_addr;
1830
1831 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1832 IRQF_SHARED, "cs4231", chip)) {
1833 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1834 dev, op->archdata.irqs[0]);
1835 snd_cs4231_sbus_free(chip);
1836 return -EBUSY;
1837 }
1838 chip->irq[0] = op->archdata.irqs[0];
1839
1840 if (snd_cs4231_probe(chip) < 0) {
1841 snd_cs4231_sbus_free(chip);
1842 return -ENODEV;
1843 }
1844 snd_cs4231_init(chip);
1845
1846 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1847 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1848 snd_cs4231_sbus_free(chip);
1849 return err;
1850 }
1851
1852 return 0;
1853 }
1854
1855 static int cs4231_sbus_probe(struct platform_device *op)
1856 {
1857 struct resource *rp = &op->resource[0];
1858 struct snd_card *card;
1859 int err;
1860
1861 err = cs4231_attach_begin(op, &card);
1862 if (err)
1863 return err;
1864
1865 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1866 card->shortname,
1867 rp->flags & 0xffL,
1868 (unsigned long long)rp->start,
1869 op->archdata.irqs[0]);
1870
1871 err = snd_cs4231_sbus_create(card, op, dev);
1872 if (err < 0) {
1873 snd_card_free(card);
1874 return err;
1875 }
1876
1877 return cs4231_attach_finish(card);
1878 }
1879 #endif
1880
1881 #ifdef EBUS_SUPPORT
1882
1883 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1884 void *cookie)
1885 {
1886 struct snd_cs4231 *chip = cookie;
1887
1888 snd_cs4231_play_callback(chip);
1889 }
1890
1891 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1892 int event, void *cookie)
1893 {
1894 struct snd_cs4231 *chip = cookie;
1895
1896 snd_cs4231_capture_callback(chip);
1897 }
1898
1899 /*
1900 * EBUS DMA wrappers
1901 */
1902
1903 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1904 dma_addr_t bus_addr, size_t len)
1905 {
1906 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1907 }
1908
1909 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1910 {
1911 ebus_dma_enable(&dma_cont->ebus_info, on);
1912 }
1913
1914 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1915 {
1916 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1917 }
1918
1919 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1920 {
1921 return ebus_dma_addr(&dma_cont->ebus_info);
1922 }
1923
1924 /*
1925 * Init and exit routines
1926 */
1927
1928 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1929 {
1930 struct platform_device *op = chip->op;
1931
1932 if (chip->c_dma.ebus_info.regs) {
1933 ebus_dma_unregister(&chip->c_dma.ebus_info);
1934 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1935 }
1936 if (chip->p_dma.ebus_info.regs) {
1937 ebus_dma_unregister(&chip->p_dma.ebus_info);
1938 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1939 }
1940
1941 if (chip->port)
1942 of_iounmap(&op->resource[0], chip->port, 0x10);
1943
1944 return 0;
1945 }
1946
1947 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1948 {
1949 struct snd_cs4231 *cp = device->device_data;
1950
1951 return snd_cs4231_ebus_free(cp);
1952 }
1953
1954 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1955 .dev_free = snd_cs4231_ebus_dev_free,
1956 };
1957
1958 static int snd_cs4231_ebus_create(struct snd_card *card,
1959 struct platform_device *op,
1960 int dev)
1961 {
1962 struct snd_cs4231 *chip = card->private_data;
1963 int err;
1964
1965 spin_lock_init(&chip->lock);
1966 spin_lock_init(&chip->c_dma.ebus_info.lock);
1967 spin_lock_init(&chip->p_dma.ebus_info.lock);
1968 mutex_init(&chip->mce_mutex);
1969 mutex_init(&chip->open_mutex);
1970 chip->flags |= CS4231_FLAG_EBUS;
1971 chip->op = op;
1972 memcpy(&chip->image, &snd_cs4231_original_image,
1973 sizeof(snd_cs4231_original_image));
1974 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1975 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1976 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1977 chip->c_dma.ebus_info.client_cookie = chip;
1978 chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1979 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1980 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1981 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1982 chip->p_dma.ebus_info.client_cookie = chip;
1983 chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1984
1985 chip->p_dma.prepare = _ebus_dma_prepare;
1986 chip->p_dma.enable = _ebus_dma_enable;
1987 chip->p_dma.request = _ebus_dma_request;
1988 chip->p_dma.address = _ebus_dma_addr;
1989
1990 chip->c_dma.prepare = _ebus_dma_prepare;
1991 chip->c_dma.enable = _ebus_dma_enable;
1992 chip->c_dma.request = _ebus_dma_request;
1993 chip->c_dma.address = _ebus_dma_addr;
1994
1995 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
1996 chip->p_dma.ebus_info.regs =
1997 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
1998 chip->c_dma.ebus_info.regs =
1999 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
2000 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2001 !chip->c_dma.ebus_info.regs) {
2002 snd_cs4231_ebus_free(chip);
2003 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2004 return -EIO;
2005 }
2006
2007 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2008 snd_cs4231_ebus_free(chip);
2009 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2010 dev);
2011 return -EBUSY;
2012 }
2013 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2014 snd_cs4231_ebus_free(chip);
2015 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2016 dev);
2017 return -EBUSY;
2018 }
2019
2020 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2021 snd_cs4231_ebus_free(chip);
2022 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2023 dev);
2024 return -EBUSY;
2025 }
2026 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2027 snd_cs4231_ebus_free(chip);
2028 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2029 return -EBUSY;
2030 }
2031
2032 if (snd_cs4231_probe(chip) < 0) {
2033 snd_cs4231_ebus_free(chip);
2034 return -ENODEV;
2035 }
2036 snd_cs4231_init(chip);
2037
2038 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2039 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2040 snd_cs4231_ebus_free(chip);
2041 return err;
2042 }
2043
2044 return 0;
2045 }
2046
2047 static int cs4231_ebus_probe(struct platform_device *op)
2048 {
2049 struct snd_card *card;
2050 int err;
2051
2052 err = cs4231_attach_begin(op, &card);
2053 if (err)
2054 return err;
2055
2056 sprintf(card->longname, "%s at 0x%llx, irq %d",
2057 card->shortname,
2058 op->resource[0].start,
2059 op->archdata.irqs[0]);
2060
2061 err = snd_cs4231_ebus_create(card, op, dev);
2062 if (err < 0) {
2063 snd_card_free(card);
2064 return err;
2065 }
2066
2067 return cs4231_attach_finish(card);
2068 }
2069 #endif
2070
2071 static int cs4231_probe(struct platform_device *op)
2072 {
2073 #ifdef EBUS_SUPPORT
2074 if (!strcmp(op->dev.of_node->parent->name, "ebus"))
2075 return cs4231_ebus_probe(op);
2076 #endif
2077 #ifdef SBUS_SUPPORT
2078 if (!strcmp(op->dev.of_node->parent->name, "sbus") ||
2079 !strcmp(op->dev.of_node->parent->name, "sbi"))
2080 return cs4231_sbus_probe(op);
2081 #endif
2082 return -ENODEV;
2083 }
2084
2085 static int cs4231_remove(struct platform_device *op)
2086 {
2087 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2088
2089 snd_card_free(chip->card);
2090
2091 return 0;
2092 }
2093
2094 static const struct of_device_id cs4231_match[] = {
2095 {
2096 .name = "SUNW,CS4231",
2097 },
2098 {
2099 .name = "audio",
2100 .compatible = "SUNW,CS4231",
2101 },
2102 {},
2103 };
2104
2105 MODULE_DEVICE_TABLE(of, cs4231_match);
2106
2107 static struct platform_driver cs4231_driver = {
2108 .driver = {
2109 .name = "audio",
2110 .of_match_table = cs4231_match,
2111 },
2112 .probe = cs4231_probe,
2113 .remove = cs4231_remove,
2114 };
2115
2116 module_platform_driver(cs4231_driver);