3 * pxa-ssp.c -- ALSA Soc Audio Layer
5 * Copyright 2005,2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood
7 * Mark Brown <broonie@opensource.wolfsonmicro.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 * o Test network mode for > 16bit sample size
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/initval.h>
27 #include <sound/pcm_params.h>
28 #include <sound/soc.h>
29 #include <sound/pxa2xx-lib.h>
31 #include <mach/hardware.h>
32 #include <mach/pxa-regs.h>
33 #include <mach/regs-ssp.h>
34 #include <mach/audio.h>
37 #include "pxa2xx-pcm.h"
41 * SSP audio private data
48 struct ssp_state state
;
52 #define PXA2xx_SSP1_BASE 0x41000000
53 #define PXA27x_SSP2_BASE 0x41700000
54 #define PXA27x_SSP3_BASE 0x41900000
55 #define PXA3xx_SSP4_BASE 0x41a00000
57 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_out
= {
58 .name
= "SSP1 PCM Mono out",
59 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
61 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
62 DCMD_BURST16
| DCMD_WIDTH2
,
65 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_in
= {
66 .name
= "SSP1 PCM Mono in",
67 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
69 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
70 DCMD_BURST16
| DCMD_WIDTH2
,
73 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_out
= {
74 .name
= "SSP1 PCM Stereo out",
75 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
77 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
78 DCMD_BURST16
| DCMD_WIDTH4
,
81 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_in
= {
82 .name
= "SSP1 PCM Stereo in",
83 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
85 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
86 DCMD_BURST16
| DCMD_WIDTH4
,
89 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_out
= {
90 .name
= "SSP2 PCM Mono out",
91 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
93 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
94 DCMD_BURST16
| DCMD_WIDTH2
,
97 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_in
= {
98 .name
= "SSP2 PCM Mono in",
99 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
101 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
102 DCMD_BURST16
| DCMD_WIDTH2
,
105 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_out
= {
106 .name
= "SSP2 PCM Stereo out",
107 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
109 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
110 DCMD_BURST16
| DCMD_WIDTH4
,
113 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_in
= {
114 .name
= "SSP2 PCM Stereo in",
115 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
117 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
118 DCMD_BURST16
| DCMD_WIDTH4
,
121 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_out
= {
122 .name
= "SSP3 PCM Mono out",
123 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
125 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
126 DCMD_BURST16
| DCMD_WIDTH2
,
129 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_in
= {
130 .name
= "SSP3 PCM Mono in",
131 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
133 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
134 DCMD_BURST16
| DCMD_WIDTH2
,
137 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_out
= {
138 .name
= "SSP3 PCM Stereo out",
139 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
141 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
142 DCMD_BURST16
| DCMD_WIDTH4
,
145 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_in
= {
146 .name
= "SSP3 PCM Stereo in",
147 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
149 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
150 DCMD_BURST16
| DCMD_WIDTH4
,
153 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_out
= {
154 .name
= "SSP4 PCM Mono out",
155 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
157 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
158 DCMD_BURST16
| DCMD_WIDTH2
,
161 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_in
= {
162 .name
= "SSP4 PCM Mono in",
163 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
165 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
166 DCMD_BURST16
| DCMD_WIDTH2
,
169 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_out
= {
170 .name
= "SSP4 PCM Stereo out",
171 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
173 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
174 DCMD_BURST16
| DCMD_WIDTH4
,
177 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_in
= {
178 .name
= "SSP4 PCM Stereo in",
179 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
181 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
182 DCMD_BURST16
| DCMD_WIDTH4
,
185 static void dump_registers(struct ssp_device
*ssp
)
187 dev_dbg(&ssp
->pdev
->dev
, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
188 ssp_read_reg(ssp
, SSCR0
), ssp_read_reg(ssp
, SSCR1
),
189 ssp_read_reg(ssp
, SSTO
));
191 dev_dbg(&ssp
->pdev
->dev
, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
192 ssp_read_reg(ssp
, SSPSP
), ssp_read_reg(ssp
, SSSR
),
193 ssp_read_reg(ssp
, SSACD
));
196 static struct pxa2xx_pcm_dma_params
*ssp_dma_params
[4][4] = {
198 &pxa_ssp1_pcm_mono_out
, &pxa_ssp1_pcm_mono_in
,
199 &pxa_ssp1_pcm_stereo_out
, &pxa_ssp1_pcm_stereo_in
,
202 &pxa_ssp2_pcm_mono_out
, &pxa_ssp2_pcm_mono_in
,
203 &pxa_ssp2_pcm_stereo_out
, &pxa_ssp2_pcm_stereo_in
,
206 &pxa_ssp3_pcm_mono_out
, &pxa_ssp3_pcm_mono_in
,
207 &pxa_ssp3_pcm_stereo_out
, &pxa_ssp3_pcm_stereo_in
,
210 &pxa_ssp4_pcm_mono_out
, &pxa_ssp4_pcm_mono_in
,
211 &pxa_ssp4_pcm_stereo_out
, &pxa_ssp4_pcm_stereo_in
,
215 static int pxa_ssp_startup(struct snd_pcm_substream
*substream
,
216 struct snd_soc_dai
*dai
)
218 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
219 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
220 struct ssp_priv
*priv
= cpu_dai
->private_data
;
223 if (!cpu_dai
->active
) {
224 ret
= ssp_init(&priv
->dev
, cpu_dai
->id
+ 1, SSP_NO_IRQ
);
227 ssp_disable(&priv
->dev
);
232 static void pxa_ssp_shutdown(struct snd_pcm_substream
*substream
,
233 struct snd_soc_dai
*dai
)
235 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
236 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
237 struct ssp_priv
*priv
= cpu_dai
->private_data
;
239 if (!cpu_dai
->active
) {
240 ssp_disable(&priv
->dev
);
241 ssp_exit(&priv
->dev
);
247 static int pxa_ssp_suspend(struct snd_soc_dai
*cpu_dai
)
249 struct ssp_priv
*priv
= cpu_dai
->private_data
;
251 if (!cpu_dai
->active
)
254 ssp_save_state(&priv
->dev
, &priv
->state
);
255 clk_disable(priv
->dev
.ssp
->clk
);
259 static int pxa_ssp_resume(struct snd_soc_dai
*cpu_dai
)
261 struct ssp_priv
*priv
= cpu_dai
->private_data
;
263 if (!cpu_dai
->active
)
266 clk_enable(priv
->dev
.ssp
->clk
);
267 ssp_restore_state(&priv
->dev
, &priv
->state
);
268 ssp_enable(&priv
->dev
);
274 #define pxa_ssp_suspend NULL
275 #define pxa_ssp_resume NULL
279 * ssp_set_clkdiv - set SSP clock divider
280 * @div: serial clock rate divider
282 static void ssp_set_scr(struct ssp_dev
*dev
, u32 div
)
284 struct ssp_device
*ssp
= dev
->ssp
;
285 u32 sscr0
= ssp_read_reg(dev
->ssp
, SSCR0
) & ~SSCR0_SCR
;
287 ssp_write_reg(ssp
, SSCR0
, (sscr0
| SSCR0_SerClkDiv(div
)));
291 * Set the SSP ports SYSCLK.
293 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai
*cpu_dai
,
294 int clk_id
, unsigned int freq
, int dir
)
296 struct ssp_priv
*priv
= cpu_dai
->private_data
;
297 struct ssp_device
*ssp
= priv
->dev
.ssp
;
300 u32 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
301 ~(SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ADC
);
303 dev_dbg(&ssp
->pdev
->dev
,
304 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %d\n",
305 cpu_dai
->id
, clk_id
, freq
);
308 case PXA_SSP_CLK_NET_PLL
:
311 case PXA_SSP_CLK_PLL
:
312 /* Internal PLL is fixed */
314 priv
->sysclk
= 1843200;
316 priv
->sysclk
= 13000000;
318 case PXA_SSP_CLK_EXT
:
322 case PXA_SSP_CLK_NET
:
324 sscr0
|= SSCR0_NCS
| SSCR0_MOD
;
326 case PXA_SSP_CLK_AUDIO
:
328 ssp_set_scr(&priv
->dev
, 1);
335 /* The SSP clock must be disabled when changing SSP clock mode
336 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
337 if (!cpu_is_pxa3xx())
338 clk_disable(priv
->dev
.ssp
->clk
);
339 val
= ssp_read_reg(ssp
, SSCR0
) | sscr0
;
340 ssp_write_reg(ssp
, SSCR0
, val
);
341 if (!cpu_is_pxa3xx())
342 clk_enable(priv
->dev
.ssp
->clk
);
348 * Set the SSP clock dividers.
350 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai
*cpu_dai
,
353 struct ssp_priv
*priv
= cpu_dai
->private_data
;
354 struct ssp_device
*ssp
= priv
->dev
.ssp
;
358 case PXA_SSP_AUDIO_DIV_ACDS
:
359 val
= (ssp_read_reg(ssp
, SSACD
) & ~0x7) | SSACD_ACDS(div
);
360 ssp_write_reg(ssp
, SSACD
, val
);
362 case PXA_SSP_AUDIO_DIV_SCDB
:
363 val
= ssp_read_reg(ssp
, SSACD
);
365 #if defined(CONFIG_PXA3xx)
370 case PXA_SSP_CLK_SCDB_1
:
373 case PXA_SSP_CLK_SCDB_4
:
375 #if defined(CONFIG_PXA3xx)
376 case PXA_SSP_CLK_SCDB_8
:
386 ssp_write_reg(ssp
, SSACD
, val
);
388 case PXA_SSP_DIV_SCR
:
389 ssp_set_scr(&priv
->dev
, div
);
399 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
401 static int pxa_ssp_set_dai_pll(struct snd_soc_dai
*cpu_dai
,
402 int pll_id
, unsigned int freq_in
, unsigned int freq_out
)
404 struct ssp_priv
*priv
= cpu_dai
->private_data
;
405 struct ssp_device
*ssp
= priv
->dev
.ssp
;
406 u32 ssacd
= ssp_read_reg(ssp
, SSACD
) & ~0x70;
408 #if defined(CONFIG_PXA3xx)
410 ssp_write_reg(ssp
, SSACDD
, 0);
437 /* PXA3xx has a clock ditherer which can be used to generate
438 * a wider range of frequencies - calculate a value for it.
440 if (cpu_is_pxa3xx()) {
444 do_div(tmp
, freq_out
);
447 val
= (val
<< 16) | 64;;
448 ssp_write_reg(ssp
, SSACDD
, val
);
452 dev_dbg(&ssp
->pdev
->dev
,
453 "Using SSACDD %x to supply %dHz\n",
462 ssp_write_reg(ssp
, SSACD
, ssacd
);
468 * Set the active slots in TDM/Network mode
470 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai
*cpu_dai
,
471 unsigned int mask
, int slots
)
473 struct ssp_priv
*priv
= cpu_dai
->private_data
;
474 struct ssp_device
*ssp
= priv
->dev
.ssp
;
477 sscr0
= ssp_read_reg(ssp
, SSCR0
) & ~SSCR0_SlotsPerFrm(7);
479 /* set number of active slots */
480 sscr0
|= SSCR0_SlotsPerFrm(slots
);
481 ssp_write_reg(ssp
, SSCR0
, sscr0
);
483 /* set active slot mask */
484 ssp_write_reg(ssp
, SSTSA
, mask
);
485 ssp_write_reg(ssp
, SSRSA
, mask
);
490 * Tristate the SSP DAI lines
492 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai
*cpu_dai
,
495 struct ssp_priv
*priv
= cpu_dai
->private_data
;
496 struct ssp_device
*ssp
= priv
->dev
.ssp
;
499 sscr1
= ssp_read_reg(ssp
, SSCR1
);
504 ssp_write_reg(ssp
, SSCR1
, sscr1
);
510 * Set up the SSP DAI format.
511 * The SSP Port must be inactive before calling this function as the
512 * physical interface format is changed.
514 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai
*cpu_dai
,
517 struct ssp_priv
*priv
= cpu_dai
->private_data
;
518 struct ssp_device
*ssp
= priv
->dev
.ssp
;
523 /* reset port settings */
524 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
525 (SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ADC
);
526 sscr1
= SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
529 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
530 case SND_SOC_DAIFMT_CBM_CFM
:
531 sscr1
|= SSCR1_SCLKDIR
| SSCR1_SFRMDIR
;
533 case SND_SOC_DAIFMT_CBM_CFS
:
534 sscr1
|= SSCR1_SCLKDIR
;
536 case SND_SOC_DAIFMT_CBS_CFS
:
542 ssp_write_reg(ssp
, SSCR0
, sscr0
);
543 ssp_write_reg(ssp
, SSCR1
, sscr1
);
544 ssp_write_reg(ssp
, SSPSP
, sspsp
);
546 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
547 case SND_SOC_DAIFMT_I2S
:
548 sscr0
|= SSCR0_MOD
| SSCR0_PSP
;
549 sscr1
|= SSCR1_RWOT
| SSCR1_TRAIL
;
551 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
552 case SND_SOC_DAIFMT_NB_NF
:
555 case SND_SOC_DAIFMT_NB_IF
:
556 sspsp
|= SSPSP_SFRMP
| SSPSP_FSRT
;
558 case SND_SOC_DAIFMT_IB_IF
:
559 sspsp
|= SSPSP_SFRMP
;
566 case SND_SOC_DAIFMT_DSP_A
:
568 case SND_SOC_DAIFMT_DSP_B
:
569 sscr0
|= SSCR0_MOD
| SSCR0_PSP
;
570 sscr1
|= SSCR1_TRAIL
| SSCR1_RWOT
;
572 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
573 case SND_SOC_DAIFMT_NB_NF
:
574 sspsp
|= SSPSP_SFRMP
;
576 case SND_SOC_DAIFMT_IB_IF
:
587 ssp_write_reg(ssp
, SSCR0
, sscr0
);
588 ssp_write_reg(ssp
, SSCR1
, sscr1
);
589 ssp_write_reg(ssp
, SSPSP
, sspsp
);
593 /* Since we are configuring the timings for the format by hand
594 * we have to defer some things until hw_params() where we
595 * know parameters like the sample size.
603 * Set the SSP audio DMA parameters and sample size.
604 * Can be called multiple times by oss emulation.
606 static int pxa_ssp_hw_params(struct snd_pcm_substream
*substream
,
607 struct snd_pcm_hw_params
*params
,
608 struct snd_soc_dai
*dai
)
610 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
611 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
612 struct ssp_priv
*priv
= cpu_dai
->private_data
;
613 struct ssp_device
*ssp
= priv
->dev
.ssp
;
614 int dma
= 0, chn
= params_channels(params
);
617 int width
= snd_pcm_format_physical_width(params_format(params
));
619 /* select correct DMA params */
620 if (substream
->stream
!= SNDRV_PCM_STREAM_PLAYBACK
)
621 dma
= 1; /* capture DMA offset is 1,3 */
623 dma
+= 2; /* stereo DMA offset is 2, mono is 0 */
624 cpu_dai
->dma_data
= ssp_dma_params
[cpu_dai
->id
][dma
];
626 dev_dbg(&ssp
->pdev
->dev
, "pxa_ssp_hw_params: dma %d\n", dma
);
628 /* we can only change the settings if the port is not in use */
629 if (ssp_read_reg(ssp
, SSCR0
) & SSCR0_SSE
)
632 /* clear selected SSP bits */
633 sscr0
= ssp_read_reg(ssp
, SSCR0
) & ~(SSCR0_DSS
| SSCR0_EDSS
);
634 ssp_write_reg(ssp
, SSCR0
, sscr0
);
637 sscr0
= ssp_read_reg(ssp
, SSCR0
);
638 switch (params_format(params
)) {
639 case SNDRV_PCM_FORMAT_S16_LE
:
642 sscr0
|= SSCR0_FPCKE
;
644 sscr0
|= SSCR0_DataSize(16);
645 if (params_channels(params
) > 1)
648 case SNDRV_PCM_FORMAT_S24_LE
:
649 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(8));
650 /* we must be in network mode (2 slots) for 24 bit stereo */
652 case SNDRV_PCM_FORMAT_S32_LE
:
653 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(16));
654 /* we must be in network mode (2 slots) for 32 bit stereo */
657 ssp_write_reg(ssp
, SSCR0
, sscr0
);
659 switch (priv
->dai_fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
660 case SND_SOC_DAIFMT_I2S
:
661 /* Cleared when the DAI format is set */
662 sspsp
= ssp_read_reg(ssp
, SSPSP
) | SSPSP_SFRMWDTH(width
);
663 ssp_write_reg(ssp
, SSPSP
, sspsp
);
669 /* We always use a network mode so we always require TDM slots
670 * - complain loudly and fail if they've not been set up yet.
672 if (!(ssp_read_reg(ssp
, SSTSA
) & 0xf)) {
673 dev_err(&ssp
->pdev
->dev
, "No TDM timeslot configured\n");
682 static int pxa_ssp_trigger(struct snd_pcm_substream
*substream
, int cmd
,
683 struct snd_soc_dai
*dai
)
685 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
686 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
688 struct ssp_priv
*priv
= cpu_dai
->private_data
;
689 struct ssp_device
*ssp
= priv
->dev
.ssp
;
693 case SNDRV_PCM_TRIGGER_RESUME
:
694 ssp_enable(&priv
->dev
);
696 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
697 val
= ssp_read_reg(ssp
, SSCR1
);
698 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
702 ssp_write_reg(ssp
, SSCR1
, val
);
703 val
= ssp_read_reg(ssp
, SSSR
);
704 ssp_write_reg(ssp
, SSSR
, val
);
706 case SNDRV_PCM_TRIGGER_START
:
707 val
= ssp_read_reg(ssp
, SSCR1
);
708 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
712 ssp_write_reg(ssp
, SSCR1
, val
);
713 ssp_enable(&priv
->dev
);
715 case SNDRV_PCM_TRIGGER_STOP
:
716 val
= ssp_read_reg(ssp
, SSCR1
);
717 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
721 ssp_write_reg(ssp
, SSCR1
, val
);
723 case SNDRV_PCM_TRIGGER_SUSPEND
:
724 ssp_disable(&priv
->dev
);
726 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
727 val
= ssp_read_reg(ssp
, SSCR1
);
728 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
732 ssp_write_reg(ssp
, SSCR1
, val
);
744 static int pxa_ssp_probe(struct platform_device
*pdev
,
745 struct snd_soc_dai
*dai
)
747 struct ssp_priv
*priv
;
750 priv
= kzalloc(sizeof(struct ssp_priv
), GFP_KERNEL
);
754 priv
->dev
.ssp
= ssp_request(dai
->id
, "SoC audio");
755 if (priv
->dev
.ssp
== NULL
) {
760 dai
->private_data
= priv
;
769 static void pxa_ssp_remove(struct platform_device
*pdev
,
770 struct snd_soc_dai
*dai
)
772 struct ssp_priv
*priv
= dai
->private_data
;
773 ssp_free(priv
->dev
.ssp
);
776 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
777 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
778 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
779 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
781 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
782 SNDRV_PCM_FMTBIT_S24_LE | \
783 SNDRV_PCM_FMTBIT_S32_LE)
785 struct snd_soc_dai pxa_ssp_dai
[] = {
787 .name
= "pxa2xx-ssp1",
789 .probe
= pxa_ssp_probe
,
790 .remove
= pxa_ssp_remove
,
791 .suspend
= pxa_ssp_suspend
,
792 .resume
= pxa_ssp_resume
,
796 .rates
= PXA_SSP_RATES
,
797 .formats
= PXA_SSP_FORMATS
,
802 .rates
= PXA_SSP_RATES
,
803 .formats
= PXA_SSP_FORMATS
,
806 .startup
= pxa_ssp_startup
,
807 .shutdown
= pxa_ssp_shutdown
,
808 .trigger
= pxa_ssp_trigger
,
809 .hw_params
= pxa_ssp_hw_params
,
810 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
811 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
812 .set_pll
= pxa_ssp_set_dai_pll
,
813 .set_fmt
= pxa_ssp_set_dai_fmt
,
814 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
815 .set_tristate
= pxa_ssp_set_dai_tristate
,
818 { .name
= "pxa2xx-ssp2",
820 .probe
= pxa_ssp_probe
,
821 .remove
= pxa_ssp_remove
,
822 .suspend
= pxa_ssp_suspend
,
823 .resume
= pxa_ssp_resume
,
827 .rates
= PXA_SSP_RATES
,
828 .formats
= PXA_SSP_FORMATS
,
833 .rates
= PXA_SSP_RATES
,
834 .formats
= PXA_SSP_FORMATS
,
837 .startup
= pxa_ssp_startup
,
838 .shutdown
= pxa_ssp_shutdown
,
839 .trigger
= pxa_ssp_trigger
,
840 .hw_params
= pxa_ssp_hw_params
,
841 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
842 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
843 .set_pll
= pxa_ssp_set_dai_pll
,
844 .set_fmt
= pxa_ssp_set_dai_fmt
,
845 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
846 .set_tristate
= pxa_ssp_set_dai_tristate
,
850 .name
= "pxa2xx-ssp3",
852 .probe
= pxa_ssp_probe
,
853 .remove
= pxa_ssp_remove
,
854 .suspend
= pxa_ssp_suspend
,
855 .resume
= pxa_ssp_resume
,
859 .rates
= PXA_SSP_RATES
,
860 .formats
= PXA_SSP_FORMATS
,
865 .rates
= PXA_SSP_RATES
,
866 .formats
= PXA_SSP_FORMATS
,
869 .startup
= pxa_ssp_startup
,
870 .shutdown
= pxa_ssp_shutdown
,
871 .trigger
= pxa_ssp_trigger
,
872 .hw_params
= pxa_ssp_hw_params
,
873 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
874 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
875 .set_pll
= pxa_ssp_set_dai_pll
,
876 .set_fmt
= pxa_ssp_set_dai_fmt
,
877 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
878 .set_tristate
= pxa_ssp_set_dai_tristate
,
882 .name
= "pxa2xx-ssp4",
884 .probe
= pxa_ssp_probe
,
885 .remove
= pxa_ssp_remove
,
886 .suspend
= pxa_ssp_suspend
,
887 .resume
= pxa_ssp_resume
,
891 .rates
= PXA_SSP_RATES
,
892 .formats
= PXA_SSP_FORMATS
,
897 .rates
= PXA_SSP_RATES
,
898 .formats
= PXA_SSP_FORMATS
,
901 .startup
= pxa_ssp_startup
,
902 .shutdown
= pxa_ssp_shutdown
,
903 .trigger
= pxa_ssp_trigger
,
904 .hw_params
= pxa_ssp_hw_params
,
905 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
906 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
907 .set_pll
= pxa_ssp_set_dai_pll
,
908 .set_fmt
= pxa_ssp_set_dai_fmt
,
909 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
910 .set_tristate
= pxa_ssp_set_dai_tristate
,
914 EXPORT_SYMBOL_GPL(pxa_ssp_dai
);
916 static int __init
pxa_ssp_init(void)
918 return snd_soc_register_dais(pxa_ssp_dai
, ARRAY_SIZE(pxa_ssp_dai
));
920 module_init(pxa_ssp_init
);
922 static void __exit
pxa_ssp_exit(void)
924 snd_soc_unregister_dais(pxa_ssp_dai
, ARRAY_SIZE(pxa_ssp_dai
));
926 module_exit(pxa_ssp_exit
);
928 /* Module information */
929 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
930 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
931 MODULE_LICENSE("GPL");