sound/soc/mediatek/mt_soc_audio_v3/mt_soc_tdm_capture.c

   1 /*
   2  * Copyright (C) 2007 The Android Open Source Project
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *      http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 /*******************************************************************************
  17  *
  18  * Filename:
  19  * ---------
  20  *   mtk_pcm_capture.c
  21  *
  22  * Project:
  23  * --------
  24  *   Audio Driver Kernel Function
  25  *
  26  * Description:
  27  * ------------
  28  *   Audio Ul1 data1 uplink
  29  *
  30  * Author:
  31  * -------
  32  * Chipeng Chang
  33  *
  34  *------------------------------------------------------------------------------
  35  * $Revision: #1 $
  36  * $Modtime:$
  37  * $Log:$
  38  *
  39  *
  40  *******************************************************************************/
  41
  42
  43 /*****************************************************************************
  44  *                     C O M P I L E R   F L A G S
  45  *****************************************************************************/
  46
  47
  48 /*****************************************************************************
  49  *                E X T E R N A L   R E F E R E N C E S
  50  *****************************************************************************/
  51
  52 #include "AudDrv_Common.h"
  53 #include "AudDrv_Def.h"
  54 #include "AudDrv_Afe.h"
  55 #include "AudDrv_Ana.h"
  56 #include "AudDrv_Clk.h"
  57 #include "AudDrv_Kernel.h"
  58 #include "mt_soc_afe_control.h"
  59
  60 #include <linux/kernel.h>
  61 #include <linux/module.h>
  62 #include <linux/init.h>
  63 #include <linux/device.h>
  64 #include <linux/slab.h>
  65 #include <linux/fs.h>
  66 #include <linux/completion.h>
  67 #include <linux/mm.h>
  68 #include <linux/delay.h>
  69 #include <linux/interrupt.h>
  70 #include <linux/dma-mapping.h>
  71 #include <linux/vmalloc.h>
  72 #include <linux/platform_device.h>
  73 #include <linux/miscdevice.h>
  74 #include <linux/wait.h>
  75 #include <linux/spinlock.h>
  76 #include <linux/sched.h>
  77 #include <linux/wakelock.h>
  78 #include <linux/semaphore.h>
  79 #include <linux/jiffies.h>
  80 #include <linux/proc_fs.h>
  81 #include <linux/string.h>
  82 #include <linux/mutex.h>
  83 #include <linux/xlog.h>
  84 #include <mach/irqs.h>
  85 #include <asm/uaccess.h>
  86 #include <asm/irq.h>
  87 #include <asm/io.h>
  88 #include <mach/mt_reg_base.h>
  89 #include <asm/div64.h>
  90 #include <linux/aee.h>
  91 #include <mach/pmic_mt6325_sw.h>
  92 #include <mach/upmu_common.h>
  93 #include <mach/upmu_hw.h>
  94 #include <mach/mt_gpio.h>
  95 #include <mach/mt_typedefs.h>
  96
  97
  98 #include <linux/clk.h>
  99 #include <linux/delay.h>
 100 #include <linux/gpio.h>
 101 #include <linux/platform_device.h>
 102 #include <linux/slab.h>
 103 #include <sound/core.h>
 104 #include <sound/soc.h>
 105 #include <sound/soc-dapm.h>
 106 #include <sound/pcm.h>
 107 #include <sound/jack.h>
 108 //#include <asm/mach-types.h>
 109
 110 //information about
 111 AFE_MEM_CONTROL_T  *TDM_VUL_Control_context;
 112 static struct snd_dma_buffer *Capture_dma_buf  = NULL;
 113 static AudioDigtalI2S *mAudioDigitalI2S = NULL;
 114 static DEFINE_SPINLOCK(auddrv_ULInCtl_lock);
 115
 116 /*
 117  *    function implementation
 118  */
 119 static void StartAudioCaptureHardware(struct snd_pcm_substream *substream);
 120 static void StopAudioCaptureHardware(struct snd_pcm_substream *substream);
 121 void StartAudioCaptureAnalogHardware(void);
 122 void StopAudioCaptureAnalogHardware(void);
 123 static int mtk_capture_probe(struct platform_device *pdev);
 124 static int mtk_capture_pcm_close(struct snd_pcm_substream *substream);
 125 static int mtk_asoc_capture_pcm_new(struct snd_soc_pcm_runtime *rtd);
 126 static int mtk_afe_capture_probe(struct snd_soc_platform *platform);
 127
 128 #define MAX_PCM_DEVICES 4
 129 #define MAX_PCM_SUBSTREAMS  128
 130 #define MAX_MIDI_DEVICES
 131
 132 /* defaults */
 133 #define UL1_MAX_BUFFER_SIZE     (48*1024)
 134 #define MIN_PERIOD_SIZE     64
 135 #define MAX_PERIOD_SIZE     UL1_MAX_BUFFER_SIZE
 136 #define USE_FORMATS         (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE)
 137 #define USE_RATE        SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000
 138 #define USE_RATE_MIN        8000
 139 #define USE_RATE_MAX        48000
 140 #define USE_CHANNELS_MIN    1
 141 #define USE_CHANNELS_MAX    2
 142 #define USE_PERIODS_MIN     1024
 143 #define USE_PERIODS_MAX     16*1024
 144
 145 static struct snd_pcm_hardware mtk_capture_hardware =
 146 {
 147     .info = (SNDRV_PCM_INFO_INTERLEAVED),
 148     .formats =      USE_FORMATS,
 149     .rates =        USE_RATE,
 150     .rate_min =     USE_RATE_MIN,
 151     .rate_max =     USE_RATE_MAX,
 152     .channels_min =     USE_CHANNELS_MIN,
 153     .channels_max =     USE_CHANNELS_MAX,
 154     .buffer_bytes_max = UL1_MAX_BUFFER_SIZE,
 155     .period_bytes_max = MAX_PERIOD_SIZE,
 156     .periods_min =      1,
 157     .periods_max =      4096,
 158     .fifo_size =        0,
 159 };
 160
 161 static void StopAudioCaptureHardware(struct snd_pcm_substream *substream)
 162 {
 163     printk("StopAudioCaptureHardware \n");
 164
 165     // here to set interrupt
 166     SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, false);
 167
 168     SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, false);
 169     if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC) == false)
 170     {
 171         SetI2SAdcEnable(false);
 172     }
 173
 174     SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_VUL, false);
 175
 176     // here to turn off digital part
 177     SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O09);
 178     SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O10);
 179
 180     EnableAfe(false);
 181 }
 182
 183 static void ConfigAdcI2S(struct snd_pcm_substream *substream)
 184 {
 185     mAudioDigitalI2S->mLR_SWAP = Soc_Aud_LR_SWAP_NO_SWAP;
 186     mAudioDigitalI2S->mBuffer_Update_word = 8;
 187     mAudioDigitalI2S->mFpga_bit_test = 0;
 188     mAudioDigitalI2S->mFpga_bit = 0;
 189     mAudioDigitalI2S->mloopback = 0;
 190     mAudioDigitalI2S->mINV_LRCK = Soc_Aud_INV_LRCK_NO_INVERSE;
 191     mAudioDigitalI2S->mI2S_FMT = Soc_Aud_I2S_FORMAT_I2S;
 192     mAudioDigitalI2S->mI2S_WLEN = Soc_Aud_I2S_WLEN_WLEN_16BITS;
 193     mAudioDigitalI2S->mI2S_SAMPLERATE = (substream->runtime->rate);
 194 }
 195
 196 static void StartAudioCaptureHardware(struct snd_pcm_substream *substream)
 197 {
 198     printk("StartAudioCaptureHardware \n");
 199
 200     ConfigAdcI2S(substream);
 201     SetI2SAdcIn(mAudioDigitalI2S);
 202
 203     SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_VUL, AFE_WLEN_16_BIT);
 204     SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_VUL, AFE_WLEN_16_BIT);
 205     SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O09);
 206     SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O10);
 207
 208     if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC) == false)
 209     {
 210         SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, true);
 211         SetI2SAdcEnable(true);
 212     }
 213     else
 214     {
 215         SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, true);
 216     }
 217
 218     // here to set interrupt
 219     SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size);
 220     SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
 221     SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
 222
 223     SetSampleRate(Soc_Aud_Digital_Block_MEM_VUL, substream->runtime->rate);
 224     SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_VUL, true);
 225 #if 0
 226     SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O09);
 227     SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O10);
 228
 229     SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O10);
 230     SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O09);
 231 #endif
 232     SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O09);
 233     SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O10);
 234
 235     EnableAfe(true);
 236
 237 }
 238
 239 static int mtk_capture_pcm_prepare(struct snd_pcm_substream *substream)
 240 {
 241     printk("mtk_capture_pcm_prepare substream->rate = %d  substream->channels = %d \n", substream->runtime->rate, substream->runtime->channels);
 242     return 0;
 243 }
 244
 245 static int mtk_capture_alsa_stop(struct snd_pcm_substream *substream)
 246 {
 247     AFE_BLOCK_T *Vul_Block = &(TDM_VUL_Control_context->rBlock);
 248     printk("mtk_capture_alsa_stop \n");
 249     StopAudioCaptureHardware(substream);
 250     Vul_Block->u4DMAReadIdx  = 0;
 251     Vul_Block->u4WriteIdx  = 0;
 252     Vul_Block->u4DataRemained = 0;
 253     RemoveMemifSubStream(Soc_Aud_Digital_Block_MEM_VUL, substream);
 254     return 0;
 255 }
 256
 257 static kal_int32 Previous_Hw_cur = 0;
 258 static snd_pcm_uframes_t mtk_capture_pcm_pointer(struct snd_pcm_substream *substream)
 259 {
 260     kal_int32 HW_memory_index = 0;
 261     kal_int32 HW_Cur_ReadIdx = 0;
 262     AFE_BLOCK_T *Awb_Block = &(TDM_VUL_Control_context->rBlock);
 263     PRINTK_AUD_UL1("mtk_capture_pcm_pointer Awb_Block->u4WriteIdx;= 0x%x \n", Awb_Block->u4WriteIdx);
 264     if (TDM_VUL_Control_context->interruptTrigger == 1)
 265     {
 266
 267         Previous_Hw_cur = Awb_Block->u4WriteIdx;
 268         return Awb_Block->u4WriteIdx >> 2;
 269
 270         HW_Cur_ReadIdx = Align64ByteSize(Afe_Get_Reg(AFE_AWB_CUR));
 271         if (HW_Cur_ReadIdx == 0)
 272         {
 273             PRINTK_AUD_UL1("[Auddrv] mtk_capture_pcm_pointer  HW_Cur_ReadIdx ==0 \n");
 274             HW_Cur_ReadIdx = Awb_Block->pucPhysBufAddr;
 275         }
 276         HW_memory_index = (HW_Cur_ReadIdx - Awb_Block->pucPhysBufAddr);
 277         Previous_Hw_cur = HW_memory_index;
 278         PRINTK_AUD_UL1("[Auddrv] mtk_capture_pcm_pointer =0x%x HW_memory_index = 0x%x\n", HW_Cur_ReadIdx, HW_memory_index);
 279         TDM_VUL_Control_context->interruptTrigger = 0;
 280         return (HW_memory_index >> 2);
 281     }
 282     return (Previous_Hw_cur >> 2);
 283
 284 }
 285
 286 static void SetVULBuffer(struct snd_pcm_substream *substream,
 287                          struct snd_pcm_hw_params *hw_params)
 288 {
 289     struct snd_pcm_runtime *runtime = substream->runtime;
 290     AFE_BLOCK_T *pblock = &TDM_VUL_Control_context->rBlock;
 291     printk("SetVULBuffer\n");
 292     pblock->pucPhysBufAddr =  runtime->dma_addr;
 293     pblock->pucVirtBufAddr =  runtime->dma_area;
 294     pblock->u4BufferSize = runtime->dma_bytes;
 295     pblock->u4SampleNumMask = 0x001f;  // 32 byte align
 296     pblock->u4WriteIdx     = 0;
 297     pblock->u4DMAReadIdx    = 0;
 298     pblock->u4DataRemained  = 0;
 299     pblock->u4fsyncflag     = false;
 300     pblock->uResetFlag      = true;
 301     printk("u4BufferSize = %d pucVirtBufAddr = %p pucPhysBufAddr = 0x%x\n",
 302            pblock->u4BufferSize, pblock->pucVirtBufAddr, pblock->pucPhysBufAddr);
 303     // set dram address top hardware
 304     Afe_Set_Reg(AFE_VUL_BASE , pblock->pucPhysBufAddr , 0xffffffff);
 305     Afe_Set_Reg(AFE_VUL_END  , pblock->pucPhysBufAddr + (pblock->u4BufferSize - 1), 0xffffffff);
 306
 307 }
 308
 309 static int mtk_capture_pcm_hw_params(struct snd_pcm_substream *substream,
 310                                      struct snd_pcm_hw_params *hw_params)
 311 {
 312     struct snd_pcm_runtime *runtime = substream->runtime;
 313     struct snd_dma_buffer *dma_buf = &substream->dma_buffer;
 314     int ret = 0;
 315     printk("mtk_capture_pcm_hw_params \n");
 316
 317     dma_buf->dev.type = SNDRV_DMA_TYPE_DEV;
 318     dma_buf->dev.dev = substream->pcm->card->dev;
 319     dma_buf->private_data = NULL;
 320     printk("Capture_dma_buf = %p Capture_dma_buf->area = %p\n", Capture_dma_buf, Capture_dma_buf->area);
 321
 322     if (Capture_dma_buf->area)
 323     {
 324         runtime->dma_bytes = params_buffer_bytes(hw_params);
 325         runtime->dma_area = Capture_dma_buf->area;
 326         runtime->dma_addr = Capture_dma_buf->addr;
 327     }
 328     else
 329     {
 330         printk("mtk_capture_pcm_hw_params snd_pcm_lib_malloc_pages\n");
 331         ret =  snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 332     }
 333
 334     printk("mtk_capture_pcm_hw_params dma_bytes = %zu dma_area = %p dma_addr = 0x%lx\n",
 335            runtime->dma_bytes, runtime->dma_area, (long)runtime->dma_addr);
 336
 337     printk("runtime->hw.buffer_bytes_max = %zu \n", runtime->hw.buffer_bytes_max);
 338     SetVULBuffer(substream, hw_params);
 339
 340     printk("dma_bytes = %zu dma_area = %p dma_addr = 0x%lx\n",
 341            substream->runtime->dma_bytes, substream->runtime->dma_area, (long)substream->runtime->dma_addr);
 342     return ret;
 343 }
 344
 345 static int mtk_capture_pcm_hw_free(struct snd_pcm_substream *substream)
 346 {
 347     printk("mtk_capture_pcm_hw_free \n");
 348     if (Capture_dma_buf->area)
 349     {
 350         return 0;
 351     }
 352     else
 353     {
 354         return snd_pcm_lib_free_pages(substream);
 355     }
 356 }
 357
 358 /* Conventional and unconventional sample rate supported */
 359 static unsigned int Vul1_supported_sample_rates[] =
 360 {
 361     8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000, 88200, 96000, 192000
 362 };
 363
 364 static struct snd_pcm_hw_constraint_list constraints_sample_rates =
 365 {
 366     .count = ARRAY_SIZE(Vul1_supported_sample_rates),
 367     .list = Vul1_supported_sample_rates,
 368 };
 369
 370 static int mtk_capture_pcm_open(struct snd_pcm_substream *substream)
 371 {
 372     struct snd_pcm_runtime *runtime = substream->runtime;
 373     int ret = 0;
 374     AudDrv_Clk_On();
 375     AudDrv_ADC_Clk_On();
 376
 377     printk("%s \n", __func__);
 378     TDM_VUL_Control_context = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_VUL);
 379
 380     runtime->hw = mtk_capture_hardware;
 381     memcpy((void *)(&(runtime->hw)), (void *)&mtk_capture_hardware , sizeof(struct snd_pcm_hardware));
 382     printk("runtime->hw->rates = 0x%x \n ", runtime->hw.rates);
 383
 384     ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
 385                                      &constraints_sample_rates);
 386     ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
 387     if (ret < 0)
 388     {
 389         printk("snd_pcm_hw_constraint_integer failed\n");
 390     }
 391
 392     printk("mtk_capture_pcm_open runtime rate = %d channels = %d \n", runtime->rate, runtime->channels);
 393     runtime->hw.info |= SNDRV_PCM_INFO_INTERLEAVED;
 394     runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED;
 395     runtime->hw.info |= SNDRV_PCM_INFO_MMAP_VALID;
 396
 397     if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 398     {
 399         printk("SNDRV_PCM_STREAM_CAPTURE mtkalsa_capture_constraints\n");
 400     }
 401     else
 402     {
 403
 404     }
 405
 406     if (ret < 0)
 407     {
 408         printk("mtk_capture_pcm_close\n");
 409         mtk_capture_pcm_close(substream);
 410         return ret;
 411     }
 412     printk("mtk_capture_pcm_open return\n");
 413     return 0;
 414 }
 415
 416 static int mtk_capture_pcm_close(struct snd_pcm_substream *substream)
 417 {
 418     AudDrv_ADC_Clk_Off();
 419     AudDrv_Clk_Off();
 420     return 0;
 421 }
 422
 423 static int mtk_capture_alsa_start(struct snd_pcm_substream *substream)
 424 {
 425     printk("mtk_capture_alsa_start \n");
 426     SetMemifSubStream(Soc_Aud_Digital_Block_MEM_VUL, substream);
 427     StartAudioCaptureHardware(substream);
 428     return 0;
 429 }
 430
 431 static int mtk_capture_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
 432 {
 433     printk("mtk_capture_pcm_trigger cmd = %d\n", cmd);
 434
 435     switch (cmd)
 436     {
 437         case SNDRV_PCM_TRIGGER_START:
 438         case SNDRV_PCM_TRIGGER_RESUME:
 439             return mtk_capture_alsa_start(substream);
 440         case SNDRV_PCM_TRIGGER_STOP:
 441         case SNDRV_PCM_TRIGGER_SUSPEND:
 442             return mtk_capture_alsa_stop(substream);
 443     }
 444     return -EINVAL;
 445 }
 446
 447 static bool CheckNullPointer(void *pointer)
 448 {
 449     if (pointer == NULL)
 450     {
 451         printk("CheckNullPointer pointer = NULL");
 452         return true;
 453     }
 454     return false;
 455 }
 456
 457 static int mtk_capture_pcm_copy(struct snd_pcm_substream *substream,
 458                                 int channel, snd_pcm_uframes_t pos,
 459                                 void __user *dst, snd_pcm_uframes_t count)
 460 {
 461
 462     AFE_MEM_CONTROL_T *pVUL_MEM_ConTrol = NULL;
 463     AFE_BLOCK_T  *Vul_Block = NULL;
 464     char *Read_Data_Ptr = (char *)dst;
 465     ssize_t DMA_Read_Ptr = 0 , read_size = 0, read_count = 0;
 466     unsigned long flags;
 467
 468     PRINTK_AUD_UL1("mtk_capture_pcm_copy pos = %lucount = %lu \n ", pos, count);
 469     count = Align64ByteSize(count << 2);
 470
 471     // check which memif nned to be write
 472     pVUL_MEM_ConTrol = TDM_VUL_Control_context;
 473     Vul_Block = &(pVUL_MEM_ConTrol->rBlock);
 474
 475     if (pVUL_MEM_ConTrol == NULL)
 476     {
 477         printk("cannot find MEM control !!!!!!!\n");
 478         msleep(50);
 479         return 0;
 480     }
 481
 482     if (Vul_Block->u4BufferSize <= 0)
 483     {
 484         msleep(50);
 485         printk("Vul_Block->u4BufferSize <= 0  =%d\n", Vul_Block->u4BufferSize);
 486         return 0;
 487     }
 488
 489     if (CheckNullPointer((void *)Vul_Block->pucVirtBufAddr))
 490     {
 491         printk("CheckNullPointer  pucVirtBufAddr = %p\n", Vul_Block->pucVirtBufAddr);
 492         return 0;
 493     }
 494
 495     spin_lock_irqsave(&auddrv_ULInCtl_lock, flags);
 496     if (Vul_Block->u4DataRemained >  Vul_Block->u4BufferSize)
 497     {
 498         PRINTK_AUD_UL1("AudDrv_MEMIF_Read u4DataRemained=%x > u4BufferSize=%x" , Vul_Block->u4DataRemained, Vul_Block->u4BufferSize);
 499         Vul_Block->u4DataRemained = 0;
 500         Vul_Block->u4DMAReadIdx   = Vul_Block->u4WriteIdx;
 501     }
 502     if (count >  Vul_Block->u4DataRemained)
 503     {
 504         read_size = Vul_Block->u4DataRemained;
 505     }
 506     else
 507     {
 508         read_size = count;
 509     }
 510
 511     DMA_Read_Ptr = Vul_Block->u4DMAReadIdx;
 512     spin_unlock_irqrestore(&auddrv_ULInCtl_lock, flags);
 513
 514     PRINTK_AUD_UL1("AudDrv_MEMIF_Read finish0, read_count:%x, read_size:%x, u4DataRemained:%x, u4DMAReadIdx:0x%x, u4WriteIdx:%x \r\n",
 515                    (unsigned int)read_count, (unsigned int)read_size, Vul_Block->u4DataRemained, Vul_Block->u4DMAReadIdx, Vul_Block->u4WriteIdx);
 516
 517     if (DMA_Read_Ptr + read_size < Vul_Block->u4BufferSize)
 518     {
 519         if (DMA_Read_Ptr != Vul_Block->u4DMAReadIdx)
 520         {
 521             printk("AudDrv_MEMIF_Read 1, read_size:%zu, DataRemained:%x, DMA_Read_Ptr:%zu, DMAReadIdx:%x \r\n",
 522                    read_size, Vul_Block->u4DataRemained, DMA_Read_Ptr, Vul_Block->u4DMAReadIdx);
 523         }
 524
 525         if (copy_to_user((void __user *)Read_Data_Ptr, (Vul_Block->pucVirtBufAddr + DMA_Read_Ptr), read_size))
 526         {
 527
 528             printk("AudDrv_MEMIF_Read Fail 1 copy to user Read_Data_Ptr:%p, pucVirtBufAddr:%p, u4DMAReadIdx:0x%x, DMA_Read_Ptr:%zu,read_size:%zu", Read_Data_Ptr, Vul_Block->pucVirtBufAddr, Vul_Block->u4DMAReadIdx, DMA_Read_Ptr, read_size);
 529             return 0;
 530         }
 531
 532         read_count += read_size;
 533         spin_lock(&auddrv_ULInCtl_lock);
 534         Vul_Block->u4DataRemained -= read_size;
 535         Vul_Block->u4DMAReadIdx += read_size;
 536         Vul_Block->u4DMAReadIdx %= Vul_Block->u4BufferSize;
 537         DMA_Read_Ptr = Vul_Block->u4DMAReadIdx;
 538         spin_unlock(&auddrv_ULInCtl_lock);
 539
 540         Read_Data_Ptr += read_size;
 541         count -= read_size;
 542
 543         PRINTK_AUD_UL1("AudDrv_MEMIF_Read finish1, copy size:%x, u4DMAReadIdx:0x%x, u4WriteIdx:%x, u4DataRemained:%x \r\n",
 544                        (unsigned int)read_size, Vul_Block->u4DMAReadIdx, Vul_Block->u4WriteIdx, Vul_Block->u4DataRemained);
 545     }
 546
 547     else
 548     {
 549         uint32 size_1 = Vul_Block->u4BufferSize - DMA_Read_Ptr;
 550         uint32 size_2 = read_size - size_1;
 551
 552         if (DMA_Read_Ptr != Vul_Block->u4DMAReadIdx)
 553         {
 554
 555             printk("AudDrv_MEMIF_Read 2, read_size1:0x%x, DataRemained:%x, DMA_Read_Ptr:%zu, DMAReadIdx:%x \r\n",
 556                    size_1, Vul_Block->u4DataRemained, DMA_Read_Ptr, Vul_Block->u4DMAReadIdx);
 557         }
 558         if (copy_to_user((void __user *)Read_Data_Ptr, (Vul_Block->pucVirtBufAddr + DMA_Read_Ptr), size_1))
 559         {
 560
 561             printk("AudDrv_MEMIF_Read Fail 2 copy to user Read_Data_Ptr:%p, pucVirtBufAddr:%p, u4DMAReadIdx:0x%x, DMA_Read_Ptr:%zu,read_size:%zu",
 562                    Read_Data_Ptr, Vul_Block->pucVirtBufAddr, Vul_Block->u4DMAReadIdx, DMA_Read_Ptr, read_size);
 563             return 0;
 564         }
 565
 566         read_count += size_1;
 567         spin_lock(&auddrv_ULInCtl_lock);
 568         Vul_Block->u4DataRemained -= size_1;
 569         Vul_Block->u4DMAReadIdx += size_1;
 570         Vul_Block->u4DMAReadIdx %= Vul_Block->u4BufferSize;
 571         DMA_Read_Ptr = Vul_Block->u4DMAReadIdx;
 572         spin_unlock(&auddrv_ULInCtl_lock);
 573
 574
 575         PRINTK_AUD_UL1("AudDrv_MEMIF_Read finish2, copy size_1:%x, u4DMAReadIdx:0x%x, u4WriteIdx:0x%x, u4DataRemained:%x \r\n",
 576                        size_1, Vul_Block->u4DMAReadIdx, Vul_Block->u4WriteIdx, Vul_Block->u4DataRemained);
 577
 578         if (DMA_Read_Ptr != Vul_Block->u4DMAReadIdx)
 579         {
 580
 581             printk("AudDrv_AWB_Read 3, read_size2:%x, DataRemained:%x, DMA_Read_Ptr:%zu, DMAReadIdx:%x \r\n",
 582                    size_2, Vul_Block->u4DataRemained, DMA_Read_Ptr, Vul_Block->u4DMAReadIdx);
 583         }
 584         if (copy_to_user((void __user *)(Read_Data_Ptr + size_1), (Vul_Block->pucVirtBufAddr + DMA_Read_Ptr), size_2))
 585         {
 586
 587             printk("AudDrv_MEMIF_Read Fail 3 copy to user Read_Data_Ptr:%p, pucVirtBufAddr:%p, u4DMAReadIdx:0x%x , DMA_Read_Ptr:%zu, read_size:%zu", Read_Data_Ptr, Vul_Block->pucVirtBufAddr, Vul_Block->u4DMAReadIdx, DMA_Read_Ptr, read_size);
 588             return read_count << 2;
 589         }
 590
 591         read_count += size_2;
 592         spin_lock(&auddrv_ULInCtl_lock);
 593         Vul_Block->u4DataRemained -= size_2;
 594         Vul_Block->u4DMAReadIdx += size_2;
 595         DMA_Read_Ptr = Vul_Block->u4DMAReadIdx;
 596         spin_unlock(&auddrv_ULInCtl_lock);
 597
 598         count -= read_size;
 599         Read_Data_Ptr += read_size;
 600
 601         PRINTK_AUD_UL1("AudDrv_MEMIF_Read finish3, copy size_2:%x, u4DMAReadIdx:0x%x, u4WriteIdx:0x%x u4DataRemained:%x \r\n",
 602                        size_2, Vul_Block->u4DMAReadIdx, Vul_Block->u4WriteIdx, Vul_Block->u4DataRemained);
 603     }
 604
 605     return read_count >> 2;
 606 }
 607
 608 static int mtk_capture_pcm_silence(struct snd_pcm_substream *substream,
 609                                    int channel, snd_pcm_uframes_t pos,
 610                                    snd_pcm_uframes_t count)
 611 {
 612     printk("dummy_pcm_silence \n");
 613     return 0; /* do nothing */
 614 }
 615
 616
 617 static void *dummy_page[2];
 618
 619 static struct page *mtk_capture_pcm_page(struct snd_pcm_substream *substream,
 620                                          unsigned long offset)
 621 {
 622     printk("%s \n", __func__);
 623     return virt_to_page(dummy_page[substream->stream]); /* the same page */
 624 }
 625
 626
 627 static struct snd_pcm_ops mtk_afe_capture_ops =
 628 {
 629     .open =     mtk_capture_pcm_open,
 630     .close =    mtk_capture_pcm_close,
 631     .ioctl =    snd_pcm_lib_ioctl,
 632     .hw_params =    mtk_capture_pcm_hw_params,
 633     .hw_free =  mtk_capture_pcm_hw_free,
 634     .prepare =  mtk_capture_pcm_prepare,
 635     .trigger =  mtk_capture_pcm_trigger,
 636     .pointer =  mtk_capture_pcm_pointer,
 637     .copy =     mtk_capture_pcm_copy,
 638     .silence =  mtk_capture_pcm_silence,
 639     .page =     mtk_capture_pcm_page,
 640 };
 641
 642 static struct snd_soc_platform_driver mtk_soc_platform =
 643 {
 644     .ops        = &mtk_afe_capture_ops,
 645     .pcm_new    = mtk_asoc_capture_pcm_new,
 646     .probe      = mtk_afe_capture_probe,
 647 };
 648
 649 static int mtk_capture_probe(struct platform_device *pdev)
 650 {
 651     printk("tdm mtk_capture_probe\n");
 652
 653     pdev->dev.coherent_dma_mask = DMA_BIT_MASK(64);
 654     if (!pdev->dev.dma_mask)
 655     {
 656         pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
 657     }
 658
 659     if (pdev->dev.of_node)
 660     {
 661         dev_set_name(&pdev->dev, "%s", MT_SOC_TDMRX_PCM);
 662     }
 663
 664     printk("%s: dev name %s\n", __func__, dev_name(&pdev->dev));
 665     return snd_soc_register_platform(&pdev->dev,
 666                                      &mtk_soc_platform);
 667 }
 668
 669 static int mtk_asoc_capture_pcm_new(struct snd_soc_pcm_runtime *rtd)
 670 {
 671     printk("mtk_asoc_capture_pcm_new \n");
 672     return 0;
 673 }
 674
 675
 676 static int mtk_afe_capture_probe(struct snd_soc_platform *platform)
 677 {
 678     printk("mtk_afe_capture_probe TODO\n");
 679     AudDrv_Allocate_mem_Buffer(platform->dev, Soc_Aud_Digital_Block_MEM_VUL, UL1_MAX_BUFFER_SIZE);
 680     Capture_dma_buf =  Get_Mem_Buffer(Soc_Aud_Digital_Block_MEM_VUL);
 681     /*
 682     Capture_dma_buf = kmalloc(sizeof(struct snd_dma_buffer), GFP_KERNEL);
 683     memset((void *)Capture_dma_buf, 0, sizeof(struct snd_dma_buffer));
 684     printk("mtk_afe_capture_probe dma_alloc_coherent\n");
 685
 686     Capture_dma_buf->area = dma_alloc_coherent(platform->dev,
 687                                                UL1_MAX_BUFFER_SIZE,
 688                                                &Capture_dma_buf->addr, GFP_KERNEL);
 689
 690     if (Capture_dma_buf->area)
 691     {
 692         Capture_dma_buf->bytes = UL1_MAX_BUFFER_SIZE;
 693     }
 694     */
 695     mAudioDigitalI2S =  kzalloc(sizeof(AudioDigtalI2S), GFP_KERNEL);
 696     return 0;
 697 }
 698
 699
 700 static int mtk_capture_remove(struct platform_device *pdev)
 701 {
 702     pr_debug("%s\n", __func__);
 703     snd_soc_unregister_platform(&pdev->dev);
 704     return 0;
 705 }
 706
 707 #ifdef CONFIG_OF
 708 static const struct of_device_id mt_soc_tdm_capture_of_ids[] =
 709 {
 710     { .compatible = "mediatek,mt_soc_tdm_capture", },
 711     {}
 712 };
 713 #endif
 714
 715 static struct platform_driver mtk_afe_capture_driver =
 716 {
 717     .driver = {
 718         .name = MT_SOC_TDMRX_PCM,
 719         .owner = THIS_MODULE,
 720         #ifdef CONFIG_OF
 721         .of_match_table = mt_soc_tdm_capture_of_ids,
 722         #endif
 723     },
 724     .probe = mtk_capture_probe,
 725     .remove = mtk_capture_remove,
 726 };
 727
 728 #ifndef CONFIG_OF
 729 static struct platform_device *soc_mtkafe_capture_dev;
 730 #endif
 731
 732 static int __init mtk_soc_capture_platform_init(void)
 733 {
 734     int ret = 0;
 735     printk("%s\n", __func__);
 736         #ifndef CONFIG_OF
 737     soc_mtkafe_capture_dev = platform_device_alloc(MT_SOC_TDMRX_PCM, -1);
 738     if (!soc_mtkafe_capture_dev)
 739     {
 740         return -ENOMEM;
 741     }
 742
 743     ret = platform_device_add(soc_mtkafe_capture_dev);
 744     if (ret != 0)
 745     {
 746         platform_device_put(soc_mtkafe_capture_dev);
 747         return ret;
 748     }
 749     #endif
 750     ret = platform_driver_register(&mtk_afe_capture_driver);
 751     return ret;
 752 }
 753 module_init(mtk_soc_capture_platform_init);
 754
 755 static void __exit mtk_soc_platform_exit(void)
 756 {
 757
 758     printk("%s\n", __func__);
 759     platform_driver_unregister(&mtk_afe_capture_driver);
 760 }
 761
 762 module_exit(mtk_soc_platform_exit);
 763
 764 MODULE_DESCRIPTION("AFE PCM module platform driver");
 765 MODULE_LICENSE("GPL");
 766
 767