sound/soc/fsl/fsl_ssi.c

   1 /*
   2  * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
   3  *
   4  * Author: Timur Tabi <timur@freescale.com>
   5  *
   6  * Copyright 2007-2008 Freescale Semiconductor, Inc.  This file is licensed
   7  * under the terms of the GNU General Public License version 2.  This
   8  * program is licensed "as is" without any warranty of any kind, whether
   9  * express or implied.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/module.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/device.h>
  16 #include <linux/delay.h>
  17
  18 #include <sound/core.h>
  19 #include <sound/pcm.h>
  20 #include <sound/pcm_params.h>
  21 #include <sound/initval.h>
  22 #include <sound/soc.h>
  23
  24 #include <asm/immap_86xx.h>
  25
  26 #include "fsl_ssi.h"
  27
  28 /**
  29  * FSLSSI_I2S_RATES: sample rates supported by the I2S
  30  *
  31  * This driver currently only supports the SSI running in I2S slave mode,
  32  * which means the codec determines the sample rate.  Therefore, we tell
  33  * ALSA that we support all rates and let the codec driver decide what rates
  34  * are really supported.
  35  */
  36 #define FSLSSI_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
  37                           SNDRV_PCM_RATE_CONTINUOUS)
  38
  39 /**
  40  * FSLSSI_I2S_FORMATS: audio formats supported by the SSI
  41  *
  42  * This driver currently only supports the SSI running in I2S slave mode.
  43  *
  44  * The SSI has a limitation in that the samples must be in the same byte
  45  * order as the host CPU.  This is because when multiple bytes are written
  46  * to the STX register, the bytes and bits must be written in the same
  47  * order.  The STX is a shift register, so all the bits need to be aligned
  48  * (bit-endianness must match byte-endianness).  Processors typically write
  49  * the bits within a byte in the same order that the bytes of a word are
  50  * written in.  So if the host CPU is big-endian, then only big-endian
  51  * samples will be written to STX properly.
  52  */
  53 #ifdef __BIG_ENDIAN
  54 #define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
  55          SNDRV_PCM_FMTBIT_S18_3BE | SNDRV_PCM_FMTBIT_S20_3BE | \
  56          SNDRV_PCM_FMTBIT_S24_3BE | SNDRV_PCM_FMTBIT_S24_BE)
  57 #else
  58 #define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
  59          SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  60          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE)
  61 #endif
  62
  63 /**
  64  * fsl_ssi_private: per-SSI private data
  65  *
  66  * @name: short name for this device ("SSI0", "SSI1", etc)
  67  * @ssi: pointer to the SSI's registers
  68  * @ssi_phys: physical address of the SSI registers
  69  * @irq: IRQ of this SSI
  70  * @first_stream: pointer to the stream that was opened first
  71  * @second_stream: pointer to second stream
  72  * @dev: struct device pointer
  73  * @playback: the number of playback streams opened
  74  * @capture: the number of capture streams opened
  75  * @cpu_dai: the CPU DAI for this device
  76  * @dev_attr: the sysfs device attribute structure
  77  * @stats: SSI statistics
  78  */
  79 struct fsl_ssi_private {
  80         char name[8];
  81         struct ccsr_ssi __iomem *ssi;
  82         dma_addr_t ssi_phys;
  83         unsigned int irq;
  84         struct snd_pcm_substream *first_stream;
  85         struct snd_pcm_substream *second_stream;
  86         struct device *dev;
  87         unsigned int playback;
  88         unsigned int capture;
  89         struct snd_soc_dai cpu_dai;
  90         struct device_attribute dev_attr;
  91
  92         struct {
  93                 unsigned int rfrc;
  94                 unsigned int tfrc;
  95                 unsigned int cmdau;
  96                 unsigned int cmddu;
  97                 unsigned int rxt;
  98                 unsigned int rdr1;
  99                 unsigned int rdr0;
 100                 unsigned int tde1;
 101                 unsigned int tde0;
 102                 unsigned int roe1;
 103                 unsigned int roe0;
 104                 unsigned int tue1;
 105                 unsigned int tue0;
 106                 unsigned int tfs;
 107                 unsigned int rfs;
 108                 unsigned int tls;
 109                 unsigned int rls;
 110                 unsigned int rff1;
 111                 unsigned int rff0;
 112                 unsigned int tfe1;
 113                 unsigned int tfe0;
 114         } stats;
 115 };
 116
 117 /**
 118  * fsl_ssi_isr: SSI interrupt handler
 119  *
 120  * Although it's possible to use the interrupt handler to send and receive
 121  * data to/from the SSI, we use the DMA instead.  Programming is more
 122  * complicated, but the performance is much better.
 123  *
 124  * This interrupt handler is used only to gather statistics.
 125  *
 126  * @irq: IRQ of the SSI device
 127  * @dev_id: pointer to the ssi_private structure for this SSI device
 128  */
 129 static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
 130 {
 131         struct fsl_ssi_private *ssi_private = dev_id;
 132         struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 133         irqreturn_t ret = IRQ_NONE;
 134         __be32 sisr;
 135         __be32 sisr2 = 0;
 136
 137         /* We got an interrupt, so read the status register to see what we
 138            were interrupted for.  We mask it with the Interrupt Enable register
 139            so that we only check for events that we're interested in.
 140          */
 141         sisr = in_be32(&ssi->sisr) & in_be32(&ssi->sier);
 142
 143         if (sisr & CCSR_SSI_SISR_RFRC) {
 144                 ssi_private->stats.rfrc++;
 145                 sisr2 |= CCSR_SSI_SISR_RFRC;
 146                 ret = IRQ_HANDLED;
 147         }
 148
 149         if (sisr & CCSR_SSI_SISR_TFRC) {
 150                 ssi_private->stats.tfrc++;
 151                 sisr2 |= CCSR_SSI_SISR_TFRC;
 152                 ret = IRQ_HANDLED;
 153         }
 154
 155         if (sisr & CCSR_SSI_SISR_CMDAU) {
 156                 ssi_private->stats.cmdau++;
 157                 ret = IRQ_HANDLED;
 158         }
 159
 160         if (sisr & CCSR_SSI_SISR_CMDDU) {
 161                 ssi_private->stats.cmddu++;
 162                 ret = IRQ_HANDLED;
 163         }
 164
 165         if (sisr & CCSR_SSI_SISR_RXT) {
 166                 ssi_private->stats.rxt++;
 167                 ret = IRQ_HANDLED;
 168         }
 169
 170         if (sisr & CCSR_SSI_SISR_RDR1) {
 171                 ssi_private->stats.rdr1++;
 172                 ret = IRQ_HANDLED;
 173         }
 174
 175         if (sisr & CCSR_SSI_SISR_RDR0) {
 176                 ssi_private->stats.rdr0++;
 177                 ret = IRQ_HANDLED;
 178         }
 179
 180         if (sisr & CCSR_SSI_SISR_TDE1) {
 181                 ssi_private->stats.tde1++;
 182                 ret = IRQ_HANDLED;
 183         }
 184
 185         if (sisr & CCSR_SSI_SISR_TDE0) {
 186                 ssi_private->stats.tde0++;
 187                 ret = IRQ_HANDLED;
 188         }
 189
 190         if (sisr & CCSR_SSI_SISR_ROE1) {
 191                 ssi_private->stats.roe1++;
 192                 sisr2 |= CCSR_SSI_SISR_ROE1;
 193                 ret = IRQ_HANDLED;
 194         }
 195
 196         if (sisr & CCSR_SSI_SISR_ROE0) {
 197                 ssi_private->stats.roe0++;
 198                 sisr2 |= CCSR_SSI_SISR_ROE0;
 199                 ret = IRQ_HANDLED;
 200         }
 201
 202         if (sisr & CCSR_SSI_SISR_TUE1) {
 203                 ssi_private->stats.tue1++;
 204                 sisr2 |= CCSR_SSI_SISR_TUE1;
 205                 ret = IRQ_HANDLED;
 206         }
 207
 208         if (sisr & CCSR_SSI_SISR_TUE0) {
 209                 ssi_private->stats.tue0++;
 210                 sisr2 |= CCSR_SSI_SISR_TUE0;
 211                 ret = IRQ_HANDLED;
 212         }
 213
 214         if (sisr & CCSR_SSI_SISR_TFS) {
 215                 ssi_private->stats.tfs++;
 216                 ret = IRQ_HANDLED;
 217         }
 218
 219         if (sisr & CCSR_SSI_SISR_RFS) {
 220                 ssi_private->stats.rfs++;
 221                 ret = IRQ_HANDLED;
 222         }
 223
 224         if (sisr & CCSR_SSI_SISR_TLS) {
 225                 ssi_private->stats.tls++;
 226                 ret = IRQ_HANDLED;
 227         }
 228
 229         if (sisr & CCSR_SSI_SISR_RLS) {
 230                 ssi_private->stats.rls++;
 231                 ret = IRQ_HANDLED;
 232         }
 233
 234         if (sisr & CCSR_SSI_SISR_RFF1) {
 235                 ssi_private->stats.rff1++;
 236                 ret = IRQ_HANDLED;
 237         }
 238
 239         if (sisr & CCSR_SSI_SISR_RFF0) {
 240                 ssi_private->stats.rff0++;
 241                 ret = IRQ_HANDLED;
 242         }
 243
 244         if (sisr & CCSR_SSI_SISR_TFE1) {
 245                 ssi_private->stats.tfe1++;
 246                 ret = IRQ_HANDLED;
 247         }
 248
 249         if (sisr & CCSR_SSI_SISR_TFE0) {
 250                 ssi_private->stats.tfe0++;
 251                 ret = IRQ_HANDLED;
 252         }
 253
 254         /* Clear the bits that we set */
 255         if (sisr2)
 256                 out_be32(&ssi->sisr, sisr2);
 257
 258         return ret;
 259 }
 260
 261 /**
 262  * fsl_ssi_startup: create a new substream
 263  *
 264  * This is the first function called when a stream is opened.
 265  *
 266  * If this is the first stream open, then grab the IRQ and program most of
 267  * the SSI registers.
 268  */
 269 static int fsl_ssi_startup(struct snd_pcm_substream *substream,
 270                            struct snd_soc_dai *dai)
 271 {
 272         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 273         struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
 274
 275         /*
 276          * If this is the first stream opened, then request the IRQ
 277          * and initialize the SSI registers.
 278          */
 279         if (!ssi_private->playback && !ssi_private->capture) {
 280                 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 281                 int ret;
 282
 283                 ret = request_irq(ssi_private->irq, fsl_ssi_isr, 0,
 284                                   ssi_private->name, ssi_private);
 285                 if (ret < 0) {
 286                         dev_err(substream->pcm->card->dev,
 287                                 "could not claim irq %u\n", ssi_private->irq);
 288                         return ret;
 289                 }
 290
 291                 /*
 292                  * Section 16.5 of the MPC8610 reference manual says that the
 293                  * SSI needs to be disabled before updating the registers we set
 294                  * here.
 295                  */
 296                 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
 297
 298                 /*
 299                  * Program the SSI into I2S Slave Non-Network Synchronous mode.
 300                  * Also enable the transmit and receive FIFO.
 301                  *
 302                  * FIXME: Little-endian samples require a different shift dir
 303                  */
 304                 clrsetbits_be32(&ssi->scr, CCSR_SSI_SCR_I2S_MODE_MASK,
 305                         CCSR_SSI_SCR_TFR_CLK_DIS |
 306                         CCSR_SSI_SCR_I2S_MODE_SLAVE | CCSR_SSI_SCR_SYN);
 307
 308                 out_be32(&ssi->stcr,
 309                          CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFEN0 |
 310                          CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TEFS |
 311                          CCSR_SSI_STCR_TSCKP);
 312
 313                 out_be32(&ssi->srcr,
 314                          CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFEN0 |
 315                          CCSR_SSI_SRCR_RFSI | CCSR_SSI_SRCR_REFS |
 316                          CCSR_SSI_SRCR_RSCKP);
 317
 318                 /*
 319                  * The DC and PM bits are only used if the SSI is the clock
 320                  * master.
 321                  */
 322
 323                 /* 4. Enable the interrupts and DMA requests */
 324                 out_be32(&ssi->sier,
 325                          CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE |
 326                          CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN |
 327                          CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN |
 328                          CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE |
 329                          CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN);
 330
 331                 /*
 332                  * Set the watermark for transmit FIFI 0 and receive FIFO 0. We
 333                  * don't use FIFO 1.  Since the SSI only supports stereo, the
 334                  * watermark should never be an odd number.
 335                  */
 336                 out_be32(&ssi->sfcsr,
 337                          CCSR_SSI_SFCSR_TFWM0(6) | CCSR_SSI_SFCSR_RFWM0(2));
 338
 339                 /*
 340                  * We keep the SSI disabled because if we enable it, then the
 341                  * DMA controller will start.  It's not supposed to start until
 342                  * the SCR.TE (or SCR.RE) bit is set, but it does anyway.  The
 343                  * DMA controller will transfer one "BWC" of data (i.e. the
 344                  * amount of data that the MR.BWC bits are set to).  The reason
 345                  * this is bad is because at this point, the PCM driver has not
 346                  * finished initializing the DMA controller.
 347                  */
 348         }
 349
 350         if (!ssi_private->first_stream)
 351                 ssi_private->first_stream = substream;
 352         else {
 353                 /* This is the second stream open, so we need to impose sample
 354                  * rate and maybe sample size constraints.  Note that this can
 355                  * cause a race condition if the second stream is opened before
 356                  * the first stream is fully initialized.
 357                  *
 358                  * We provide some protection by checking to make sure the first
 359                  * stream is initialized, but it's not perfect.  ALSA sometimes
 360                  * re-initializes the driver with a different sample rate or
 361                  * size.  If the second stream is opened before the first stream
 362                  * has received its final parameters, then the second stream may
 363                  * be constrained to the wrong sample rate or size.
 364                  *
 365                  * FIXME: This code does not handle opening and closing streams
 366                  * repeatedly.  If you open two streams and then close the first
 367                  * one, you may not be able to open another stream until you
 368                  * close the second one as well.
 369                  */
 370                 struct snd_pcm_runtime *first_runtime =
 371                         ssi_private->first_stream->runtime;
 372
 373                 if (!first_runtime->rate || !first_runtime->sample_bits) {
 374                         dev_err(substream->pcm->card->dev,
 375                                 "set sample rate and size in %s stream first\n",
 376                                 substream->stream == SNDRV_PCM_STREAM_PLAYBACK
 377                                 ? "capture" : "playback");
 378                         return -EAGAIN;
 379                 }
 380
 381                 snd_pcm_hw_constraint_minmax(substream->runtime,
 382                         SNDRV_PCM_HW_PARAM_RATE,
 383                         first_runtime->rate, first_runtime->rate);
 384
 385                 snd_pcm_hw_constraint_minmax(substream->runtime,
 386                         SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
 387                         first_runtime->sample_bits,
 388                         first_runtime->sample_bits);
 389
 390                 ssi_private->second_stream = substream;
 391         }
 392
 393         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 394                 ssi_private->playback++;
 395
 396         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 397                 ssi_private->capture++;
 398
 399         return 0;
 400 }
 401
 402 /**
 403  * fsl_ssi_prepare: prepare the SSI.
 404  *
 405  * Most of the SSI registers have been programmed in the startup function,
 406  * but the word length must be programmed here.  Unfortunately, programming
 407  * the SxCCR.WL bits requires the SSI to be temporarily disabled.  This can
 408  * cause a problem with supporting simultaneous playback and capture.  If
 409  * the SSI is already playing a stream, then that stream may be temporarily
 410  * stopped when you start capture.
 411  *
 412  * Note: The SxCCR.DC and SxCCR.PM bits are only used if the SSI is the
 413  * clock master.
 414  */
 415 static int fsl_ssi_prepare(struct snd_pcm_substream *substream,
 416                            struct snd_soc_dai *dai)
 417 {
 418         struct snd_pcm_runtime *runtime = substream->runtime;
 419         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 420         struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
 421
 422         struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 423
 424         if (substream == ssi_private->first_stream) {
 425                 u32 wl;
 426
 427                 /* The SSI should always be disabled at this points (SSIEN=0) */
 428                 wl = CCSR_SSI_SxCCR_WL(snd_pcm_format_width(runtime->format));
 429
 430                 /* In synchronous mode, the SSI uses STCCR for capture */
 431                 clrsetbits_be32(&ssi->stccr, CCSR_SSI_SxCCR_WL_MASK, wl);
 432         }
 433
 434         return 0;
 435 }
 436
 437 /**
 438  * fsl_ssi_trigger: start and stop the DMA transfer.
 439  *
 440  * This function is called by ALSA to start, stop, pause, and resume the DMA
 441  * transfer of data.
 442  *
 443  * The DMA channel is in external master start and pause mode, which
 444  * means the SSI completely controls the flow of data.
 445  */
 446 static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
 447                            struct snd_soc_dai *dai)
 448 {
 449         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 450         struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
 451         struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 452
 453         switch (cmd) {
 454         case SNDRV_PCM_TRIGGER_START:
 455         case SNDRV_PCM_TRIGGER_RESUME:
 456         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 457                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 458                         clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
 459                         setbits32(&ssi->scr,
 460                                 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE);
 461                 } else {
 462                         clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
 463                         setbits32(&ssi->scr,
 464                                 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE);
 465
 466                         /*
 467                          * I think we need this delay to allow time for the SSI
 468                          * to put data into its FIFO.  Without it, ALSA starts
 469                          * to complain about overruns.
 470                          */
 471                         mdelay(1);
 472                 }
 473                 break;
 474
 475         case SNDRV_PCM_TRIGGER_STOP:
 476         case SNDRV_PCM_TRIGGER_SUSPEND:
 477         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 478                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 479                         clrbits32(&ssi->scr, CCSR_SSI_SCR_TE);
 480                 else
 481                         clrbits32(&ssi->scr, CCSR_SSI_SCR_RE);
 482                 break;
 483
 484         default:
 485                 return -EINVAL;
 486         }
 487
 488         return 0;
 489 }
 490
 491 /**
 492  * fsl_ssi_shutdown: shutdown the SSI
 493  *
 494  * Shutdown the SSI if there are no other substreams open.
 495  */
 496 static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
 497                              struct snd_soc_dai *dai)
 498 {
 499         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 500         struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
 501
 502         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 503                 ssi_private->playback--;
 504
 505         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 506                 ssi_private->capture--;
 507
 508         if (ssi_private->first_stream == substream)
 509                 ssi_private->first_stream = ssi_private->second_stream;
 510
 511         ssi_private->second_stream = NULL;
 512
 513         /*
 514          * If this is the last active substream, disable the SSI and release
 515          * the IRQ.
 516          */
 517         if (!ssi_private->playback && !ssi_private->capture) {
 518                 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 519
 520                 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
 521
 522                 free_irq(ssi_private->irq, ssi_private);
 523         }
 524 }
 525
 526 /**
 527  * fsl_ssi_set_sysclk: set the clock frequency and direction
 528  *
 529  * This function is called by the machine driver to tell us what the clock
 530  * frequency and direction are.
 531  *
 532  * Currently, we only support operating as a clock slave (SND_SOC_CLOCK_IN),
 533  * and we don't care about the frequency.  Return an error if the direction
 534  * is not SND_SOC_CLOCK_IN.
 535  *
 536  * @clk_id: reserved, should be zero
 537  * @freq: the frequency of the given clock ID, currently ignored
 538  * @dir: SND_SOC_CLOCK_IN (clock slave) or SND_SOC_CLOCK_OUT (clock master)
 539  */
 540 static int fsl_ssi_set_sysclk(struct snd_soc_dai *cpu_dai,
 541                               int clk_id, unsigned int freq, int dir)
 542 {
 543
 544         return (dir == SND_SOC_CLOCK_IN) ? 0 : -EINVAL;
 545 }
 546
 547 /**
 548  * fsl_ssi_set_fmt: set the serial format.
 549  *
 550  * This function is called by the machine driver to tell us what serial
 551  * format to use.
 552  *
 553  * Currently, we only support I2S mode.  Return an error if the format is
 554  * not SND_SOC_DAIFMT_I2S.
 555  *
 556  * @format: one of SND_SOC_DAIFMT_xxx
 557  */
 558 static int fsl_ssi_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int format)
 559 {
 560         return (format == SND_SOC_DAIFMT_I2S) ? 0 : -EINVAL;
 561 }
 562
 563 /**
 564  * fsl_ssi_dai_template: template CPU DAI for the SSI
 565  */
 566 static struct snd_soc_dai fsl_ssi_dai_template = {
 567         .playback = {
 568                 /* The SSI does not support monaural audio. */
 569                 .channels_min = 2,
 570                 .channels_max = 2,
 571                 .rates = FSLSSI_I2S_RATES,
 572                 .formats = FSLSSI_I2S_FORMATS,
 573         },
 574         .capture = {
 575                 .channels_min = 2,
 576                 .channels_max = 2,
 577                 .rates = FSLSSI_I2S_RATES,
 578                 .formats = FSLSSI_I2S_FORMATS,
 579         },
 580         .ops = {
 581                 .startup = fsl_ssi_startup,
 582                 .prepare = fsl_ssi_prepare,
 583                 .shutdown = fsl_ssi_shutdown,
 584                 .trigger = fsl_ssi_trigger,
 585                 .set_sysclk = fsl_ssi_set_sysclk,
 586                 .set_fmt = fsl_ssi_set_fmt,
 587         },
 588 };
 589
 590 /**
 591  * fsl_sysfs_ssi_show: display SSI statistics
 592  *
 593  * Display the statistics for the current SSI device.
 594  */
 595 static ssize_t fsl_sysfs_ssi_show(struct device *dev,
 596         struct device_attribute *attr, char *buf)
 597 {
 598         struct fsl_ssi_private *ssi_private =
 599         container_of(attr, struct fsl_ssi_private, dev_attr);
 600         ssize_t length;
 601
 602         length = sprintf(buf, "rfrc=%u", ssi_private->stats.rfrc);
 603         length += sprintf(buf + length, "\ttfrc=%u", ssi_private->stats.tfrc);
 604         length += sprintf(buf + length, "\tcmdau=%u", ssi_private->stats.cmdau);
 605         length += sprintf(buf + length, "\tcmddu=%u", ssi_private->stats.cmddu);
 606         length += sprintf(buf + length, "\trxt=%u", ssi_private->stats.rxt);
 607         length += sprintf(buf + length, "\trdr1=%u", ssi_private->stats.rdr1);
 608         length += sprintf(buf + length, "\trdr0=%u", ssi_private->stats.rdr0);
 609         length += sprintf(buf + length, "\ttde1=%u", ssi_private->stats.tde1);
 610         length += sprintf(buf + length, "\ttde0=%u", ssi_private->stats.tde0);
 611         length += sprintf(buf + length, "\troe1=%u", ssi_private->stats.roe1);
 612         length += sprintf(buf + length, "\troe0=%u", ssi_private->stats.roe0);
 613         length += sprintf(buf + length, "\ttue1=%u", ssi_private->stats.tue1);
 614         length += sprintf(buf + length, "\ttue0=%u", ssi_private->stats.tue0);
 615         length += sprintf(buf + length, "\ttfs=%u", ssi_private->stats.tfs);
 616         length += sprintf(buf + length, "\trfs=%u", ssi_private->stats.rfs);
 617         length += sprintf(buf + length, "\ttls=%u", ssi_private->stats.tls);
 618         length += sprintf(buf + length, "\trls=%u", ssi_private->stats.rls);
 619         length += sprintf(buf + length, "\trff1=%u", ssi_private->stats.rff1);
 620         length += sprintf(buf + length, "\trff0=%u", ssi_private->stats.rff0);
 621         length += sprintf(buf + length, "\ttfe1=%u", ssi_private->stats.tfe1);
 622         length += sprintf(buf + length, "\ttfe0=%u\n", ssi_private->stats.tfe0);
 623
 624         return length;
 625 }
 626
 627 /**
 628  * fsl_ssi_create_dai: create a snd_soc_dai structure
 629  *
 630  * This function is called by the machine driver to create a snd_soc_dai
 631  * structure.  The function creates an ssi_private object, which contains
 632  * the snd_soc_dai.  It also creates the sysfs statistics device.
 633  */
 634 struct snd_soc_dai *fsl_ssi_create_dai(struct fsl_ssi_info *ssi_info)
 635 {
 636         struct snd_soc_dai *fsl_ssi_dai;
 637         struct fsl_ssi_private *ssi_private;
 638         int ret = 0;
 639         struct device_attribute *dev_attr;
 640
 641         ssi_private = kzalloc(sizeof(struct fsl_ssi_private), GFP_KERNEL);
 642         if (!ssi_private) {
 643                 dev_err(ssi_info->dev, "could not allocate DAI object\n");
 644                 return NULL;
 645         }
 646         memcpy(&ssi_private->cpu_dai, &fsl_ssi_dai_template,
 647                sizeof(struct snd_soc_dai));
 648
 649         fsl_ssi_dai = &ssi_private->cpu_dai;
 650         dev_attr = &ssi_private->dev_attr;
 651
 652         sprintf(ssi_private->name, "ssi%u", (u8) ssi_info->id);
 653         ssi_private->ssi = ssi_info->ssi;
 654         ssi_private->ssi_phys = ssi_info->ssi_phys;
 655         ssi_private->irq = ssi_info->irq;
 656         ssi_private->dev = ssi_info->dev;
 657
 658         ssi_private->dev->driver_data = fsl_ssi_dai;
 659
 660         /* Initialize the the device_attribute structure */
 661         dev_attr->attr.name = "ssi-stats";
 662         dev_attr->attr.mode = S_IRUGO;
 663         dev_attr->show = fsl_sysfs_ssi_show;
 664
 665         ret = device_create_file(ssi_private->dev, dev_attr);
 666         if (ret) {
 667                 dev_err(ssi_info->dev, "could not create sysfs %s file\n",
 668                         ssi_private->dev_attr.attr.name);
 669                 kfree(fsl_ssi_dai);
 670                 return NULL;
 671         }
 672
 673         fsl_ssi_dai->private_data = ssi_private;
 674         fsl_ssi_dai->name = ssi_private->name;
 675         fsl_ssi_dai->id = ssi_info->id;
 676         fsl_ssi_dai->dev = ssi_info->dev;
 677
 678         ret = snd_soc_register_dai(fsl_ssi_dai);
 679         if (ret != 0) {
 680                 dev_err(ssi_info->dev, "failed to register DAI: %d\n", ret);
 681                 kfree(fsl_ssi_dai);
 682                 return NULL;
 683         }
 684
 685         return fsl_ssi_dai;
 686 }
 687 EXPORT_SYMBOL_GPL(fsl_ssi_create_dai);
 688
 689 /**
 690  * fsl_ssi_destroy_dai: destroy the snd_soc_dai object
 691  *
 692  * This function undoes the operations of fsl_ssi_create_dai()
 693  */
 694 void fsl_ssi_destroy_dai(struct snd_soc_dai *fsl_ssi_dai)
 695 {
 696         struct fsl_ssi_private *ssi_private =
 697         container_of(fsl_ssi_dai, struct fsl_ssi_private, cpu_dai);
 698
 699         device_remove_file(ssi_private->dev, &ssi_private->dev_attr);
 700
 701         snd_soc_unregister_dai(&ssi_private->cpu_dai);
 702
 703         kfree(ssi_private);
 704 }
 705 EXPORT_SYMBOL_GPL(fsl_ssi_destroy_dai);
 706
 707 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
 708 MODULE_DESCRIPTION("Freescale Synchronous Serial Interface (SSI) ASoC Driver");
 709 MODULE_LICENSE("GPL");