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ALSA: PCI: Replace CONFIG_PM with CONFIG_PM_SLEEP
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / ymfpci / ymfpci_main.c
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of YMF724/740/744/754 chips
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21 #include <linux/delay.h>
22 #include <linux/firmware.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <linux/vmalloc.h>
29 #include <linux/mutex.h>
30 #include <linux/module.h>
31
32 #include <sound/core.h>
33 #include <sound/control.h>
34 #include <sound/info.h>
35 #include <sound/tlv.h>
36 #include "ymfpci.h"
37 #include <sound/asoundef.h>
38 #include <sound/mpu401.h>
39
40 #include <asm/io.h>
41 #include <asm/byteorder.h>
42
43 /*
44 * common I/O routines
45 */
46
47 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
48
49 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
50 {
51 return readb(chip->reg_area_virt + offset);
52 }
53
54 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
55 {
56 writeb(val, chip->reg_area_virt + offset);
57 }
58
59 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
60 {
61 return readw(chip->reg_area_virt + offset);
62 }
63
64 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
65 {
66 writew(val, chip->reg_area_virt + offset);
67 }
68
69 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
70 {
71 return readl(chip->reg_area_virt + offset);
72 }
73
74 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
75 {
76 writel(val, chip->reg_area_virt + offset);
77 }
78
79 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
80 {
81 unsigned long end_time;
82 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
83
84 end_time = jiffies + msecs_to_jiffies(750);
85 do {
86 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
87 return 0;
88 schedule_timeout_uninterruptible(1);
89 } while (time_before(jiffies, end_time));
90 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
91 return -EBUSY;
92 }
93
94 static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
95 {
96 struct snd_ymfpci *chip = ac97->private_data;
97 u32 cmd;
98
99 snd_ymfpci_codec_ready(chip, 0);
100 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
101 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
102 }
103
104 static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
105 {
106 struct snd_ymfpci *chip = ac97->private_data;
107
108 if (snd_ymfpci_codec_ready(chip, 0))
109 return ~0;
110 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
111 if (snd_ymfpci_codec_ready(chip, 0))
112 return ~0;
113 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
114 int i;
115 for (i = 0; i < 600; i++)
116 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
117 }
118 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
119 }
120
121 /*
122 * Misc routines
123 */
124
125 static u32 snd_ymfpci_calc_delta(u32 rate)
126 {
127 switch (rate) {
128 case 8000: return 0x02aaab00;
129 case 11025: return 0x03accd00;
130 case 16000: return 0x05555500;
131 case 22050: return 0x07599a00;
132 case 32000: return 0x0aaaab00;
133 case 44100: return 0x0eb33300;
134 default: return ((rate << 16) / 375) << 5;
135 }
136 }
137
138 static u32 def_rate[8] = {
139 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
140 };
141
142 static u32 snd_ymfpci_calc_lpfK(u32 rate)
143 {
144 u32 i;
145 static u32 val[8] = {
146 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
147 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
148 };
149
150 if (rate == 44100)
151 return 0x40000000; /* FIXME: What's the right value? */
152 for (i = 0; i < 8; i++)
153 if (rate <= def_rate[i])
154 return val[i];
155 return val[0];
156 }
157
158 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
159 {
160 u32 i;
161 static u32 val[8] = {
162 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
163 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
164 };
165
166 if (rate == 44100)
167 return 0x370A0000;
168 for (i = 0; i < 8; i++)
169 if (rate <= def_rate[i])
170 return val[i];
171 return val[0];
172 }
173
174 /*
175 * Hardware start management
176 */
177
178 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
179 {
180 unsigned long flags;
181
182 spin_lock_irqsave(&chip->reg_lock, flags);
183 if (chip->start_count++ > 0)
184 goto __end;
185 snd_ymfpci_writel(chip, YDSXGR_MODE,
186 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
187 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
188 __end:
189 spin_unlock_irqrestore(&chip->reg_lock, flags);
190 }
191
192 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
193 {
194 unsigned long flags;
195 long timeout = 1000;
196
197 spin_lock_irqsave(&chip->reg_lock, flags);
198 if (--chip->start_count > 0)
199 goto __end;
200 snd_ymfpci_writel(chip, YDSXGR_MODE,
201 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
202 while (timeout-- > 0) {
203 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
204 break;
205 }
206 if (atomic_read(&chip->interrupt_sleep_count)) {
207 atomic_set(&chip->interrupt_sleep_count, 0);
208 wake_up(&chip->interrupt_sleep);
209 }
210 __end:
211 spin_unlock_irqrestore(&chip->reg_lock, flags);
212 }
213
214 /*
215 * Playback voice management
216 */
217
218 static int voice_alloc(struct snd_ymfpci *chip,
219 enum snd_ymfpci_voice_type type, int pair,
220 struct snd_ymfpci_voice **rvoice)
221 {
222 struct snd_ymfpci_voice *voice, *voice2;
223 int idx;
224
225 *rvoice = NULL;
226 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
227 voice = &chip->voices[idx];
228 voice2 = pair ? &chip->voices[idx+1] : NULL;
229 if (voice->use || (voice2 && voice2->use))
230 continue;
231 voice->use = 1;
232 if (voice2)
233 voice2->use = 1;
234 switch (type) {
235 case YMFPCI_PCM:
236 voice->pcm = 1;
237 if (voice2)
238 voice2->pcm = 1;
239 break;
240 case YMFPCI_SYNTH:
241 voice->synth = 1;
242 break;
243 case YMFPCI_MIDI:
244 voice->midi = 1;
245 break;
246 }
247 snd_ymfpci_hw_start(chip);
248 if (voice2)
249 snd_ymfpci_hw_start(chip);
250 *rvoice = voice;
251 return 0;
252 }
253 return -ENOMEM;
254 }
255
256 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
257 enum snd_ymfpci_voice_type type, int pair,
258 struct snd_ymfpci_voice **rvoice)
259 {
260 unsigned long flags;
261 int result;
262
263 if (snd_BUG_ON(!rvoice))
264 return -EINVAL;
265 if (snd_BUG_ON(pair && type != YMFPCI_PCM))
266 return -EINVAL;
267
268 spin_lock_irqsave(&chip->voice_lock, flags);
269 for (;;) {
270 result = voice_alloc(chip, type, pair, rvoice);
271 if (result == 0 || type != YMFPCI_PCM)
272 break;
273 /* TODO: synth/midi voice deallocation */
274 break;
275 }
276 spin_unlock_irqrestore(&chip->voice_lock, flags);
277 return result;
278 }
279
280 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
281 {
282 unsigned long flags;
283
284 if (snd_BUG_ON(!pvoice))
285 return -EINVAL;
286 snd_ymfpci_hw_stop(chip);
287 spin_lock_irqsave(&chip->voice_lock, flags);
288 if (pvoice->number == chip->src441_used) {
289 chip->src441_used = -1;
290 pvoice->ypcm->use_441_slot = 0;
291 }
292 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
293 pvoice->ypcm = NULL;
294 pvoice->interrupt = NULL;
295 spin_unlock_irqrestore(&chip->voice_lock, flags);
296 return 0;
297 }
298
299 /*
300 * PCM part
301 */
302
303 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
304 {
305 struct snd_ymfpci_pcm *ypcm;
306 u32 pos, delta;
307
308 if ((ypcm = voice->ypcm) == NULL)
309 return;
310 if (ypcm->substream == NULL)
311 return;
312 spin_lock(&chip->reg_lock);
313 if (ypcm->running) {
314 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
315 if (pos < ypcm->last_pos)
316 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
317 else
318 delta = pos - ypcm->last_pos;
319 ypcm->period_pos += delta;
320 ypcm->last_pos = pos;
321 if (ypcm->period_pos >= ypcm->period_size) {
322 /*
323 printk(KERN_DEBUG
324 "done - active_bank = 0x%x, start = 0x%x\n",
325 chip->active_bank,
326 voice->bank[chip->active_bank].start);
327 */
328 ypcm->period_pos %= ypcm->period_size;
329 spin_unlock(&chip->reg_lock);
330 snd_pcm_period_elapsed(ypcm->substream);
331 spin_lock(&chip->reg_lock);
332 }
333
334 if (unlikely(ypcm->update_pcm_vol)) {
335 unsigned int subs = ypcm->substream->number;
336 unsigned int next_bank = 1 - chip->active_bank;
337 struct snd_ymfpci_playback_bank *bank;
338 u32 volume;
339
340 bank = &voice->bank[next_bank];
341 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
342 bank->left_gain_end = volume;
343 if (ypcm->output_rear)
344 bank->eff2_gain_end = volume;
345 if (ypcm->voices[1])
346 bank = &ypcm->voices[1]->bank[next_bank];
347 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
348 bank->right_gain_end = volume;
349 if (ypcm->output_rear)
350 bank->eff3_gain_end = volume;
351 ypcm->update_pcm_vol--;
352 }
353 }
354 spin_unlock(&chip->reg_lock);
355 }
356
357 static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
358 {
359 struct snd_pcm_runtime *runtime = substream->runtime;
360 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
361 struct snd_ymfpci *chip = ypcm->chip;
362 u32 pos, delta;
363
364 spin_lock(&chip->reg_lock);
365 if (ypcm->running) {
366 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
367 if (pos < ypcm->last_pos)
368 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
369 else
370 delta = pos - ypcm->last_pos;
371 ypcm->period_pos += delta;
372 ypcm->last_pos = pos;
373 if (ypcm->period_pos >= ypcm->period_size) {
374 ypcm->period_pos %= ypcm->period_size;
375 /*
376 printk(KERN_DEBUG
377 "done - active_bank = 0x%x, start = 0x%x\n",
378 chip->active_bank,
379 voice->bank[chip->active_bank].start);
380 */
381 spin_unlock(&chip->reg_lock);
382 snd_pcm_period_elapsed(substream);
383 spin_lock(&chip->reg_lock);
384 }
385 }
386 spin_unlock(&chip->reg_lock);
387 }
388
389 static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
390 int cmd)
391 {
392 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
393 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
394 struct snd_kcontrol *kctl = NULL;
395 int result = 0;
396
397 spin_lock(&chip->reg_lock);
398 if (ypcm->voices[0] == NULL) {
399 result = -EINVAL;
400 goto __unlock;
401 }
402 switch (cmd) {
403 case SNDRV_PCM_TRIGGER_START:
404 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
405 case SNDRV_PCM_TRIGGER_RESUME:
406 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
407 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
408 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
409 ypcm->running = 1;
410 break;
411 case SNDRV_PCM_TRIGGER_STOP:
412 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
413 kctl = chip->pcm_mixer[substream->number].ctl;
414 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
415 }
416 /* fall through */
417 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
418 case SNDRV_PCM_TRIGGER_SUSPEND:
419 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
420 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
421 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
422 ypcm->running = 0;
423 break;
424 default:
425 result = -EINVAL;
426 break;
427 }
428 __unlock:
429 spin_unlock(&chip->reg_lock);
430 if (kctl)
431 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
432 return result;
433 }
434 static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
435 int cmd)
436 {
437 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
438 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
439 int result = 0;
440 u32 tmp;
441
442 spin_lock(&chip->reg_lock);
443 switch (cmd) {
444 case SNDRV_PCM_TRIGGER_START:
445 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
446 case SNDRV_PCM_TRIGGER_RESUME:
447 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
448 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
449 ypcm->running = 1;
450 break;
451 case SNDRV_PCM_TRIGGER_STOP:
452 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
453 case SNDRV_PCM_TRIGGER_SUSPEND:
454 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
455 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
456 ypcm->running = 0;
457 break;
458 default:
459 result = -EINVAL;
460 break;
461 }
462 spin_unlock(&chip->reg_lock);
463 return result;
464 }
465
466 static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
467 {
468 int err;
469
470 if (ypcm->voices[1] != NULL && voices < 2) {
471 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
472 ypcm->voices[1] = NULL;
473 }
474 if (voices == 1 && ypcm->voices[0] != NULL)
475 return 0; /* already allocated */
476 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
477 return 0; /* already allocated */
478 if (voices > 1) {
479 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
480 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
481 ypcm->voices[0] = NULL;
482 }
483 }
484 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
485 if (err < 0)
486 return err;
487 ypcm->voices[0]->ypcm = ypcm;
488 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
489 if (voices > 1) {
490 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
491 ypcm->voices[1]->ypcm = ypcm;
492 }
493 return 0;
494 }
495
496 static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
497 struct snd_pcm_runtime *runtime,
498 int has_pcm_volume)
499 {
500 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
501 u32 format;
502 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
503 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
504 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
505 struct snd_ymfpci_playback_bank *bank;
506 unsigned int nbank;
507 u32 vol_left, vol_right;
508 u8 use_left, use_right;
509 unsigned long flags;
510
511 if (snd_BUG_ON(!voice))
512 return;
513 if (runtime->channels == 1) {
514 use_left = 1;
515 use_right = 1;
516 } else {
517 use_left = (voiceidx & 1) == 0;
518 use_right = !use_left;
519 }
520 if (has_pcm_volume) {
521 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
522 [ypcm->substream->number].left << 15);
523 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
524 [ypcm->substream->number].right << 15);
525 } else {
526 vol_left = cpu_to_le32(0x40000000);
527 vol_right = cpu_to_le32(0x40000000);
528 }
529 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
530 format = runtime->channels == 2 ? 0x00010000 : 0;
531 if (snd_pcm_format_width(runtime->format) == 8)
532 format |= 0x80000000;
533 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
534 runtime->rate == 44100 && runtime->channels == 2 &&
535 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
536 ypcm->chip->src441_used == voice->number)) {
537 ypcm->chip->src441_used = voice->number;
538 ypcm->use_441_slot = 1;
539 format |= 0x10000000;
540 }
541 if (ypcm->chip->src441_used == voice->number &&
542 (format & 0x10000000) == 0) {
543 ypcm->chip->src441_used = -1;
544 ypcm->use_441_slot = 0;
545 }
546 if (runtime->channels == 2 && (voiceidx & 1) != 0)
547 format |= 1;
548 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
549 for (nbank = 0; nbank < 2; nbank++) {
550 bank = &voice->bank[nbank];
551 memset(bank, 0, sizeof(*bank));
552 bank->format = cpu_to_le32(format);
553 bank->base = cpu_to_le32(runtime->dma_addr);
554 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
555 bank->lpfQ = cpu_to_le32(lpfQ);
556 bank->delta =
557 bank->delta_end = cpu_to_le32(delta);
558 bank->lpfK =
559 bank->lpfK_end = cpu_to_le32(lpfK);
560 bank->eg_gain =
561 bank->eg_gain_end = cpu_to_le32(0x40000000);
562
563 if (ypcm->output_front) {
564 if (use_left) {
565 bank->left_gain =
566 bank->left_gain_end = vol_left;
567 }
568 if (use_right) {
569 bank->right_gain =
570 bank->right_gain_end = vol_right;
571 }
572 }
573 if (ypcm->output_rear) {
574 if (!ypcm->swap_rear) {
575 if (use_left) {
576 bank->eff2_gain =
577 bank->eff2_gain_end = vol_left;
578 }
579 if (use_right) {
580 bank->eff3_gain =
581 bank->eff3_gain_end = vol_right;
582 }
583 } else {
584 /* The SPDIF out channels seem to be swapped, so we have
585 * to swap them here, too. The rear analog out channels
586 * will be wrong, but otherwise AC3 would not work.
587 */
588 if (use_left) {
589 bank->eff3_gain =
590 bank->eff3_gain_end = vol_left;
591 }
592 if (use_right) {
593 bank->eff2_gain =
594 bank->eff2_gain_end = vol_right;
595 }
596 }
597 }
598 }
599 }
600
601 static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
602 {
603 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
604 4096, &chip->ac3_tmp_base) < 0)
605 return -ENOMEM;
606
607 chip->bank_effect[3][0]->base =
608 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
609 chip->bank_effect[3][0]->loop_end =
610 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
611 chip->bank_effect[4][0]->base =
612 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
613 chip->bank_effect[4][0]->loop_end =
614 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
615
616 spin_lock_irq(&chip->reg_lock);
617 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
618 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
619 spin_unlock_irq(&chip->reg_lock);
620 return 0;
621 }
622
623 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
624 {
625 spin_lock_irq(&chip->reg_lock);
626 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
627 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
628 spin_unlock_irq(&chip->reg_lock);
629 // snd_ymfpci_irq_wait(chip);
630 if (chip->ac3_tmp_base.area) {
631 snd_dma_free_pages(&chip->ac3_tmp_base);
632 chip->ac3_tmp_base.area = NULL;
633 }
634 return 0;
635 }
636
637 static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
638 struct snd_pcm_hw_params *hw_params)
639 {
640 struct snd_pcm_runtime *runtime = substream->runtime;
641 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
642 int err;
643
644 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
645 return err;
646 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
647 return err;
648 return 0;
649 }
650
651 static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
652 {
653 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
654 struct snd_pcm_runtime *runtime = substream->runtime;
655 struct snd_ymfpci_pcm *ypcm;
656
657 if (runtime->private_data == NULL)
658 return 0;
659 ypcm = runtime->private_data;
660
661 /* wait, until the PCI operations are not finished */
662 snd_ymfpci_irq_wait(chip);
663 snd_pcm_lib_free_pages(substream);
664 if (ypcm->voices[1]) {
665 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
666 ypcm->voices[1] = NULL;
667 }
668 if (ypcm->voices[0]) {
669 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
670 ypcm->voices[0] = NULL;
671 }
672 return 0;
673 }
674
675 static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
676 {
677 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
678 struct snd_pcm_runtime *runtime = substream->runtime;
679 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
680 struct snd_kcontrol *kctl;
681 unsigned int nvoice;
682
683 ypcm->period_size = runtime->period_size;
684 ypcm->buffer_size = runtime->buffer_size;
685 ypcm->period_pos = 0;
686 ypcm->last_pos = 0;
687 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
688 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
689 substream->pcm == chip->pcm);
690
691 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
692 kctl = chip->pcm_mixer[substream->number].ctl;
693 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
694 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
695 }
696 return 0;
697 }
698
699 static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
700 struct snd_pcm_hw_params *hw_params)
701 {
702 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
703 }
704
705 static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
706 {
707 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
708
709 /* wait, until the PCI operations are not finished */
710 snd_ymfpci_irq_wait(chip);
711 return snd_pcm_lib_free_pages(substream);
712 }
713
714 static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
715 {
716 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
717 struct snd_pcm_runtime *runtime = substream->runtime;
718 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
719 struct snd_ymfpci_capture_bank * bank;
720 int nbank;
721 u32 rate, format;
722
723 ypcm->period_size = runtime->period_size;
724 ypcm->buffer_size = runtime->buffer_size;
725 ypcm->period_pos = 0;
726 ypcm->last_pos = 0;
727 ypcm->shift = 0;
728 rate = ((48000 * 4096) / runtime->rate) - 1;
729 format = 0;
730 if (runtime->channels == 2) {
731 format |= 2;
732 ypcm->shift++;
733 }
734 if (snd_pcm_format_width(runtime->format) == 8)
735 format |= 1;
736 else
737 ypcm->shift++;
738 switch (ypcm->capture_bank_number) {
739 case 0:
740 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
741 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
742 break;
743 case 1:
744 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
745 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
746 break;
747 }
748 for (nbank = 0; nbank < 2; nbank++) {
749 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
750 bank->base = cpu_to_le32(runtime->dma_addr);
751 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
752 bank->start = 0;
753 bank->num_of_loops = 0;
754 }
755 return 0;
756 }
757
758 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
759 {
760 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
761 struct snd_pcm_runtime *runtime = substream->runtime;
762 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
763 struct snd_ymfpci_voice *voice = ypcm->voices[0];
764
765 if (!(ypcm->running && voice))
766 return 0;
767 return le32_to_cpu(voice->bank[chip->active_bank].start);
768 }
769
770 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
771 {
772 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
773 struct snd_pcm_runtime *runtime = substream->runtime;
774 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
775
776 if (!ypcm->running)
777 return 0;
778 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
779 }
780
781 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
782 {
783 wait_queue_t wait;
784 int loops = 4;
785
786 while (loops-- > 0) {
787 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
788 continue;
789 init_waitqueue_entry(&wait, current);
790 add_wait_queue(&chip->interrupt_sleep, &wait);
791 atomic_inc(&chip->interrupt_sleep_count);
792 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
793 remove_wait_queue(&chip->interrupt_sleep, &wait);
794 }
795 }
796
797 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
798 {
799 struct snd_ymfpci *chip = dev_id;
800 u32 status, nvoice, mode;
801 struct snd_ymfpci_voice *voice;
802
803 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
804 if (status & 0x80000000) {
805 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
806 spin_lock(&chip->voice_lock);
807 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
808 voice = &chip->voices[nvoice];
809 if (voice->interrupt)
810 voice->interrupt(chip, voice);
811 }
812 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
813 if (chip->capture_substream[nvoice])
814 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
815 }
816 #if 0
817 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
818 if (chip->effect_substream[nvoice])
819 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
820 }
821 #endif
822 spin_unlock(&chip->voice_lock);
823 spin_lock(&chip->reg_lock);
824 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
825 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
826 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
827 spin_unlock(&chip->reg_lock);
828
829 if (atomic_read(&chip->interrupt_sleep_count)) {
830 atomic_set(&chip->interrupt_sleep_count, 0);
831 wake_up(&chip->interrupt_sleep);
832 }
833 }
834
835 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
836 if (status & 1) {
837 if (chip->timer)
838 snd_timer_interrupt(chip->timer, chip->timer_ticks);
839 }
840 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
841
842 if (chip->rawmidi)
843 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
844 return IRQ_HANDLED;
845 }
846
847 static struct snd_pcm_hardware snd_ymfpci_playback =
848 {
849 .info = (SNDRV_PCM_INFO_MMAP |
850 SNDRV_PCM_INFO_MMAP_VALID |
851 SNDRV_PCM_INFO_INTERLEAVED |
852 SNDRV_PCM_INFO_BLOCK_TRANSFER |
853 SNDRV_PCM_INFO_PAUSE |
854 SNDRV_PCM_INFO_RESUME),
855 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
856 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
857 .rate_min = 8000,
858 .rate_max = 48000,
859 .channels_min = 1,
860 .channels_max = 2,
861 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
862 .period_bytes_min = 64,
863 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
864 .periods_min = 3,
865 .periods_max = 1024,
866 .fifo_size = 0,
867 };
868
869 static struct snd_pcm_hardware snd_ymfpci_capture =
870 {
871 .info = (SNDRV_PCM_INFO_MMAP |
872 SNDRV_PCM_INFO_MMAP_VALID |
873 SNDRV_PCM_INFO_INTERLEAVED |
874 SNDRV_PCM_INFO_BLOCK_TRANSFER |
875 SNDRV_PCM_INFO_PAUSE |
876 SNDRV_PCM_INFO_RESUME),
877 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
878 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
879 .rate_min = 8000,
880 .rate_max = 48000,
881 .channels_min = 1,
882 .channels_max = 2,
883 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
884 .period_bytes_min = 64,
885 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
886 .periods_min = 3,
887 .periods_max = 1024,
888 .fifo_size = 0,
889 };
890
891 static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
892 {
893 kfree(runtime->private_data);
894 }
895
896 static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
897 {
898 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
899 struct snd_pcm_runtime *runtime = substream->runtime;
900 struct snd_ymfpci_pcm *ypcm;
901 int err;
902
903 runtime->hw = snd_ymfpci_playback;
904 /* FIXME? True value is 256/48 = 5.33333 ms */
905 err = snd_pcm_hw_constraint_minmax(runtime,
906 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
907 5334, UINT_MAX);
908 if (err < 0)
909 return err;
910 err = snd_pcm_hw_rule_noresample(runtime, 48000);
911 if (err < 0)
912 return err;
913
914 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
915 if (ypcm == NULL)
916 return -ENOMEM;
917 ypcm->chip = chip;
918 ypcm->type = PLAYBACK_VOICE;
919 ypcm->substream = substream;
920 runtime->private_data = ypcm;
921 runtime->private_free = snd_ymfpci_pcm_free_substream;
922 return 0;
923 }
924
925 /* call with spinlock held */
926 static void ymfpci_open_extension(struct snd_ymfpci *chip)
927 {
928 if (! chip->rear_opened) {
929 if (! chip->spdif_opened) /* set AC3 */
930 snd_ymfpci_writel(chip, YDSXGR_MODE,
931 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
932 /* enable second codec (4CHEN) */
933 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
934 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
935 }
936 }
937
938 /* call with spinlock held */
939 static void ymfpci_close_extension(struct snd_ymfpci *chip)
940 {
941 if (! chip->rear_opened) {
942 if (! chip->spdif_opened)
943 snd_ymfpci_writel(chip, YDSXGR_MODE,
944 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
945 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
946 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
947 }
948 }
949
950 static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
951 {
952 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
953 struct snd_pcm_runtime *runtime = substream->runtime;
954 struct snd_ymfpci_pcm *ypcm;
955 int err;
956
957 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
958 return err;
959 ypcm = runtime->private_data;
960 ypcm->output_front = 1;
961 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
962 ypcm->swap_rear = 0;
963 spin_lock_irq(&chip->reg_lock);
964 if (ypcm->output_rear) {
965 ymfpci_open_extension(chip);
966 chip->rear_opened++;
967 }
968 spin_unlock_irq(&chip->reg_lock);
969 return 0;
970 }
971
972 static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
973 {
974 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
975 struct snd_pcm_runtime *runtime = substream->runtime;
976 struct snd_ymfpci_pcm *ypcm;
977 int err;
978
979 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
980 return err;
981 ypcm = runtime->private_data;
982 ypcm->output_front = 0;
983 ypcm->output_rear = 1;
984 ypcm->swap_rear = 1;
985 spin_lock_irq(&chip->reg_lock);
986 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
987 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
988 ymfpci_open_extension(chip);
989 chip->spdif_pcm_bits = chip->spdif_bits;
990 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
991 chip->spdif_opened++;
992 spin_unlock_irq(&chip->reg_lock);
993
994 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
995 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
996 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
997 return 0;
998 }
999
1000 static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1001 {
1002 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1003 struct snd_pcm_runtime *runtime = substream->runtime;
1004 struct snd_ymfpci_pcm *ypcm;
1005 int err;
1006
1007 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
1008 return err;
1009 ypcm = runtime->private_data;
1010 ypcm->output_front = 0;
1011 ypcm->output_rear = 1;
1012 ypcm->swap_rear = 0;
1013 spin_lock_irq(&chip->reg_lock);
1014 ymfpci_open_extension(chip);
1015 chip->rear_opened++;
1016 spin_unlock_irq(&chip->reg_lock);
1017 return 0;
1018 }
1019
1020 static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1021 u32 capture_bank_number)
1022 {
1023 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1024 struct snd_pcm_runtime *runtime = substream->runtime;
1025 struct snd_ymfpci_pcm *ypcm;
1026 int err;
1027
1028 runtime->hw = snd_ymfpci_capture;
1029 /* FIXME? True value is 256/48 = 5.33333 ms */
1030 err = snd_pcm_hw_constraint_minmax(runtime,
1031 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1032 5334, UINT_MAX);
1033 if (err < 0)
1034 return err;
1035 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1036 if (err < 0)
1037 return err;
1038
1039 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1040 if (ypcm == NULL)
1041 return -ENOMEM;
1042 ypcm->chip = chip;
1043 ypcm->type = capture_bank_number + CAPTURE_REC;
1044 ypcm->substream = substream;
1045 ypcm->capture_bank_number = capture_bank_number;
1046 chip->capture_substream[capture_bank_number] = substream;
1047 runtime->private_data = ypcm;
1048 runtime->private_free = snd_ymfpci_pcm_free_substream;
1049 snd_ymfpci_hw_start(chip);
1050 return 0;
1051 }
1052
1053 static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1054 {
1055 return snd_ymfpci_capture_open(substream, 0);
1056 }
1057
1058 static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1059 {
1060 return snd_ymfpci_capture_open(substream, 1);
1061 }
1062
1063 static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1064 {
1065 return 0;
1066 }
1067
1068 static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1069 {
1070 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1071 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1072
1073 spin_lock_irq(&chip->reg_lock);
1074 if (ypcm->output_rear && chip->rear_opened > 0) {
1075 chip->rear_opened--;
1076 ymfpci_close_extension(chip);
1077 }
1078 spin_unlock_irq(&chip->reg_lock);
1079 return snd_ymfpci_playback_close_1(substream);
1080 }
1081
1082 static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1083 {
1084 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1085
1086 spin_lock_irq(&chip->reg_lock);
1087 chip->spdif_opened = 0;
1088 ymfpci_close_extension(chip);
1089 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1090 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1091 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1092 spin_unlock_irq(&chip->reg_lock);
1093 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1094 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1095 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1096 return snd_ymfpci_playback_close_1(substream);
1097 }
1098
1099 static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1100 {
1101 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1102
1103 spin_lock_irq(&chip->reg_lock);
1104 if (chip->rear_opened > 0) {
1105 chip->rear_opened--;
1106 ymfpci_close_extension(chip);
1107 }
1108 spin_unlock_irq(&chip->reg_lock);
1109 return snd_ymfpci_playback_close_1(substream);
1110 }
1111
1112 static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1113 {
1114 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1115 struct snd_pcm_runtime *runtime = substream->runtime;
1116 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1117
1118 if (ypcm != NULL) {
1119 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1120 snd_ymfpci_hw_stop(chip);
1121 }
1122 return 0;
1123 }
1124
1125 static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1126 .open = snd_ymfpci_playback_open,
1127 .close = snd_ymfpci_playback_close,
1128 .ioctl = snd_pcm_lib_ioctl,
1129 .hw_params = snd_ymfpci_playback_hw_params,
1130 .hw_free = snd_ymfpci_playback_hw_free,
1131 .prepare = snd_ymfpci_playback_prepare,
1132 .trigger = snd_ymfpci_playback_trigger,
1133 .pointer = snd_ymfpci_playback_pointer,
1134 };
1135
1136 static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1137 .open = snd_ymfpci_capture_rec_open,
1138 .close = snd_ymfpci_capture_close,
1139 .ioctl = snd_pcm_lib_ioctl,
1140 .hw_params = snd_ymfpci_capture_hw_params,
1141 .hw_free = snd_ymfpci_capture_hw_free,
1142 .prepare = snd_ymfpci_capture_prepare,
1143 .trigger = snd_ymfpci_capture_trigger,
1144 .pointer = snd_ymfpci_capture_pointer,
1145 };
1146
1147 int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1148 {
1149 struct snd_pcm *pcm;
1150 int err;
1151
1152 if (rpcm)
1153 *rpcm = NULL;
1154 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1155 return err;
1156 pcm->private_data = chip;
1157
1158 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1159 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1160
1161 /* global setup */
1162 pcm->info_flags = 0;
1163 strcpy(pcm->name, "YMFPCI");
1164 chip->pcm = pcm;
1165
1166 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1167 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1168
1169 if (rpcm)
1170 *rpcm = pcm;
1171 return 0;
1172 }
1173
1174 static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1175 .open = snd_ymfpci_capture_ac97_open,
1176 .close = snd_ymfpci_capture_close,
1177 .ioctl = snd_pcm_lib_ioctl,
1178 .hw_params = snd_ymfpci_capture_hw_params,
1179 .hw_free = snd_ymfpci_capture_hw_free,
1180 .prepare = snd_ymfpci_capture_prepare,
1181 .trigger = snd_ymfpci_capture_trigger,
1182 .pointer = snd_ymfpci_capture_pointer,
1183 };
1184
1185 int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1186 {
1187 struct snd_pcm *pcm;
1188 int err;
1189
1190 if (rpcm)
1191 *rpcm = NULL;
1192 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1193 return err;
1194 pcm->private_data = chip;
1195
1196 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1197
1198 /* global setup */
1199 pcm->info_flags = 0;
1200 sprintf(pcm->name, "YMFPCI - %s",
1201 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1202 chip->pcm2 = pcm;
1203
1204 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1205 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1206
1207 if (rpcm)
1208 *rpcm = pcm;
1209 return 0;
1210 }
1211
1212 static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1213 .open = snd_ymfpci_playback_spdif_open,
1214 .close = snd_ymfpci_playback_spdif_close,
1215 .ioctl = snd_pcm_lib_ioctl,
1216 .hw_params = snd_ymfpci_playback_hw_params,
1217 .hw_free = snd_ymfpci_playback_hw_free,
1218 .prepare = snd_ymfpci_playback_prepare,
1219 .trigger = snd_ymfpci_playback_trigger,
1220 .pointer = snd_ymfpci_playback_pointer,
1221 };
1222
1223 int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1224 {
1225 struct snd_pcm *pcm;
1226 int err;
1227
1228 if (rpcm)
1229 *rpcm = NULL;
1230 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1231 return err;
1232 pcm->private_data = chip;
1233
1234 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1235
1236 /* global setup */
1237 pcm->info_flags = 0;
1238 strcpy(pcm->name, "YMFPCI - IEC958");
1239 chip->pcm_spdif = pcm;
1240
1241 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1242 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1243
1244 if (rpcm)
1245 *rpcm = pcm;
1246 return 0;
1247 }
1248
1249 static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1250 .open = snd_ymfpci_playback_4ch_open,
1251 .close = snd_ymfpci_playback_4ch_close,
1252 .ioctl = snd_pcm_lib_ioctl,
1253 .hw_params = snd_ymfpci_playback_hw_params,
1254 .hw_free = snd_ymfpci_playback_hw_free,
1255 .prepare = snd_ymfpci_playback_prepare,
1256 .trigger = snd_ymfpci_playback_trigger,
1257 .pointer = snd_ymfpci_playback_pointer,
1258 };
1259
1260 int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1261 {
1262 struct snd_pcm *pcm;
1263 int err;
1264
1265 if (rpcm)
1266 *rpcm = NULL;
1267 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1268 return err;
1269 pcm->private_data = chip;
1270
1271 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1272
1273 /* global setup */
1274 pcm->info_flags = 0;
1275 strcpy(pcm->name, "YMFPCI - Rear PCM");
1276 chip->pcm_4ch = pcm;
1277
1278 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1279 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1280
1281 if (rpcm)
1282 *rpcm = pcm;
1283 return 0;
1284 }
1285
1286 static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1287 {
1288 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1289 uinfo->count = 1;
1290 return 0;
1291 }
1292
1293 static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1294 struct snd_ctl_elem_value *ucontrol)
1295 {
1296 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1297
1298 spin_lock_irq(&chip->reg_lock);
1299 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1300 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1301 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1302 spin_unlock_irq(&chip->reg_lock);
1303 return 0;
1304 }
1305
1306 static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1307 struct snd_ctl_elem_value *ucontrol)
1308 {
1309 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1310 unsigned int val;
1311 int change;
1312
1313 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1314 (ucontrol->value.iec958.status[1] << 8);
1315 spin_lock_irq(&chip->reg_lock);
1316 change = chip->spdif_bits != val;
1317 chip->spdif_bits = val;
1318 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1319 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1320 spin_unlock_irq(&chip->reg_lock);
1321 return change;
1322 }
1323
1324 static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
1325 {
1326 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1327 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1328 .info = snd_ymfpci_spdif_default_info,
1329 .get = snd_ymfpci_spdif_default_get,
1330 .put = snd_ymfpci_spdif_default_put
1331 };
1332
1333 static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1334 {
1335 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1336 uinfo->count = 1;
1337 return 0;
1338 }
1339
1340 static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1341 struct snd_ctl_elem_value *ucontrol)
1342 {
1343 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1344
1345 spin_lock_irq(&chip->reg_lock);
1346 ucontrol->value.iec958.status[0] = 0x3e;
1347 ucontrol->value.iec958.status[1] = 0xff;
1348 spin_unlock_irq(&chip->reg_lock);
1349 return 0;
1350 }
1351
1352 static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
1353 {
1354 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1355 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1356 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1357 .info = snd_ymfpci_spdif_mask_info,
1358 .get = snd_ymfpci_spdif_mask_get,
1359 };
1360
1361 static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1362 {
1363 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1364 uinfo->count = 1;
1365 return 0;
1366 }
1367
1368 static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1369 struct snd_ctl_elem_value *ucontrol)
1370 {
1371 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1372
1373 spin_lock_irq(&chip->reg_lock);
1374 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1375 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1376 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1377 spin_unlock_irq(&chip->reg_lock);
1378 return 0;
1379 }
1380
1381 static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1382 struct snd_ctl_elem_value *ucontrol)
1383 {
1384 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1385 unsigned int val;
1386 int change;
1387
1388 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1389 (ucontrol->value.iec958.status[1] << 8);
1390 spin_lock_irq(&chip->reg_lock);
1391 change = chip->spdif_pcm_bits != val;
1392 chip->spdif_pcm_bits = val;
1393 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1394 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1395 spin_unlock_irq(&chip->reg_lock);
1396 return change;
1397 }
1398
1399 static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
1400 {
1401 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1402 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1403 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1404 .info = snd_ymfpci_spdif_stream_info,
1405 .get = snd_ymfpci_spdif_stream_get,
1406 .put = snd_ymfpci_spdif_stream_put
1407 };
1408
1409 static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1410 {
1411 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1412
1413 return snd_ctl_enum_info(info, 1, 3, texts);
1414 }
1415
1416 static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1417 {
1418 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1419 u16 reg;
1420
1421 spin_lock_irq(&chip->reg_lock);
1422 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1423 spin_unlock_irq(&chip->reg_lock);
1424 if (!(reg & 0x100))
1425 value->value.enumerated.item[0] = 0;
1426 else
1427 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1428 return 0;
1429 }
1430
1431 static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1432 {
1433 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1434 u16 reg, old_reg;
1435
1436 spin_lock_irq(&chip->reg_lock);
1437 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1438 if (value->value.enumerated.item[0] == 0)
1439 reg = old_reg & ~0x100;
1440 else
1441 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1442 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1443 spin_unlock_irq(&chip->reg_lock);
1444 return reg != old_reg;
1445 }
1446
1447 static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
1448 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1449 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1450 .name = "Direct Recording Source",
1451 .info = snd_ymfpci_drec_source_info,
1452 .get = snd_ymfpci_drec_source_get,
1453 .put = snd_ymfpci_drec_source_put
1454 };
1455
1456 /*
1457 * Mixer controls
1458 */
1459
1460 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1461 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1462 .info = snd_ymfpci_info_single, \
1463 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1464 .private_value = ((reg) | ((shift) << 16)) }
1465
1466 #define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1467
1468 static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1469 struct snd_ctl_elem_value *ucontrol)
1470 {
1471 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1472 int reg = kcontrol->private_value & 0xffff;
1473 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1474 unsigned int mask = 1;
1475
1476 switch (reg) {
1477 case YDSXGR_SPDIFOUTCTRL: break;
1478 case YDSXGR_SPDIFINCTRL: break;
1479 default: return -EINVAL;
1480 }
1481 ucontrol->value.integer.value[0] =
1482 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1483 return 0;
1484 }
1485
1486 static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1487 struct snd_ctl_elem_value *ucontrol)
1488 {
1489 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1490 int reg = kcontrol->private_value & 0xffff;
1491 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1492 unsigned int mask = 1;
1493 int change;
1494 unsigned int val, oval;
1495
1496 switch (reg) {
1497 case YDSXGR_SPDIFOUTCTRL: break;
1498 case YDSXGR_SPDIFINCTRL: break;
1499 default: return -EINVAL;
1500 }
1501 val = (ucontrol->value.integer.value[0] & mask);
1502 val <<= shift;
1503 spin_lock_irq(&chip->reg_lock);
1504 oval = snd_ymfpci_readl(chip, reg);
1505 val = (oval & ~(mask << shift)) | val;
1506 change = val != oval;
1507 snd_ymfpci_writel(chip, reg, val);
1508 spin_unlock_irq(&chip->reg_lock);
1509 return change;
1510 }
1511
1512 static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1513
1514 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1515 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1516 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1517 .info = snd_ymfpci_info_double, \
1518 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1519 .private_value = reg, \
1520 .tlv = { .p = db_scale_native } }
1521
1522 static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1523 {
1524 unsigned int reg = kcontrol->private_value;
1525
1526 if (reg < 0x80 || reg >= 0xc0)
1527 return -EINVAL;
1528 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1529 uinfo->count = 2;
1530 uinfo->value.integer.min = 0;
1531 uinfo->value.integer.max = 16383;
1532 return 0;
1533 }
1534
1535 static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1536 {
1537 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1538 unsigned int reg = kcontrol->private_value;
1539 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1540 unsigned int val;
1541
1542 if (reg < 0x80 || reg >= 0xc0)
1543 return -EINVAL;
1544 spin_lock_irq(&chip->reg_lock);
1545 val = snd_ymfpci_readl(chip, reg);
1546 spin_unlock_irq(&chip->reg_lock);
1547 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1548 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1549 return 0;
1550 }
1551
1552 static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1553 {
1554 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1555 unsigned int reg = kcontrol->private_value;
1556 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1557 int change;
1558 unsigned int val1, val2, oval;
1559
1560 if (reg < 0x80 || reg >= 0xc0)
1561 return -EINVAL;
1562 val1 = ucontrol->value.integer.value[0] & mask;
1563 val2 = ucontrol->value.integer.value[1] & mask;
1564 val1 <<= shift_left;
1565 val2 <<= shift_right;
1566 spin_lock_irq(&chip->reg_lock);
1567 oval = snd_ymfpci_readl(chip, reg);
1568 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1569 change = val1 != oval;
1570 snd_ymfpci_writel(chip, reg, val1);
1571 spin_unlock_irq(&chip->reg_lock);
1572 return change;
1573 }
1574
1575 static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1576 struct snd_ctl_elem_value *ucontrol)
1577 {
1578 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1579 unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1580 unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1581 int change;
1582 unsigned int value, oval;
1583
1584 value = ucontrol->value.integer.value[0] & 0x3fff;
1585 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1586 spin_lock_irq(&chip->reg_lock);
1587 oval = snd_ymfpci_readl(chip, reg);
1588 change = value != oval;
1589 snd_ymfpci_writel(chip, reg, value);
1590 snd_ymfpci_writel(chip, reg2, value);
1591 spin_unlock_irq(&chip->reg_lock);
1592 return change;
1593 }
1594
1595 /*
1596 * 4ch duplication
1597 */
1598 #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1599
1600 static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1601 {
1602 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1603 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1604 return 0;
1605 }
1606
1607 static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1608 {
1609 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1610 int change;
1611 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1612 if (change)
1613 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1614 return change;
1615 }
1616
1617 static struct snd_kcontrol_new snd_ymfpci_dup4ch __devinitdata = {
1618 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1619 .name = "4ch Duplication",
1620 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1621 .info = snd_ymfpci_info_dup4ch,
1622 .get = snd_ymfpci_get_dup4ch,
1623 .put = snd_ymfpci_put_dup4ch,
1624 };
1625
1626 static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
1627 {
1628 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1629 .name = "Wave Playback Volume",
1630 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1631 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1632 .info = snd_ymfpci_info_double,
1633 .get = snd_ymfpci_get_double,
1634 .put = snd_ymfpci_put_nativedacvol,
1635 .private_value = YDSXGR_NATIVEDACOUTVOL,
1636 .tlv = { .p = db_scale_native },
1637 },
1638 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1639 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1640 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1641 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1642 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1643 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1644 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1645 YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1646 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1647 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1648 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1649 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1650 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1651 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1652 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1653 };
1654
1655
1656 /*
1657 * GPIO
1658 */
1659
1660 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1661 {
1662 u16 reg, mode;
1663 unsigned long flags;
1664
1665 spin_lock_irqsave(&chip->reg_lock, flags);
1666 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1667 reg &= ~(1 << (pin + 8));
1668 reg |= (1 << pin);
1669 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1670 /* set the level mode for input line */
1671 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1672 mode &= ~(3 << (pin * 2));
1673 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1674 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1675 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1676 spin_unlock_irqrestore(&chip->reg_lock, flags);
1677 return (mode >> pin) & 1;
1678 }
1679
1680 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1681 {
1682 u16 reg;
1683 unsigned long flags;
1684
1685 spin_lock_irqsave(&chip->reg_lock, flags);
1686 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1687 reg &= ~(1 << pin);
1688 reg &= ~(1 << (pin + 8));
1689 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1690 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1691 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1692 spin_unlock_irqrestore(&chip->reg_lock, flags);
1693
1694 return 0;
1695 }
1696
1697 #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1698
1699 static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1700 {
1701 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1702 int pin = (int)kcontrol->private_value;
1703 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1704 return 0;
1705 }
1706
1707 static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1708 {
1709 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1710 int pin = (int)kcontrol->private_value;
1711
1712 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1713 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1714 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1715 return 1;
1716 }
1717 return 0;
1718 }
1719
1720 static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
1721 .name = "Shared Rear/Line-In Switch",
1722 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1723 .info = snd_ymfpci_gpio_sw_info,
1724 .get = snd_ymfpci_gpio_sw_get,
1725 .put = snd_ymfpci_gpio_sw_put,
1726 .private_value = 2,
1727 };
1728
1729 /*
1730 * PCM voice volume
1731 */
1732
1733 static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1734 struct snd_ctl_elem_info *uinfo)
1735 {
1736 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1737 uinfo->count = 2;
1738 uinfo->value.integer.min = 0;
1739 uinfo->value.integer.max = 0x8000;
1740 return 0;
1741 }
1742
1743 static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1744 struct snd_ctl_elem_value *ucontrol)
1745 {
1746 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1747 unsigned int subs = kcontrol->id.subdevice;
1748
1749 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1750 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1751 return 0;
1752 }
1753
1754 static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1755 struct snd_ctl_elem_value *ucontrol)
1756 {
1757 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1758 unsigned int subs = kcontrol->id.subdevice;
1759 struct snd_pcm_substream *substream;
1760 unsigned long flags;
1761
1762 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1763 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1764 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1765 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1766 if (chip->pcm_mixer[subs].left > 0x8000)
1767 chip->pcm_mixer[subs].left = 0x8000;
1768 if (chip->pcm_mixer[subs].right > 0x8000)
1769 chip->pcm_mixer[subs].right = 0x8000;
1770
1771 substream = (struct snd_pcm_substream *)kcontrol->private_value;
1772 spin_lock_irqsave(&chip->voice_lock, flags);
1773 if (substream->runtime && substream->runtime->private_data) {
1774 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1775 if (!ypcm->use_441_slot)
1776 ypcm->update_pcm_vol = 2;
1777 }
1778 spin_unlock_irqrestore(&chip->voice_lock, flags);
1779 return 1;
1780 }
1781 return 0;
1782 }
1783
1784 static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
1785 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1786 .name = "PCM Playback Volume",
1787 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1788 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1789 .info = snd_ymfpci_pcm_vol_info,
1790 .get = snd_ymfpci_pcm_vol_get,
1791 .put = snd_ymfpci_pcm_vol_put,
1792 };
1793
1794
1795 /*
1796 * Mixer routines
1797 */
1798
1799 static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1800 {
1801 struct snd_ymfpci *chip = bus->private_data;
1802 chip->ac97_bus = NULL;
1803 }
1804
1805 static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1806 {
1807 struct snd_ymfpci *chip = ac97->private_data;
1808 chip->ac97 = NULL;
1809 }
1810
1811 int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1812 {
1813 struct snd_ac97_template ac97;
1814 struct snd_kcontrol *kctl;
1815 struct snd_pcm_substream *substream;
1816 unsigned int idx;
1817 int err;
1818 static struct snd_ac97_bus_ops ops = {
1819 .write = snd_ymfpci_codec_write,
1820 .read = snd_ymfpci_codec_read,
1821 };
1822
1823 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1824 return err;
1825 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1826 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1827
1828 memset(&ac97, 0, sizeof(ac97));
1829 ac97.private_data = chip;
1830 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1831 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1832 return err;
1833
1834 /* to be sure */
1835 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1836 AC97_EA_VRA|AC97_EA_VRM, 0);
1837
1838 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1839 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1840 return err;
1841 }
1842 if (chip->ac97->ext_id & AC97_EI_SDAC) {
1843 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1844 err = snd_ctl_add(chip->card, kctl);
1845 if (err < 0)
1846 return err;
1847 }
1848
1849 /* add S/PDIF control */
1850 if (snd_BUG_ON(!chip->pcm_spdif))
1851 return -ENXIO;
1852 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1853 return err;
1854 kctl->id.device = chip->pcm_spdif->device;
1855 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1856 return err;
1857 kctl->id.device = chip->pcm_spdif->device;
1858 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1859 return err;
1860 kctl->id.device = chip->pcm_spdif->device;
1861 chip->spdif_pcm_ctl = kctl;
1862
1863 /* direct recording source */
1864 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1865 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1866 return err;
1867
1868 /*
1869 * shared rear/line-in
1870 */
1871 if (rear_switch) {
1872 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1873 return err;
1874 }
1875
1876 /* per-voice volume */
1877 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1878 for (idx = 0; idx < 32; ++idx) {
1879 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1880 if (!kctl)
1881 return -ENOMEM;
1882 kctl->id.device = chip->pcm->device;
1883 kctl->id.subdevice = idx;
1884 kctl->private_value = (unsigned long)substream;
1885 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1886 return err;
1887 chip->pcm_mixer[idx].left = 0x8000;
1888 chip->pcm_mixer[idx].right = 0x8000;
1889 chip->pcm_mixer[idx].ctl = kctl;
1890 substream = substream->next;
1891 }
1892
1893 return 0;
1894 }
1895
1896
1897 /*
1898 * timer
1899 */
1900
1901 static int snd_ymfpci_timer_start(struct snd_timer *timer)
1902 {
1903 struct snd_ymfpci *chip;
1904 unsigned long flags;
1905 unsigned int count;
1906
1907 chip = snd_timer_chip(timer);
1908 spin_lock_irqsave(&chip->reg_lock, flags);
1909 if (timer->sticks > 1) {
1910 chip->timer_ticks = timer->sticks;
1911 count = timer->sticks - 1;
1912 } else {
1913 /*
1914 * Divisor 1 is not allowed; fake it by using divisor 2 and
1915 * counting two ticks for each interrupt.
1916 */
1917 chip->timer_ticks = 2;
1918 count = 2 - 1;
1919 }
1920 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1921 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1922 spin_unlock_irqrestore(&chip->reg_lock, flags);
1923 return 0;
1924 }
1925
1926 static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1927 {
1928 struct snd_ymfpci *chip;
1929 unsigned long flags;
1930
1931 chip = snd_timer_chip(timer);
1932 spin_lock_irqsave(&chip->reg_lock, flags);
1933 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1934 spin_unlock_irqrestore(&chip->reg_lock, flags);
1935 return 0;
1936 }
1937
1938 static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1939 unsigned long *num, unsigned long *den)
1940 {
1941 *num = 1;
1942 *den = 96000;
1943 return 0;
1944 }
1945
1946 static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1947 .flags = SNDRV_TIMER_HW_AUTO,
1948 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1949 .ticks = 0x10000,
1950 .start = snd_ymfpci_timer_start,
1951 .stop = snd_ymfpci_timer_stop,
1952 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1953 };
1954
1955 int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1956 {
1957 struct snd_timer *timer = NULL;
1958 struct snd_timer_id tid;
1959 int err;
1960
1961 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1962 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1963 tid.card = chip->card->number;
1964 tid.device = device;
1965 tid.subdevice = 0;
1966 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1967 strcpy(timer->name, "YMFPCI timer");
1968 timer->private_data = chip;
1969 timer->hw = snd_ymfpci_timer_hw;
1970 }
1971 chip->timer = timer;
1972 return err;
1973 }
1974
1975
1976 /*
1977 * proc interface
1978 */
1979
1980 static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1981 struct snd_info_buffer *buffer)
1982 {
1983 struct snd_ymfpci *chip = entry->private_data;
1984 int i;
1985
1986 snd_iprintf(buffer, "YMFPCI\n\n");
1987 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1988 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1989 }
1990
1991 static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1992 {
1993 struct snd_info_entry *entry;
1994
1995 if (! snd_card_proc_new(card, "ymfpci", &entry))
1996 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
1997 return 0;
1998 }
1999
2000 /*
2001 * initialization routines
2002 */
2003
2004 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
2005 {
2006 u8 cmd;
2007
2008 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
2009 #if 0 // force to reset
2010 if (cmd & 0x03) {
2011 #endif
2012 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2013 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
2014 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2015 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
2016 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
2017 #if 0
2018 }
2019 #endif
2020 }
2021
2022 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
2023 {
2024 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2025 }
2026
2027 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
2028 {
2029 u32 val;
2030 int timeout = 1000;
2031
2032 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2033 if (val)
2034 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2035 while (timeout-- > 0) {
2036 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2037 if ((val & 0x00000002) == 0)
2038 break;
2039 }
2040 }
2041
2042 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2043 {
2044 int err, is_1e;
2045 const char *name;
2046
2047 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2048 &chip->pci->dev);
2049 if (err >= 0) {
2050 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2051 snd_printk(KERN_ERR "DSP microcode has wrong size\n");
2052 err = -EINVAL;
2053 }
2054 }
2055 if (err < 0)
2056 return err;
2057 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2058 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2059 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2060 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2061 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2062 err = request_firmware(&chip->controller_microcode, name,
2063 &chip->pci->dev);
2064 if (err >= 0) {
2065 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2066 snd_printk(KERN_ERR "controller microcode"
2067 " has wrong size\n");
2068 err = -EINVAL;
2069 }
2070 }
2071 if (err < 0)
2072 return err;
2073 return 0;
2074 }
2075
2076 MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2077 MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2078 MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2079
2080 static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2081 {
2082 int i;
2083 u16 ctrl;
2084 const __le32 *inst;
2085
2086 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2087 snd_ymfpci_disable_dsp(chip);
2088 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2089 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2090 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2091 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2092 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2093 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2094 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2095 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2096 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2097
2098 /* setup DSP instruction code */
2099 inst = (const __le32 *)chip->dsp_microcode->data;
2100 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2101 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2102 le32_to_cpu(inst[i]));
2103
2104 /* setup control instruction code */
2105 inst = (const __le32 *)chip->controller_microcode->data;
2106 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2107 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2108 le32_to_cpu(inst[i]));
2109
2110 snd_ymfpci_enable_dsp(chip);
2111 }
2112
2113 static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2114 {
2115 long size, playback_ctrl_size;
2116 int voice, bank, reg;
2117 u8 *ptr;
2118 dma_addr_t ptr_addr;
2119
2120 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2121 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2122 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2123 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2124 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2125
2126 size = ALIGN(playback_ctrl_size, 0x100) +
2127 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2128 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2129 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2130 chip->work_size;
2131 /* work_ptr must be aligned to 256 bytes, but it's already
2132 covered with the kernel page allocation mechanism */
2133 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2134 size, &chip->work_ptr) < 0)
2135 return -ENOMEM;
2136 ptr = chip->work_ptr.area;
2137 ptr_addr = chip->work_ptr.addr;
2138 memset(ptr, 0, size); /* for sure */
2139
2140 chip->bank_base_playback = ptr;
2141 chip->bank_base_playback_addr = ptr_addr;
2142 chip->ctrl_playback = (u32 *)ptr;
2143 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2144 ptr += ALIGN(playback_ctrl_size, 0x100);
2145 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2146 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2147 chip->voices[voice].number = voice;
2148 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2149 chip->voices[voice].bank_addr = ptr_addr;
2150 for (bank = 0; bank < 2; bank++) {
2151 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2152 ptr += chip->bank_size_playback;
2153 ptr_addr += chip->bank_size_playback;
2154 }
2155 }
2156 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2157 ptr_addr = ALIGN(ptr_addr, 0x100);
2158 chip->bank_base_capture = ptr;
2159 chip->bank_base_capture_addr = ptr_addr;
2160 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2161 for (bank = 0; bank < 2; bank++) {
2162 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2163 ptr += chip->bank_size_capture;
2164 ptr_addr += chip->bank_size_capture;
2165 }
2166 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2167 ptr_addr = ALIGN(ptr_addr, 0x100);
2168 chip->bank_base_effect = ptr;
2169 chip->bank_base_effect_addr = ptr_addr;
2170 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2171 for (bank = 0; bank < 2; bank++) {
2172 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2173 ptr += chip->bank_size_effect;
2174 ptr_addr += chip->bank_size_effect;
2175 }
2176 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2177 ptr_addr = ALIGN(ptr_addr, 0x100);
2178 chip->work_base = ptr;
2179 chip->work_base_addr = ptr_addr;
2180
2181 snd_BUG_ON(ptr + chip->work_size !=
2182 chip->work_ptr.area + chip->work_ptr.bytes);
2183
2184 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2185 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2186 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2187 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2188 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2189
2190 /* S/PDIF output initialization */
2191 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2192 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2193 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2194
2195 /* S/PDIF input initialization */
2196 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2197
2198 /* digital mixer setup */
2199 for (reg = 0x80; reg < 0xc0; reg += 4)
2200 snd_ymfpci_writel(chip, reg, 0);
2201 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2202 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2203 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2204 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2205 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2206 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2207 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2208 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2209
2210 return 0;
2211 }
2212
2213 static int snd_ymfpci_free(struct snd_ymfpci *chip)
2214 {
2215 u16 ctrl;
2216
2217 if (snd_BUG_ON(!chip))
2218 return -EINVAL;
2219
2220 if (chip->res_reg_area) { /* don't touch busy hardware */
2221 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2222 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2223 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2224 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2225 snd_ymfpci_disable_dsp(chip);
2226 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2227 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2228 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2229 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2230 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2231 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2232 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2233 }
2234
2235 snd_ymfpci_ac3_done(chip);
2236
2237 /* Set PCI device to D3 state */
2238 #if 0
2239 /* FIXME: temporarily disabled, otherwise we cannot fire up
2240 * the chip again unless reboot. ACPI bug?
2241 */
2242 pci_set_power_state(chip->pci, 3);
2243 #endif
2244
2245 #ifdef CONFIG_PM_SLEEP
2246 vfree(chip->saved_regs);
2247 #endif
2248 if (chip->irq >= 0)
2249 free_irq(chip->irq, chip);
2250 release_and_free_resource(chip->mpu_res);
2251 release_and_free_resource(chip->fm_res);
2252 snd_ymfpci_free_gameport(chip);
2253 if (chip->reg_area_virt)
2254 iounmap(chip->reg_area_virt);
2255 if (chip->work_ptr.area)
2256 snd_dma_free_pages(&chip->work_ptr);
2257
2258 release_and_free_resource(chip->res_reg_area);
2259
2260 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2261
2262 pci_disable_device(chip->pci);
2263 release_firmware(chip->dsp_microcode);
2264 release_firmware(chip->controller_microcode);
2265 kfree(chip);
2266 return 0;
2267 }
2268
2269 static int snd_ymfpci_dev_free(struct snd_device *device)
2270 {
2271 struct snd_ymfpci *chip = device->device_data;
2272 return snd_ymfpci_free(chip);
2273 }
2274
2275 #ifdef CONFIG_PM_SLEEP
2276 static int saved_regs_index[] = {
2277 /* spdif */
2278 YDSXGR_SPDIFOUTCTRL,
2279 YDSXGR_SPDIFOUTSTATUS,
2280 YDSXGR_SPDIFINCTRL,
2281 /* volumes */
2282 YDSXGR_PRIADCLOOPVOL,
2283 YDSXGR_NATIVEDACINVOL,
2284 YDSXGR_NATIVEDACOUTVOL,
2285 YDSXGR_BUF441OUTVOL,
2286 YDSXGR_NATIVEADCINVOL,
2287 YDSXGR_SPDIFLOOPVOL,
2288 YDSXGR_SPDIFOUTVOL,
2289 YDSXGR_ZVOUTVOL,
2290 YDSXGR_LEGACYOUTVOL,
2291 /* address bases */
2292 YDSXGR_PLAYCTRLBASE,
2293 YDSXGR_RECCTRLBASE,
2294 YDSXGR_EFFCTRLBASE,
2295 YDSXGR_WORKBASE,
2296 /* capture set up */
2297 YDSXGR_MAPOFREC,
2298 YDSXGR_RECFORMAT,
2299 YDSXGR_RECSLOTSR,
2300 YDSXGR_ADCFORMAT,
2301 YDSXGR_ADCSLOTSR,
2302 };
2303 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2304
2305 static int snd_ymfpci_suspend(struct device *dev)
2306 {
2307 struct pci_dev *pci = to_pci_dev(dev);
2308 struct snd_card *card = dev_get_drvdata(dev);
2309 struct snd_ymfpci *chip = card->private_data;
2310 unsigned int i;
2311
2312 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2313 snd_pcm_suspend_all(chip->pcm);
2314 snd_pcm_suspend_all(chip->pcm2);
2315 snd_pcm_suspend_all(chip->pcm_spdif);
2316 snd_pcm_suspend_all(chip->pcm_4ch);
2317 snd_ac97_suspend(chip->ac97);
2318 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2319 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2320 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2321 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2322 &chip->saved_dsxg_legacy);
2323 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2324 &chip->saved_dsxg_elegacy);
2325 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2326 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2327 snd_ymfpci_disable_dsp(chip);
2328 pci_disable_device(pci);
2329 pci_save_state(pci);
2330 pci_set_power_state(pci, PCI_D3hot);
2331 return 0;
2332 }
2333
2334 static int snd_ymfpci_resume(struct device *dev)
2335 {
2336 struct pci_dev *pci = to_pci_dev(dev);
2337 struct snd_card *card = dev_get_drvdata(dev);
2338 struct snd_ymfpci *chip = card->private_data;
2339 unsigned int i;
2340
2341 pci_set_power_state(pci, PCI_D0);
2342 pci_restore_state(pci);
2343 if (pci_enable_device(pci) < 0) {
2344 printk(KERN_ERR "ymfpci: pci_enable_device failed, "
2345 "disabling device\n");
2346 snd_card_disconnect(card);
2347 return -EIO;
2348 }
2349 pci_set_master(pci);
2350 snd_ymfpci_aclink_reset(pci);
2351 snd_ymfpci_codec_ready(chip, 0);
2352 snd_ymfpci_download_image(chip);
2353 udelay(100);
2354
2355 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2356 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2357
2358 snd_ac97_resume(chip->ac97);
2359
2360 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2361 chip->saved_dsxg_legacy);
2362 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2363 chip->saved_dsxg_elegacy);
2364
2365 /* start hw again */
2366 if (chip->start_count > 0) {
2367 spin_lock_irq(&chip->reg_lock);
2368 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2369 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2370 spin_unlock_irq(&chip->reg_lock);
2371 }
2372 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2373 return 0;
2374 }
2375
2376 SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
2377 #endif /* CONFIG_PM_SLEEP */
2378
2379 int __devinit snd_ymfpci_create(struct snd_card *card,
2380 struct pci_dev * pci,
2381 unsigned short old_legacy_ctrl,
2382 struct snd_ymfpci ** rchip)
2383 {
2384 struct snd_ymfpci *chip;
2385 int err;
2386 static struct snd_device_ops ops = {
2387 .dev_free = snd_ymfpci_dev_free,
2388 };
2389
2390 *rchip = NULL;
2391
2392 /* enable PCI device */
2393 if ((err = pci_enable_device(pci)) < 0)
2394 return err;
2395
2396 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2397 if (chip == NULL) {
2398 pci_disable_device(pci);
2399 return -ENOMEM;
2400 }
2401 chip->old_legacy_ctrl = old_legacy_ctrl;
2402 spin_lock_init(&chip->reg_lock);
2403 spin_lock_init(&chip->voice_lock);
2404 init_waitqueue_head(&chip->interrupt_sleep);
2405 atomic_set(&chip->interrupt_sleep_count, 0);
2406 chip->card = card;
2407 chip->pci = pci;
2408 chip->irq = -1;
2409 chip->device_id = pci->device;
2410 chip->rev = pci->revision;
2411 chip->reg_area_phys = pci_resource_start(pci, 0);
2412 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2413 pci_set_master(pci);
2414 chip->src441_used = -1;
2415
2416 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2417 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2418 snd_ymfpci_free(chip);
2419 return -EBUSY;
2420 }
2421 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2422 KBUILD_MODNAME, chip)) {
2423 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2424 snd_ymfpci_free(chip);
2425 return -EBUSY;
2426 }
2427 chip->irq = pci->irq;
2428
2429 snd_ymfpci_aclink_reset(pci);
2430 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2431 snd_ymfpci_free(chip);
2432 return -EIO;
2433 }
2434
2435 err = snd_ymfpci_request_firmware(chip);
2436 if (err < 0) {
2437 snd_printk(KERN_ERR "firmware request failed: %d\n", err);
2438 snd_ymfpci_free(chip);
2439 return err;
2440 }
2441 snd_ymfpci_download_image(chip);
2442
2443 udelay(100); /* seems we need a delay after downloading image.. */
2444
2445 if (snd_ymfpci_memalloc(chip) < 0) {
2446 snd_ymfpci_free(chip);
2447 return -EIO;
2448 }
2449
2450 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2451 snd_ymfpci_free(chip);
2452 return err;
2453 }
2454
2455 #ifdef CONFIG_PM_SLEEP
2456 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2457 if (chip->saved_regs == NULL) {
2458 snd_ymfpci_free(chip);
2459 return -ENOMEM;
2460 }
2461 #endif
2462
2463 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2464 snd_ymfpci_free(chip);
2465 return err;
2466 }
2467
2468 snd_ymfpci_proc_init(card, chip);
2469
2470 snd_card_set_dev(card, &pci->dev);
2471
2472 *rchip = chip;
2473 return 0;
2474 }
kernel source for telekom puls (alcatel/mediatek)