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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / ice1712 / ice1712.c
1 /*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 /*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26 */
27
28 /*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50 #include <linux/delay.h>
51 #include <linux/interrupt.h>
52 #include <linux/init.h>
53 #include <linux/pci.h>
54 #include <linux/dma-mapping.h>
55 #include <linux/slab.h>
56 #include <linux/module.h>
57 #include <linux/mutex.h>
58
59 #include <sound/core.h>
60 #include <sound/cs8427.h>
61 #include <sound/info.h>
62 #include <sound/initval.h>
63 #include <sound/tlv.h>
64
65 #include <sound/asoundef.h>
66
67 #include "ice1712.h"
68
69 /* lowlevel routines */
70 #include "delta.h"
71 #include "ews.h"
72 #include "hoontech.h"
73
74 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
75 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76 MODULE_LICENSE("GPL");
77 MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
86 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
87 static char *model[SNDRV_CARDS];
88 static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
89 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
90 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
91
92 module_param_array(index, int, NULL, 0444);
93 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94 module_param_array(id, charp, NULL, 0444);
95 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96 module_param_array(enable, bool, NULL, 0444);
97 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98 module_param_array(omni, bool, NULL, 0444);
99 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100 module_param_array(cs8427_timeout, int, NULL, 0444);
101 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102 module_param_array(model, charp, NULL, 0444);
103 MODULE_PARM_DESC(model, "Use the given board model.");
104 module_param_array(dxr_enable, int, NULL, 0444);
105 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
106
107
108 static DEFINE_PCI_DEVICE_TABLE(snd_ice1712_ids) = {
109 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
110 { 0, }
111 };
112
113 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114
115 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
117
118 static int PRO_RATE_LOCKED;
119 static int PRO_RATE_RESET = 1;
120 static unsigned int PRO_RATE_DEFAULT = 44100;
121
122 /*
123 * Basic I/O
124 */
125
126 /* check whether the clock mode is spdif-in */
127 static inline int is_spdif_master(struct snd_ice1712 *ice)
128 {
129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130 }
131
132 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
133 {
134 return is_spdif_master(ice) || PRO_RATE_LOCKED;
135 }
136
137 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
138 {
139 outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 outl(data, ICEDS(ice, DATA));
141 }
142
143 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
144 {
145 outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 return inl(ICEDS(ice, DATA));
147 }
148
149 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
150 unsigned short reg,
151 unsigned short val)
152 {
153 struct snd_ice1712 *ice = ac97->private_data;
154 int tm;
155 unsigned char old_cmd = 0;
156
157 for (tm = 0; tm < 0x10000; tm++) {
158 old_cmd = inb(ICEREG(ice, AC97_CMD));
159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 continue;
161 if (!(old_cmd & ICE1712_AC97_READY))
162 continue;
163 break;
164 }
165 outb(reg, ICEREG(ice, AC97_INDEX));
166 outw(val, ICEREG(ice, AC97_DATA));
167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 for (tm = 0; tm < 0x10000; tm++)
170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 break;
172 }
173
174 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
175 unsigned short reg)
176 {
177 struct snd_ice1712 *ice = ac97->private_data;
178 int tm;
179 unsigned char old_cmd = 0;
180
181 for (tm = 0; tm < 0x10000; tm++) {
182 old_cmd = inb(ICEREG(ice, AC97_CMD));
183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 continue;
185 if (!(old_cmd & ICE1712_AC97_READY))
186 continue;
187 break;
188 }
189 outb(reg, ICEREG(ice, AC97_INDEX));
190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 for (tm = 0; tm < 0x10000; tm++)
192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 break;
194 if (tm >= 0x10000) /* timeout */
195 return ~0;
196 return inw(ICEREG(ice, AC97_DATA));
197 }
198
199 /*
200 * pro ac97 section
201 */
202
203 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
204 unsigned short reg,
205 unsigned short val)
206 {
207 struct snd_ice1712 *ice = ac97->private_data;
208 int tm;
209 unsigned char old_cmd = 0;
210
211 for (tm = 0; tm < 0x10000; tm++) {
212 old_cmd = inb(ICEMT(ice, AC97_CMD));
213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 continue;
215 if (!(old_cmd & ICE1712_AC97_READY))
216 continue;
217 break;
218 }
219 outb(reg, ICEMT(ice, AC97_INDEX));
220 outw(val, ICEMT(ice, AC97_DATA));
221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 for (tm = 0; tm < 0x10000; tm++)
224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 break;
226 }
227
228
229 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
230 unsigned short reg)
231 {
232 struct snd_ice1712 *ice = ac97->private_data;
233 int tm;
234 unsigned char old_cmd = 0;
235
236 for (tm = 0; tm < 0x10000; tm++) {
237 old_cmd = inb(ICEMT(ice, AC97_CMD));
238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 continue;
240 if (!(old_cmd & ICE1712_AC97_READY))
241 continue;
242 break;
243 }
244 outb(reg, ICEMT(ice, AC97_INDEX));
245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 for (tm = 0; tm < 0x10000; tm++)
247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 break;
249 if (tm >= 0x10000) /* timeout */
250 return ~0;
251 return inw(ICEMT(ice, AC97_DATA));
252 }
253
254 /*
255 * consumer ac97 digital mix
256 */
257 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
258
259 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
260 {
261 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
262
263 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
264 return 0;
265 }
266
267 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
268 {
269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
270 unsigned char val, nval;
271
272 spin_lock_irq(&ice->reg_lock);
273 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
274 nval = val & ~ICE1712_ROUTE_AC97;
275 if (ucontrol->value.integer.value[0])
276 nval |= ICE1712_ROUTE_AC97;
277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
278 spin_unlock_irq(&ice->reg_lock);
279 return val != nval;
280 }
281
282 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284 .name = "Digital Mixer To AC97",
285 .info = snd_ice1712_digmix_route_ac97_info,
286 .get = snd_ice1712_digmix_route_ac97_get,
287 .put = snd_ice1712_digmix_route_ac97_put,
288 };
289
290
291 /*
292 * gpio operations
293 */
294 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
295 {
296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
298 }
299
300 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
301 {
302 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
303 }
304
305 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
306 {
307 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
308 }
309
310 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
311 {
312 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
313 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
314 }
315
316 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
317 {
318 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
319 }
320
321 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
322 {
323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
324 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
325 }
326
327 /*
328 *
329 * CS8427 interface
330 *
331 */
332
333 /*
334 * change the input clock selection
335 * spdif_clock = 1 - IEC958 input, 0 - Envy24
336 */
337 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
338 {
339 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
340 unsigned char val, nval;
341 int res = 0;
342
343 snd_i2c_lock(ice->i2c);
344 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
345 snd_i2c_unlock(ice->i2c);
346 return -EIO;
347 }
348 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
349 snd_i2c_unlock(ice->i2c);
350 return -EIO;
351 }
352 nval = val & 0xf0;
353 if (spdif_clock)
354 nval |= 0x01;
355 else
356 nval |= 0x04;
357 if (val != nval) {
358 reg[1] = nval;
359 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
360 res = -EIO;
361 } else {
362 res++;
363 }
364 }
365 snd_i2c_unlock(ice->i2c);
366 return res;
367 }
368
369 /*
370 * spdif callbacks
371 */
372 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
373 {
374 snd_cs8427_iec958_active(ice->cs8427, 1);
375 }
376
377 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
378 {
379 snd_cs8427_iec958_active(ice->cs8427, 0);
380 }
381
382 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
383 {
384 snd_cs8427_iec958_pcm(ice->cs8427, rate);
385 }
386
387 /*
388 * create and initialize callbacks for cs8427 interface
389 */
390 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
391 {
392 int err;
393
394 err = snd_cs8427_create(ice->i2c, addr,
395 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
396 if (err < 0) {
397 snd_printk(KERN_ERR "CS8427 initialization failed\n");
398 return err;
399 }
400 ice->spdif.ops.open = open_cs8427;
401 ice->spdif.ops.close = close_cs8427;
402 ice->spdif.ops.setup_rate = setup_cs8427;
403 return 0;
404 }
405
406 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
407 {
408 /* change CS8427 clock source too */
409 if (ice->cs8427)
410 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
411 /* notify ak4524 chip as well */
412 if (spdif_is_master) {
413 unsigned int i;
414 for (i = 0; i < ice->akm_codecs; i++) {
415 if (ice->akm[i].ops.set_rate_val)
416 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
417 }
418 }
419 }
420
421 /*
422 * Interrupt handler
423 */
424
425 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
426 {
427 struct snd_ice1712 *ice = dev_id;
428 unsigned char status;
429 int handled = 0;
430
431 while (1) {
432 status = inb(ICEREG(ice, IRQSTAT));
433 if (status == 0)
434 break;
435 handled = 1;
436 if (status & ICE1712_IRQ_MPU1) {
437 if (ice->rmidi[0])
438 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
439 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
440 status &= ~ICE1712_IRQ_MPU1;
441 }
442 if (status & ICE1712_IRQ_TIMER)
443 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
444 if (status & ICE1712_IRQ_MPU2) {
445 if (ice->rmidi[1])
446 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
447 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
448 status &= ~ICE1712_IRQ_MPU2;
449 }
450 if (status & ICE1712_IRQ_PROPCM) {
451 unsigned char mtstat = inb(ICEMT(ice, IRQ));
452 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
453 if (ice->playback_pro_substream)
454 snd_pcm_period_elapsed(ice->playback_pro_substream);
455 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
456 }
457 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
458 if (ice->capture_pro_substream)
459 snd_pcm_period_elapsed(ice->capture_pro_substream);
460 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
461 }
462 }
463 if (status & ICE1712_IRQ_FM)
464 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
465 if (status & ICE1712_IRQ_PBKDS) {
466 u32 idx;
467 u16 pbkstatus;
468 struct snd_pcm_substream *substream;
469 pbkstatus = inw(ICEDS(ice, INTSTAT));
470 /* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
471 for (idx = 0; idx < 6; idx++) {
472 if ((pbkstatus & (3 << (idx * 2))) == 0)
473 continue;
474 substream = ice->playback_con_substream_ds[idx];
475 if (substream != NULL)
476 snd_pcm_period_elapsed(substream);
477 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
478 }
479 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
480 }
481 if (status & ICE1712_IRQ_CONCAP) {
482 if (ice->capture_con_substream)
483 snd_pcm_period_elapsed(ice->capture_con_substream);
484 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
485 }
486 if (status & ICE1712_IRQ_CONPBK) {
487 if (ice->playback_con_substream)
488 snd_pcm_period_elapsed(ice->playback_con_substream);
489 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
490 }
491 }
492 return IRQ_RETVAL(handled);
493 }
494
495
496 /*
497 * PCM part - misc
498 */
499
500 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
501 struct snd_pcm_hw_params *hw_params)
502 {
503 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
504 }
505
506 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
507 {
508 return snd_pcm_lib_free_pages(substream);
509 }
510
511 /*
512 * PCM part - consumer I/O
513 */
514
515 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
516 int cmd)
517 {
518 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
519 int result = 0;
520 u32 tmp;
521
522 spin_lock(&ice->reg_lock);
523 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
524 if (cmd == SNDRV_PCM_TRIGGER_START) {
525 tmp |= 1;
526 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
527 tmp &= ~1;
528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
529 tmp |= 2;
530 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
531 tmp &= ~2;
532 } else {
533 result = -EINVAL;
534 }
535 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
536 spin_unlock(&ice->reg_lock);
537 return result;
538 }
539
540 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
541 int cmd)
542 {
543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
544 int result = 0;
545 u32 tmp;
546
547 spin_lock(&ice->reg_lock);
548 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
549 if (cmd == SNDRV_PCM_TRIGGER_START) {
550 tmp |= 1;
551 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
552 tmp &= ~1;
553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
554 tmp |= 2;
555 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
556 tmp &= ~2;
557 } else {
558 result = -EINVAL;
559 }
560 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
561 spin_unlock(&ice->reg_lock);
562 return result;
563 }
564
565 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
566 int cmd)
567 {
568 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
569 int result = 0;
570 u8 tmp;
571
572 spin_lock(&ice->reg_lock);
573 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
574 if (cmd == SNDRV_PCM_TRIGGER_START) {
575 tmp |= 1;
576 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
577 tmp &= ~1;
578 } else {
579 result = -EINVAL;
580 }
581 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
582 spin_unlock(&ice->reg_lock);
583 return result;
584 }
585
586 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
587 {
588 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
589 struct snd_pcm_runtime *runtime = substream->runtime;
590 u32 period_size, buf_size, rate, tmp;
591
592 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
593 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
594 tmp = 0x0000;
595 if (snd_pcm_format_width(runtime->format) == 16)
596 tmp |= 0x10;
597 if (runtime->channels == 2)
598 tmp |= 0x08;
599 rate = (runtime->rate * 8192) / 375;
600 if (rate > 0x000fffff)
601 rate = 0x000fffff;
602 spin_lock_irq(&ice->reg_lock);
603 outb(0, ice->ddma_port + 15);
604 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
605 outl(runtime->dma_addr, ice->ddma_port + 0);
606 outw(buf_size, ice->ddma_port + 4);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
613 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
614 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
615 spin_unlock_irq(&ice->reg_lock);
616 return 0;
617 }
618
619 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
620 {
621 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
622 struct snd_pcm_runtime *runtime = substream->runtime;
623 u32 period_size, buf_size, rate, tmp, chn;
624
625 period_size = snd_pcm_lib_period_bytes(substream) - 1;
626 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
627 tmp = 0x0064;
628 if (snd_pcm_format_width(runtime->format) == 16)
629 tmp &= ~0x04;
630 if (runtime->channels == 2)
631 tmp |= 0x08;
632 rate = (runtime->rate * 8192) / 375;
633 if (rate > 0x000fffff)
634 rate = 0x000fffff;
635 ice->playback_con_active_buf[substream->number] = 0;
636 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
637 chn = substream->number * 2;
638 spin_lock_irq(&ice->reg_lock);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
645 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
646 if (runtime->channels == 2) {
647 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
648 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
649 }
650 spin_unlock_irq(&ice->reg_lock);
651 return 0;
652 }
653
654 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
655 {
656 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
657 struct snd_pcm_runtime *runtime = substream->runtime;
658 u32 period_size, buf_size;
659 u8 tmp;
660
661 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
662 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
663 tmp = 0x06;
664 if (snd_pcm_format_width(runtime->format) == 16)
665 tmp &= ~0x04;
666 if (runtime->channels == 2)
667 tmp &= ~0x02;
668 spin_lock_irq(&ice->reg_lock);
669 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
670 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
671 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
672 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
673 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
674 spin_unlock_irq(&ice->reg_lock);
675 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
676 return 0;
677 }
678
679 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
680 {
681 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
682 struct snd_pcm_runtime *runtime = substream->runtime;
683 size_t ptr;
684
685 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
686 return 0;
687 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
688 ptr = bytes_to_frames(substream->runtime, ptr);
689 if (ptr == runtime->buffer_size)
690 ptr = 0;
691 return ptr;
692 }
693
694 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
695 {
696 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
697 u8 addr;
698 size_t ptr;
699
700 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
701 return 0;
702 if (ice->playback_con_active_buf[substream->number])
703 addr = ICE1712_DSC_ADDR1;
704 else
705 addr = ICE1712_DSC_ADDR0;
706 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
707 ice->playback_con_virt_addr[substream->number];
708 ptr = bytes_to_frames(substream->runtime, ptr);
709 if (ptr == substream->runtime->buffer_size)
710 ptr = 0;
711 return ptr;
712 }
713
714 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
715 {
716 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
717 size_t ptr;
718
719 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
720 return 0;
721 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
722 ptr = bytes_to_frames(substream->runtime, ptr);
723 if (ptr == substream->runtime->buffer_size)
724 ptr = 0;
725 return ptr;
726 }
727
728 static const struct snd_pcm_hardware snd_ice1712_playback = {
729 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
730 SNDRV_PCM_INFO_BLOCK_TRANSFER |
731 SNDRV_PCM_INFO_MMAP_VALID |
732 SNDRV_PCM_INFO_PAUSE),
733 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
734 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
735 .rate_min = 4000,
736 .rate_max = 48000,
737 .channels_min = 1,
738 .channels_max = 2,
739 .buffer_bytes_max = (64*1024),
740 .period_bytes_min = 64,
741 .period_bytes_max = (64*1024),
742 .periods_min = 1,
743 .periods_max = 1024,
744 .fifo_size = 0,
745 };
746
747 static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
748 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
749 SNDRV_PCM_INFO_BLOCK_TRANSFER |
750 SNDRV_PCM_INFO_MMAP_VALID |
751 SNDRV_PCM_INFO_PAUSE),
752 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
753 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
754 .rate_min = 4000,
755 .rate_max = 48000,
756 .channels_min = 1,
757 .channels_max = 2,
758 .buffer_bytes_max = (128*1024),
759 .period_bytes_min = 64,
760 .period_bytes_max = (128*1024),
761 .periods_min = 2,
762 .periods_max = 2,
763 .fifo_size = 0,
764 };
765
766 static const struct snd_pcm_hardware snd_ice1712_capture = {
767 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
768 SNDRV_PCM_INFO_BLOCK_TRANSFER |
769 SNDRV_PCM_INFO_MMAP_VALID),
770 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
771 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
772 .rate_min = 4000,
773 .rate_max = 48000,
774 .channels_min = 1,
775 .channels_max = 2,
776 .buffer_bytes_max = (64*1024),
777 .period_bytes_min = 64,
778 .period_bytes_max = (64*1024),
779 .periods_min = 1,
780 .periods_max = 1024,
781 .fifo_size = 0,
782 };
783
784 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
785 {
786 struct snd_pcm_runtime *runtime = substream->runtime;
787 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
788
789 ice->playback_con_substream = substream;
790 runtime->hw = snd_ice1712_playback;
791 return 0;
792 }
793
794 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
795 {
796 struct snd_pcm_runtime *runtime = substream->runtime;
797 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
798 u32 tmp;
799
800 ice->playback_con_substream_ds[substream->number] = substream;
801 runtime->hw = snd_ice1712_playback_ds;
802 spin_lock_irq(&ice->reg_lock);
803 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
804 outw(tmp, ICEDS(ice, INTMASK));
805 spin_unlock_irq(&ice->reg_lock);
806 return 0;
807 }
808
809 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
810 {
811 struct snd_pcm_runtime *runtime = substream->runtime;
812 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
813
814 ice->capture_con_substream = substream;
815 runtime->hw = snd_ice1712_capture;
816 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
817 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
818 runtime->hw.rate_min = 48000;
819 return 0;
820 }
821
822 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
823 {
824 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
825
826 ice->playback_con_substream = NULL;
827 return 0;
828 }
829
830 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
831 {
832 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
833 u32 tmp;
834
835 spin_lock_irq(&ice->reg_lock);
836 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
837 outw(tmp, ICEDS(ice, INTMASK));
838 spin_unlock_irq(&ice->reg_lock);
839 ice->playback_con_substream_ds[substream->number] = NULL;
840 return 0;
841 }
842
843 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
844 {
845 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
846
847 ice->capture_con_substream = NULL;
848 return 0;
849 }
850
851 static struct snd_pcm_ops snd_ice1712_playback_ops = {
852 .open = snd_ice1712_playback_open,
853 .close = snd_ice1712_playback_close,
854 .ioctl = snd_pcm_lib_ioctl,
855 .hw_params = snd_ice1712_hw_params,
856 .hw_free = snd_ice1712_hw_free,
857 .prepare = snd_ice1712_playback_prepare,
858 .trigger = snd_ice1712_playback_trigger,
859 .pointer = snd_ice1712_playback_pointer,
860 };
861
862 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
863 .open = snd_ice1712_playback_ds_open,
864 .close = snd_ice1712_playback_ds_close,
865 .ioctl = snd_pcm_lib_ioctl,
866 .hw_params = snd_ice1712_hw_params,
867 .hw_free = snd_ice1712_hw_free,
868 .prepare = snd_ice1712_playback_ds_prepare,
869 .trigger = snd_ice1712_playback_ds_trigger,
870 .pointer = snd_ice1712_playback_ds_pointer,
871 };
872
873 static struct snd_pcm_ops snd_ice1712_capture_ops = {
874 .open = snd_ice1712_capture_open,
875 .close = snd_ice1712_capture_close,
876 .ioctl = snd_pcm_lib_ioctl,
877 .hw_params = snd_ice1712_hw_params,
878 .hw_free = snd_ice1712_hw_free,
879 .prepare = snd_ice1712_capture_prepare,
880 .trigger = snd_ice1712_capture_trigger,
881 .pointer = snd_ice1712_capture_pointer,
882 };
883
884 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
885 {
886 struct snd_pcm *pcm;
887 int err;
888
889 if (rpcm)
890 *rpcm = NULL;
891 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
892 if (err < 0)
893 return err;
894
895 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
896 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
897
898 pcm->private_data = ice;
899 pcm->info_flags = 0;
900 strcpy(pcm->name, "ICE1712 consumer");
901 ice->pcm = pcm;
902
903 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
904 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
905
906 if (rpcm)
907 *rpcm = pcm;
908
909 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
910
911 return 0;
912 }
913
914 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
915 {
916 struct snd_pcm *pcm;
917 int err;
918
919 if (rpcm)
920 *rpcm = NULL;
921 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
922 if (err < 0)
923 return err;
924
925 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
926
927 pcm->private_data = ice;
928 pcm->info_flags = 0;
929 strcpy(pcm->name, "ICE1712 consumer (DS)");
930 ice->pcm_ds = pcm;
931
932 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
933 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
934
935 if (rpcm)
936 *rpcm = pcm;
937
938 return 0;
939 }
940
941 /*
942 * PCM code - professional part (multitrack)
943 */
944
945 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
946 32000, 44100, 48000, 64000, 88200, 96000 };
947
948 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
949 .count = ARRAY_SIZE(rates),
950 .list = rates,
951 .mask = 0,
952 };
953
954 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
955 int cmd)
956 {
957 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
958 switch (cmd) {
959 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
960 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
961 {
962 unsigned int what;
963 unsigned int old;
964 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
965 return -EINVAL;
966 what = ICE1712_PLAYBACK_PAUSE;
967 snd_pcm_trigger_done(substream, substream);
968 spin_lock(&ice->reg_lock);
969 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
970 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
971 old |= what;
972 else
973 old &= ~what;
974 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
975 spin_unlock(&ice->reg_lock);
976 break;
977 }
978 case SNDRV_PCM_TRIGGER_START:
979 case SNDRV_PCM_TRIGGER_STOP:
980 {
981 unsigned int what = 0;
982 unsigned int old;
983 struct snd_pcm_substream *s;
984
985 snd_pcm_group_for_each_entry(s, substream) {
986 if (s == ice->playback_pro_substream) {
987 what |= ICE1712_PLAYBACK_START;
988 snd_pcm_trigger_done(s, substream);
989 } else if (s == ice->capture_pro_substream) {
990 what |= ICE1712_CAPTURE_START_SHADOW;
991 snd_pcm_trigger_done(s, substream);
992 }
993 }
994 spin_lock(&ice->reg_lock);
995 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
996 if (cmd == SNDRV_PCM_TRIGGER_START)
997 old |= what;
998 else
999 old &= ~what;
1000 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
1001 spin_unlock(&ice->reg_lock);
1002 break;
1003 }
1004 default:
1005 return -EINVAL;
1006 }
1007 return 0;
1008 }
1009
1010 /*
1011 */
1012 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1013 {
1014 unsigned long flags;
1015 unsigned char val, old;
1016 unsigned int i;
1017
1018 switch (rate) {
1019 case 8000: val = 6; break;
1020 case 9600: val = 3; break;
1021 case 11025: val = 10; break;
1022 case 12000: val = 2; break;
1023 case 16000: val = 5; break;
1024 case 22050: val = 9; break;
1025 case 24000: val = 1; break;
1026 case 32000: val = 4; break;
1027 case 44100: val = 8; break;
1028 case 48000: val = 0; break;
1029 case 64000: val = 15; break;
1030 case 88200: val = 11; break;
1031 case 96000: val = 7; break;
1032 default:
1033 snd_BUG();
1034 val = 0;
1035 rate = 48000;
1036 break;
1037 }
1038
1039 spin_lock_irqsave(&ice->reg_lock, flags);
1040 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1041 ICE1712_PLAYBACK_PAUSE|
1042 ICE1712_PLAYBACK_START)) {
1043 __out:
1044 spin_unlock_irqrestore(&ice->reg_lock, flags);
1045 return;
1046 }
1047 if (!force && is_pro_rate_locked(ice))
1048 goto __out;
1049
1050 old = inb(ICEMT(ice, RATE));
1051 if (!force && old == val)
1052 goto __out;
1053 outb(val, ICEMT(ice, RATE));
1054 spin_unlock_irqrestore(&ice->reg_lock, flags);
1055
1056 if (ice->gpio.set_pro_rate)
1057 ice->gpio.set_pro_rate(ice, rate);
1058 for (i = 0; i < ice->akm_codecs; i++) {
1059 if (ice->akm[i].ops.set_rate_val)
1060 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1061 }
1062 if (ice->spdif.ops.setup_rate)
1063 ice->spdif.ops.setup_rate(ice, rate);
1064 }
1065
1066 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1067 {
1068 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1069
1070 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1071 spin_lock_irq(&ice->reg_lock);
1072 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1073 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1074 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1075 spin_unlock_irq(&ice->reg_lock);
1076
1077 return 0;
1078 }
1079
1080 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1081 struct snd_pcm_hw_params *hw_params)
1082 {
1083 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1084
1085 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1086 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1087 }
1088
1089 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1090 {
1091 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1092
1093 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1094 spin_lock_irq(&ice->reg_lock);
1095 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1096 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1097 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1098 spin_unlock_irq(&ice->reg_lock);
1099 return 0;
1100 }
1101
1102 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1103 struct snd_pcm_hw_params *hw_params)
1104 {
1105 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1106
1107 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1108 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1109 }
1110
1111 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1112 {
1113 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1114 size_t ptr;
1115
1116 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1117 return 0;
1118 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1119 ptr = bytes_to_frames(substream->runtime, ptr);
1120 if (ptr == substream->runtime->buffer_size)
1121 ptr = 0;
1122 return ptr;
1123 }
1124
1125 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1126 {
1127 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1128 size_t ptr;
1129
1130 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1131 return 0;
1132 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1133 ptr = bytes_to_frames(substream->runtime, ptr);
1134 if (ptr == substream->runtime->buffer_size)
1135 ptr = 0;
1136 return ptr;
1137 }
1138
1139 static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1140 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1141 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1142 SNDRV_PCM_INFO_MMAP_VALID |
1143 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1144 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1145 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1146 .rate_min = 4000,
1147 .rate_max = 96000,
1148 .channels_min = 10,
1149 .channels_max = 10,
1150 .buffer_bytes_max = (256*1024),
1151 .period_bytes_min = 10 * 4 * 2,
1152 .period_bytes_max = 131040,
1153 .periods_min = 1,
1154 .periods_max = 1024,
1155 .fifo_size = 0,
1156 };
1157
1158 static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1159 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1160 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1161 SNDRV_PCM_INFO_MMAP_VALID |
1162 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1163 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1164 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1165 .rate_min = 4000,
1166 .rate_max = 96000,
1167 .channels_min = 12,
1168 .channels_max = 12,
1169 .buffer_bytes_max = (256*1024),
1170 .period_bytes_min = 12 * 4 * 2,
1171 .period_bytes_max = 131040,
1172 .periods_min = 1,
1173 .periods_max = 1024,
1174 .fifo_size = 0,
1175 };
1176
1177 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1178 {
1179 struct snd_pcm_runtime *runtime = substream->runtime;
1180 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1181
1182 ice->playback_pro_substream = substream;
1183 runtime->hw = snd_ice1712_playback_pro;
1184 snd_pcm_set_sync(substream);
1185 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1186 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1187 if (is_pro_rate_locked(ice)) {
1188 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1189 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1190 }
1191
1192 if (ice->spdif.ops.open)
1193 ice->spdif.ops.open(ice, substream);
1194
1195 return 0;
1196 }
1197
1198 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1199 {
1200 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1201 struct snd_pcm_runtime *runtime = substream->runtime;
1202
1203 ice->capture_pro_substream = substream;
1204 runtime->hw = snd_ice1712_capture_pro;
1205 snd_pcm_set_sync(substream);
1206 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1207 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1208 if (is_pro_rate_locked(ice)) {
1209 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1210 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1211 }
1212
1213 return 0;
1214 }
1215
1216 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1217 {
1218 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1219
1220 if (PRO_RATE_RESET)
1221 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1222 ice->playback_pro_substream = NULL;
1223 if (ice->spdif.ops.close)
1224 ice->spdif.ops.close(ice, substream);
1225
1226 return 0;
1227 }
1228
1229 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1230 {
1231 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1232
1233 if (PRO_RATE_RESET)
1234 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1235 ice->capture_pro_substream = NULL;
1236 return 0;
1237 }
1238
1239 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1240 .open = snd_ice1712_playback_pro_open,
1241 .close = snd_ice1712_playback_pro_close,
1242 .ioctl = snd_pcm_lib_ioctl,
1243 .hw_params = snd_ice1712_playback_pro_hw_params,
1244 .hw_free = snd_ice1712_hw_free,
1245 .prepare = snd_ice1712_playback_pro_prepare,
1246 .trigger = snd_ice1712_pro_trigger,
1247 .pointer = snd_ice1712_playback_pro_pointer,
1248 };
1249
1250 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1251 .open = snd_ice1712_capture_pro_open,
1252 .close = snd_ice1712_capture_pro_close,
1253 .ioctl = snd_pcm_lib_ioctl,
1254 .hw_params = snd_ice1712_capture_pro_hw_params,
1255 .hw_free = snd_ice1712_hw_free,
1256 .prepare = snd_ice1712_capture_pro_prepare,
1257 .trigger = snd_ice1712_pro_trigger,
1258 .pointer = snd_ice1712_capture_pro_pointer,
1259 };
1260
1261 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1262 {
1263 struct snd_pcm *pcm;
1264 int err;
1265
1266 if (rpcm)
1267 *rpcm = NULL;
1268 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1269 if (err < 0)
1270 return err;
1271
1272 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1273 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1274
1275 pcm->private_data = ice;
1276 pcm->info_flags = 0;
1277 strcpy(pcm->name, "ICE1712 multi");
1278
1279 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1280 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1281
1282 ice->pcm_pro = pcm;
1283 if (rpcm)
1284 *rpcm = pcm;
1285
1286 if (ice->cs8427) {
1287 /* assign channels to iec958 */
1288 err = snd_cs8427_iec958_build(ice->cs8427,
1289 pcm->streams[0].substream,
1290 pcm->streams[1].substream);
1291 if (err < 0)
1292 return err;
1293 }
1294
1295 err = snd_ice1712_build_pro_mixer(ice);
1296 if (err < 0)
1297 return err;
1298 return 0;
1299 }
1300
1301 /*
1302 * Mixer section
1303 */
1304
1305 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1306 {
1307 unsigned int vol = ice->pro_volumes[index];
1308 unsigned short val = 0;
1309
1310 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1311 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1312 outb(index, ICEMT(ice, MONITOR_INDEX));
1313 outw(val, ICEMT(ice, MONITOR_VOLUME));
1314 }
1315
1316 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1317
1318 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1319 {
1320 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1321 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1322 kcontrol->private_value;
1323
1324 spin_lock_irq(&ice->reg_lock);
1325 ucontrol->value.integer.value[0] =
1326 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1327 ucontrol->value.integer.value[1] =
1328 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1329 spin_unlock_irq(&ice->reg_lock);
1330 return 0;
1331 }
1332
1333 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1334 {
1335 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1336 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1337 kcontrol->private_value;
1338 unsigned int nval, change;
1339
1340 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1341 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1342 spin_lock_irq(&ice->reg_lock);
1343 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1344 change = nval != ice->pro_volumes[priv_idx];
1345 ice->pro_volumes[priv_idx] = nval;
1346 snd_ice1712_update_volume(ice, priv_idx);
1347 spin_unlock_irq(&ice->reg_lock);
1348 return change;
1349 }
1350
1351 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1352 {
1353 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1354 uinfo->count = 2;
1355 uinfo->value.integer.min = 0;
1356 uinfo->value.integer.max = 96;
1357 return 0;
1358 }
1359
1360 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1361 {
1362 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1363 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1364 kcontrol->private_value;
1365
1366 spin_lock_irq(&ice->reg_lock);
1367 ucontrol->value.integer.value[0] =
1368 (ice->pro_volumes[priv_idx] >> 0) & 127;
1369 ucontrol->value.integer.value[1] =
1370 (ice->pro_volumes[priv_idx] >> 16) & 127;
1371 spin_unlock_irq(&ice->reg_lock);
1372 return 0;
1373 }
1374
1375 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1376 {
1377 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1378 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1379 kcontrol->private_value;
1380 unsigned int nval, change;
1381
1382 nval = (ucontrol->value.integer.value[0] & 127) |
1383 ((ucontrol->value.integer.value[1] & 127) << 16);
1384 spin_lock_irq(&ice->reg_lock);
1385 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1386 change = nval != ice->pro_volumes[priv_idx];
1387 ice->pro_volumes[priv_idx] = nval;
1388 snd_ice1712_update_volume(ice, priv_idx);
1389 spin_unlock_irq(&ice->reg_lock);
1390 return change;
1391 }
1392
1393 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1394
1395 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1396 {
1397 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1398 .name = "Multi Playback Switch",
1399 .info = snd_ice1712_pro_mixer_switch_info,
1400 .get = snd_ice1712_pro_mixer_switch_get,
1401 .put = snd_ice1712_pro_mixer_switch_put,
1402 .private_value = 0,
1403 .count = 10,
1404 },
1405 {
1406 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1407 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1408 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1409 .name = "Multi Playback Volume",
1410 .info = snd_ice1712_pro_mixer_volume_info,
1411 .get = snd_ice1712_pro_mixer_volume_get,
1412 .put = snd_ice1712_pro_mixer_volume_put,
1413 .private_value = 0,
1414 .count = 10,
1415 .tlv = { .p = db_scale_playback }
1416 },
1417 };
1418
1419 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1420 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1421 .name = "H/W Multi Capture Switch",
1422 .info = snd_ice1712_pro_mixer_switch_info,
1423 .get = snd_ice1712_pro_mixer_switch_get,
1424 .put = snd_ice1712_pro_mixer_switch_put,
1425 .private_value = 10,
1426 };
1427
1428 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1429 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1430 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1431 .info = snd_ice1712_pro_mixer_switch_info,
1432 .get = snd_ice1712_pro_mixer_switch_get,
1433 .put = snd_ice1712_pro_mixer_switch_put,
1434 .private_value = 18,
1435 .count = 2,
1436 };
1437
1438 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1439 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1440 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1441 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1442 .name = "H/W Multi Capture Volume",
1443 .info = snd_ice1712_pro_mixer_volume_info,
1444 .get = snd_ice1712_pro_mixer_volume_get,
1445 .put = snd_ice1712_pro_mixer_volume_put,
1446 .private_value = 10,
1447 .tlv = { .p = db_scale_playback }
1448 };
1449
1450 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1451 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1452 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1453 .info = snd_ice1712_pro_mixer_volume_info,
1454 .get = snd_ice1712_pro_mixer_volume_get,
1455 .put = snd_ice1712_pro_mixer_volume_put,
1456 .private_value = 18,
1457 .count = 2,
1458 };
1459
1460 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1461 {
1462 struct snd_card *card = ice->card;
1463 unsigned int idx;
1464 int err;
1465
1466 /* multi-channel mixer */
1467 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1468 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1469 if (err < 0)
1470 return err;
1471 }
1472
1473 if (ice->num_total_adcs > 0) {
1474 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1475 tmp.count = ice->num_total_adcs;
1476 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1477 if (err < 0)
1478 return err;
1479 }
1480
1481 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1482 if (err < 0)
1483 return err;
1484
1485 if (ice->num_total_adcs > 0) {
1486 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1487 tmp.count = ice->num_total_adcs;
1488 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1489 if (err < 0)
1490 return err;
1491 }
1492
1493 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1494 if (err < 0)
1495 return err;
1496
1497 /* initialize volumes */
1498 for (idx = 0; idx < 10; idx++) {
1499 ice->pro_volumes[idx] = 0x80008000; /* mute */
1500 snd_ice1712_update_volume(ice, idx);
1501 }
1502 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1503 ice->pro_volumes[idx] = 0x80008000; /* mute */
1504 snd_ice1712_update_volume(ice, idx);
1505 }
1506 for (idx = 18; idx < 20; idx++) {
1507 ice->pro_volumes[idx] = 0x80008000; /* mute */
1508 snd_ice1712_update_volume(ice, idx);
1509 }
1510 return 0;
1511 }
1512
1513 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1514 {
1515 struct snd_ice1712 *ice = ac97->private_data;
1516 ice->ac97 = NULL;
1517 }
1518
1519 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1520 {
1521 int err, bus_num = 0;
1522 struct snd_ac97_template ac97;
1523 struct snd_ac97_bus *pbus;
1524 static struct snd_ac97_bus_ops con_ops = {
1525 .write = snd_ice1712_ac97_write,
1526 .read = snd_ice1712_ac97_read,
1527 };
1528 static struct snd_ac97_bus_ops pro_ops = {
1529 .write = snd_ice1712_pro_ac97_write,
1530 .read = snd_ice1712_pro_ac97_read,
1531 };
1532
1533 if (ice_has_con_ac97(ice)) {
1534 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1535 if (err < 0)
1536 return err;
1537 memset(&ac97, 0, sizeof(ac97));
1538 ac97.private_data = ice;
1539 ac97.private_free = snd_ice1712_mixer_free_ac97;
1540 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1541 if (err < 0)
1542 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1543 else {
1544 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1545 if (err < 0)
1546 return err;
1547 return 0;
1548 }
1549 }
1550
1551 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1552 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1553 if (err < 0)
1554 return err;
1555 memset(&ac97, 0, sizeof(ac97));
1556 ac97.private_data = ice;
1557 ac97.private_free = snd_ice1712_mixer_free_ac97;
1558 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1559 if (err < 0)
1560 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1561 else
1562 return 0;
1563 }
1564 /* I2S mixer only */
1565 strcat(ice->card->mixername, "ICE1712 - multitrack");
1566 return 0;
1567 }
1568
1569 /*
1570 *
1571 */
1572
1573 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1574 {
1575 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1576 }
1577
1578 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1579 struct snd_info_buffer *buffer)
1580 {
1581 struct snd_ice1712 *ice = entry->private_data;
1582 unsigned int idx;
1583
1584 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1585 snd_iprintf(buffer, "EEPROM:\n");
1586
1587 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1588 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1589 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1590 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1591 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1592 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1593 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1594 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1595 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1596 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1597 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1598 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1599 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1600 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1601 for (idx = 0; idx < 4; idx++)
1602 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1603 for (idx = 0; idx < 4; idx++)
1604 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1605 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1606 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1607
1608 snd_iprintf(buffer, "\nRegisters:\n");
1609 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1610 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1611 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1612 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1613 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1614 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1615 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1616 }
1617
1618 static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1619 {
1620 struct snd_info_entry *entry;
1621
1622 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
1623 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1624 }
1625
1626 /*
1627 *
1628 */
1629
1630 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_info *uinfo)
1632 {
1633 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1634 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1635 return 0;
1636 }
1637
1638 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1639 struct snd_ctl_elem_value *ucontrol)
1640 {
1641 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1642
1643 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1644 return 0;
1645 }
1646
1647 static struct snd_kcontrol_new snd_ice1712_eeprom = {
1648 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1649 .name = "ICE1712 EEPROM",
1650 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1651 .info = snd_ice1712_eeprom_info,
1652 .get = snd_ice1712_eeprom_get
1653 };
1654
1655 /*
1656 */
1657 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1658 struct snd_ctl_elem_info *uinfo)
1659 {
1660 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1661 uinfo->count = 1;
1662 return 0;
1663 }
1664
1665 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1666 struct snd_ctl_elem_value *ucontrol)
1667 {
1668 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1669 if (ice->spdif.ops.default_get)
1670 ice->spdif.ops.default_get(ice, ucontrol);
1671 return 0;
1672 }
1673
1674 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1675 struct snd_ctl_elem_value *ucontrol)
1676 {
1677 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1678 if (ice->spdif.ops.default_put)
1679 return ice->spdif.ops.default_put(ice, ucontrol);
1680 return 0;
1681 }
1682
1683 static struct snd_kcontrol_new snd_ice1712_spdif_default =
1684 {
1685 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1686 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1687 .info = snd_ice1712_spdif_info,
1688 .get = snd_ice1712_spdif_default_get,
1689 .put = snd_ice1712_spdif_default_put
1690 };
1691
1692 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1693 struct snd_ctl_elem_value *ucontrol)
1694 {
1695 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1696 if (ice->spdif.ops.default_get) {
1697 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1698 IEC958_AES0_PROFESSIONAL |
1699 IEC958_AES0_CON_NOT_COPYRIGHT |
1700 IEC958_AES0_CON_EMPHASIS;
1701 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1702 IEC958_AES1_CON_CATEGORY;
1703 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1704 } else {
1705 ucontrol->value.iec958.status[0] = 0xff;
1706 ucontrol->value.iec958.status[1] = 0xff;
1707 ucontrol->value.iec958.status[2] = 0xff;
1708 ucontrol->value.iec958.status[3] = 0xff;
1709 ucontrol->value.iec958.status[4] = 0xff;
1710 }
1711 return 0;
1712 }
1713
1714 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1715 struct snd_ctl_elem_value *ucontrol)
1716 {
1717 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1718 if (ice->spdif.ops.default_get) {
1719 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1720 IEC958_AES0_PROFESSIONAL |
1721 IEC958_AES0_PRO_FS |
1722 IEC958_AES0_PRO_EMPHASIS;
1723 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1724 } else {
1725 ucontrol->value.iec958.status[0] = 0xff;
1726 ucontrol->value.iec958.status[1] = 0xff;
1727 ucontrol->value.iec958.status[2] = 0xff;
1728 ucontrol->value.iec958.status[3] = 0xff;
1729 ucontrol->value.iec958.status[4] = 0xff;
1730 }
1731 return 0;
1732 }
1733
1734 static struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1735 {
1736 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1737 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1738 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1739 .info = snd_ice1712_spdif_info,
1740 .get = snd_ice1712_spdif_maskc_get,
1741 };
1742
1743 static struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1744 {
1745 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1746 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1747 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1748 .info = snd_ice1712_spdif_info,
1749 .get = snd_ice1712_spdif_maskp_get,
1750 };
1751
1752 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1753 struct snd_ctl_elem_value *ucontrol)
1754 {
1755 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1756 if (ice->spdif.ops.stream_get)
1757 ice->spdif.ops.stream_get(ice, ucontrol);
1758 return 0;
1759 }
1760
1761 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1762 struct snd_ctl_elem_value *ucontrol)
1763 {
1764 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1765 if (ice->spdif.ops.stream_put)
1766 return ice->spdif.ops.stream_put(ice, ucontrol);
1767 return 0;
1768 }
1769
1770 static struct snd_kcontrol_new snd_ice1712_spdif_stream =
1771 {
1772 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1773 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1774 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1775 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1776 .info = snd_ice1712_spdif_info,
1777 .get = snd_ice1712_spdif_stream_get,
1778 .put = snd_ice1712_spdif_stream_put
1779 };
1780
1781 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1782 struct snd_ctl_elem_value *ucontrol)
1783 {
1784 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1785 unsigned char mask = kcontrol->private_value & 0xff;
1786 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1787
1788 snd_ice1712_save_gpio_status(ice);
1789 ucontrol->value.integer.value[0] =
1790 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1791 snd_ice1712_restore_gpio_status(ice);
1792 return 0;
1793 }
1794
1795 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1796 struct snd_ctl_elem_value *ucontrol)
1797 {
1798 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1799 unsigned char mask = kcontrol->private_value & 0xff;
1800 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1801 unsigned int val, nval;
1802
1803 if (kcontrol->private_value & (1 << 31))
1804 return -EPERM;
1805 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1806 snd_ice1712_save_gpio_status(ice);
1807 val = snd_ice1712_gpio_read(ice);
1808 nval |= val & ~mask;
1809 if (val != nval)
1810 snd_ice1712_gpio_write(ice, nval);
1811 snd_ice1712_restore_gpio_status(ice);
1812 return val != nval;
1813 }
1814
1815 /*
1816 * rate
1817 */
1818 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1819 struct snd_ctl_elem_info *uinfo)
1820 {
1821 static const char * const texts[] = {
1822 "8000", /* 0: 6 */
1823 "9600", /* 1: 3 */
1824 "11025", /* 2: 10 */
1825 "12000", /* 3: 2 */
1826 "16000", /* 4: 5 */
1827 "22050", /* 5: 9 */
1828 "24000", /* 6: 1 */
1829 "32000", /* 7: 4 */
1830 "44100", /* 8: 8 */
1831 "48000", /* 9: 0 */
1832 "64000", /* 10: 15 */
1833 "88200", /* 11: 11 */
1834 "96000", /* 12: 7 */
1835 "IEC958 Input", /* 13: -- */
1836 };
1837 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1838 uinfo->count = 1;
1839 uinfo->value.enumerated.items = 14;
1840 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1841 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1842 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1843 return 0;
1844 }
1845
1846 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1847 struct snd_ctl_elem_value *ucontrol)
1848 {
1849 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1850 static const unsigned char xlate[16] = {
1851 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1852 };
1853 unsigned char val;
1854
1855 spin_lock_irq(&ice->reg_lock);
1856 if (is_spdif_master(ice)) {
1857 ucontrol->value.enumerated.item[0] = 13;
1858 } else {
1859 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1860 if (val == 255) {
1861 snd_BUG();
1862 val = 0;
1863 }
1864 ucontrol->value.enumerated.item[0] = val;
1865 }
1866 spin_unlock_irq(&ice->reg_lock);
1867 return 0;
1868 }
1869
1870 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1871 struct snd_ctl_elem_value *ucontrol)
1872 {
1873 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1874 static const unsigned int xrate[13] = {
1875 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1876 32000, 44100, 48000, 64000, 88200, 96000
1877 };
1878 unsigned char oval;
1879 int change = 0;
1880
1881 spin_lock_irq(&ice->reg_lock);
1882 oval = inb(ICEMT(ice, RATE));
1883 if (ucontrol->value.enumerated.item[0] == 13) {
1884 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1885 } else {
1886 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1887 spin_unlock_irq(&ice->reg_lock);
1888 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1889 spin_lock_irq(&ice->reg_lock);
1890 }
1891 change = inb(ICEMT(ice, RATE)) != oval;
1892 spin_unlock_irq(&ice->reg_lock);
1893
1894 if ((oval & ICE1712_SPDIF_MASTER) !=
1895 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1896 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1897
1898 return change;
1899 }
1900
1901 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1902 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1903 .name = "Multi Track Internal Clock",
1904 .info = snd_ice1712_pro_internal_clock_info,
1905 .get = snd_ice1712_pro_internal_clock_get,
1906 .put = snd_ice1712_pro_internal_clock_put
1907 };
1908
1909 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1910 struct snd_ctl_elem_info *uinfo)
1911 {
1912 static const char * const texts[] = {
1913 "8000", /* 0: 6 */
1914 "9600", /* 1: 3 */
1915 "11025", /* 2: 10 */
1916 "12000", /* 3: 2 */
1917 "16000", /* 4: 5 */
1918 "22050", /* 5: 9 */
1919 "24000", /* 6: 1 */
1920 "32000", /* 7: 4 */
1921 "44100", /* 8: 8 */
1922 "48000", /* 9: 0 */
1923 "64000", /* 10: 15 */
1924 "88200", /* 11: 11 */
1925 "96000", /* 12: 7 */
1926 /* "IEC958 Input", 13: -- */
1927 };
1928 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1929 uinfo->count = 1;
1930 uinfo->value.enumerated.items = 13;
1931 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1932 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1933 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1934 return 0;
1935 }
1936
1937 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1938 struct snd_ctl_elem_value *ucontrol)
1939 {
1940 int val;
1941 static const unsigned int xrate[13] = {
1942 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1943 32000, 44100, 48000, 64000, 88200, 96000
1944 };
1945
1946 for (val = 0; val < 13; val++) {
1947 if (xrate[val] == PRO_RATE_DEFAULT)
1948 break;
1949 }
1950
1951 ucontrol->value.enumerated.item[0] = val;
1952 return 0;
1953 }
1954
1955 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1956 struct snd_ctl_elem_value *ucontrol)
1957 {
1958 static const unsigned int xrate[13] = {
1959 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1960 32000, 44100, 48000, 64000, 88200, 96000
1961 };
1962 unsigned char oval;
1963 int change = 0;
1964
1965 oval = PRO_RATE_DEFAULT;
1966 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1967 change = PRO_RATE_DEFAULT != oval;
1968
1969 return change;
1970 }
1971
1972 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1974 .name = "Multi Track Internal Clock Default",
1975 .info = snd_ice1712_pro_internal_clock_default_info,
1976 .get = snd_ice1712_pro_internal_clock_default_get,
1977 .put = snd_ice1712_pro_internal_clock_default_put
1978 };
1979
1980 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1981
1982 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1983 struct snd_ctl_elem_value *ucontrol)
1984 {
1985 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1986 return 0;
1987 }
1988
1989 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1991 {
1992 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1993 int change = 0, nval;
1994
1995 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1996 spin_lock_irq(&ice->reg_lock);
1997 change = PRO_RATE_LOCKED != nval;
1998 PRO_RATE_LOCKED = nval;
1999 spin_unlock_irq(&ice->reg_lock);
2000 return change;
2001 }
2002
2003 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
2004 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2005 .name = "Multi Track Rate Locking",
2006 .info = snd_ice1712_pro_rate_locking_info,
2007 .get = snd_ice1712_pro_rate_locking_get,
2008 .put = snd_ice1712_pro_rate_locking_put
2009 };
2010
2011 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
2012
2013 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2014 struct snd_ctl_elem_value *ucontrol)
2015 {
2016 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2017 return 0;
2018 }
2019
2020 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2021 struct snd_ctl_elem_value *ucontrol)
2022 {
2023 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2024 int change = 0, nval;
2025
2026 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2027 spin_lock_irq(&ice->reg_lock);
2028 change = PRO_RATE_RESET != nval;
2029 PRO_RATE_RESET = nval;
2030 spin_unlock_irq(&ice->reg_lock);
2031 return change;
2032 }
2033
2034 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
2035 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2036 .name = "Multi Track Rate Reset",
2037 .info = snd_ice1712_pro_rate_reset_info,
2038 .get = snd_ice1712_pro_rate_reset_get,
2039 .put = snd_ice1712_pro_rate_reset_put
2040 };
2041
2042 /*
2043 * routing
2044 */
2045 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2046 struct snd_ctl_elem_info *uinfo)
2047 {
2048 static const char * const texts[] = {
2049 "PCM Out", /* 0 */
2050 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2051 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2052 "IEC958 In L", "IEC958 In R", /* 9-10 */
2053 "Digital Mixer", /* 11 - optional */
2054 };
2055
2056 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2057 uinfo->count = 1;
2058 uinfo->value.enumerated.items =
2059 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2060 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2061 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2062 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2063 return 0;
2064 }
2065
2066 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2067 struct snd_ctl_elem_value *ucontrol)
2068 {
2069 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2070 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2071 unsigned int val, cval;
2072
2073 spin_lock_irq(&ice->reg_lock);
2074 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2075 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2076 spin_unlock_irq(&ice->reg_lock);
2077
2078 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2079 val &= 3;
2080 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2081 if (val == 1 && idx < 2)
2082 ucontrol->value.enumerated.item[0] = 11;
2083 else if (val == 2)
2084 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2085 else if (val == 3)
2086 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2087 else
2088 ucontrol->value.enumerated.item[0] = 0;
2089 return 0;
2090 }
2091
2092 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2093 struct snd_ctl_elem_value *ucontrol)
2094 {
2095 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2096 int change, shift;
2097 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2098 unsigned int val, old_val, nval;
2099
2100 /* update PSDOUT */
2101 if (ucontrol->value.enumerated.item[0] >= 11)
2102 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2103 else if (ucontrol->value.enumerated.item[0] >= 9)
2104 nval = 3; /* spdif in */
2105 else if (ucontrol->value.enumerated.item[0] >= 1)
2106 nval = 2; /* analog in */
2107 else
2108 nval = 0; /* pcm */
2109 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2110 spin_lock_irq(&ice->reg_lock);
2111 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2112 val &= ~(0x03 << shift);
2113 val |= nval << shift;
2114 change = val != old_val;
2115 if (change)
2116 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2117 spin_unlock_irq(&ice->reg_lock);
2118 if (nval < 2) /* dig mixer of pcm */
2119 return change;
2120
2121 /* update CAPTURE */
2122 spin_lock_irq(&ice->reg_lock);
2123 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2124 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2125 if (nval == 2) { /* analog in */
2126 nval = ucontrol->value.enumerated.item[0] - 1;
2127 val &= ~(0x07 << shift);
2128 val |= nval << shift;
2129 } else { /* spdif in */
2130 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2131 val &= ~(0x08 << shift);
2132 val |= nval << shift;
2133 }
2134 if (val != old_val) {
2135 change = 1;
2136 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2137 }
2138 spin_unlock_irq(&ice->reg_lock);
2139 return change;
2140 }
2141
2142 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2143 struct snd_ctl_elem_value *ucontrol)
2144 {
2145 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2146 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2147 unsigned int val, cval;
2148 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2149 cval = (val >> (idx * 4 + 8)) & 0x0f;
2150 val = (val >> (idx * 2)) & 0x03;
2151 if (val == 1)
2152 ucontrol->value.enumerated.item[0] = 11;
2153 else if (val == 2)
2154 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2155 else if (val == 3)
2156 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2157 else
2158 ucontrol->value.enumerated.item[0] = 0;
2159 return 0;
2160 }
2161
2162 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2163 struct snd_ctl_elem_value *ucontrol)
2164 {
2165 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2166 int change, shift;
2167 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2168 unsigned int val, old_val, nval;
2169
2170 /* update SPDOUT */
2171 spin_lock_irq(&ice->reg_lock);
2172 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2173 if (ucontrol->value.enumerated.item[0] >= 11)
2174 nval = 1;
2175 else if (ucontrol->value.enumerated.item[0] >= 9)
2176 nval = 3;
2177 else if (ucontrol->value.enumerated.item[0] >= 1)
2178 nval = 2;
2179 else
2180 nval = 0;
2181 shift = idx * 2;
2182 val &= ~(0x03 << shift);
2183 val |= nval << shift;
2184 shift = idx * 4 + 8;
2185 if (nval == 2) {
2186 nval = ucontrol->value.enumerated.item[0] - 1;
2187 val &= ~(0x07 << shift);
2188 val |= nval << shift;
2189 } else if (nval == 3) {
2190 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2191 val &= ~(0x08 << shift);
2192 val |= nval << shift;
2193 }
2194 change = val != old_val;
2195 if (change)
2196 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2197 spin_unlock_irq(&ice->reg_lock);
2198 return change;
2199 }
2200
2201 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
2202 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2203 .name = "H/W Playback Route",
2204 .info = snd_ice1712_pro_route_info,
2205 .get = snd_ice1712_pro_route_analog_get,
2206 .put = snd_ice1712_pro_route_analog_put,
2207 };
2208
2209 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
2210 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2211 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2212 .info = snd_ice1712_pro_route_info,
2213 .get = snd_ice1712_pro_route_spdif_get,
2214 .put = snd_ice1712_pro_route_spdif_put,
2215 .count = 2,
2216 };
2217
2218
2219 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2220 struct snd_ctl_elem_info *uinfo)
2221 {
2222 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2223 uinfo->count = 1;
2224 uinfo->value.integer.min = 0;
2225 uinfo->value.integer.max = 255;
2226 return 0;
2227 }
2228
2229 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2230 struct snd_ctl_elem_value *ucontrol)
2231 {
2232 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2233
2234 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2235 return 0;
2236 }
2237
2238 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2239 struct snd_ctl_elem_value *ucontrol)
2240 {
2241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2242 int change;
2243
2244 spin_lock_irq(&ice->reg_lock);
2245 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2246 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2247 spin_unlock_irq(&ice->reg_lock);
2248 return change;
2249 }
2250
2251 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
2252 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2253 .name = "Multi Track Volume Rate",
2254 .info = snd_ice1712_pro_volume_rate_info,
2255 .get = snd_ice1712_pro_volume_rate_get,
2256 .put = snd_ice1712_pro_volume_rate_put
2257 };
2258
2259 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2260 struct snd_ctl_elem_info *uinfo)
2261 {
2262 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2263 uinfo->count = 22;
2264 uinfo->value.integer.min = 0;
2265 uinfo->value.integer.max = 255;
2266 return 0;
2267 }
2268
2269 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2270 struct snd_ctl_elem_value *ucontrol)
2271 {
2272 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2273 int idx;
2274
2275 spin_lock_irq(&ice->reg_lock);
2276 for (idx = 0; idx < 22; idx++) {
2277 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2278 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2279 }
2280 spin_unlock_irq(&ice->reg_lock);
2281 return 0;
2282 }
2283
2284 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2285 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2286 .name = "Multi Track Peak",
2287 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2288 .info = snd_ice1712_pro_peak_info,
2289 .get = snd_ice1712_pro_peak_get
2290 };
2291
2292 /*
2293 *
2294 */
2295
2296 /*
2297 * list of available boards
2298 */
2299 static struct snd_ice1712_card_info *card_tables[] = {
2300 snd_ice1712_hoontech_cards,
2301 snd_ice1712_delta_cards,
2302 snd_ice1712_ews_cards,
2303 NULL,
2304 };
2305
2306 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2307 unsigned char dev,
2308 unsigned char addr)
2309 {
2310 long t = 0x10000;
2311
2312 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2313 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2314 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2315 return inb(ICEREG(ice, I2C_DATA));
2316 }
2317
2318 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2319 const char *modelname)
2320 {
2321 int dev = 0xa0; /* EEPROM device address */
2322 unsigned int i, size;
2323 struct snd_ice1712_card_info * const *tbl, *c;
2324
2325 if (!modelname || !*modelname) {
2326 ice->eeprom.subvendor = 0;
2327 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2328 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2329 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2330 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2331 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2332 if (ice->eeprom.subvendor == 0 ||
2333 ice->eeprom.subvendor == (unsigned int)-1) {
2334 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2335 u16 vendor, device;
2336 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2337 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2338 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2339 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2340 printk(KERN_ERR "ice1712: No valid ID is found\n");
2341 return -ENXIO;
2342 }
2343 }
2344 }
2345 for (tbl = card_tables; *tbl; tbl++) {
2346 for (c = *tbl; c->subvendor; c++) {
2347 if (modelname && c->model && !strcmp(modelname, c->model)) {
2348 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2349 ice->eeprom.subvendor = c->subvendor;
2350 } else if (c->subvendor != ice->eeprom.subvendor)
2351 continue;
2352 if (!c->eeprom_size || !c->eeprom_data)
2353 goto found;
2354 /* if the EEPROM is given by the driver, use it */
2355 snd_printdd("using the defined eeprom..\n");
2356 ice->eeprom.version = 1;
2357 ice->eeprom.size = c->eeprom_size + 6;
2358 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2359 goto read_skipped;
2360 }
2361 }
2362 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2363 ice->eeprom.subvendor);
2364
2365 found:
2366 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2367 if (ice->eeprom.size < 6)
2368 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2369 else if (ice->eeprom.size > 32) {
2370 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2371 return -EIO;
2372 }
2373 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2374 if (ice->eeprom.version != 1) {
2375 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2376 ice->eeprom.version);
2377 /* return -EIO; */
2378 }
2379 size = ice->eeprom.size - 6;
2380 for (i = 0; i < size; i++)
2381 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2382
2383 read_skipped:
2384 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2385 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2386 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2387
2388 return 0;
2389 }
2390
2391
2392
2393 static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
2394 {
2395 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2396 udelay(200);
2397 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2398 udelay(200);
2399 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2400 !ice->dxr_enable)
2401 /* Set eeprom value to limit active ADCs and DACs to 6;
2402 * Also disable AC97 as no hardware in standard 6fire card/box
2403 * Note: DXR extensions are not currently supported
2404 */
2405 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2406 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2407 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2408 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2409 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2410 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2411 ice->gpio.write_mask = ice->eeprom.gpiomask;
2412 ice->gpio.direction = ice->eeprom.gpiodir;
2413 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2414 ice->eeprom.gpiomask);
2415 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2416 ice->eeprom.gpiodir);
2417 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2418 ice->eeprom.gpiostate);
2419 } else {
2420 ice->gpio.write_mask = 0xc0;
2421 ice->gpio.direction = 0xff;
2422 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2423 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2424 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2425 ICE1712_STDSP24_CLOCK_BIT);
2426 }
2427 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2428 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2429 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2430 udelay(100);
2431 outb(0, ICEREG(ice, AC97_CMD));
2432 udelay(200);
2433 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2434 }
2435 snd_ice1712_set_pro_rate(ice, 48000, 1);
2436
2437 return 0;
2438 }
2439
2440 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2441 {
2442 int err;
2443 struct snd_kcontrol *kctl;
2444
2445 if (snd_BUG_ON(!ice->pcm_pro))
2446 return -EIO;
2447 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2448 if (err < 0)
2449 return err;
2450 kctl->id.device = ice->pcm_pro->device;
2451 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2452 if (err < 0)
2453 return err;
2454 kctl->id.device = ice->pcm_pro->device;
2455 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2456 if (err < 0)
2457 return err;
2458 kctl->id.device = ice->pcm_pro->device;
2459 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2460 if (err < 0)
2461 return err;
2462 kctl->id.device = ice->pcm_pro->device;
2463 ice->spdif.stream_ctl = kctl;
2464 return 0;
2465 }
2466
2467
2468 static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
2469 {
2470 int err;
2471
2472 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2473 if (err < 0)
2474 return err;
2475 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2476 if (err < 0)
2477 return err;
2478 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2479 if (err < 0)
2480 return err;
2481
2482 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2483 if (err < 0)
2484 return err;
2485 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2486 if (err < 0)
2487 return err;
2488
2489 if (ice->num_total_dacs > 0) {
2490 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2491 tmp.count = ice->num_total_dacs;
2492 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2493 if (err < 0)
2494 return err;
2495 }
2496
2497 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2498 if (err < 0)
2499 return err;
2500
2501 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2502 if (err < 0)
2503 return err;
2504 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2505 if (err < 0)
2506 return err;
2507
2508 return 0;
2509 }
2510
2511 static int snd_ice1712_free(struct snd_ice1712 *ice)
2512 {
2513 if (!ice->port)
2514 goto __hw_end;
2515 /* mask all interrupts */
2516 outb(0xc0, ICEMT(ice, IRQ));
2517 outb(0xff, ICEREG(ice, IRQMASK));
2518 /* --- */
2519 __hw_end:
2520 if (ice->irq >= 0)
2521 free_irq(ice->irq, ice);
2522
2523 if (ice->port)
2524 pci_release_regions(ice->pci);
2525 snd_ice1712_akm4xxx_free(ice);
2526 pci_disable_device(ice->pci);
2527 kfree(ice->spec);
2528 kfree(ice);
2529 return 0;
2530 }
2531
2532 static int snd_ice1712_dev_free(struct snd_device *device)
2533 {
2534 struct snd_ice1712 *ice = device->device_data;
2535 return snd_ice1712_free(ice);
2536 }
2537
2538 static int snd_ice1712_create(struct snd_card *card,
2539 struct pci_dev *pci,
2540 const char *modelname,
2541 int omni,
2542 int cs8427_timeout,
2543 int dxr_enable,
2544 struct snd_ice1712 **r_ice1712)
2545 {
2546 struct snd_ice1712 *ice;
2547 int err;
2548 static struct snd_device_ops ops = {
2549 .dev_free = snd_ice1712_dev_free,
2550 };
2551
2552 *r_ice1712 = NULL;
2553
2554 /* enable PCI device */
2555 err = pci_enable_device(pci);
2556 if (err < 0)
2557 return err;
2558 /* check, if we can restrict PCI DMA transfers to 28 bits */
2559 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2560 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2561 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2562 pci_disable_device(pci);
2563 return -ENXIO;
2564 }
2565
2566 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2567 if (ice == NULL) {
2568 pci_disable_device(pci);
2569 return -ENOMEM;
2570 }
2571 ice->omni = omni ? 1 : 0;
2572 if (cs8427_timeout < 1)
2573 cs8427_timeout = 1;
2574 else if (cs8427_timeout > 1000)
2575 cs8427_timeout = 1000;
2576 ice->cs8427_timeout = cs8427_timeout;
2577 ice->dxr_enable = dxr_enable;
2578 spin_lock_init(&ice->reg_lock);
2579 mutex_init(&ice->gpio_mutex);
2580 mutex_init(&ice->i2c_mutex);
2581 mutex_init(&ice->open_mutex);
2582 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2583 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2584 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2585 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2586 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2587 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2588
2589 ice->spdif.cs8403_bits =
2590 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2591 0x10 | /* no emphasis */
2592 0x20); /* PCM encoder/decoder */
2593 ice->card = card;
2594 ice->pci = pci;
2595 ice->irq = -1;
2596 pci_set_master(pci);
2597 pci_write_config_word(ice->pci, 0x40, 0x807f);
2598 pci_write_config_word(ice->pci, 0x42, 0x0006);
2599 snd_ice1712_proc_init(ice);
2600 synchronize_irq(pci->irq);
2601
2602 card->private_data = ice;
2603
2604 err = pci_request_regions(pci, "ICE1712");
2605 if (err < 0) {
2606 kfree(ice);
2607 pci_disable_device(pci);
2608 return err;
2609 }
2610 ice->port = pci_resource_start(pci, 0);
2611 ice->ddma_port = pci_resource_start(pci, 1);
2612 ice->dmapath_port = pci_resource_start(pci, 2);
2613 ice->profi_port = pci_resource_start(pci, 3);
2614
2615 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2616 KBUILD_MODNAME, ice)) {
2617 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2618 snd_ice1712_free(ice);
2619 return -EIO;
2620 }
2621
2622 ice->irq = pci->irq;
2623
2624 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2625 snd_ice1712_free(ice);
2626 return -EIO;
2627 }
2628 if (snd_ice1712_chip_init(ice) < 0) {
2629 snd_ice1712_free(ice);
2630 return -EIO;
2631 }
2632
2633 /* unmask used interrupts */
2634 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2635 ICE1712_IRQ_MPU2 : 0) |
2636 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2637 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2638 ICEREG(ice, IRQMASK));
2639 outb(0x00, ICEMT(ice, IRQ));
2640
2641 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2642 if (err < 0) {
2643 snd_ice1712_free(ice);
2644 return err;
2645 }
2646
2647 snd_card_set_dev(card, &pci->dev);
2648
2649 *r_ice1712 = ice;
2650 return 0;
2651 }
2652
2653
2654 /*
2655 *
2656 * Registration
2657 *
2658 */
2659
2660 static struct snd_ice1712_card_info no_matched;
2661
2662 static int snd_ice1712_probe(struct pci_dev *pci,
2663 const struct pci_device_id *pci_id)
2664 {
2665 static int dev;
2666 struct snd_card *card;
2667 struct snd_ice1712 *ice;
2668 int pcm_dev = 0, err;
2669 struct snd_ice1712_card_info * const *tbl, *c;
2670
2671 if (dev >= SNDRV_CARDS)
2672 return -ENODEV;
2673 if (!enable[dev]) {
2674 dev++;
2675 return -ENOENT;
2676 }
2677
2678 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2679 if (err < 0)
2680 return err;
2681
2682 strcpy(card->driver, "ICE1712");
2683 strcpy(card->shortname, "ICEnsemble ICE1712");
2684
2685 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2686 cs8427_timeout[dev], dxr_enable[dev], &ice);
2687 if (err < 0) {
2688 snd_card_free(card);
2689 return err;
2690 }
2691
2692 for (tbl = card_tables; *tbl; tbl++) {
2693 for (c = *tbl; c->subvendor; c++) {
2694 if (c->subvendor == ice->eeprom.subvendor) {
2695 ice->card_info = c;
2696 strcpy(card->shortname, c->name);
2697 if (c->driver) /* specific driver? */
2698 strcpy(card->driver, c->driver);
2699 if (c->chip_init) {
2700 err = c->chip_init(ice);
2701 if (err < 0) {
2702 snd_card_free(card);
2703 return err;
2704 }
2705 }
2706 goto __found;
2707 }
2708 }
2709 }
2710 c = &no_matched;
2711 __found:
2712
2713 err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2714 if (err < 0) {
2715 snd_card_free(card);
2716 return err;
2717 }
2718
2719 if (ice_has_con_ac97(ice)) {
2720 err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2721 if (err < 0) {
2722 snd_card_free(card);
2723 return err;
2724 }
2725 }
2726
2727 err = snd_ice1712_ac97_mixer(ice);
2728 if (err < 0) {
2729 snd_card_free(card);
2730 return err;
2731 }
2732
2733 err = snd_ice1712_build_controls(ice);
2734 if (err < 0) {
2735 snd_card_free(card);
2736 return err;
2737 }
2738
2739 if (c->build_controls) {
2740 err = c->build_controls(ice);
2741 if (err < 0) {
2742 snd_card_free(card);
2743 return err;
2744 }
2745 }
2746
2747 if (ice_has_con_ac97(ice)) {
2748 err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2749 if (err < 0) {
2750 snd_card_free(card);
2751 return err;
2752 }
2753 }
2754
2755 if (!c->no_mpu401) {
2756 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2757 ICEREG(ice, MPU1_CTRL),
2758 c->mpu401_1_info_flags |
2759 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2760 -1, &ice->rmidi[0]);
2761 if (err < 0) {
2762 snd_card_free(card);
2763 return err;
2764 }
2765 if (c->mpu401_1_name)
2766 /* Preferred name available in card_info */
2767 snprintf(ice->rmidi[0]->name,
2768 sizeof(ice->rmidi[0]->name),
2769 "%s %d", c->mpu401_1_name, card->number);
2770
2771 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2772 /* 2nd port used */
2773 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2774 ICEREG(ice, MPU2_CTRL),
2775 c->mpu401_2_info_flags |
2776 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2777 -1, &ice->rmidi[1]);
2778
2779 if (err < 0) {
2780 snd_card_free(card);
2781 return err;
2782 }
2783 if (c->mpu401_2_name)
2784 /* Preferred name available in card_info */
2785 snprintf(ice->rmidi[1]->name,
2786 sizeof(ice->rmidi[1]->name),
2787 "%s %d", c->mpu401_2_name,
2788 card->number);
2789 }
2790 }
2791
2792 snd_ice1712_set_input_clock_source(ice, 0);
2793
2794 sprintf(card->longname, "%s at 0x%lx, irq %i",
2795 card->shortname, ice->port, ice->irq);
2796
2797 err = snd_card_register(card);
2798 if (err < 0) {
2799 snd_card_free(card);
2800 return err;
2801 }
2802 pci_set_drvdata(pci, card);
2803 dev++;
2804 return 0;
2805 }
2806
2807 static void snd_ice1712_remove(struct pci_dev *pci)
2808 {
2809 struct snd_card *card = pci_get_drvdata(pci);
2810 struct snd_ice1712 *ice = card->private_data;
2811
2812 if (ice->card_info && ice->card_info->chip_exit)
2813 ice->card_info->chip_exit(ice);
2814 snd_card_free(card);
2815 pci_set_drvdata(pci, NULL);
2816 }
2817
2818 static struct pci_driver ice1712_driver = {
2819 .name = KBUILD_MODNAME,
2820 .id_table = snd_ice1712_ids,
2821 .probe = snd_ice1712_probe,
2822 .remove = snd_ice1712_remove,
2823 };
2824
2825 module_pci_driver(ice1712_driver);
kernel source for telekom puls (alcatel/mediatek)