sound/pci/hda/hda_codec.h

   1 /*
   2  * Universal Interface for Intel High Definition Audio Codec
   3  *
   4  * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License as published by the Free
   8  *  Software Foundation; either version 2 of the License, or (at your option)
   9  *  any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful, but WITHOUT
  12  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  *  more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License along with
  17  *  this program; if not, write to the Free Software Foundation, Inc., 59
  18  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  19  */
  20
  21 #ifndef __SOUND_HDA_CODEC_H
  22 #define __SOUND_HDA_CODEC_H
  23
  24 #include <sound/info.h>
  25 #include <sound/control.h>
  26 #include <sound/pcm.h>
  27 #include <sound/hwdep.h>
  28
  29 /*
  30  * nodes
  31  */
  32 #define AC_NODE_ROOT            0x00
  33
  34 /*
  35  * function group types
  36  */
  37 enum {
  38         AC_GRP_AUDIO_FUNCTION = 0x01,
  39         AC_GRP_MODEM_FUNCTION = 0x02,
  40 };
  41
  42 /*
  43  * widget types
  44  */
  45 enum {
  46         AC_WID_AUD_OUT,         /* Audio Out */
  47         AC_WID_AUD_IN,          /* Audio In */
  48         AC_WID_AUD_MIX,         /* Audio Mixer */
  49         AC_WID_AUD_SEL,         /* Audio Selector */
  50         AC_WID_PIN,             /* Pin Complex */
  51         AC_WID_POWER,           /* Power */
  52         AC_WID_VOL_KNB,         /* Volume Knob */
  53         AC_WID_BEEP,            /* Beep Generator */
  54         AC_WID_VENDOR = 0x0f    /* Vendor specific */
  55 };
  56
  57 /*
  58  * GET verbs
  59  */
  60 #define AC_VERB_GET_STREAM_FORMAT               0x0a00
  61 #define AC_VERB_GET_AMP_GAIN_MUTE               0x0b00
  62 #define AC_VERB_GET_PROC_COEF                   0x0c00
  63 #define AC_VERB_GET_COEF_INDEX                  0x0d00
  64 #define AC_VERB_PARAMETERS                      0x0f00
  65 #define AC_VERB_GET_CONNECT_SEL                 0x0f01
  66 #define AC_VERB_GET_CONNECT_LIST                0x0f02
  67 #define AC_VERB_GET_PROC_STATE                  0x0f03
  68 #define AC_VERB_GET_SDI_SELECT                  0x0f04
  69 #define AC_VERB_GET_POWER_STATE                 0x0f05
  70 #define AC_VERB_GET_CONV                        0x0f06
  71 #define AC_VERB_GET_PIN_WIDGET_CONTROL          0x0f07
  72 #define AC_VERB_GET_UNSOLICITED_RESPONSE        0x0f08
  73 #define AC_VERB_GET_PIN_SENSE                   0x0f09
  74 #define AC_VERB_GET_BEEP_CONTROL                0x0f0a
  75 #define AC_VERB_GET_EAPD_BTLENABLE              0x0f0c
  76 #define AC_VERB_GET_DIGI_CONVERT_1              0x0f0d
  77 #define AC_VERB_GET_DIGI_CONVERT_2              0x0f0e /* unused */
  78 #define AC_VERB_GET_VOLUME_KNOB_CONTROL         0x0f0f
  79 /* f10-f1a: GPIO */
  80 #define AC_VERB_GET_GPIO_DATA                   0x0f15
  81 #define AC_VERB_GET_GPIO_MASK                   0x0f16
  82 #define AC_VERB_GET_GPIO_DIRECTION              0x0f17
  83 #define AC_VERB_GET_GPIO_WAKE_MASK              0x0f18
  84 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK   0x0f19
  85 #define AC_VERB_GET_GPIO_STICKY_MASK            0x0f1a
  86 #define AC_VERB_GET_CONFIG_DEFAULT              0x0f1c
  87 /* f20: AFG/MFG */
  88 #define AC_VERB_GET_SUBSYSTEM_ID                0x0f20
  89 #define AC_VERB_GET_CVT_CHAN_COUNT              0x0f2d
  90 #define AC_VERB_GET_HDMI_DIP_SIZE               0x0f2e
  91 #define AC_VERB_GET_HDMI_ELDD                   0x0f2f
  92 #define AC_VERB_GET_HDMI_DIP_INDEX              0x0f30
  93 #define AC_VERB_GET_HDMI_DIP_DATA               0x0f31
  94 #define AC_VERB_GET_HDMI_DIP_XMIT               0x0f32
  95 #define AC_VERB_GET_HDMI_CP_CTRL                0x0f33
  96 #define AC_VERB_GET_HDMI_CHAN_SLOT              0x0f34
  97
  98 /*
  99  * SET verbs
 100  */
 101 #define AC_VERB_SET_STREAM_FORMAT               0x200
 102 #define AC_VERB_SET_AMP_GAIN_MUTE               0x300
 103 #define AC_VERB_SET_PROC_COEF                   0x400
 104 #define AC_VERB_SET_COEF_INDEX                  0x500
 105 #define AC_VERB_SET_CONNECT_SEL                 0x701
 106 #define AC_VERB_SET_PROC_STATE                  0x703
 107 #define AC_VERB_SET_SDI_SELECT                  0x704
 108 #define AC_VERB_SET_POWER_STATE                 0x705
 109 #define AC_VERB_SET_CHANNEL_STREAMID            0x706
 110 #define AC_VERB_SET_PIN_WIDGET_CONTROL          0x707
 111 #define AC_VERB_SET_UNSOLICITED_ENABLE          0x708
 112 #define AC_VERB_SET_PIN_SENSE                   0x709
 113 #define AC_VERB_SET_BEEP_CONTROL                0x70a
 114 #define AC_VERB_SET_EAPD_BTLENABLE              0x70c
 115 #define AC_VERB_SET_DIGI_CONVERT_1              0x70d
 116 #define AC_VERB_SET_DIGI_CONVERT_2              0x70e
 117 #define AC_VERB_SET_VOLUME_KNOB_CONTROL         0x70f
 118 #define AC_VERB_SET_GPIO_DATA                   0x715
 119 #define AC_VERB_SET_GPIO_MASK                   0x716
 120 #define AC_VERB_SET_GPIO_DIRECTION              0x717
 121 #define AC_VERB_SET_GPIO_WAKE_MASK              0x718
 122 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK   0x719
 123 #define AC_VERB_SET_GPIO_STICKY_MASK            0x71a
 124 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0      0x71c
 125 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1      0x71d
 126 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2      0x71e
 127 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3      0x71f
 128 #define AC_VERB_SET_EAPD                                0x788
 129 #define AC_VERB_SET_CODEC_RESET                 0x7ff
 130 #define AC_VERB_SET_CVT_CHAN_COUNT              0x72d
 131 #define AC_VERB_SET_HDMI_DIP_INDEX              0x730
 132 #define AC_VERB_SET_HDMI_DIP_DATA               0x731
 133 #define AC_VERB_SET_HDMI_DIP_XMIT               0x732
 134 #define AC_VERB_SET_HDMI_CP_CTRL                0x733
 135 #define AC_VERB_SET_HDMI_CHAN_SLOT              0x734
 136
 137 /*
 138  * Parameter IDs
 139  */
 140 #define AC_PAR_VENDOR_ID                0x00
 141 #define AC_PAR_SUBSYSTEM_ID             0x01
 142 #define AC_PAR_REV_ID                   0x02
 143 #define AC_PAR_NODE_COUNT               0x04
 144 #define AC_PAR_FUNCTION_TYPE            0x05
 145 #define AC_PAR_AUDIO_FG_CAP             0x08
 146 #define AC_PAR_AUDIO_WIDGET_CAP         0x09
 147 #define AC_PAR_PCM                      0x0a
 148 #define AC_PAR_STREAM                   0x0b
 149 #define AC_PAR_PIN_CAP                  0x0c
 150 #define AC_PAR_AMP_IN_CAP               0x0d
 151 #define AC_PAR_CONNLIST_LEN             0x0e
 152 #define AC_PAR_POWER_STATE              0x0f
 153 #define AC_PAR_PROC_CAP                 0x10
 154 #define AC_PAR_GPIO_CAP                 0x11
 155 #define AC_PAR_AMP_OUT_CAP              0x12
 156 #define AC_PAR_VOL_KNB_CAP              0x13
 157 #define AC_PAR_HDMI_LPCM_CAP            0x20
 158
 159 /*
 160  * AC_VERB_PARAMETERS results (32bit)
 161  */
 162
 163 /* Function Group Type */
 164 #define AC_FGT_TYPE                     (0xff<<0)
 165 #define AC_FGT_TYPE_SHIFT               0
 166 #define AC_FGT_UNSOL_CAP                (1<<8)
 167
 168 /* Audio Function Group Capabilities */
 169 #define AC_AFG_OUT_DELAY                (0xf<<0)
 170 #define AC_AFG_IN_DELAY                 (0xf<<8)
 171 #define AC_AFG_BEEP_GEN                 (1<<16)
 172
 173 /* Audio Widget Capabilities */
 174 #define AC_WCAP_STEREO                  (1<<0)  /* stereo I/O */
 175 #define AC_WCAP_IN_AMP                  (1<<1)  /* AMP-in present */
 176 #define AC_WCAP_OUT_AMP                 (1<<2)  /* AMP-out present */
 177 #define AC_WCAP_AMP_OVRD                (1<<3)  /* AMP-parameter override */
 178 #define AC_WCAP_FORMAT_OVRD             (1<<4)  /* format override */
 179 #define AC_WCAP_STRIPE                  (1<<5)  /* stripe */
 180 #define AC_WCAP_PROC_WID                (1<<6)  /* Proc Widget */
 181 #define AC_WCAP_UNSOL_CAP               (1<<7)  /* Unsol capable */
 182 #define AC_WCAP_CONN_LIST               (1<<8)  /* connection list */
 183 #define AC_WCAP_DIGITAL                 (1<<9)  /* digital I/O */
 184 #define AC_WCAP_POWER                   (1<<10) /* power control */
 185 #define AC_WCAP_LR_SWAP                 (1<<11) /* L/R swap */
 186 #define AC_WCAP_CP_CAPS                 (1<<12) /* content protection */
 187 #define AC_WCAP_CHAN_CNT_EXT            (7<<13) /* channel count ext */
 188 #define AC_WCAP_DELAY                   (0xf<<16)
 189 #define AC_WCAP_DELAY_SHIFT             16
 190 #define AC_WCAP_TYPE                    (0xf<<20)
 191 #define AC_WCAP_TYPE_SHIFT              20
 192
 193 /* supported PCM rates and bits */
 194 #define AC_SUPPCM_RATES                 (0xfff << 0)
 195 #define AC_SUPPCM_BITS_8                (1<<16)
 196 #define AC_SUPPCM_BITS_16               (1<<17)
 197 #define AC_SUPPCM_BITS_20               (1<<18)
 198 #define AC_SUPPCM_BITS_24               (1<<19)
 199 #define AC_SUPPCM_BITS_32               (1<<20)
 200
 201 /* supported PCM stream format */
 202 #define AC_SUPFMT_PCM                   (1<<0)
 203 #define AC_SUPFMT_FLOAT32               (1<<1)
 204 #define AC_SUPFMT_AC3                   (1<<2)
 205
 206 /* GP I/O count */
 207 #define AC_GPIO_IO_COUNT                (0xff<<0)
 208 #define AC_GPIO_O_COUNT                 (0xff<<8)
 209 #define AC_GPIO_O_COUNT_SHIFT           8
 210 #define AC_GPIO_I_COUNT                 (0xff<<16)
 211 #define AC_GPIO_I_COUNT_SHIFT           16
 212 #define AC_GPIO_UNSOLICITED             (1<<30)
 213 #define AC_GPIO_WAKE                    (1<<31)
 214
 215 /* Converter stream, channel */
 216 #define AC_CONV_CHANNEL                 (0xf<<0)
 217 #define AC_CONV_STREAM                  (0xf<<4)
 218 #define AC_CONV_STREAM_SHIFT            4
 219
 220 /* Input converter SDI select */
 221 #define AC_SDI_SELECT                   (0xf<<0)
 222
 223 /* stream format id */
 224 #define AC_FMT_CHAN_SHIFT               0
 225 #define AC_FMT_CHAN_MASK                (0x0f << 0)
 226 #define AC_FMT_BITS_SHIFT               4
 227 #define AC_FMT_BITS_MASK                (7 << 4)
 228 #define AC_FMT_BITS_8                   (0 << 4)
 229 #define AC_FMT_BITS_16                  (1 << 4)
 230 #define AC_FMT_BITS_20                  (2 << 4)
 231 #define AC_FMT_BITS_24                  (3 << 4)
 232 #define AC_FMT_BITS_32                  (4 << 4)
 233 #define AC_FMT_DIV_SHIFT                8
 234 #define AC_FMT_DIV_MASK                 (7 << 8)
 235 #define AC_FMT_MULT_SHIFT               11
 236 #define AC_FMT_MULT_MASK                (7 << 11)
 237 #define AC_FMT_BASE_SHIFT               14
 238 #define AC_FMT_BASE_48K                 (0 << 14)
 239 #define AC_FMT_BASE_44K                 (1 << 14)
 240 #define AC_FMT_TYPE_SHIFT               15
 241 #define AC_FMT_TYPE_PCM                 (0 << 15)
 242 #define AC_FMT_TYPE_NON_PCM             (1 << 15)
 243
 244 /* Unsolicited response control */
 245 #define AC_UNSOL_TAG                    (0x3f<<0)
 246 #define AC_UNSOL_ENABLED                (1<<7)
 247 #define AC_USRSP_EN                     AC_UNSOL_ENABLED
 248
 249 /* Unsolicited responses */
 250 #define AC_UNSOL_RES_TAG                (0x3f<<26)
 251 #define AC_UNSOL_RES_TAG_SHIFT          26
 252 #define AC_UNSOL_RES_SUBTAG             (0x1f<<21)
 253 #define AC_UNSOL_RES_SUBTAG_SHIFT       21
 254 #define AC_UNSOL_RES_ELDV               (1<<1)  /* ELD Data valid (for HDMI) */
 255 #define AC_UNSOL_RES_PD                 (1<<0)  /* pinsense detect */
 256 #define AC_UNSOL_RES_CP_STATE           (1<<1)  /* content protection */
 257 #define AC_UNSOL_RES_CP_READY           (1<<0)  /* content protection */
 258
 259 /* Pin widget capabilies */
 260 #define AC_PINCAP_IMP_SENSE             (1<<0)  /* impedance sense capable */
 261 #define AC_PINCAP_TRIG_REQ              (1<<1)  /* trigger required */
 262 #define AC_PINCAP_PRES_DETECT           (1<<2)  /* presence detect capable */
 263 #define AC_PINCAP_HP_DRV                (1<<3)  /* headphone drive capable */
 264 #define AC_PINCAP_OUT                   (1<<4)  /* output capable */
 265 #define AC_PINCAP_IN                    (1<<5)  /* input capable */
 266 #define AC_PINCAP_BALANCE               (1<<6)  /* balanced I/O capable */
 267 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
 268  *       but is marked reserved in the Intel HDA specification.
 269  */
 270 #define AC_PINCAP_LR_SWAP               (1<<7)  /* L/R swap */
 271 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
 272  *       in HD-audio specification
 273  */
 274 #define AC_PINCAP_HDMI                  (1<<7)  /* HDMI pin */
 275 #define AC_PINCAP_DP                    (1<<24) /* DisplayPort pin, can
 276                                                  * coexist with AC_PINCAP_HDMI
 277                                                  */
 278 #define AC_PINCAP_VREF                  (0x37<<8)
 279 #define AC_PINCAP_VREF_SHIFT            8
 280 #define AC_PINCAP_EAPD                  (1<<16) /* EAPD capable */
 281 #define AC_PINCAP_HBR                   (1<<27) /* High Bit Rate */
 282 /* Vref status (used in pin cap) */
 283 #define AC_PINCAP_VREF_HIZ              (1<<0)  /* Hi-Z */
 284 #define AC_PINCAP_VREF_50               (1<<1)  /* 50% */
 285 #define AC_PINCAP_VREF_GRD              (1<<2)  /* ground */
 286 #define AC_PINCAP_VREF_80               (1<<4)  /* 80% */
 287 #define AC_PINCAP_VREF_100              (1<<5)  /* 100% */
 288
 289 /* Amplifier capabilities */
 290 #define AC_AMPCAP_OFFSET                (0x7f<<0)  /* 0dB offset */
 291 #define AC_AMPCAP_OFFSET_SHIFT          0
 292 #define AC_AMPCAP_NUM_STEPS             (0x7f<<8)  /* number of steps */
 293 #define AC_AMPCAP_NUM_STEPS_SHIFT       8
 294 #define AC_AMPCAP_STEP_SIZE             (0x7f<<16) /* step size 0-32dB
 295                                                     * in 0.25dB
 296                                                     */
 297 #define AC_AMPCAP_STEP_SIZE_SHIFT       16
 298 #define AC_AMPCAP_MUTE                  (1<<31)    /* mute capable */
 299 #define AC_AMPCAP_MUTE_SHIFT            31
 300
 301 /* driver-specific amp-caps: using bits 24-30 */
 302 #define AC_AMPCAP_MIN_MUTE              (1 << 30) /* min-volume = mute */
 303
 304 /* Connection list */
 305 #define AC_CLIST_LENGTH                 (0x7f<<0)
 306 #define AC_CLIST_LONG                   (1<<7)
 307
 308 /* Supported power status */
 309 #define AC_PWRST_D0SUP                  (1<<0)
 310 #define AC_PWRST_D1SUP                  (1<<1)
 311 #define AC_PWRST_D2SUP                  (1<<2)
 312 #define AC_PWRST_D3SUP                  (1<<3)
 313 #define AC_PWRST_D3COLDSUP              (1<<4)
 314 #define AC_PWRST_S3D3COLDSUP            (1<<29)
 315 #define AC_PWRST_CLKSTOP                (1<<30)
 316 #define AC_PWRST_EPSS                   (1U<<31)
 317
 318 /* Power state values */
 319 #define AC_PWRST_SETTING                (0xf<<0)
 320 #define AC_PWRST_ACTUAL                 (0xf<<4)
 321 #define AC_PWRST_ACTUAL_SHIFT           4
 322 #define AC_PWRST_D0                     0x00
 323 #define AC_PWRST_D1                     0x01
 324 #define AC_PWRST_D2                     0x02
 325 #define AC_PWRST_D3                     0x03
 326 #define AC_PWRST_ERROR                  (1<<8)
 327 #define AC_PWRST_CLK_STOP_OK            (1<<9)
 328 #define AC_PWRST_SETTING_RESET          (1<<10)
 329
 330 /* Processing capabilies */
 331 #define AC_PCAP_BENIGN                  (1<<0)
 332 #define AC_PCAP_NUM_COEF                (0xff<<8)
 333 #define AC_PCAP_NUM_COEF_SHIFT          8
 334
 335 /* Volume knobs capabilities */
 336 #define AC_KNBCAP_NUM_STEPS             (0x7f<<0)
 337 #define AC_KNBCAP_DELTA                 (1<<7)
 338
 339 /* HDMI LPCM capabilities */
 340 #define AC_LPCMCAP_48K_CP_CHNS          (0x0f<<0) /* max channels w/ CP-on */
 341 #define AC_LPCMCAP_48K_NO_CHNS          (0x0f<<4) /* max channels w/o CP-on */
 342 #define AC_LPCMCAP_48K_20BIT            (1<<8)  /* 20b bitrate supported */
 343 #define AC_LPCMCAP_48K_24BIT            (1<<9)  /* 24b bitrate supported */
 344 #define AC_LPCMCAP_96K_CP_CHNS          (0x0f<<10) /* max channels w/ CP-on */
 345 #define AC_LPCMCAP_96K_NO_CHNS          (0x0f<<14) /* max channels w/o CP-on */
 346 #define AC_LPCMCAP_96K_20BIT            (1<<18) /* 20b bitrate supported */
 347 #define AC_LPCMCAP_96K_24BIT            (1<<19) /* 24b bitrate supported */
 348 #define AC_LPCMCAP_192K_CP_CHNS         (0x0f<<20) /* max channels w/ CP-on */
 349 #define AC_LPCMCAP_192K_NO_CHNS         (0x0f<<24) /* max channels w/o CP-on */
 350 #define AC_LPCMCAP_192K_20BIT           (1<<28) /* 20b bitrate supported */
 351 #define AC_LPCMCAP_192K_24BIT           (1<<29) /* 24b bitrate supported */
 352 #define AC_LPCMCAP_44K                  (1<<30) /* 44.1kHz support */
 353 #define AC_LPCMCAP_44K_MS               (1<<31) /* 44.1kHz-multiplies support */
 354
 355 /*
 356  * Control Parameters
 357  */
 358
 359 /* Amp gain/mute */
 360 #define AC_AMP_MUTE                     (1<<7)
 361 #define AC_AMP_GAIN                     (0x7f)
 362 #define AC_AMP_GET_INDEX                (0xf<<0)
 363
 364 #define AC_AMP_GET_LEFT                 (1<<13)
 365 #define AC_AMP_GET_RIGHT                (0<<13)
 366 #define AC_AMP_GET_OUTPUT               (1<<15)
 367 #define AC_AMP_GET_INPUT                (0<<15)
 368
 369 #define AC_AMP_SET_INDEX                (0xf<<8)
 370 #define AC_AMP_SET_INDEX_SHIFT          8
 371 #define AC_AMP_SET_RIGHT                (1<<12)
 372 #define AC_AMP_SET_LEFT                 (1<<13)
 373 #define AC_AMP_SET_INPUT                (1<<14)
 374 #define AC_AMP_SET_OUTPUT               (1<<15)
 375
 376 /* DIGITAL1 bits */
 377 #define AC_DIG1_ENABLE                  (1<<0)
 378 #define AC_DIG1_V                       (1<<1)
 379 #define AC_DIG1_VCFG                    (1<<2)
 380 #define AC_DIG1_EMPHASIS                (1<<3)
 381 #define AC_DIG1_COPYRIGHT               (1<<4)
 382 #define AC_DIG1_NONAUDIO                (1<<5)
 383 #define AC_DIG1_PROFESSIONAL            (1<<6)
 384 #define AC_DIG1_LEVEL                   (1<<7)
 385
 386 /* DIGITAL2 bits */
 387 #define AC_DIG2_CC                      (0x7f<<0)
 388
 389 /* DIGITAL3 bits */
 390 #define AC_DIG3_ICT                     (0xf<<0)
 391 #define AC_DIG3_KAE                     (1<<7)
 392
 393 /* Pin widget control - 8bit */
 394 #define AC_PINCTL_EPT                   (0x3<<0)
 395 #define AC_PINCTL_EPT_NATIVE            0
 396 #define AC_PINCTL_EPT_HBR               3
 397 #define AC_PINCTL_VREFEN                (0x7<<0)
 398 #define AC_PINCTL_VREF_HIZ              0       /* Hi-Z */
 399 #define AC_PINCTL_VREF_50               1       /* 50% */
 400 #define AC_PINCTL_VREF_GRD              2       /* ground */
 401 #define AC_PINCTL_VREF_80               4       /* 80% */
 402 #define AC_PINCTL_VREF_100              5       /* 100% */
 403 #define AC_PINCTL_IN_EN                 (1<<5)
 404 #define AC_PINCTL_OUT_EN                (1<<6)
 405 #define AC_PINCTL_HP_EN                 (1<<7)
 406
 407 /* Pin sense - 32bit */
 408 #define AC_PINSENSE_IMPEDANCE_MASK      (0x7fffffff)
 409 #define AC_PINSENSE_PRESENCE            (1<<31)
 410 #define AC_PINSENSE_ELDV                (1<<30) /* ELD valid (HDMI) */
 411
 412 /* EAPD/BTL enable - 32bit */
 413 #define AC_EAPDBTL_BALANCED             (1<<0)
 414 #define AC_EAPDBTL_EAPD                 (1<<1)
 415 #define AC_EAPDBTL_LR_SWAP              (1<<2)
 416
 417 /* HDMI ELD data */
 418 #define AC_ELDD_ELD_VALID               (1<<31)
 419 #define AC_ELDD_ELD_DATA                0xff
 420
 421 /* HDMI DIP size */
 422 #define AC_DIPSIZE_ELD_BUF              (1<<3) /* ELD buf size of packet size */
 423 #define AC_DIPSIZE_PACK_IDX             (0x07<<0) /* packet index */
 424
 425 /* HDMI DIP index */
 426 #define AC_DIPIDX_PACK_IDX              (0x07<<5) /* packet idnex */
 427 #define AC_DIPIDX_BYTE_IDX              (0x1f<<0) /* byte index */
 428
 429 /* HDMI DIP xmit (transmit) control */
 430 #define AC_DIPXMIT_MASK                 (0x3<<6)
 431 #define AC_DIPXMIT_DISABLE              (0x0<<6) /* disable xmit */
 432 #define AC_DIPXMIT_ONCE                 (0x2<<6) /* xmit once then disable */
 433 #define AC_DIPXMIT_BEST                 (0x3<<6) /* best effort */
 434
 435 /* HDMI content protection (CP) control */
 436 #define AC_CPCTRL_CES                   (1<<9) /* current encryption state */
 437 #define AC_CPCTRL_READY                 (1<<8) /* ready bit */
 438 #define AC_CPCTRL_SUBTAG                (0x1f<<3) /* subtag for unsol-resp */
 439 #define AC_CPCTRL_STATE                 (3<<0) /* current CP request state */
 440
 441 /* Converter channel <-> HDMI slot mapping */
 442 #define AC_CVTMAP_HDMI_SLOT             (0xf<<0) /* HDMI slot number */
 443 #define AC_CVTMAP_CHAN                  (0xf<<4) /* converter channel number */
 444
 445 /* configuration default - 32bit */
 446 #define AC_DEFCFG_SEQUENCE              (0xf<<0)
 447 #define AC_DEFCFG_DEF_ASSOC             (0xf<<4)
 448 #define AC_DEFCFG_ASSOC_SHIFT           4
 449 #define AC_DEFCFG_MISC                  (0xf<<8)
 450 #define AC_DEFCFG_MISC_SHIFT            8
 451 #define AC_DEFCFG_MISC_NO_PRESENCE      (1<<0)
 452 #define AC_DEFCFG_COLOR                 (0xf<<12)
 453 #define AC_DEFCFG_COLOR_SHIFT           12
 454 #define AC_DEFCFG_CONN_TYPE             (0xf<<16)
 455 #define AC_DEFCFG_CONN_TYPE_SHIFT       16
 456 #define AC_DEFCFG_DEVICE                (0xf<<20)
 457 #define AC_DEFCFG_DEVICE_SHIFT          20
 458 #define AC_DEFCFG_LOCATION              (0x3f<<24)
 459 #define AC_DEFCFG_LOCATION_SHIFT        24
 460 #define AC_DEFCFG_PORT_CONN             (0x3<<30)
 461 #define AC_DEFCFG_PORT_CONN_SHIFT       30
 462
 463 /* device device types (0x0-0xf) */
 464 enum {
 465         AC_JACK_LINE_OUT,
 466         AC_JACK_SPEAKER,
 467         AC_JACK_HP_OUT,
 468         AC_JACK_CD,
 469         AC_JACK_SPDIF_OUT,
 470         AC_JACK_DIG_OTHER_OUT,
 471         AC_JACK_MODEM_LINE_SIDE,
 472         AC_JACK_MODEM_HAND_SIDE,
 473         AC_JACK_LINE_IN,
 474         AC_JACK_AUX,
 475         AC_JACK_MIC_IN,
 476         AC_JACK_TELEPHONY,
 477         AC_JACK_SPDIF_IN,
 478         AC_JACK_DIG_OTHER_IN,
 479         AC_JACK_OTHER = 0xf,
 480 };
 481
 482 /* jack connection types (0x0-0xf) */
 483 enum {
 484         AC_JACK_CONN_UNKNOWN,
 485         AC_JACK_CONN_1_8,
 486         AC_JACK_CONN_1_4,
 487         AC_JACK_CONN_ATAPI,
 488         AC_JACK_CONN_RCA,
 489         AC_JACK_CONN_OPTICAL,
 490         AC_JACK_CONN_OTHER_DIGITAL,
 491         AC_JACK_CONN_OTHER_ANALOG,
 492         AC_JACK_CONN_DIN,
 493         AC_JACK_CONN_XLR,
 494         AC_JACK_CONN_RJ11,
 495         AC_JACK_CONN_COMB,
 496         AC_JACK_CONN_OTHER = 0xf,
 497 };
 498
 499 /* jack colors (0x0-0xf) */
 500 enum {
 501         AC_JACK_COLOR_UNKNOWN,
 502         AC_JACK_COLOR_BLACK,
 503         AC_JACK_COLOR_GREY,
 504         AC_JACK_COLOR_BLUE,
 505         AC_JACK_COLOR_GREEN,
 506         AC_JACK_COLOR_RED,
 507         AC_JACK_COLOR_ORANGE,
 508         AC_JACK_COLOR_YELLOW,
 509         AC_JACK_COLOR_PURPLE,
 510         AC_JACK_COLOR_PINK,
 511         AC_JACK_COLOR_WHITE = 0xe,
 512         AC_JACK_COLOR_OTHER,
 513 };
 514
 515 /* Jack location (0x0-0x3f) */
 516 /* common case */
 517 enum {
 518         AC_JACK_LOC_NONE,
 519         AC_JACK_LOC_REAR,
 520         AC_JACK_LOC_FRONT,
 521         AC_JACK_LOC_LEFT,
 522         AC_JACK_LOC_RIGHT,
 523         AC_JACK_LOC_TOP,
 524         AC_JACK_LOC_BOTTOM,
 525 };
 526 /* bits 4-5 */
 527 enum {
 528         AC_JACK_LOC_EXTERNAL = 0x00,
 529         AC_JACK_LOC_INTERNAL = 0x10,
 530         AC_JACK_LOC_SEPARATE = 0x20,
 531         AC_JACK_LOC_OTHER    = 0x30,
 532 };
 533 enum {
 534         /* external on primary chasis */
 535         AC_JACK_LOC_REAR_PANEL = 0x07,
 536         AC_JACK_LOC_DRIVE_BAY,
 537         /* internal */
 538         AC_JACK_LOC_RISER = 0x17,
 539         AC_JACK_LOC_HDMI,
 540         AC_JACK_LOC_ATAPI,
 541         /* others */
 542         AC_JACK_LOC_MOBILE_IN = 0x37,
 543         AC_JACK_LOC_MOBILE_OUT,
 544 };
 545
 546 /* Port connectivity (0-3) */
 547 enum {
 548         AC_JACK_PORT_COMPLEX,
 549         AC_JACK_PORT_NONE,
 550         AC_JACK_PORT_FIXED,
 551         AC_JACK_PORT_BOTH,
 552 };
 553
 554 /* max. codec address */
 555 #define HDA_MAX_CODEC_ADDRESS   0x0f
 556
 557 /*
 558  * generic arrays
 559  */
 560 struct snd_array {
 561         unsigned int used;
 562         unsigned int alloced;
 563         unsigned int elem_size;
 564         unsigned int alloc_align;
 565         void *list;
 566 };
 567
 568 void *snd_array_new(struct snd_array *array);
 569 void snd_array_free(struct snd_array *array);
 570 static inline void snd_array_init(struct snd_array *array, unsigned int size,
 571                                   unsigned int align)
 572 {
 573         array->elem_size = size;
 574         array->alloc_align = align;
 575 }
 576
 577 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
 578 {
 579         return array->list + idx * array->elem_size;
 580 }
 581
 582 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
 583 {
 584         return (unsigned long)(ptr - array->list) / array->elem_size;
 585 }
 586
 587 /*
 588  * Structures
 589  */
 590
 591 struct hda_bus;
 592 struct hda_beep;
 593 struct hda_codec;
 594 struct hda_pcm;
 595 struct hda_pcm_stream;
 596 struct hda_bus_unsolicited;
 597
 598 /* NID type */
 599 typedef u16 hda_nid_t;
 600
 601 /* bus operators */
 602 struct hda_bus_ops {
 603         /* send a single command */
 604         int (*command)(struct hda_bus *bus, unsigned int cmd);
 605         /* get a response from the last command */
 606         unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
 607         /* free the private data */
 608         void (*private_free)(struct hda_bus *);
 609         /* attach a PCM stream */
 610         int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
 611                           struct hda_pcm *pcm);
 612         /* reset bus for retry verb */
 613         void (*bus_reset)(struct hda_bus *bus);
 614 #ifdef CONFIG_PM
 615         /* notify power-up/down from codec to controller */
 616         void (*pm_notify)(struct hda_bus *bus, bool power_up);
 617 #endif
 618 #ifdef CONFIG_SND_HDA_DSP_LOADER
 619         /* prepare DSP transfer */
 620         int (*load_dsp_prepare)(struct hda_bus *bus, unsigned int format,
 621                                 unsigned int byte_size,
 622                                 struct snd_dma_buffer *bufp);
 623         /* start/stop DSP transfer */
 624         void (*load_dsp_trigger)(struct hda_bus *bus, bool start);
 625         /* clean up DSP transfer */
 626         void (*load_dsp_cleanup)(struct hda_bus *bus,
 627                                  struct snd_dma_buffer *dmab);
 628 #endif
 629 };
 630
 631 /* template to pass to the bus constructor */
 632 struct hda_bus_template {
 633         void *private_data;
 634         struct pci_dev *pci;
 635         const char *modelname;
 636         int *power_save;
 637         struct hda_bus_ops ops;
 638 };
 639
 640 /*
 641  * codec bus
 642  *
 643  * each controller needs to creata a hda_bus to assign the accessor.
 644  * A hda_bus contains several codecs in the list codec_list.
 645  */
 646 struct hda_bus {
 647         struct snd_card *card;
 648
 649         /* copied from template */
 650         void *private_data;
 651         struct pci_dev *pci;
 652         const char *modelname;
 653         int *power_save;
 654         struct hda_bus_ops ops;
 655
 656         /* codec linked list */
 657         struct list_head codec_list;
 658         /* link caddr -> codec */
 659         struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
 660
 661         struct mutex cmd_mutex;
 662         struct mutex prepare_mutex;
 663
 664         /* unsolicited event queue */
 665         struct hda_bus_unsolicited *unsol;
 666         char workq_name[16];
 667         struct workqueue_struct *workq; /* common workqueue for codecs */
 668
 669         /* assigned PCMs */
 670         DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
 671
 672         /* misc op flags */
 673         unsigned int needs_damn_long_delay :1;
 674         unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
 675         unsigned int sync_write:1;      /* sync after verb write */
 676         /* status for codec/controller */
 677         unsigned int shutdown :1;       /* being unloaded */
 678         unsigned int rirb_error:1;      /* error in codec communication */
 679         unsigned int response_reset:1;  /* controller was reset */
 680         unsigned int in_reset:1;        /* during reset operation */
 681         unsigned int power_keep_link_on:1; /* don't power off HDA link */
 682
 683         int primary_dig_out_type;       /* primary digital out PCM type */
 684 };
 685
 686 /*
 687  * codec preset
 688  *
 689  * Known codecs have the patch to build and set up the controls/PCMs
 690  * better than the generic parser.
 691  */
 692 struct hda_codec_preset {
 693         unsigned int id;
 694         unsigned int mask;
 695         unsigned int subs;
 696         unsigned int subs_mask;
 697         unsigned int rev;
 698         hda_nid_t afg, mfg;
 699         const char *name;
 700         int (*patch)(struct hda_codec *codec);
 701 };
 702
 703 struct hda_codec_preset_list {
 704         const struct hda_codec_preset *preset;
 705         struct module *owner;
 706         struct list_head list;
 707 };
 708
 709 /* initial hook */
 710 int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
 711 int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
 712
 713 /* ops set by the preset patch */
 714 struct hda_codec_ops {
 715         int (*build_controls)(struct hda_codec *codec);
 716         int (*build_pcms)(struct hda_codec *codec);
 717         int (*init)(struct hda_codec *codec);
 718         void (*free)(struct hda_codec *codec);
 719         void (*unsol_event)(struct hda_codec *codec, unsigned int res);
 720         void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
 721                                 unsigned int power_state);
 722 #ifdef CONFIG_PM
 723         int (*suspend)(struct hda_codec *codec);
 724         int (*resume)(struct hda_codec *codec);
 725         int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
 726 #endif
 727         void (*reboot_notify)(struct hda_codec *codec);
 728 };
 729
 730 /* record for amp information cache */
 731 struct hda_cache_head {
 732         u32 key:31;             /* hash key */
 733         u32 dirty:1;
 734         u16 val;                /* assigned value */
 735         u16 next;
 736 };
 737
 738 struct hda_amp_info {
 739         struct hda_cache_head head;
 740         u32 amp_caps;           /* amp capabilities */
 741         u16 vol[2];             /* current volume & mute */
 742 };
 743
 744 struct hda_cache_rec {
 745         u16 hash[64];                   /* hash table for index */
 746         struct snd_array buf;           /* record entries */
 747 };
 748
 749 /* PCM callbacks */
 750 struct hda_pcm_ops {
 751         int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
 752                     struct snd_pcm_substream *substream);
 753         int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
 754                      struct snd_pcm_substream *substream);
 755         int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
 756                        unsigned int stream_tag, unsigned int format,
 757                        struct snd_pcm_substream *substream);
 758         int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
 759                        struct snd_pcm_substream *substream);
 760         unsigned int (*get_delay)(struct hda_pcm_stream *info,
 761                                   struct hda_codec *codec,
 762                                   struct snd_pcm_substream *substream);
 763 };
 764
 765 /* PCM information for each substream */
 766 struct hda_pcm_stream {
 767         unsigned int substreams;        /* number of substreams, 0 = not exist*/
 768         unsigned int channels_min;      /* min. number of channels */
 769         unsigned int channels_max;      /* max. number of channels */
 770         hda_nid_t nid;  /* default NID to query rates/formats/bps, or set up */
 771         u32 rates;      /* supported rates */
 772         u64 formats;    /* supported formats (SNDRV_PCM_FMTBIT_) */
 773         unsigned int maxbps;    /* supported max. bit per sample */
 774         const struct snd_pcm_chmap_elem *chmap; /* chmap to override */
 775         struct hda_pcm_ops ops;
 776 };
 777
 778 /* PCM types */
 779 enum {
 780         HDA_PCM_TYPE_AUDIO,
 781         HDA_PCM_TYPE_SPDIF,
 782         HDA_PCM_TYPE_HDMI,
 783         HDA_PCM_TYPE_MODEM,
 784         HDA_PCM_NTYPES
 785 };
 786
 787 /* for PCM creation */
 788 struct hda_pcm {
 789         char *name;
 790         struct hda_pcm_stream stream[2];
 791         unsigned int pcm_type;  /* HDA_PCM_TYPE_XXX */
 792         int device;             /* device number to assign */
 793         struct snd_pcm *pcm;    /* assigned PCM instance */
 794         bool own_chmap;         /* codec driver provides own channel maps */
 795 };
 796
 797 /* codec information */
 798 struct hda_codec {
 799         struct hda_bus *bus;
 800         unsigned int addr;      /* codec addr*/
 801         struct list_head list;  /* list point */
 802
 803         hda_nid_t afg;  /* AFG node id */
 804         hda_nid_t mfg;  /* MFG node id */
 805
 806         /* ids */
 807         u8 afg_function_id;
 808         u8 mfg_function_id;
 809         u8 afg_unsol;
 810         u8 mfg_unsol;
 811         u32 vendor_id;
 812         u32 subsystem_id;
 813         u32 revision_id;
 814
 815         /* detected preset */
 816         const struct hda_codec_preset *preset;
 817         struct module *owner;
 818         const char *vendor_name;        /* codec vendor name */
 819         const char *chip_name;          /* codec chip name */
 820         const char *modelname;  /* model name for preset */
 821
 822         /* set by patch */
 823         struct hda_codec_ops patch_ops;
 824
 825         /* PCM to create, set by patch_ops.build_pcms callback */
 826         unsigned int num_pcms;
 827         struct hda_pcm *pcm_info;
 828
 829         /* codec specific info */
 830         void *spec;
 831
 832         /* beep device */
 833         struct hda_beep *beep;
 834         unsigned int beep_mode;
 835
 836         /* widget capabilities cache */
 837         unsigned int num_nodes;
 838         hda_nid_t start_nid;
 839         u32 *wcaps;
 840
 841         struct snd_array mixers;        /* list of assigned mixer elements */
 842         struct snd_array nids;          /* list of mapped mixer elements */
 843
 844         struct hda_cache_rec amp_cache; /* cache for amp access */
 845         struct hda_cache_rec cmd_cache; /* cache for other commands */
 846
 847         struct list_head conn_list;     /* linked-list of connection-list */
 848
 849         struct mutex spdif_mutex;
 850         struct mutex control_mutex;
 851         struct mutex hash_mutex;
 852         struct snd_array spdif_out;
 853         unsigned int spdif_in_enable;   /* SPDIF input enable? */
 854         const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
 855         struct snd_array init_pins;     /* initial (BIOS) pin configurations */
 856         struct snd_array driver_pins;   /* pin configs set by codec parser */
 857         struct snd_array cvt_setups;    /* audio convert setups */
 858
 859 #ifdef CONFIG_SND_HDA_HWDEP
 860         struct mutex user_mutex;
 861         struct snd_hwdep *hwdep;        /* assigned hwdep device */
 862         struct snd_array init_verbs;    /* additional init verbs */
 863         struct snd_array hints;         /* additional hints */
 864         struct snd_array user_pins;     /* default pin configs to override */
 865 #endif
 866
 867         /* misc flags */
 868         unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
 869                                              * status change
 870                                              * (e.g. Realtek codecs)
 871                                              */
 872         unsigned int pin_amp_workaround:1; /* pin out-amp takes index
 873                                             * (e.g. Conexant codecs)
 874                                             */
 875         unsigned int single_adc_amp:1; /* adc in-amp takes no index
 876                                         * (e.g. CX20549 codec)
 877                                         */
 878         unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
 879         unsigned int pins_shutup:1;     /* pins are shut up */
 880         unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
 881         unsigned int no_jack_detect:1;  /* Machine has no jack-detection */
 882         unsigned int inv_eapd:1; /* broken h/w: inverted EAPD control */
 883         unsigned int inv_jack_detect:1; /* broken h/w: inverted detection bit */
 884         unsigned int pcm_format_first:1; /* PCM format must be set first */
 885         unsigned int epss:1;            /* supporting EPSS? */
 886         unsigned int cached_write:1;    /* write only to caches */
 887 #ifdef CONFIG_PM
 888         unsigned int power_on :1;       /* current (global) power-state */
 889         unsigned int d3_stop_clk:1;     /* support D3 operation without BCLK */
 890         unsigned int pm_down_notified:1; /* PM notified to controller */
 891         unsigned int in_pm:1;           /* suspend/resume being performed */
 892         int power_transition;   /* power-state in transition */
 893         int power_count;        /* current (global) power refcount */
 894         struct delayed_work power_work; /* delayed task for powerdown */
 895         unsigned long power_on_acct;
 896         unsigned long power_off_acct;
 897         unsigned long power_jiffies;
 898         spinlock_t power_lock;
 899 #endif
 900
 901         /* filter the requested power state per nid */
 902         unsigned int (*power_filter)(struct hda_codec *codec, hda_nid_t nid,
 903                                      unsigned int power_state);
 904
 905         /* codec-specific additional proc output */
 906         void (*proc_widget_hook)(struct snd_info_buffer *buffer,
 907                                  struct hda_codec *codec, hda_nid_t nid);
 908
 909         /* jack detection */
 910         struct snd_array jacktbl;
 911         unsigned long jackpoll_interval; /* In jiffies. Zero means no poll, rely on unsol events */
 912         struct delayed_work jackpoll_work;
 913
 914 #ifdef CONFIG_SND_HDA_INPUT_JACK
 915         /* jack detection */
 916         struct snd_array jacks;
 917 #endif
 918
 919         /* fix-up list */
 920         int fixup_id;
 921         const struct hda_fixup *fixup_list;
 922         const char *fixup_name;
 923
 924         /* additional init verbs */
 925         struct snd_array verbs;
 926 };
 927
 928 /* direction */
 929 enum {
 930         HDA_INPUT, HDA_OUTPUT
 931 };
 932
 933
 934 /*
 935  * constructors
 936  */
 937 int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
 938                     struct hda_bus **busp);
 939 int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
 940                       struct hda_codec **codecp);
 941 int snd_hda_codec_configure(struct hda_codec *codec);
 942 int snd_hda_codec_update_widgets(struct hda_codec *codec);
 943
 944 /*
 945  * low level functions
 946  */
 947 unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
 948                                 int direct,
 949                                 unsigned int verb, unsigned int parm);
 950 int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
 951                         unsigned int verb, unsigned int parm);
 952 #define snd_hda_param_read(codec, nid, param) \
 953         snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
 954 int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
 955                           hda_nid_t *start_id);
 956 int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
 957                             hda_nid_t *conn_list, int max_conns);
 958 static inline int
 959 snd_hda_get_num_conns(struct hda_codec *codec, hda_nid_t nid)
 960 {
 961         return snd_hda_get_connections(codec, nid, NULL, 0);
 962 }
 963 int snd_hda_get_num_raw_conns(struct hda_codec *codec, hda_nid_t nid);
 964 int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid,
 965                             hda_nid_t *conn_list, int max_conns);
 966 int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
 967                           const hda_nid_t **listp);
 968 int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
 969                           const hda_nid_t *list);
 970 int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
 971                            hda_nid_t nid, int recursive);
 972 int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
 973                                 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
 974
 975 struct hda_verb {
 976         hda_nid_t nid;
 977         u32 verb;
 978         u32 param;
 979 };
 980
 981 void snd_hda_sequence_write(struct hda_codec *codec,
 982                             const struct hda_verb *seq);
 983
 984 /* unsolicited event */
 985 int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
 986
 987 /* cached write */
 988 int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
 989                               int direct, unsigned int verb, unsigned int parm);
 990 void snd_hda_sequence_write_cache(struct hda_codec *codec,
 991                                   const struct hda_verb *seq);
 992 int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
 993                               int direct, unsigned int verb, unsigned int parm);
 994 void snd_hda_codec_resume_cache(struct hda_codec *codec);
 995 /* both for cmd & amp caches */
 996 void snd_hda_codec_flush_cache(struct hda_codec *codec);
 997
 998 /* the struct for codec->pin_configs */
 999 struct hda_pincfg {
1000         hda_nid_t nid;
1001         unsigned char ctrl;     /* original pin control value */
1002         unsigned char target;   /* target pin control value */
1003         unsigned int cfg;       /* default configuration */
1004 };
1005
1006 unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
1007 int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
1008                              unsigned int cfg);
1009 int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
1010                        hda_nid_t nid, unsigned int cfg); /* for hwdep */
1011 void snd_hda_shutup_pins(struct hda_codec *codec);
1012
1013 /* SPDIF controls */
1014 struct hda_spdif_out {
1015         hda_nid_t nid;          /* Converter nid values relate to */
1016         unsigned int status;    /* IEC958 status bits */
1017         unsigned short ctls;    /* SPDIF control bits */
1018 };
1019 struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
1020                                                hda_nid_t nid);
1021 void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
1022 void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
1023
1024 /*
1025  * Mixer
1026  */
1027 int snd_hda_build_controls(struct hda_bus *bus);
1028 int snd_hda_codec_build_controls(struct hda_codec *codec);
1029
1030 /*
1031  * PCM
1032  */
1033 int snd_hda_build_pcms(struct hda_bus *bus);
1034 int snd_hda_codec_build_pcms(struct hda_codec *codec);
1035
1036 int snd_hda_codec_prepare(struct hda_codec *codec,
1037                           struct hda_pcm_stream *hinfo,
1038                           unsigned int stream,
1039                           unsigned int format,
1040                           struct snd_pcm_substream *substream);
1041 void snd_hda_codec_cleanup(struct hda_codec *codec,
1042                            struct hda_pcm_stream *hinfo,
1043                            struct snd_pcm_substream *substream);
1044
1045 void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
1046                                 u32 stream_tag,
1047                                 int channel_id, int format);
1048 void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
1049                                     int do_now);
1050 #define snd_hda_codec_cleanup_stream(codec, nid) \
1051         __snd_hda_codec_cleanup_stream(codec, nid, 0)
1052 unsigned int snd_hda_calc_stream_format(unsigned int rate,
1053                                         unsigned int channels,
1054                                         unsigned int format,
1055                                         unsigned int maxbps,
1056                                         unsigned short spdif_ctls);
1057 int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
1058                                 unsigned int format);
1059
1060 extern const struct snd_pcm_chmap_elem snd_pcm_2_1_chmaps[];
1061
1062 /*
1063  * Misc
1064  */
1065 void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
1066 void snd_hda_bus_reboot_notify(struct hda_bus *bus);
1067 void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
1068                                     unsigned int power_state);
1069
1070 int snd_hda_lock_devices(struct hda_bus *bus);
1071 void snd_hda_unlock_devices(struct hda_bus *bus);
1072
1073 /*
1074  * power management
1075  */
1076 #ifdef CONFIG_PM
1077 int snd_hda_suspend(struct hda_bus *bus);
1078 int snd_hda_resume(struct hda_bus *bus);
1079 #endif
1080
1081 static inline
1082 int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1083 {
1084 #ifdef CONFIG_PM
1085         if (codec->patch_ops.check_power_status)
1086                 return codec->patch_ops.check_power_status(codec, nid);
1087 #endif
1088         return 0;
1089 }
1090
1091 /*
1092  * get widget information
1093  */
1094 const char *snd_hda_get_jack_connectivity(u32 cfg);
1095 const char *snd_hda_get_jack_type(u32 cfg);
1096 const char *snd_hda_get_jack_location(u32 cfg);
1097
1098 /*
1099  * power saving
1100  */
1101 #ifdef CONFIG_PM
1102 void snd_hda_power_save(struct hda_codec *codec, int delta, bool d3wait);
1103 void snd_hda_update_power_acct(struct hda_codec *codec);
1104 #else
1105 static inline void snd_hda_power_save(struct hda_codec *codec, int delta,
1106                                       bool d3wait) {}
1107 #endif
1108
1109 /**
1110  * snd_hda_power_up - Power-up the codec
1111  * @codec: HD-audio codec
1112  *
1113  * Increment the power-up counter and power up the hardware really when
1114  * not turned on yet.
1115  */
1116 static inline void snd_hda_power_up(struct hda_codec *codec)
1117 {
1118         snd_hda_power_save(codec, 1, false);
1119 }
1120
1121 /**
1122  * snd_hda_power_up_d3wait - Power-up the codec after waiting for any pending
1123  *   D3 transition to complete.  This differs from snd_hda_power_up() when
1124  *   power_transition == -1.  snd_hda_power_up sees this case as a nop,
1125  *   snd_hda_power_up_d3wait waits for the D3 transition to complete then powers
1126  *   back up.
1127  * @codec: HD-audio codec
1128  *
1129  * Cancel any power down operation hapenning on the work queue, then power up.
1130  */
1131 static inline void snd_hda_power_up_d3wait(struct hda_codec *codec)
1132 {
1133         snd_hda_power_save(codec, 1, true);
1134 }
1135
1136 /**
1137  * snd_hda_power_down - Power-down the codec
1138  * @codec: HD-audio codec
1139  *
1140  * Decrement the power-up counter and schedules the power-off work if
1141  * the counter rearches to zero.
1142  */
1143 static inline void snd_hda_power_down(struct hda_codec *codec)
1144 {
1145         snd_hda_power_save(codec, -1, false);
1146 }
1147
1148 /**
1149  * snd_hda_power_sync - Synchronize the power-save status
1150  * @codec: HD-audio codec
1151  *
1152  * Synchronize the actual power state with the power account;
1153  * called when power_save parameter is changed
1154  */
1155 static inline void snd_hda_power_sync(struct hda_codec *codec)
1156 {
1157         snd_hda_power_save(codec, 0, false);
1158 }
1159
1160 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1161 /*
1162  * patch firmware
1163  */
1164 int snd_hda_load_patch(struct hda_bus *bus, size_t size, const void *buf);
1165 #endif
1166
1167 #ifdef CONFIG_SND_HDA_DSP_LOADER
1168 static inline int
1169 snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
1170                                 unsigned int size,
1171                                 struct snd_dma_buffer *bufp)
1172 {
1173         return codec->bus->ops.load_dsp_prepare(codec->bus, format, size, bufp);
1174 }
1175 static inline void
1176 snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start)
1177 {
1178         return codec->bus->ops.load_dsp_trigger(codec->bus, start);
1179 }
1180 static inline void
1181 snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
1182                                 struct snd_dma_buffer *dmab)
1183 {
1184         return codec->bus->ops.load_dsp_cleanup(codec->bus, dmab);
1185 }
1186 #else
1187 static inline int
1188 snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
1189                                 unsigned int size,
1190                                 struct snd_dma_buffer *bufp)
1191 {
1192         return -ENOSYS;
1193 }
1194 static inline void
1195 snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start) {}
1196 static inline void
1197 snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
1198                                 struct snd_dma_buffer *dmab) {}
1199 #endif
1200
1201 /*
1202  * Codec modularization
1203  */
1204
1205 /* Export symbols only for communication with codec drivers;
1206  * When built in kernel, all HD-audio drivers are supposed to be statically
1207  * linked to the kernel.  Thus, the symbols don't have to (or shouldn't) be
1208  * exported unless it's built as a module.
1209  */
1210 #ifdef MODULE
1211 #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1212 #else
1213 #define EXPORT_SYMBOL_HDA(sym)
1214 #endif
1215
1216 #endif /* __SOUND_HDA_CODEC_H */