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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / emu10k1 / emu10k1_main.c
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/module.h>
39 #include <linux/interrupt.h>
40 #include <linux/pci.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/mutex.h>
44
45
46 #include <sound/core.h>
47 #include <sound/emu10k1.h>
48 #include <linux/firmware.h>
49 #include "p16v.h"
50 #include "tina2.h"
51 #include "p17v.h"
52
53
54 #define HANA_FILENAME "emu/hana.fw"
55 #define DOCK_FILENAME "emu/audio_dock.fw"
56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
58 #define EMU0404_FILENAME "emu/emu0404.fw"
59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60
61 MODULE_FIRMWARE(HANA_FILENAME);
62 MODULE_FIRMWARE(DOCK_FILENAME);
63 MODULE_FIRMWARE(EMU1010B_FILENAME);
64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
65 MODULE_FIRMWARE(EMU0404_FILENAME);
66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
67
68
69 /*************************************************************************
70 * EMU10K1 init / done
71 *************************************************************************/
72
73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
74 {
75 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
76 snd_emu10k1_ptr_write(emu, IP, ch, 0);
77 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
79 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
80 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
81 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82
83 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
84 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
85 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
87 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
88 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89
90 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
91 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
92 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
93 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
94 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
95 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
97 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98
99 /*** these are last so OFF prevents writing ***/
100 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
101 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
102 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
104 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105
106 /* Audigy extra stuffs */
107 if (emu->audigy) {
108 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
112 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
113 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
114 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115 }
116 }
117
118 static unsigned int spi_dac_init[] = {
119 0x00ff,
120 0x02ff,
121 0x0400,
122 0x0520,
123 0x0600,
124 0x08ff,
125 0x0aff,
126 0x0cff,
127 0x0eff,
128 0x10ff,
129 0x1200,
130 0x1400,
131 0x1480,
132 0x1800,
133 0x1aff,
134 0x1cff,
135 0x1e00,
136 0x0530,
137 0x0602,
138 0x0622,
139 0x1400,
140 };
141
142 static unsigned int i2c_adc_init[][2] = {
143 { 0x17, 0x00 }, /* Reset */
144 { 0x07, 0x00 }, /* Timeout */
145 { 0x0b, 0x22 }, /* Interface control */
146 { 0x0c, 0x22 }, /* Master mode control */
147 { 0x0d, 0x08 }, /* Powerdown control */
148 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
149 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
150 { 0x10, 0x7b }, /* ALC Control 1 */
151 { 0x11, 0x00 }, /* ALC Control 2 */
152 { 0x12, 0x32 }, /* ALC Control 3 */
153 { 0x13, 0x00 }, /* Noise gate control */
154 { 0x14, 0xa6 }, /* Limiter control */
155 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
156 };
157
158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
159 {
160 unsigned int silent_page;
161 int ch;
162 u32 tmp;
163
164 /* disable audio and lock cache */
165 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
166 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
167
168 /* reset recording buffers */
169 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
170 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
171 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
172 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
173 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
174 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175
176 /* disable channel interrupt */
177 outl(0, emu->port + INTE);
178 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
179 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
181 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
182
183 if (emu->audigy) {
184 /* set SPDIF bypass mode */
185 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
186 /* enable rear left + rear right AC97 slots */
187 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188 AC97SLOT_REAR_LEFT);
189 }
190
191 /* init envelope engine */
192 for (ch = 0; ch < NUM_G; ch++)
193 snd_emu10k1_voice_init(emu, ch);
194
195 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
196 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
197 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
198
199 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
200 /* Hacks for Alice3 to work independent of haP16V driver */
201 /* Setup SRCMulti_I2S SamplingRate */
202 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203 tmp &= 0xfffff1ff;
204 tmp |= (0x2<<9);
205 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206
207 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
209 /* Setup SRCMulti Input Audio Enable */
210 /* Use 0xFFFFFFFF to enable P16V sounds. */
211 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212
213 /* Enabled Phased (8-channel) P16V playback */
214 outl(0x0201, emu->port + HCFG2);
215 /* Set playback routing. */
216 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
217 }
218 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
219 /* Hacks for Alice3 to work independent of haP16V driver */
220 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
221 /* Setup SRCMulti_I2S SamplingRate */
222 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
223 tmp &= 0xfffff1ff;
224 tmp |= (0x2<<9);
225 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226
227 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
228 outl(0x600000, emu->port + 0x20);
229 outl(0x14, emu->port + 0x24);
230
231 /* Setup SRCMulti Input Audio Enable */
232 outl(0x7b0000, emu->port + 0x20);
233 outl(0xFF000000, emu->port + 0x24);
234
235 /* Setup SPDIF Out Audio Enable */
236 /* The Audigy 2 Value has a separate SPDIF out,
237 * so no need for a mixer switch
238 */
239 outl(0x7a0000, emu->port + 0x20);
240 outl(0xFF000000, emu->port + 0x24);
241 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
242 outl(tmp, emu->port + A_IOCFG);
243 }
244 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
245 int size, n;
246
247 size = ARRAY_SIZE(spi_dac_init);
248 for (n = 0; n < size; n++)
249 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250
251 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
252 /* Enable GPIOs
253 * GPIO0: Unknown
254 * GPIO1: Speakers-enabled.
255 * GPIO2: Unknown
256 * GPIO3: Unknown
257 * GPIO4: IEC958 Output on.
258 * GPIO5: Unknown
259 * GPIO6: Unknown
260 * GPIO7: Unknown
261 */
262 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
263 }
264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265 int size, n;
266
267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 tmp = inl(emu->port + A_IOCFG);
269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
270 tmp = inl(emu->port + A_IOCFG);
271 size = ARRAY_SIZE(i2c_adc_init);
272 for (n = 0; n < size; n++)
273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
274 for (n = 0; n < 4; n++) {
275 emu->i2c_capture_volume[n][0] = 0xcf;
276 emu->i2c_capture_volume[n][1] = 0xcf;
277 }
278 }
279
280
281 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
283 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284
285 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
286 for (ch = 0; ch < NUM_G; ch++) {
287 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289 }
290
291 if (emu->card_capabilities->emu_model) {
292 outl(HCFG_AUTOMUTE_ASYNC |
293 HCFG_EMU32_SLAVE |
294 HCFG_AUDIOENABLE, emu->port + HCFG);
295 /*
296 * Hokay, setup HCFG
297 * Mute Disable Audio = 0
298 * Lock Tank Memory = 1
299 * Lock Sound Memory = 0
300 * Auto Mute = 1
301 */
302 } else if (emu->audigy) {
303 if (emu->revision == 4) /* audigy2 */
304 outl(HCFG_AUDIOENABLE |
305 HCFG_AC3ENABLE_CDSPDIF |
306 HCFG_AC3ENABLE_GPSPDIF |
307 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 else
309 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 * e.g. card_capabilities->joystick */
312 } else if (emu->model == 0x20 ||
313 emu->model == 0xc400 ||
314 (emu->model == 0x21 && emu->revision < 6))
315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 else
317 /* With on-chip joystick */
318 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319
320 if (enable_ir) { /* enable IR for SB Live */
321 if (emu->card_capabilities->emu_model) {
322 ; /* Disable all access to A_IOCFG for the emu1010 */
323 } else if (emu->card_capabilities->i2c_adc) {
324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
325 } else if (emu->audigy) {
326 unsigned int reg = inl(emu->port + A_IOCFG);
327 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 udelay(500);
329 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 udelay(100);
331 outl(reg, emu->port + A_IOCFG);
332 } else {
333 unsigned int reg = inl(emu->port + HCFG);
334 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 udelay(500);
336 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 udelay(100);
338 outl(reg, emu->port + HCFG);
339 }
340 }
341
342 if (emu->card_capabilities->emu_model) {
343 ; /* Disable all access to A_IOCFG for the emu1010 */
344 } else if (emu->card_capabilities->i2c_adc) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
346 } else if (emu->audigy) { /* enable analog output */
347 unsigned int reg = inl(emu->port + A_IOCFG);
348 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349 }
350
351 return 0;
352 }
353
354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
355 {
356 /*
357 * Enable the audio bit
358 */
359 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
360
361 /* Enable analog/digital outs on audigy */
362 if (emu->card_capabilities->emu_model) {
363 ; /* Disable all access to A_IOCFG for the emu1010 */
364 } else if (emu->card_capabilities->i2c_adc) {
365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
366 } else if (emu->audigy) {
367 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
368
369 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
370 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
371 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 * So, sequence is important. */
373 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
374 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
375 /* Unmute Analog now. */
376 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
377 } else {
378 /* Disable routing from AC97 line out to Front speakers */
379 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
380 }
381 }
382
383 #if 0
384 {
385 unsigned int tmp;
386 /* FIXME: the following routine disables LiveDrive-II !! */
387 /* TOSLink detection */
388 emu->tos_link = 0;
389 tmp = inl(emu->port + HCFG);
390 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
391 outl(tmp|0x800, emu->port + HCFG);
392 udelay(50);
393 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
394 emu->tos_link = 1;
395 outl(tmp, emu->port + HCFG);
396 }
397 }
398 }
399 #endif
400
401 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
402 }
403
404 int snd_emu10k1_done(struct snd_emu10k1 *emu)
405 {
406 int ch;
407
408 outl(0, emu->port + INTE);
409
410 /*
411 * Shutdown the chip
412 */
413 for (ch = 0; ch < NUM_G; ch++)
414 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
415 for (ch = 0; ch < NUM_G; ch++) {
416 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
417 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
418 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
419 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
420 }
421
422 /* reset recording buffers */
423 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
424 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
428 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
429 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
430 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
431 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
432 if (emu->audigy)
433 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
434 else
435 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
436
437 /* disable channel interrupt */
438 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
439 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442
443 /* disable audio and lock cache */
444 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
446
447 return 0;
448 }
449
450 /*************************************************************************
451 * ECARD functional implementation
452 *************************************************************************/
453
454 /* In A1 Silicon, these bits are in the HC register */
455 #define HOOKN_BIT (1L << 12)
456 #define HANDN_BIT (1L << 11)
457 #define PULSEN_BIT (1L << 10)
458
459 #define EC_GDI1 (1 << 13)
460 #define EC_GDI0 (1 << 14)
461
462 #define EC_NUM_CONTROL_BITS 20
463
464 #define EC_AC3_DATA_SELN 0x0001L
465 #define EC_EE_DATA_SEL 0x0002L
466 #define EC_EE_CNTRL_SELN 0x0004L
467 #define EC_EECLK 0x0008L
468 #define EC_EECS 0x0010L
469 #define EC_EESDO 0x0020L
470 #define EC_TRIM_CSN 0x0040L
471 #define EC_TRIM_SCLK 0x0080L
472 #define EC_TRIM_SDATA 0x0100L
473 #define EC_TRIM_MUTEN 0x0200L
474 #define EC_ADCCAL 0x0400L
475 #define EC_ADCRSTN 0x0800L
476 #define EC_DACCAL 0x1000L
477 #define EC_DACMUTEN 0x2000L
478 #define EC_LEDN 0x4000L
479
480 #define EC_SPDIF0_SEL_SHIFT 15
481 #define EC_SPDIF1_SEL_SHIFT 17
482 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
483 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
484 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
487 * be incremented any time the EEPROM's
488 * format is changed. */
489
490 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491
492 /* Addresses for special values stored in to EEPROM */
493 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
494 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
495 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496
497 #define EC_LAST_PROMFILE_ADDR 0x2f
498
499 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
500 * can be up to 30 characters in length
501 * and is stored as a NULL-terminated
502 * ASCII string. Any unused bytes must be
503 * filled with zeros */
504 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
505
506
507 /* Most of this stuff is pretty self-evident. According to the hardware
508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
509 * offset problem. Weird.
510 */
511 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
512 EC_TRIM_CSN)
513
514
515 #define EC_DEFAULT_ADC_GAIN 0xC4C4
516 #define EC_DEFAULT_SPDIF0_SEL 0x0
517 #define EC_DEFAULT_SPDIF1_SEL 0x4
518
519 /**************************************************************************
520 * @func Clock bits into the Ecard's control latch. The Ecard uses a
521 * control latch will is loaded bit-serially by toggling the Modem control
522 * lines from function 2 on the E8010. This function hides these details
523 * and presents the illusion that we are actually writing to a distinct
524 * register.
525 */
526
527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
528 {
529 unsigned short count;
530 unsigned int data;
531 unsigned long hc_port;
532 unsigned int hc_value;
533
534 hc_port = emu->port + HCFG;
535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
536 outl(hc_value, hc_port);
537
538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539
540 /* Set up the value */
541 data = ((value & 0x1) ? PULSEN_BIT : 0);
542 value >>= 1;
543
544 outl(hc_value | data, hc_port);
545
546 /* Clock the shift register */
547 outl(hc_value | data | HANDN_BIT, hc_port);
548 outl(hc_value | data, hc_port);
549 }
550
551 /* Latch the bits */
552 outl(hc_value | HOOKN_BIT, hc_port);
553 outl(hc_value, hc_port);
554 }
555
556 /**************************************************************************
557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
558 * trim value consists of a 16bit value which is composed of two
559 * 8 bit gain/trim values, one for the left channel and one for the
560 * right channel. The following table maps from the Gain/Attenuation
561 * value in decibels into the corresponding bit pattern for a single
562 * channel.
563 */
564
565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
566 unsigned short gain)
567 {
568 unsigned int bit;
569
570 /* Enable writing to the TRIM registers */
571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572
573 /* Do it again to insure that we meet hold time requirements */
574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575
576 for (bit = (1 << 15); bit; bit >>= 1) {
577 unsigned int value;
578
579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
580
581 if (gain & bit)
582 value |= EC_TRIM_SDATA;
583
584 /* Clock the bit */
585 snd_emu10k1_ecard_write(emu, value);
586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
587 snd_emu10k1_ecard_write(emu, value);
588 }
589
590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
591 }
592
593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
594 {
595 unsigned int hc_value;
596
597 /* Set up the initial settings */
598 emu->ecard_ctrl = EC_RAW_RUN_MODE |
599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601
602 /* Step 0: Set the codec type in the hardware control register
603 * and enable audio output */
604 hc_value = inl(emu->port + HCFG);
605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
606 inl(emu->port + HCFG);
607
608 /* Step 1: Turn off the led and deassert TRIM_CS */
609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610
611 /* Step 2: Calibrate the ADC and DAC */
612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613
614 /* Step 3: Wait for awhile; XXX We can't get away with this
615 * under a real operating system; we'll need to block and wait that
616 * way. */
617 snd_emu10k1_wait(emu, 48000);
618
619 /* Step 4: Switch off the DAC and ADC calibration. Note
620 * That ADC_CAL is actually an inverted signal, so we assert
621 * it here to stop calibration. */
622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623
624 /* Step 4: Switch into run mode */
625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626
627 /* Step 5: Set the analog input gain */
628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
629
630 return 0;
631 }
632
633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
634 {
635 unsigned long special_port;
636 unsigned int value;
637
638 /* Special initialisation routine
639 * before the rest of the IO-Ports become active.
640 */
641 special_port = emu->port + 0x38;
642 value = inl(special_port);
643 outl(0x00d00000, special_port);
644 value = inl(special_port);
645 outl(0x00d00001, special_port);
646 value = inl(special_port);
647 outl(0x00d0005f, special_port);
648 value = inl(special_port);
649 outl(0x00d0007f, special_port);
650 value = inl(special_port);
651 outl(0x0090007f, special_port);
652 value = inl(special_port);
653
654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
655 /* Delay to give time for ADC chip to switch on. It needs 113ms */
656 msleep(200);
657 return 0;
658 }
659
660 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu,
661 const struct firmware *fw_entry)
662 {
663 int n, i;
664 int reg;
665 int value;
666 unsigned int write_post;
667 unsigned long flags;
668
669 if (!fw_entry)
670 return -EIO;
671
672 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
673 /* GPIO7 -> FPGA PGMN
674 * GPIO6 -> FPGA CCLK
675 * GPIO5 -> FPGA DIN
676 * FPGA CONFIG OFF -> FPGA PGMN
677 */
678 spin_lock_irqsave(&emu->emu_lock, flags);
679 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
680 write_post = inl(emu->port + A_IOCFG);
681 udelay(100);
682 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
683 write_post = inl(emu->port + A_IOCFG);
684 udelay(100); /* Allow FPGA memory to clean */
685 for (n = 0; n < fw_entry->size; n++) {
686 value = fw_entry->data[n];
687 for (i = 0; i < 8; i++) {
688 reg = 0x80;
689 if (value & 0x1)
690 reg = reg | 0x20;
691 value = value >> 1;
692 outl(reg, emu->port + A_IOCFG);
693 write_post = inl(emu->port + A_IOCFG);
694 outl(reg | 0x40, emu->port + A_IOCFG);
695 write_post = inl(emu->port + A_IOCFG);
696 }
697 }
698 /* After programming, set GPIO bit 4 high again. */
699 outl(0x10, emu->port + A_IOCFG);
700 write_post = inl(emu->port + A_IOCFG);
701 spin_unlock_irqrestore(&emu->emu_lock, flags);
702
703 return 0;
704 }
705
706 static int emu1010_firmware_thread(void *data)
707 {
708 struct snd_emu10k1 *emu = data;
709 u32 tmp, tmp2, reg;
710 int err;
711
712 for (;;) {
713 /* Delay to allow Audio Dock to settle */
714 msleep_interruptible(1000);
715 if (kthread_should_stop())
716 break;
717 #ifdef CONFIG_PM_SLEEP
718 if (emu->suspend)
719 continue;
720 #endif
721 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
722 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
723 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
724 /* Audio Dock attached */
725 /* Return to Audio Dock programming mode */
726 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
727 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
728
729 if (!emu->dock_fw) {
730 const char *filename = NULL;
731 switch (emu->card_capabilities->emu_model) {
732 case EMU_MODEL_EMU1010:
733 filename = DOCK_FILENAME;
734 break;
735 case EMU_MODEL_EMU1010B:
736 filename = MICRO_DOCK_FILENAME;
737 break;
738 case EMU_MODEL_EMU1616:
739 filename = MICRO_DOCK_FILENAME;
740 break;
741 }
742 if (filename) {
743 err = request_firmware(&emu->dock_fw,
744 filename,
745 &emu->pci->dev);
746 if (err)
747 continue;
748 }
749 }
750
751 if (emu->dock_fw) {
752 err = snd_emu1010_load_firmware(emu, emu->dock_fw);
753 if (err)
754 continue;
755 }
756
757 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
758 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
759 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
760 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
761 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
762 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
763 if ((reg & 0x1f) != 0x15) {
764 /* FPGA failed to be programmed */
765 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
766 continue;
767 }
768 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
769 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
770 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
771 snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
772 tmp, tmp2);
773 /* Sync clocking between 1010 and Dock */
774 /* Allow DLL to settle */
775 msleep(10);
776 /* Unmute all. Default is muted after a firmware load */
777 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
778 }
779 }
780 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
781 return 0;
782 }
783
784 /*
785 * EMU-1010 - details found out from this driver, official MS Win drivers,
786 * testing the card:
787 *
788 * Audigy2 (aka Alice2):
789 * ---------------------
790 * * communication over PCI
791 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
792 * to 2 x 16-bit, using internal DSP instructions
793 * * slave mode, clock supplied by HANA
794 * * linked to HANA using:
795 * 32 x 32-bit serial EMU32 output channels
796 * 16 x EMU32 input channels
797 * (?) x I2S I/O channels (?)
798 *
799 * FPGA (aka HANA):
800 * ---------------
801 * * provides all (?) physical inputs and outputs of the card
802 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
803 * * provides clock signal for the card and Alice2
804 * * two crystals - for 44.1kHz and 48kHz multiples
805 * * provides internal routing of signal sources to signal destinations
806 * * inputs/outputs to Alice2 - see above
807 *
808 * Current status of the driver:
809 * ----------------------------
810 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
811 * * PCM device nb. 2:
812 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
813 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
814 */
815 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
816 {
817 unsigned int i;
818 u32 tmp, tmp2, reg;
819 int err;
820
821 snd_printk(KERN_INFO "emu1010: Special config.\n");
822 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
823 * Lock Sound Memory Cache, Lock Tank Memory Cache,
824 * Mute all codecs.
825 */
826 outl(0x0005a00c, emu->port + HCFG);
827 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
828 * Lock Tank Memory Cache,
829 * Mute all codecs.
830 */
831 outl(0x0005a004, emu->port + HCFG);
832 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
833 * Mute all codecs.
834 */
835 outl(0x0005a000, emu->port + HCFG);
836 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
837 * Mute all codecs.
838 */
839 outl(0x0005a000, emu->port + HCFG);
840
841 /* Disable 48Volt power to Audio Dock */
842 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
843
844 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
845 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
846 snd_printdd("reg1 = 0x%x\n", reg);
847 if ((reg & 0x3f) == 0x15) {
848 /* FPGA netlist already present so clear it */
849 /* Return to programming mode */
850
851 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
852 }
853 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
854 snd_printdd("reg2 = 0x%x\n", reg);
855 if ((reg & 0x3f) == 0x15) {
856 /* FPGA failed to return to programming mode */
857 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
858 return -ENODEV;
859 }
860 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
861
862 if (!emu->firmware) {
863 const char *filename;
864 switch (emu->card_capabilities->emu_model) {
865 case EMU_MODEL_EMU1010:
866 filename = HANA_FILENAME;
867 break;
868 case EMU_MODEL_EMU1010B:
869 filename = EMU1010B_FILENAME;
870 break;
871 case EMU_MODEL_EMU1616:
872 filename = EMU1010_NOTEBOOK_FILENAME;
873 break;
874 case EMU_MODEL_EMU0404:
875 filename = EMU0404_FILENAME;
876 break;
877 default:
878 return -ENODEV;
879 }
880
881 err = request_firmware(&emu->firmware, filename, &emu->pci->dev);
882 if (err != 0) {
883 snd_printk(KERN_ERR "emu1010: firmware: %s not found. Err = %d\n", filename, err);
884 return err;
885 }
886 snd_printk(KERN_INFO "emu1010: firmware file = %s, size = 0x%zx\n",
887 filename, emu->firmware->size);
888 }
889
890 err = snd_emu1010_load_firmware(emu, emu->firmware);
891 if (err != 0) {
892 snd_printk(KERN_INFO "emu1010: Loading Firmware failed\n");
893 return err;
894 }
895
896 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
897 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
898 if ((reg & 0x3f) != 0x15) {
899 /* FPGA failed to be programmed */
900 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
901 return -ENODEV;
902 }
903
904 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
905 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
906 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
907 snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
908 /* Enable 48Volt power to Audio Dock */
909 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
910
911 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
912 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
913 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
914 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
915 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
916 /* Optical -> ADAT I/O */
917 /* 0 : SPDIF
918 * 1 : ADAT
919 */
920 emu->emu1010.optical_in = 1; /* IN_ADAT */
921 emu->emu1010.optical_out = 1; /* IN_ADAT */
922 tmp = 0;
923 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
924 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
925 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
926 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
927 /* Set no attenuation on Audio Dock pads. */
928 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
929 emu->emu1010.adc_pads = 0x00;
930 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
931 /* Unmute Audio dock DACs, Headphone source DAC-4. */
932 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
933 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
934 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
935 /* DAC PADs. */
936 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
937 emu->emu1010.dac_pads = 0x0f;
938 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
939 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
940 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
941 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
942 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
943 /* MIDI routing */
944 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
945 /* Unknown. */
946 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
947 /* IRQ Enable: All on */
948 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
949 /* IRQ Enable: All off */
950 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
951
952 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
953 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
954 /* Default WCLK set to 48kHz. */
955 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
956 /* Word Clock source, Internal 48kHz x1 */
957 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
958 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
959 /* Audio Dock LEDs. */
960 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
961
962 #if 0
963 /* For 96kHz */
964 snd_emu1010_fpga_link_dst_src_write(emu,
965 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
966 snd_emu1010_fpga_link_dst_src_write(emu,
967 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
968 snd_emu1010_fpga_link_dst_src_write(emu,
969 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
970 snd_emu1010_fpga_link_dst_src_write(emu,
971 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
972 #endif
973 #if 0
974 /* For 192kHz */
975 snd_emu1010_fpga_link_dst_src_write(emu,
976 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
977 snd_emu1010_fpga_link_dst_src_write(emu,
978 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
979 snd_emu1010_fpga_link_dst_src_write(emu,
980 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
981 snd_emu1010_fpga_link_dst_src_write(emu,
982 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
983 snd_emu1010_fpga_link_dst_src_write(emu,
984 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
985 snd_emu1010_fpga_link_dst_src_write(emu,
986 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
987 snd_emu1010_fpga_link_dst_src_write(emu,
988 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
989 snd_emu1010_fpga_link_dst_src_write(emu,
990 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
991 #endif
992 #if 1
993 /* For 48kHz */
994 snd_emu1010_fpga_link_dst_src_write(emu,
995 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
996 snd_emu1010_fpga_link_dst_src_write(emu,
997 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
998 snd_emu1010_fpga_link_dst_src_write(emu,
999 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1000 snd_emu1010_fpga_link_dst_src_write(emu,
1001 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
1002 snd_emu1010_fpga_link_dst_src_write(emu,
1003 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
1004 snd_emu1010_fpga_link_dst_src_write(emu,
1005 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
1006 snd_emu1010_fpga_link_dst_src_write(emu,
1007 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
1008 snd_emu1010_fpga_link_dst_src_write(emu,
1009 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
1010 /* Pavel Hofman - setting defaults for 8 more capture channels
1011 * Defaults only, users will set their own values anyways, let's
1012 * just copy/paste.
1013 */
1014
1015 snd_emu1010_fpga_link_dst_src_write(emu,
1016 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1017 snd_emu1010_fpga_link_dst_src_write(emu,
1018 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1023 snd_emu1010_fpga_link_dst_src_write(emu,
1024 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1025 snd_emu1010_fpga_link_dst_src_write(emu,
1026 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1027 snd_emu1010_fpga_link_dst_src_write(emu,
1028 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1029 snd_emu1010_fpga_link_dst_src_write(emu,
1030 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1031 #endif
1032 #if 0
1033 /* Original */
1034 snd_emu1010_fpga_link_dst_src_write(emu,
1035 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1036 snd_emu1010_fpga_link_dst_src_write(emu,
1037 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1038 snd_emu1010_fpga_link_dst_src_write(emu,
1039 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1040 snd_emu1010_fpga_link_dst_src_write(emu,
1041 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1042 snd_emu1010_fpga_link_dst_src_write(emu,
1043 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1044 snd_emu1010_fpga_link_dst_src_write(emu,
1045 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1046 snd_emu1010_fpga_link_dst_src_write(emu,
1047 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1048 snd_emu1010_fpga_link_dst_src_write(emu,
1049 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1050 snd_emu1010_fpga_link_dst_src_write(emu,
1051 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1052 snd_emu1010_fpga_link_dst_src_write(emu,
1053 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1054 snd_emu1010_fpga_link_dst_src_write(emu,
1055 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1056 snd_emu1010_fpga_link_dst_src_write(emu,
1057 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1058 #endif
1059 for (i = 0; i < 0x20; i++) {
1060 /* AudioDock Elink <- Silence */
1061 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1062 }
1063 for (i = 0; i < 4; i++) {
1064 /* Hana SPDIF Out <- Silence */
1065 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1066 }
1067 for (i = 0; i < 7; i++) {
1068 /* Hamoa DAC <- Silence */
1069 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1070 }
1071 for (i = 0; i < 7; i++) {
1072 /* Hana ADAT Out <- Silence */
1073 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1074 }
1075 snd_emu1010_fpga_link_dst_src_write(emu,
1076 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1077 snd_emu1010_fpga_link_dst_src_write(emu,
1078 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1079 snd_emu1010_fpga_link_dst_src_write(emu,
1080 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1081 snd_emu1010_fpga_link_dst_src_write(emu,
1082 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1083 snd_emu1010_fpga_link_dst_src_write(emu,
1084 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1085 snd_emu1010_fpga_link_dst_src_write(emu,
1086 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1087 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1088
1089 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1090
1091 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1092 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1093 * Mute all codecs.
1094 */
1095 outl(0x0000a000, emu->port + HCFG);
1096 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1097 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1098 * Un-Mute all codecs.
1099 */
1100 outl(0x0000a001, emu->port + HCFG);
1101
1102 /* Initial boot complete. Now patches */
1103
1104 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1105 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1106 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1107 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1108 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1109 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1110 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1111
1112 /* Start Micro/Audio Dock firmware loader thread */
1113 if (!emu->emu1010.firmware_thread) {
1114 emu->emu1010.firmware_thread =
1115 kthread_create(emu1010_firmware_thread, emu,
1116 "emu1010_firmware");
1117 wake_up_process(emu->emu1010.firmware_thread);
1118 }
1119
1120 #if 0
1121 snd_emu1010_fpga_link_dst_src_write(emu,
1122 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1123 snd_emu1010_fpga_link_dst_src_write(emu,
1124 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1125 snd_emu1010_fpga_link_dst_src_write(emu,
1126 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1127 snd_emu1010_fpga_link_dst_src_write(emu,
1128 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1129 #endif
1130 /* Default outputs */
1131 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1132 /* 1616(M) cardbus default outputs */
1133 /* ALICE2 bus 0xa0 */
1134 snd_emu1010_fpga_link_dst_src_write(emu,
1135 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1136 emu->emu1010.output_source[0] = 17;
1137 snd_emu1010_fpga_link_dst_src_write(emu,
1138 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1139 emu->emu1010.output_source[1] = 18;
1140 snd_emu1010_fpga_link_dst_src_write(emu,
1141 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1142 emu->emu1010.output_source[2] = 19;
1143 snd_emu1010_fpga_link_dst_src_write(emu,
1144 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1145 emu->emu1010.output_source[3] = 20;
1146 snd_emu1010_fpga_link_dst_src_write(emu,
1147 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1148 emu->emu1010.output_source[4] = 21;
1149 snd_emu1010_fpga_link_dst_src_write(emu,
1150 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1151 emu->emu1010.output_source[5] = 22;
1152 /* ALICE2 bus 0xa0 */
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1155 emu->emu1010.output_source[16] = 17;
1156 snd_emu1010_fpga_link_dst_src_write(emu,
1157 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1158 emu->emu1010.output_source[17] = 18;
1159 } else {
1160 /* ALICE2 bus 0xa0 */
1161 snd_emu1010_fpga_link_dst_src_write(emu,
1162 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1163 emu->emu1010.output_source[0] = 21;
1164 snd_emu1010_fpga_link_dst_src_write(emu,
1165 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1166 emu->emu1010.output_source[1] = 22;
1167 snd_emu1010_fpga_link_dst_src_write(emu,
1168 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1169 emu->emu1010.output_source[2] = 23;
1170 snd_emu1010_fpga_link_dst_src_write(emu,
1171 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1172 emu->emu1010.output_source[3] = 24;
1173 snd_emu1010_fpga_link_dst_src_write(emu,
1174 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1175 emu->emu1010.output_source[4] = 25;
1176 snd_emu1010_fpga_link_dst_src_write(emu,
1177 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1178 emu->emu1010.output_source[5] = 26;
1179 snd_emu1010_fpga_link_dst_src_write(emu,
1180 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1181 emu->emu1010.output_source[6] = 27;
1182 snd_emu1010_fpga_link_dst_src_write(emu,
1183 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1184 emu->emu1010.output_source[7] = 28;
1185 /* ALICE2 bus 0xa0 */
1186 snd_emu1010_fpga_link_dst_src_write(emu,
1187 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1188 emu->emu1010.output_source[8] = 21;
1189 snd_emu1010_fpga_link_dst_src_write(emu,
1190 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1191 emu->emu1010.output_source[9] = 22;
1192 /* ALICE2 bus 0xa0 */
1193 snd_emu1010_fpga_link_dst_src_write(emu,
1194 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1195 emu->emu1010.output_source[10] = 21;
1196 snd_emu1010_fpga_link_dst_src_write(emu,
1197 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1198 emu->emu1010.output_source[11] = 22;
1199 /* ALICE2 bus 0xa0 */
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1202 emu->emu1010.output_source[12] = 21;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1205 emu->emu1010.output_source[13] = 22;
1206 /* ALICE2 bus 0xa0 */
1207 snd_emu1010_fpga_link_dst_src_write(emu,
1208 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1209 emu->emu1010.output_source[14] = 21;
1210 snd_emu1010_fpga_link_dst_src_write(emu,
1211 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1212 emu->emu1010.output_source[15] = 22;
1213 /* ALICE2 bus 0xa0 */
1214 snd_emu1010_fpga_link_dst_src_write(emu,
1215 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1216 emu->emu1010.output_source[16] = 21;
1217 snd_emu1010_fpga_link_dst_src_write(emu,
1218 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1219 emu->emu1010.output_source[17] = 22;
1220 snd_emu1010_fpga_link_dst_src_write(emu,
1221 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1222 emu->emu1010.output_source[18] = 23;
1223 snd_emu1010_fpga_link_dst_src_write(emu,
1224 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1225 emu->emu1010.output_source[19] = 24;
1226 snd_emu1010_fpga_link_dst_src_write(emu,
1227 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1228 emu->emu1010.output_source[20] = 25;
1229 snd_emu1010_fpga_link_dst_src_write(emu,
1230 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1231 emu->emu1010.output_source[21] = 26;
1232 snd_emu1010_fpga_link_dst_src_write(emu,
1233 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1234 emu->emu1010.output_source[22] = 27;
1235 snd_emu1010_fpga_link_dst_src_write(emu,
1236 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1237 emu->emu1010.output_source[23] = 28;
1238 }
1239 /* TEMP: Select SPDIF in/out */
1240 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1241
1242 /* TEMP: Select 48kHz SPDIF out */
1243 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1244 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1245 /* Word Clock source, Internal 48kHz x1 */
1246 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1247 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1248 emu->emu1010.internal_clock = 1; /* 48000 */
1249 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1250 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1251 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1252 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1253 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1254
1255 return 0;
1256 }
1257 /*
1258 * Create the EMU10K1 instance
1259 */
1260
1261 #ifdef CONFIG_PM_SLEEP
1262 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1263 static void free_pm_buffer(struct snd_emu10k1 *emu);
1264 #endif
1265
1266 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1267 {
1268 if (emu->port) { /* avoid access to already used hardware */
1269 snd_emu10k1_fx8010_tram_setup(emu, 0);
1270 snd_emu10k1_done(emu);
1271 snd_emu10k1_free_efx(emu);
1272 }
1273 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1274 /* Disable 48Volt power to Audio Dock */
1275 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1276 }
1277 if (emu->emu1010.firmware_thread)
1278 kthread_stop(emu->emu1010.firmware_thread);
1279 if (emu->firmware)
1280 release_firmware(emu->firmware);
1281 if (emu->dock_fw)
1282 release_firmware(emu->dock_fw);
1283 if (emu->irq >= 0)
1284 free_irq(emu->irq, emu);
1285 /* remove reserved page */
1286 if (emu->reserved_page) {
1287 snd_emu10k1_synth_free(emu,
1288 (struct snd_util_memblk *)emu->reserved_page);
1289 emu->reserved_page = NULL;
1290 }
1291 if (emu->memhdr)
1292 snd_util_memhdr_free(emu->memhdr);
1293 if (emu->silent_page.area)
1294 snd_dma_free_pages(&emu->silent_page);
1295 if (emu->ptb_pages.area)
1296 snd_dma_free_pages(&emu->ptb_pages);
1297 vfree(emu->page_ptr_table);
1298 vfree(emu->page_addr_table);
1299 #ifdef CONFIG_PM_SLEEP
1300 free_pm_buffer(emu);
1301 #endif
1302 if (emu->port)
1303 pci_release_regions(emu->pci);
1304 if (emu->card_capabilities->ca0151_chip) /* P16V */
1305 snd_p16v_free(emu);
1306 pci_disable_device(emu->pci);
1307 kfree(emu);
1308 return 0;
1309 }
1310
1311 static int snd_emu10k1_dev_free(struct snd_device *device)
1312 {
1313 struct snd_emu10k1 *emu = device->device_data;
1314 return snd_emu10k1_free(emu);
1315 }
1316
1317 static struct snd_emu_chip_details emu_chip_details[] = {
1318 /* Audigy4 (Not PRO) SB0610 */
1319 /* Tested by James@superbug.co.uk 4th April 2006 */
1320 /* A_IOCFG bits
1321 * Output
1322 * 0: ?
1323 * 1: ?
1324 * 2: ?
1325 * 3: 0 - Digital Out, 1 - Line in
1326 * 4: ?
1327 * 5: ?
1328 * 6: ?
1329 * 7: ?
1330 * Input
1331 * 8: ?
1332 * 9: ?
1333 * A: Green jack sense (Front)
1334 * B: ?
1335 * C: Black jack sense (Rear/Side Right)
1336 * D: Yellow jack sense (Center/LFE/Side Left)
1337 * E: ?
1338 * F: ?
1339 *
1340 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1341 * 0 - Digital Out
1342 * 1 - Line in
1343 */
1344 /* Mic input not tested.
1345 * Analog CD input not tested
1346 * Digital Out not tested.
1347 * Line in working.
1348 * Audio output 5.1 working. Side outputs not working.
1349 */
1350 /* DSP: CA10300-IAT LF
1351 * DAC: Cirrus Logic CS4382-KQZ
1352 * ADC: Philips 1361T
1353 * AC97: Sigmatel STAC9750
1354 * CA0151: None
1355 */
1356 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1357 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1358 .id = "Audigy2",
1359 .emu10k2_chip = 1,
1360 .ca0108_chip = 1,
1361 .spk71 = 1,
1362 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1363 .ac97_chip = 1} ,
1364 /* Audigy 2 Value AC3 out does not work yet.
1365 * Need to find out how to turn off interpolators.
1366 */
1367 /* Tested by James@superbug.co.uk 3rd July 2005 */
1368 /* DSP: CA0108-IAT
1369 * DAC: CS4382-KQ
1370 * ADC: Philips 1361T
1371 * AC97: STAC9750
1372 * CA0151: None
1373 */
1374 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1375 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1376 .id = "Audigy2",
1377 .emu10k2_chip = 1,
1378 .ca0108_chip = 1,
1379 .spk71 = 1,
1380 .ac97_chip = 1} ,
1381 /* Audigy 2 ZS Notebook Cardbus card.*/
1382 /* Tested by James@superbug.co.uk 6th November 2006 */
1383 /* Audio output 7.1/Headphones working.
1384 * Digital output working. (AC3 not checked, only PCM)
1385 * Audio Mic/Line inputs working.
1386 * Digital input not tested.
1387 */
1388 /* DSP: Tina2
1389 * DAC: Wolfson WM8768/WM8568
1390 * ADC: Wolfson WM8775
1391 * AC97: None
1392 * CA0151: None
1393 */
1394 /* Tested by James@superbug.co.uk 4th April 2006 */
1395 /* A_IOCFG bits
1396 * Output
1397 * 0: Not Used
1398 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1399 * 2: Analog input 0 = line in, 1 = mic in
1400 * 3: Not Used
1401 * 4: Digital output 0 = off, 1 = on.
1402 * 5: Not Used
1403 * 6: Not Used
1404 * 7: Not Used
1405 * Input
1406 * All bits 1 (0x3fxx) means nothing plugged in.
1407 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1408 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1409 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1410 * E-F: Always 0
1411 *
1412 */
1413 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1414 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
1415 .id = "Audigy2",
1416 .emu10k2_chip = 1,
1417 .ca0108_chip = 1,
1418 .ca_cardbus_chip = 1,
1419 .spi_dac = 1,
1420 .i2c_adc = 1,
1421 .spk71 = 1} ,
1422 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1423 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1424 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1425 .id = "EMU1010",
1426 .emu10k2_chip = 1,
1427 .ca0108_chip = 1,
1428 .ca_cardbus_chip = 1,
1429 .spk71 = 1 ,
1430 .emu_model = EMU_MODEL_EMU1616},
1431 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1432 /* This is MAEM8960, 0202 is MAEM 8980 */
1433 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1434 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1435 .id = "EMU1010",
1436 .emu10k2_chip = 1,
1437 .ca0108_chip = 1,
1438 .spk71 = 1,
1439 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1440 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1441 /* This is MAEM8986, 0202 is MAEM8980 */
1442 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1443 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1444 .id = "EMU1010",
1445 .emu10k2_chip = 1,
1446 .ca0108_chip = 1,
1447 .spk71 = 1,
1448 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1449 /* Tested by James@superbug.co.uk 8th July 2005. */
1450 /* This is MAEM8810, 0202 is MAEM8820 */
1451 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1452 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1453 .id = "EMU1010",
1454 .emu10k2_chip = 1,
1455 .ca0102_chip = 1,
1456 .spk71 = 1,
1457 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1458 /* EMU0404b */
1459 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1460 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1461 .id = "EMU0404",
1462 .emu10k2_chip = 1,
1463 .ca0108_chip = 1,
1464 .spk71 = 1,
1465 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1466 /* Tested by James@superbug.co.uk 20-3-2007. */
1467 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1468 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1469 .id = "EMU0404",
1470 .emu10k2_chip = 1,
1471 .ca0102_chip = 1,
1472 .spk71 = 1,
1473 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1474 /* EMU0404 PCIe */
1475 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1476 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1477 .id = "EMU0404",
1478 .emu10k2_chip = 1,
1479 .ca0108_chip = 1,
1480 .spk71 = 1,
1481 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1482 /* Note that all E-mu cards require kernel 2.6 or newer. */
1483 {.vendor = 0x1102, .device = 0x0008,
1484 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1485 .id = "Audigy2",
1486 .emu10k2_chip = 1,
1487 .ca0108_chip = 1,
1488 .ac97_chip = 1} ,
1489 /* Tested by James@superbug.co.uk 3rd July 2005 */
1490 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1491 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1492 .id = "Audigy2",
1493 .emu10k2_chip = 1,
1494 .ca0102_chip = 1,
1495 .ca0151_chip = 1,
1496 .spk71 = 1,
1497 .spdif_bug = 1,
1498 .ac97_chip = 1} ,
1499 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1500 /* The 0x20061102 does have SB0350 written on it
1501 * Just like 0x20021102
1502 */
1503 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1504 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1505 .id = "Audigy2",
1506 .emu10k2_chip = 1,
1507 .ca0102_chip = 1,
1508 .ca0151_chip = 1,
1509 .spk71 = 1,
1510 .spdif_bug = 1,
1511 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1512 .ac97_chip = 1} ,
1513 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1514 Creative's Windows driver */
1515 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1516 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1517 .id = "Audigy2",
1518 .emu10k2_chip = 1,
1519 .ca0102_chip = 1,
1520 .ca0151_chip = 1,
1521 .spk71 = 1,
1522 .spdif_bug = 1,
1523 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1524 .ac97_chip = 1} ,
1525 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1526 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1527 .id = "Audigy2",
1528 .emu10k2_chip = 1,
1529 .ca0102_chip = 1,
1530 .ca0151_chip = 1,
1531 .spk71 = 1,
1532 .spdif_bug = 1,
1533 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1534 .ac97_chip = 1} ,
1535 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1536 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1537 .id = "Audigy2",
1538 .emu10k2_chip = 1,
1539 .ca0102_chip = 1,
1540 .ca0151_chip = 1,
1541 .spk71 = 1,
1542 .spdif_bug = 1,
1543 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1544 .ac97_chip = 1} ,
1545 /* Audigy 2 */
1546 /* Tested by James@superbug.co.uk 3rd July 2005 */
1547 /* DSP: CA0102-IAT
1548 * DAC: CS4382-KQ
1549 * ADC: Philips 1361T
1550 * AC97: STAC9721
1551 * CA0151: Yes
1552 */
1553 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1554 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1555 .id = "Audigy2",
1556 .emu10k2_chip = 1,
1557 .ca0102_chip = 1,
1558 .ca0151_chip = 1,
1559 .spk71 = 1,
1560 .spdif_bug = 1,
1561 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1562 .ac97_chip = 1} ,
1563 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1564 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
1565 .id = "Audigy2",
1566 .emu10k2_chip = 1,
1567 .ca0102_chip = 1,
1568 .ca0151_chip = 1,
1569 .spk71 = 1,
1570 .spdif_bug = 1} ,
1571 /* Dell OEM/Creative Labs Audigy 2 ZS */
1572 /* See ALSA bug#1365 */
1573 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1574 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1575 .id = "Audigy2",
1576 .emu10k2_chip = 1,
1577 .ca0102_chip = 1,
1578 .ca0151_chip = 1,
1579 .spk71 = 1,
1580 .spdif_bug = 1,
1581 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1582 .ac97_chip = 1} ,
1583 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1584 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1585 .id = "Audigy2",
1586 .emu10k2_chip = 1,
1587 .ca0102_chip = 1,
1588 .ca0151_chip = 1,
1589 .spk71 = 1,
1590 .spdif_bug = 1,
1591 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1592 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1593 .ac97_chip = 1} ,
1594 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1595 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1596 .id = "Audigy2",
1597 .emu10k2_chip = 1,
1598 .ca0102_chip = 1,
1599 .ca0151_chip = 1,
1600 .spdif_bug = 1,
1601 .ac97_chip = 1} ,
1602 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1603 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1604 .id = "Audigy",
1605 .emu10k2_chip = 1,
1606 .ca0102_chip = 1,
1607 .ac97_chip = 1} ,
1608 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1609 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1610 .id = "Audigy",
1611 .emu10k2_chip = 1,
1612 .ca0102_chip = 1,
1613 .spdif_bug = 1,
1614 .ac97_chip = 1} ,
1615 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1616 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1617 .id = "Audigy",
1618 .emu10k2_chip = 1,
1619 .ca0102_chip = 1,
1620 .ac97_chip = 1} ,
1621 {.vendor = 0x1102, .device = 0x0004,
1622 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1623 .id = "Audigy",
1624 .emu10k2_chip = 1,
1625 .ca0102_chip = 1,
1626 .ac97_chip = 1} ,
1627 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1628 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1629 .id = "Live",
1630 .emu10k1_chip = 1,
1631 .ac97_chip = 1,
1632 .sblive51 = 1} ,
1633 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1634 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1635 .id = "Live",
1636 .emu10k1_chip = 1,
1637 .ac97_chip = 1,
1638 .sblive51 = 1} ,
1639 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1640 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1641 .id = "Live",
1642 .emu10k1_chip = 1,
1643 .ac97_chip = 1,
1644 .sblive51 = 1} ,
1645 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1646 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1647 .id = "Live",
1648 .emu10k1_chip = 1,
1649 .ac97_chip = 1,
1650 .sblive51 = 1} ,
1651 /* Tested by ALSA bug#1680 26th December 2005 */
1652 /* note: It really has SB0220 written on the card, */
1653 /* but it's SB0228 according to kx.inf */
1654 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1655 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1656 .id = "Live",
1657 .emu10k1_chip = 1,
1658 .ac97_chip = 1,
1659 .sblive51 = 1} ,
1660 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1661 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1662 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1663 .id = "Live",
1664 .emu10k1_chip = 1,
1665 .ac97_chip = 1,
1666 .sblive51 = 1} ,
1667 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1668 .driver = "EMU10K1", .name = "SB Live! 5.1",
1669 .id = "Live",
1670 .emu10k1_chip = 1,
1671 .ac97_chip = 1,
1672 .sblive51 = 1} ,
1673 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1674 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1675 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1676 .id = "Live",
1677 .emu10k1_chip = 1,
1678 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1679 * share the same IDs!
1680 */
1681 .sblive51 = 1} ,
1682 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1683 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1684 .id = "Live",
1685 .emu10k1_chip = 1,
1686 .ac97_chip = 1,
1687 .sblive51 = 1} ,
1688 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1689 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1690 .id = "Live",
1691 .emu10k1_chip = 1,
1692 .ac97_chip = 1} ,
1693 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1694 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1695 .id = "Live",
1696 .emu10k1_chip = 1,
1697 .ac97_chip = 1,
1698 .sblive51 = 1} ,
1699 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1700 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1701 .id = "Live",
1702 .emu10k1_chip = 1,
1703 .ac97_chip = 1,
1704 .sblive51 = 1} ,
1705 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1706 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1707 .id = "Live",
1708 .emu10k1_chip = 1,
1709 .ac97_chip = 1,
1710 .sblive51 = 1} ,
1711 /* Tested by James@superbug.co.uk 3rd July 2005 */
1712 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1713 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1714 .id = "Live",
1715 .emu10k1_chip = 1,
1716 .ac97_chip = 1,
1717 .sblive51 = 1} ,
1718 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1719 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1720 .id = "Live",
1721 .emu10k1_chip = 1,
1722 .ac97_chip = 1,
1723 .sblive51 = 1} ,
1724 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1725 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1726 .id = "Live",
1727 .emu10k1_chip = 1,
1728 .ac97_chip = 1,
1729 .sblive51 = 1} ,
1730 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1731 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1732 .id = "Live",
1733 .emu10k1_chip = 1,
1734 .ac97_chip = 1,
1735 .sblive51 = 1} ,
1736 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1737 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1738 .id = "APS",
1739 .emu10k1_chip = 1,
1740 .ecard = 1} ,
1741 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1742 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1743 .id = "Live",
1744 .emu10k1_chip = 1,
1745 .ac97_chip = 1,
1746 .sblive51 = 1} ,
1747 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1748 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1749 .id = "Live",
1750 .emu10k1_chip = 1,
1751 .ac97_chip = 1,
1752 .sblive51 = 1} ,
1753 {.vendor = 0x1102, .device = 0x0002,
1754 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1755 .id = "Live",
1756 .emu10k1_chip = 1,
1757 .ac97_chip = 1,
1758 .sblive51 = 1} ,
1759 { } /* terminator */
1760 };
1761
1762 int snd_emu10k1_create(struct snd_card *card,
1763 struct pci_dev *pci,
1764 unsigned short extin_mask,
1765 unsigned short extout_mask,
1766 long max_cache_bytes,
1767 int enable_ir,
1768 uint subsystem,
1769 struct snd_emu10k1 **remu)
1770 {
1771 struct snd_emu10k1 *emu;
1772 int idx, err;
1773 int is_audigy;
1774 unsigned int silent_page;
1775 const struct snd_emu_chip_details *c;
1776 static struct snd_device_ops ops = {
1777 .dev_free = snd_emu10k1_dev_free,
1778 };
1779
1780 *remu = NULL;
1781
1782 /* enable PCI device */
1783 err = pci_enable_device(pci);
1784 if (err < 0)
1785 return err;
1786
1787 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1788 if (emu == NULL) {
1789 pci_disable_device(pci);
1790 return -ENOMEM;
1791 }
1792 emu->card = card;
1793 spin_lock_init(&emu->reg_lock);
1794 spin_lock_init(&emu->emu_lock);
1795 spin_lock_init(&emu->spi_lock);
1796 spin_lock_init(&emu->i2c_lock);
1797 spin_lock_init(&emu->voice_lock);
1798 spin_lock_init(&emu->synth_lock);
1799 spin_lock_init(&emu->memblk_lock);
1800 mutex_init(&emu->fx8010.lock);
1801 INIT_LIST_HEAD(&emu->mapped_link_head);
1802 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1803 emu->pci = pci;
1804 emu->irq = -1;
1805 emu->synth = NULL;
1806 emu->get_synth_voice = NULL;
1807 /* read revision & serial */
1808 emu->revision = pci->revision;
1809 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1810 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1811 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1812
1813 for (c = emu_chip_details; c->vendor; c++) {
1814 if (c->vendor == pci->vendor && c->device == pci->device) {
1815 if (subsystem) {
1816 if (c->subsystem && (c->subsystem == subsystem))
1817 break;
1818 else
1819 continue;
1820 } else {
1821 if (c->subsystem && (c->subsystem != emu->serial))
1822 continue;
1823 if (c->revision && c->revision != emu->revision)
1824 continue;
1825 }
1826 break;
1827 }
1828 }
1829 if (c->vendor == 0) {
1830 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1831 kfree(emu);
1832 pci_disable_device(pci);
1833 return -ENOENT;
1834 }
1835 emu->card_capabilities = c;
1836 if (c->subsystem && !subsystem)
1837 snd_printdd("Sound card name = %s\n", c->name);
1838 else if (subsystem)
1839 snd_printdd("Sound card name = %s, "
1840 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1841 "Forced to subsystem = 0x%x\n", c->name,
1842 pci->vendor, pci->device, emu->serial, c->subsystem);
1843 else
1844 snd_printdd("Sound card name = %s, "
1845 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1846 c->name, pci->vendor, pci->device,
1847 emu->serial);
1848
1849 if (!*card->id && c->id) {
1850 int i, n = 0;
1851 strlcpy(card->id, c->id, sizeof(card->id));
1852 for (;;) {
1853 for (i = 0; i < snd_ecards_limit; i++) {
1854 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1855 break;
1856 }
1857 if (i >= snd_ecards_limit)
1858 break;
1859 n++;
1860 if (n >= SNDRV_CARDS)
1861 break;
1862 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1863 }
1864 }
1865
1866 is_audigy = emu->audigy = c->emu10k2_chip;
1867
1868 /* set the DMA transfer mask */
1869 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1870 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1871 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1872 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1873 kfree(emu);
1874 pci_disable_device(pci);
1875 return -ENXIO;
1876 }
1877 if (is_audigy)
1878 emu->gpr_base = A_FXGPREGBASE;
1879 else
1880 emu->gpr_base = FXGPREGBASE;
1881
1882 err = pci_request_regions(pci, "EMU10K1");
1883 if (err < 0) {
1884 kfree(emu);
1885 pci_disable_device(pci);
1886 return err;
1887 }
1888 emu->port = pci_resource_start(pci, 0);
1889
1890 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1891 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1892 32 * 1024, &emu->ptb_pages) < 0) {
1893 err = -ENOMEM;
1894 goto error;
1895 }
1896
1897 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1898 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1899 sizeof(unsigned long));
1900 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1901 err = -ENOMEM;
1902 goto error;
1903 }
1904
1905 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1906 EMUPAGESIZE, &emu->silent_page) < 0) {
1907 err = -ENOMEM;
1908 goto error;
1909 }
1910 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1911 if (emu->memhdr == NULL) {
1912 err = -ENOMEM;
1913 goto error;
1914 }
1915 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1916 sizeof(struct snd_util_memblk);
1917
1918 pci_set_master(pci);
1919
1920 emu->fx8010.fxbus_mask = 0x303f;
1921 if (extin_mask == 0)
1922 extin_mask = 0x3fcf;
1923 if (extout_mask == 0)
1924 extout_mask = 0x7fff;
1925 emu->fx8010.extin_mask = extin_mask;
1926 emu->fx8010.extout_mask = extout_mask;
1927 emu->enable_ir = enable_ir;
1928
1929 if (emu->card_capabilities->ca_cardbus_chip) {
1930 err = snd_emu10k1_cardbus_init(emu);
1931 if (err < 0)
1932 goto error;
1933 }
1934 if (emu->card_capabilities->ecard) {
1935 err = snd_emu10k1_ecard_init(emu);
1936 if (err < 0)
1937 goto error;
1938 } else if (emu->card_capabilities->emu_model) {
1939 err = snd_emu10k1_emu1010_init(emu);
1940 if (err < 0) {
1941 snd_emu10k1_free(emu);
1942 return err;
1943 }
1944 } else {
1945 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1946 does not support this, it shouldn't do any harm */
1947 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1948 AC97SLOT_CNTR|AC97SLOT_LFE);
1949 }
1950
1951 /* initialize TRAM setup */
1952 emu->fx8010.itram_size = (16 * 1024)/2;
1953 emu->fx8010.etram_pages.area = NULL;
1954 emu->fx8010.etram_pages.bytes = 0;
1955
1956 /* irq handler must be registered after I/O ports are activated */
1957 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1958 KBUILD_MODNAME, emu)) {
1959 err = -EBUSY;
1960 goto error;
1961 }
1962 emu->irq = pci->irq;
1963
1964 /*
1965 * Init to 0x02109204 :
1966 * Clock accuracy = 0 (1000ppm)
1967 * Sample Rate = 2 (48kHz)
1968 * Audio Channel = 1 (Left of 2)
1969 * Source Number = 0 (Unspecified)
1970 * Generation Status = 1 (Original for Cat Code 12)
1971 * Cat Code = 12 (Digital Signal Mixer)
1972 * Mode = 0 (Mode 0)
1973 * Emphasis = 0 (None)
1974 * CP = 1 (Copyright unasserted)
1975 * AN = 0 (Audio data)
1976 * P = 0 (Consumer)
1977 */
1978 emu->spdif_bits[0] = emu->spdif_bits[1] =
1979 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1980 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1981 SPCS_GENERATIONSTATUS | 0x00001200 |
1982 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1983
1984 emu->reserved_page = (struct snd_emu10k1_memblk *)
1985 snd_emu10k1_synth_alloc(emu, 4096);
1986 if (emu->reserved_page)
1987 emu->reserved_page->map_locked = 1;
1988
1989 /* Clear silent pages and set up pointers */
1990 memset(emu->silent_page.area, 0, PAGE_SIZE);
1991 silent_page = emu->silent_page.addr << 1;
1992 for (idx = 0; idx < MAXPAGES; idx++)
1993 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1994
1995 /* set up voice indices */
1996 for (idx = 0; idx < NUM_G; idx++) {
1997 emu->voices[idx].emu = emu;
1998 emu->voices[idx].number = idx;
1999 }
2000
2001 err = snd_emu10k1_init(emu, enable_ir, 0);
2002 if (err < 0)
2003 goto error;
2004 #ifdef CONFIG_PM_SLEEP
2005 err = alloc_pm_buffer(emu);
2006 if (err < 0)
2007 goto error;
2008 #endif
2009
2010 /* Initialize the effect engine */
2011 err = snd_emu10k1_init_efx(emu);
2012 if (err < 0)
2013 goto error;
2014 snd_emu10k1_audio_enable(emu);
2015
2016 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2017 if (err < 0)
2018 goto error;
2019
2020 #ifdef CONFIG_PROC_FS
2021 snd_emu10k1_proc_init(emu);
2022 #endif
2023
2024 snd_card_set_dev(card, &pci->dev);
2025 *remu = emu;
2026 return 0;
2027
2028 error:
2029 snd_emu10k1_free(emu);
2030 return err;
2031 }
2032
2033 #ifdef CONFIG_PM_SLEEP
2034 static unsigned char saved_regs[] = {
2035 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2036 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2037 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2038 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2039 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2040 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2041 0xff /* end */
2042 };
2043 static unsigned char saved_regs_audigy[] = {
2044 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2045 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2046 0xff /* end */
2047 };
2048
2049 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2050 {
2051 int size;
2052
2053 size = ARRAY_SIZE(saved_regs);
2054 if (emu->audigy)
2055 size += ARRAY_SIZE(saved_regs_audigy);
2056 emu->saved_ptr = vmalloc(4 * NUM_G * size);
2057 if (!emu->saved_ptr)
2058 return -ENOMEM;
2059 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2060 return -ENOMEM;
2061 if (emu->card_capabilities->ca0151_chip &&
2062 snd_p16v_alloc_pm_buffer(emu) < 0)
2063 return -ENOMEM;
2064 return 0;
2065 }
2066
2067 static void free_pm_buffer(struct snd_emu10k1 *emu)
2068 {
2069 vfree(emu->saved_ptr);
2070 snd_emu10k1_efx_free_pm_buffer(emu);
2071 if (emu->card_capabilities->ca0151_chip)
2072 snd_p16v_free_pm_buffer(emu);
2073 }
2074
2075 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2076 {
2077 int i;
2078 unsigned char *reg;
2079 unsigned int *val;
2080
2081 val = emu->saved_ptr;
2082 for (reg = saved_regs; *reg != 0xff; reg++)
2083 for (i = 0; i < NUM_G; i++, val++)
2084 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2085 if (emu->audigy) {
2086 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2087 for (i = 0; i < NUM_G; i++, val++)
2088 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2089 }
2090 if (emu->audigy)
2091 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2092 emu->saved_hcfg = inl(emu->port + HCFG);
2093 }
2094
2095 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2096 {
2097 if (emu->card_capabilities->ca_cardbus_chip)
2098 snd_emu10k1_cardbus_init(emu);
2099 if (emu->card_capabilities->ecard)
2100 snd_emu10k1_ecard_init(emu);
2101 else if (emu->card_capabilities->emu_model)
2102 snd_emu10k1_emu1010_init(emu);
2103 else
2104 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2105 snd_emu10k1_init(emu, emu->enable_ir, 1);
2106 }
2107
2108 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2109 {
2110 int i;
2111 unsigned char *reg;
2112 unsigned int *val;
2113
2114 snd_emu10k1_audio_enable(emu);
2115
2116 /* resore for spdif */
2117 if (emu->audigy)
2118 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2119 outl(emu->saved_hcfg, emu->port + HCFG);
2120
2121 val = emu->saved_ptr;
2122 for (reg = saved_regs; *reg != 0xff; reg++)
2123 for (i = 0; i < NUM_G; i++, val++)
2124 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2125 if (emu->audigy) {
2126 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2127 for (i = 0; i < NUM_G; i++, val++)
2128 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2129 }
2130 }
2131 #endif
kernel source for telekom puls (alcatel/mediatek)