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Merge master.kernel.org:/pub/scm/linux/kernel/git/perex/alsa
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / atiixp_modem.c
1 /*
2 * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #include <sound/driver.h>
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
36
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP MC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
41
42 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
43 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
44 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
45 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
46
47 module_param_array(index, int, NULL, 0444);
48 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
49 module_param_array(id, charp, NULL, 0444);
50 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
51 module_param_array(enable, bool, NULL, 0444);
52 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
53 module_param_array(ac97_clock, int, NULL, 0444);
54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
55
56
57 /*
58 */
59
60 #define ATI_REG_ISR 0x00 /* interrupt source */
61 #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
62 #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
63 #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
64 #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
65 #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
66 #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
67 #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
68 #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
69 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
70 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
71 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
72 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
73 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
74 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
75 #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
76
77 #define ATI_REG_IER 0x04 /* interrupt enable */
78 #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
79 #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
80 #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
81 #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
82 #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
83 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
84 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
85 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
86 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
87 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
88 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
89 #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
90 #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
91
92 #define ATI_REG_CMD 0x08 /* command */
93 #define ATI_REG_CMD_POWERDOWN (1U<<0)
94 #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
95 #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
96 #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
97 #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
98 #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
99 #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
100 #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
101 #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
102 #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
103 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
104 #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
105 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
106 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
107 #define ATI_REG_CMD_BURST_EN (1U<<25)
108 #define ATI_REG_CMD_PANIC_EN (1U<<26)
109 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
110 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
111 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
112 #define ATI_REG_CMD_AC_SYNC (1U<<30)
113 #define ATI_REG_CMD_AC_RESET (1U<<31)
114
115 #define ATI_REG_PHYS_OUT_ADDR 0x0c
116 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
117 #define ATI_REG_PHYS_OUT_RW (1U<<2)
118 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
119 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
120 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
121
122 #define ATI_REG_PHYS_IN_ADDR 0x10
123 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
124 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
125 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
126
127 #define ATI_REG_SLOTREQ 0x14
128
129 #define ATI_REG_COUNTER 0x18
130 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
131 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
132
133 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
134
135 #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
136 #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
137 #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
138 #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
139 #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
140 #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
141 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
142 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
143 #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
144 #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
145 #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
146 #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
147 #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
148 #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
149 #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
150 #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
151 #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
152 #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
153 #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
154 #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
155 #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
156 #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
157 #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
158 #define ATI_REG_MODEM_OUT_GPIO 0x74
159 #define ATI_REG_MODEM_OUT_GPIO_EN 1
160 #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
161 #define ATI_REG_MODEM_IN_GPIO 0x78
162
163 #define ATI_REG_MODEM_MIRROR 0x7c
164 #define ATI_REG_AUDIO_MIRROR 0x80
165
166 #define ATI_REG_MODEM_FIFO_FLUSH 0x88
167 #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
168 #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
169 #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
170 #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
171
172 /* LINKPTR */
173 #define ATI_REG_LINKPTR_EN (1U<<0)
174
175 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
176
177
178 /*
179 */
180
181 typedef struct snd_atiixp atiixp_t;
182 typedef struct snd_atiixp_dma atiixp_dma_t;
183 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
184
185
186 /*
187 * DMA packate descriptor
188 */
189
190 typedef struct atiixp_dma_desc {
191 u32 addr; /* DMA buffer address */
192 u16 status; /* status bits */
193 u16 size; /* size of the packet in dwords */
194 u32 next; /* address of the next packet descriptor */
195 } atiixp_dma_desc_t;
196
197 /*
198 * stream enum
199 */
200 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
201 enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
202 enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
203
204 #define NUM_ATI_CODECS 3
205
206
207 /*
208 * constants and callbacks for each DMA type
209 */
210 struct snd_atiixp_dma_ops {
211 int type; /* ATI_DMA_XXX */
212 unsigned int llp_offset; /* LINKPTR offset */
213 unsigned int dt_cur; /* DT_CUR offset */
214 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
215 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
216 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
217 };
218
219 /*
220 * DMA stream
221 */
222 struct snd_atiixp_dma {
223 const atiixp_dma_ops_t *ops;
224 struct snd_dma_buffer desc_buf;
225 snd_pcm_substream_t *substream; /* assigned PCM substream */
226 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
227 unsigned int period_bytes, periods;
228 int opened;
229 int running;
230 int pcm_open_flag;
231 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
232 };
233
234 /*
235 * ATI IXP chip
236 */
237 struct snd_atiixp {
238 snd_card_t *card;
239 struct pci_dev *pci;
240
241 struct resource *res; /* memory i/o */
242 unsigned long addr;
243 void __iomem *remap_addr;
244 int irq;
245
246 ac97_bus_t *ac97_bus;
247 ac97_t *ac97[NUM_ATI_CODECS];
248
249 spinlock_t reg_lock;
250
251 atiixp_dma_t dmas[NUM_ATI_DMAS];
252 struct ac97_pcm *pcms[NUM_ATI_PCMS];
253 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
254
255 int max_channels; /* max. channels for PCM out */
256
257 unsigned int codec_not_ready_bits; /* for codec detection */
258
259 int spdif_over_aclink; /* passed from the module option */
260 struct semaphore open_mutex; /* playback open mutex */
261 };
262
263
264 /*
265 */
266 static struct pci_device_id snd_atiixp_ids[] = {
267 { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
268 { 0x1002, 0x4378, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
269 { 0, }
270 };
271
272 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
273
274
275 /*
276 * lowlevel functions
277 */
278
279 /*
280 * update the bits of the given register.
281 * return 1 if the bits changed.
282 */
283 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
284 unsigned int mask, unsigned int value)
285 {
286 void __iomem *addr = chip->remap_addr + reg;
287 unsigned int data, old_data;
288 old_data = data = readl(addr);
289 data &= ~mask;
290 data |= value;
291 if (old_data == data)
292 return 0;
293 writel(data, addr);
294 return 1;
295 }
296
297 /*
298 * macros for easy use
299 */
300 #define atiixp_write(chip,reg,value) \
301 writel(value, chip->remap_addr + ATI_REG_##reg)
302 #define atiixp_read(chip,reg) \
303 readl(chip->remap_addr + ATI_REG_##reg)
304 #define atiixp_update(chip,reg,mask,val) \
305 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
306
307 /* delay for one tick */
308 #define do_delay() do { \
309 set_current_state(TASK_UNINTERRUPTIBLE); \
310 schedule_timeout(1); \
311 } while (0)
312
313
314 /*
315 * handling DMA packets
316 *
317 * we allocate a linear buffer for the DMA, and split it to each packet.
318 * in a future version, a scatter-gather buffer should be implemented.
319 */
320
321 #define ATI_DESC_LIST_SIZE \
322 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
323
324 /*
325 * build packets ring for the given buffer size.
326 *
327 * IXP handles the buffer descriptors, which are connected as a linked
328 * list. although we can change the list dynamically, in this version,
329 * a static RING of buffer descriptors is used.
330 *
331 * the ring is built in this function, and is set up to the hardware.
332 */
333 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
334 snd_pcm_substream_t *substream,
335 unsigned int periods,
336 unsigned int period_bytes)
337 {
338 unsigned int i;
339 u32 addr, desc_addr;
340 unsigned long flags;
341
342 if (periods > ATI_MAX_DESCRIPTORS)
343 return -ENOMEM;
344
345 if (dma->desc_buf.area == NULL) {
346 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
347 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
348 return -ENOMEM;
349 dma->period_bytes = dma->periods = 0; /* clear */
350 }
351
352 if (dma->periods == periods && dma->period_bytes == period_bytes)
353 return 0;
354
355 /* reset DMA before changing the descriptor table */
356 spin_lock_irqsave(&chip->reg_lock, flags);
357 writel(0, chip->remap_addr + dma->ops->llp_offset);
358 dma->ops->enable_dma(chip, 0);
359 dma->ops->enable_dma(chip, 1);
360 spin_unlock_irqrestore(&chip->reg_lock, flags);
361
362 /* fill the entries */
363 addr = (u32)substream->runtime->dma_addr;
364 desc_addr = (u32)dma->desc_buf.addr;
365 for (i = 0; i < periods; i++) {
366 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
367 desc->addr = cpu_to_le32(addr);
368 desc->status = 0;
369 desc->size = period_bytes >> 2; /* in dwords */
370 desc_addr += sizeof(atiixp_dma_desc_t);
371 if (i == periods - 1)
372 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
373 else
374 desc->next = cpu_to_le32(desc_addr);
375 addr += period_bytes;
376 }
377
378 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
379 chip->remap_addr + dma->ops->llp_offset);
380
381 dma->period_bytes = period_bytes;
382 dma->periods = periods;
383
384 return 0;
385 }
386
387 /*
388 * remove the ring buffer and release it if assigned
389 */
390 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
391 {
392 if (dma->desc_buf.area) {
393 writel(0, chip->remap_addr + dma->ops->llp_offset);
394 snd_dma_free_pages(&dma->desc_buf);
395 dma->desc_buf.area = NULL;
396 }
397 }
398
399 /*
400 * AC97 interface
401 */
402 static int snd_atiixp_acquire_codec(atiixp_t *chip)
403 {
404 int timeout = 1000;
405
406 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
407 if (! timeout--) {
408 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
409 return -EBUSY;
410 }
411 udelay(1);
412 }
413 return 0;
414 }
415
416 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
417 {
418 unsigned int data;
419 int timeout;
420
421 if (snd_atiixp_acquire_codec(chip) < 0)
422 return 0xffff;
423 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
424 ATI_REG_PHYS_OUT_ADDR_EN |
425 ATI_REG_PHYS_OUT_RW |
426 codec;
427 atiixp_write(chip, PHYS_OUT_ADDR, data);
428 if (snd_atiixp_acquire_codec(chip) < 0)
429 return 0xffff;
430 timeout = 1000;
431 do {
432 data = atiixp_read(chip, PHYS_IN_ADDR);
433 if (data & ATI_REG_PHYS_IN_READ_FLAG)
434 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
435 udelay(1);
436 } while (--timeout);
437 /* time out may happen during reset */
438 if (reg < 0x7c)
439 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
440 return 0xffff;
441 }
442
443
444 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
445 {
446 unsigned int data;
447
448 if (snd_atiixp_acquire_codec(chip) < 0)
449 return;
450 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
451 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
452 ATI_REG_PHYS_OUT_ADDR_EN | codec;
453 atiixp_write(chip, PHYS_OUT_ADDR, data);
454 }
455
456
457 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
458 {
459 atiixp_t *chip = ac97->private_data;
460 return snd_atiixp_codec_read(chip, ac97->num, reg);
461
462 }
463
464 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
465 {
466 atiixp_t *chip = ac97->private_data;
467 if (reg == AC97_GPIO_STATUS) {
468 atiixp_write(chip, MODEM_OUT_GPIO,
469 (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN);
470 return;
471 }
472 snd_atiixp_codec_write(chip, ac97->num, reg, val);
473 }
474
475 /*
476 * reset AC link
477 */
478 static int snd_atiixp_aclink_reset(atiixp_t *chip)
479 {
480 int timeout;
481
482 /* reset powerdoewn */
483 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
484 udelay(10);
485
486 /* perform a software reset */
487 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
488 atiixp_read(chip, CMD);
489 udelay(10);
490 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
491
492 timeout = 10;
493 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
494 /* do a hard reset */
495 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
496 ATI_REG_CMD_AC_SYNC);
497 atiixp_read(chip, CMD);
498 do_delay();
499 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
500 if (--timeout) {
501 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
502 break;
503 }
504 }
505
506 /* deassert RESET and assert SYNC to make sure */
507 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
508 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
509
510 return 0;
511 }
512
513 #ifdef CONFIG_PM
514 static int snd_atiixp_aclink_down(atiixp_t *chip)
515 {
516 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
517 // return -EBUSY;
518 atiixp_update(chip, CMD,
519 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
520 ATI_REG_CMD_POWERDOWN);
521 return 0;
522 }
523 #endif
524
525 /*
526 * auto-detection of codecs
527 *
528 * the IXP chip can generate interrupts for the non-existing codecs.
529 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
530 * even if all three codecs are connected.
531 */
532
533 #define ALL_CODEC_NOT_READY \
534 (ATI_REG_ISR_CODEC0_NOT_READY |\
535 ATI_REG_ISR_CODEC1_NOT_READY |\
536 ATI_REG_ISR_CODEC2_NOT_READY)
537 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
538
539 static int snd_atiixp_codec_detect(atiixp_t *chip)
540 {
541 int timeout;
542
543 chip->codec_not_ready_bits = 0;
544 atiixp_write(chip, IER, CODEC_CHECK_BITS);
545 /* wait for the interrupts */
546 timeout = HZ / 10;
547 while (timeout-- > 0) {
548 do_delay();
549 if (chip->codec_not_ready_bits)
550 break;
551 }
552 atiixp_write(chip, IER, 0); /* disable irqs */
553
554 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
555 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
556 return -ENXIO;
557 }
558 return 0;
559 }
560
561
562 /*
563 * enable DMA and irqs
564 */
565 static int snd_atiixp_chip_start(atiixp_t *chip)
566 {
567 unsigned int reg;
568
569 /* set up spdif, enable burst mode */
570 reg = atiixp_read(chip, CMD);
571 reg |= ATI_REG_CMD_BURST_EN;
572 if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
573 reg |= ATI_REG_CMD_MODEM_PRESENT;
574 atiixp_write(chip, CMD, reg);
575
576 /* clear all interrupt source */
577 atiixp_write(chip, ISR, 0xffffffff);
578 /* enable irqs */
579 atiixp_write(chip, IER,
580 ATI_REG_IER_MODEM_STATUS_EN |
581 ATI_REG_IER_MODEM_IN_XRUN_EN |
582 ATI_REG_IER_MODEM_OUT1_XRUN_EN);
583 return 0;
584 }
585
586
587 /*
588 * disable DMA and IRQs
589 */
590 static int snd_atiixp_chip_stop(atiixp_t *chip)
591 {
592 /* clear interrupt source */
593 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
594 /* disable irqs */
595 atiixp_write(chip, IER, 0);
596 return 0;
597 }
598
599
600 /*
601 * PCM section
602 */
603
604 /*
605 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
606 * position. when SG-buffer is implemented, the offset must be calculated
607 * correctly...
608 */
609 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
610 {
611 atiixp_t *chip = snd_pcm_substream_chip(substream);
612 snd_pcm_runtime_t *runtime = substream->runtime;
613 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
614 unsigned int curptr;
615 int timeout = 1000;
616
617 while (timeout--) {
618 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
619 if (curptr < dma->buf_addr)
620 continue;
621 curptr -= dma->buf_addr;
622 if (curptr >= dma->buf_bytes)
623 continue;
624 return bytes_to_frames(runtime, curptr);
625 }
626 snd_printd("atiixp-modem: invalid DMA pointer read 0x%x (buf=%x)\n",
627 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
628 return 0;
629 }
630
631 /*
632 * XRUN detected, and stop the PCM substream
633 */
634 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
635 {
636 if (! dma->substream || ! dma->running)
637 return;
638 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
639 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
640 }
641
642 /*
643 * the period ack. update the substream.
644 */
645 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
646 {
647 if (! dma->substream || ! dma->running)
648 return;
649 snd_pcm_period_elapsed(dma->substream);
650 }
651
652 /* set BUS_BUSY interrupt bit if any DMA is running */
653 /* call with spinlock held */
654 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
655 {
656 unsigned int bus_busy;
657 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
658 ATI_REG_CMD_MODEM_RECEIVE_EN))
659 bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
660 else
661 bus_busy = 0;
662 atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
663 }
664
665 /* common trigger callback
666 * calling the lowlevel callbacks in it
667 */
668 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
669 {
670 atiixp_t *chip = snd_pcm_substream_chip(substream);
671 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
672 int err = 0;
673
674 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
675
676 spin_lock(&chip->reg_lock);
677 switch(cmd) {
678 case SNDRV_PCM_TRIGGER_START:
679 dma->ops->enable_transfer(chip, 1);
680 dma->running = 1;
681 break;
682 case SNDRV_PCM_TRIGGER_STOP:
683 dma->ops->enable_transfer(chip, 0);
684 dma->running = 0;
685 break;
686 default:
687 err = -EINVAL;
688 break;
689 }
690 if (! err) {
691 snd_atiixp_check_bus_busy(chip);
692 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
693 dma->ops->flush_dma(chip);
694 snd_atiixp_check_bus_busy(chip);
695 }
696 }
697 spin_unlock(&chip->reg_lock);
698 return err;
699 }
700
701
702 /*
703 * lowlevel callbacks for each DMA type
704 *
705 * every callback is supposed to be called in chip->reg_lock spinlock
706 */
707
708 /* flush FIFO of analog OUT DMA */
709 static void atiixp_out_flush_dma(atiixp_t *chip)
710 {
711 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
712 }
713
714 /* enable/disable analog OUT DMA */
715 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
716 {
717 unsigned int data;
718 data = atiixp_read(chip, CMD);
719 if (on) {
720 if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
721 return;
722 atiixp_out_flush_dma(chip);
723 data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
724 } else
725 data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
726 atiixp_write(chip, CMD, data);
727 }
728
729 /* start/stop transfer over OUT DMA */
730 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
731 {
732 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
733 on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
734 }
735
736 /* enable/disable analog IN DMA */
737 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
738 {
739 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
740 on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
741 }
742
743 /* start/stop analog IN DMA */
744 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
745 {
746 if (on) {
747 unsigned int data = atiixp_read(chip, CMD);
748 if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
749 data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
750 atiixp_write(chip, CMD, data);
751 }
752 } else
753 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
754 }
755
756 /* flush FIFO of analog IN DMA */
757 static void atiixp_in_flush_dma(atiixp_t *chip)
758 {
759 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
760 }
761
762 /* set up slots and formats for analog OUT */
763 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
764 {
765 atiixp_t *chip = snd_pcm_substream_chip(substream);
766 unsigned int data;
767
768 spin_lock_irq(&chip->reg_lock);
769 /* set output threshold */
770 data = atiixp_read(chip, MODEM_OUT_FIFO);
771 data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
772 data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
773 atiixp_write(chip, MODEM_OUT_FIFO, data);
774 spin_unlock_irq(&chip->reg_lock);
775 return 0;
776 }
777
778 /* set up slots and formats for analog IN */
779 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
780 {
781 return 0;
782 }
783
784 /*
785 * hw_params - allocate the buffer and set up buffer descriptors
786 */
787 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
788 snd_pcm_hw_params_t *hw_params)
789 {
790 atiixp_t *chip = snd_pcm_substream_chip(substream);
791 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
792 int err;
793 int i;
794
795 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
796 if (err < 0)
797 return err;
798 dma->buf_addr = substream->runtime->dma_addr;
799 dma->buf_bytes = params_buffer_bytes(hw_params);
800
801 err = atiixp_build_dma_packets(chip, dma, substream,
802 params_periods(hw_params),
803 params_period_bytes(hw_params));
804 if (err < 0)
805 return err;
806
807 /* set up modem rate */
808 for (i = 0; i < NUM_ATI_CODECS; i++) {
809 if (! chip->ac97[i])
810 continue;
811 snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
812 snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
813 }
814
815 return err;
816 }
817
818 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
819 {
820 atiixp_t *chip = snd_pcm_substream_chip(substream);
821 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
822
823 atiixp_clear_dma_packets(chip, dma, substream);
824 snd_pcm_lib_free_pages(substream);
825 return 0;
826 }
827
828
829 /*
830 * pcm hardware definition, identical for all DMA types
831 */
832 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
833 {
834 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
835 SNDRV_PCM_INFO_BLOCK_TRANSFER |
836 SNDRV_PCM_INFO_MMAP_VALID),
837 .formats = SNDRV_PCM_FMTBIT_S16_LE,
838 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_KNOT,
839 .rate_min = 8000,
840 .rate_max = 16000,
841 .channels_min = 2,
842 .channels_max = 2,
843 .buffer_bytes_max = 256 * 1024,
844 .period_bytes_min = 32,
845 .period_bytes_max = 128 * 1024,
846 .periods_min = 2,
847 .periods_max = ATI_MAX_DESCRIPTORS,
848 };
849
850 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
851 {
852 atiixp_t *chip = snd_pcm_substream_chip(substream);
853 snd_pcm_runtime_t *runtime = substream->runtime;
854 int err;
855 static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
856 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
857 .count = ARRAY_SIZE(rates),
858 .list = rates,
859 .mask = 0,
860 };
861
862 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
863
864 if (dma->opened)
865 return -EBUSY;
866 dma->substream = substream;
867 runtime->hw = snd_atiixp_pcm_hw;
868 dma->ac97_pcm_type = pcm_type;
869 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
870 return err;
871 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
872 return err;
873 runtime->private_data = dma;
874
875 /* enable DMA bits */
876 spin_lock_irq(&chip->reg_lock);
877 dma->ops->enable_dma(chip, 1);
878 spin_unlock_irq(&chip->reg_lock);
879 dma->opened = 1;
880
881 return 0;
882 }
883
884 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
885 {
886 atiixp_t *chip = snd_pcm_substream_chip(substream);
887 /* disable DMA bits */
888 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
889 spin_lock_irq(&chip->reg_lock);
890 dma->ops->enable_dma(chip, 0);
891 spin_unlock_irq(&chip->reg_lock);
892 dma->substream = NULL;
893 dma->opened = 0;
894 return 0;
895 }
896
897 /*
898 */
899 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
900 {
901 atiixp_t *chip = snd_pcm_substream_chip(substream);
902 int err;
903
904 down(&chip->open_mutex);
905 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
906 up(&chip->open_mutex);
907 if (err < 0)
908 return err;
909 return 0;
910 }
911
912 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
913 {
914 atiixp_t *chip = snd_pcm_substream_chip(substream);
915 int err;
916 down(&chip->open_mutex);
917 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
918 up(&chip->open_mutex);
919 return err;
920 }
921
922 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
923 {
924 atiixp_t *chip = snd_pcm_substream_chip(substream);
925 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
926 }
927
928 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
929 {
930 atiixp_t *chip = snd_pcm_substream_chip(substream);
931 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
932 }
933
934
935 /* AC97 playback */
936 static snd_pcm_ops_t snd_atiixp_playback_ops = {
937 .open = snd_atiixp_playback_open,
938 .close = snd_atiixp_playback_close,
939 .ioctl = snd_pcm_lib_ioctl,
940 .hw_params = snd_atiixp_pcm_hw_params,
941 .hw_free = snd_atiixp_pcm_hw_free,
942 .prepare = snd_atiixp_playback_prepare,
943 .trigger = snd_atiixp_pcm_trigger,
944 .pointer = snd_atiixp_pcm_pointer,
945 };
946
947 /* AC97 capture */
948 static snd_pcm_ops_t snd_atiixp_capture_ops = {
949 .open = snd_atiixp_capture_open,
950 .close = snd_atiixp_capture_close,
951 .ioctl = snd_pcm_lib_ioctl,
952 .hw_params = snd_atiixp_pcm_hw_params,
953 .hw_free = snd_atiixp_pcm_hw_free,
954 .prepare = snd_atiixp_capture_prepare,
955 .trigger = snd_atiixp_pcm_trigger,
956 .pointer = snd_atiixp_pcm_pointer,
957 };
958
959 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
960 .type = ATI_DMA_PLAYBACK,
961 .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
962 .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
963 .enable_dma = atiixp_out_enable_dma,
964 .enable_transfer = atiixp_out_enable_transfer,
965 .flush_dma = atiixp_out_flush_dma,
966 };
967
968 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
969 .type = ATI_DMA_CAPTURE,
970 .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
971 .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
972 .enable_dma = atiixp_in_enable_dma,
973 .enable_transfer = atiixp_in_enable_transfer,
974 .flush_dma = atiixp_in_flush_dma,
975 };
976
977 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
978 {
979 snd_pcm_t *pcm;
980 int err;
981
982 /* initialize constants */
983 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
984 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
985
986 /* PCM #0: analog I/O */
987 err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
988 if (err < 0)
989 return err;
990 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
991 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
992 pcm->private_data = chip;
993 strcpy(pcm->name, "ATI IXP MC97");
994 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
995
996 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
997 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
998
999 return 0;
1000 }
1001
1002
1003
1004 /*
1005 * interrupt handler
1006 */
1007 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1008 {
1009 atiixp_t *chip = dev_id;
1010 unsigned int status;
1011
1012 status = atiixp_read(chip, ISR);
1013
1014 if (! status)
1015 return IRQ_NONE;
1016
1017 /* process audio DMA */
1018 if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
1019 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1020 else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
1021 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1022 if (status & ATI_REG_ISR_MODEM_IN_XRUN)
1023 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1024 else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
1025 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1026
1027 /* for codec detection */
1028 if (status & CODEC_CHECK_BITS) {
1029 unsigned int detected;
1030 detected = status & CODEC_CHECK_BITS;
1031 spin_lock(&chip->reg_lock);
1032 chip->codec_not_ready_bits |= detected;
1033 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1034 spin_unlock(&chip->reg_lock);
1035 }
1036
1037 /* ack */
1038 atiixp_write(chip, ISR, status);
1039
1040 return IRQ_HANDLED;
1041 }
1042
1043
1044 /*
1045 * ac97 mixer section
1046 */
1047
1048 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1049 {
1050 ac97_bus_t *pbus;
1051 ac97_template_t ac97;
1052 int i, err;
1053 int codec_count;
1054 static ac97_bus_ops_t ops = {
1055 .write = snd_atiixp_ac97_write,
1056 .read = snd_atiixp_ac97_read,
1057 };
1058 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1059 ATI_REG_ISR_CODEC0_NOT_READY,
1060 ATI_REG_ISR_CODEC1_NOT_READY,
1061 ATI_REG_ISR_CODEC2_NOT_READY,
1062 };
1063
1064 if (snd_atiixp_codec_detect(chip) < 0)
1065 return -ENXIO;
1066
1067 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1068 return err;
1069 pbus->clock = clock;
1070 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with audio driver */
1071 chip->ac97_bus = pbus;
1072
1073 codec_count = 0;
1074 for (i = 0; i < NUM_ATI_CODECS; i++) {
1075 if (chip->codec_not_ready_bits & codec_skip[i])
1076 continue;
1077 memset(&ac97, 0, sizeof(ac97));
1078 ac97.private_data = chip;
1079 ac97.pci = chip->pci;
1080 ac97.num = i;
1081 ac97.scaps = AC97_SCAP_SKIP_AUDIO;
1082 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1083 chip->ac97[i] = NULL; /* to be sure */
1084 snd_printdd("atiixp: codec %d not available for modem\n", i);
1085 continue;
1086 }
1087 codec_count++;
1088 }
1089
1090 if (! codec_count) {
1091 snd_printk(KERN_ERR "atiixp: no codec available\n");
1092 return -ENODEV;
1093 }
1094
1095 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1096
1097 return 0;
1098 }
1099
1100
1101 #ifdef CONFIG_PM
1102 /*
1103 * power management
1104 */
1105 static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
1106 {
1107 atiixp_t *chip = card->pm_private_data;
1108 int i;
1109
1110 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1111 if (chip->pcmdevs[i])
1112 snd_pcm_suspend_all(chip->pcmdevs[i]);
1113 for (i = 0; i < NUM_ATI_CODECS; i++)
1114 if (chip->ac97[i])
1115 snd_ac97_suspend(chip->ac97[i]);
1116 snd_atiixp_aclink_down(chip);
1117 snd_atiixp_chip_stop(chip);
1118
1119 pci_set_power_state(chip->pci, PCI_D3hot);
1120 pci_disable_device(chip->pci);
1121 return 0;
1122 }
1123
1124 static int snd_atiixp_resume(snd_card_t *card)
1125 {
1126 atiixp_t *chip = card->pm_private_data;
1127 int i;
1128
1129 pci_enable_device(chip->pci);
1130 pci_set_power_state(chip->pci, PCI_D0);
1131 pci_set_master(chip->pci);
1132
1133 snd_atiixp_aclink_reset(chip);
1134 snd_atiixp_chip_start(chip);
1135
1136 for (i = 0; i < NUM_ATI_CODECS; i++)
1137 if (chip->ac97[i])
1138 snd_ac97_resume(chip->ac97[i]);
1139
1140 return 0;
1141 }
1142 #endif /* CONFIG_PM */
1143
1144
1145 /*
1146 * proc interface for register dump
1147 */
1148
1149 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1150 {
1151 atiixp_t *chip = entry->private_data;
1152 int i;
1153
1154 for (i = 0; i < 256; i += 4)
1155 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1156 }
1157
1158 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1159 {
1160 snd_info_entry_t *entry;
1161
1162 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1163 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1164 }
1165
1166
1167
1168 /*
1169 * destructor
1170 */
1171
1172 static int snd_atiixp_free(atiixp_t *chip)
1173 {
1174 if (chip->irq < 0)
1175 goto __hw_end;
1176 snd_atiixp_chip_stop(chip);
1177 synchronize_irq(chip->irq);
1178 __hw_end:
1179 if (chip->irq >= 0)
1180 free_irq(chip->irq, (void *)chip);
1181 if (chip->remap_addr)
1182 iounmap(chip->remap_addr);
1183 pci_release_regions(chip->pci);
1184 pci_disable_device(chip->pci);
1185 kfree(chip);
1186 return 0;
1187 }
1188
1189 static int snd_atiixp_dev_free(snd_device_t *device)
1190 {
1191 atiixp_t *chip = device->device_data;
1192 return snd_atiixp_free(chip);
1193 }
1194
1195 /*
1196 * constructor for chip instance
1197 */
1198 static int __devinit snd_atiixp_create(snd_card_t *card,
1199 struct pci_dev *pci,
1200 atiixp_t **r_chip)
1201 {
1202 static snd_device_ops_t ops = {
1203 .dev_free = snd_atiixp_dev_free,
1204 };
1205 atiixp_t *chip;
1206 int err;
1207
1208 if ((err = pci_enable_device(pci)) < 0)
1209 return err;
1210
1211 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1212 if (chip == NULL) {
1213 pci_disable_device(pci);
1214 return -ENOMEM;
1215 }
1216
1217 spin_lock_init(&chip->reg_lock);
1218 init_MUTEX(&chip->open_mutex);
1219 chip->card = card;
1220 chip->pci = pci;
1221 chip->irq = -1;
1222 if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
1223 kfree(chip);
1224 pci_disable_device(pci);
1225 return err;
1226 }
1227 chip->addr = pci_resource_start(pci, 0);
1228 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1229 if (chip->remap_addr == NULL) {
1230 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1231 snd_atiixp_free(chip);
1232 return -EIO;
1233 }
1234
1235 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1236 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1237 snd_atiixp_free(chip);
1238 return -EBUSY;
1239 }
1240 chip->irq = pci->irq;
1241 pci_set_master(pci);
1242 synchronize_irq(chip->irq);
1243
1244 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1245 snd_atiixp_free(chip);
1246 return err;
1247 }
1248
1249 snd_card_set_dev(card, &pci->dev);
1250
1251 *r_chip = chip;
1252 return 0;
1253 }
1254
1255
1256 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1257 const struct pci_device_id *pci_id)
1258 {
1259 static int dev;
1260 snd_card_t *card;
1261 atiixp_t *chip;
1262 unsigned char revision;
1263 int err;
1264
1265 if (dev >= SNDRV_CARDS)
1266 return -ENODEV;
1267 if (!enable[dev]) {
1268 dev++;
1269 return -ENOENT;
1270 }
1271
1272 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1273 if (card == NULL)
1274 return -ENOMEM;
1275
1276 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1277
1278 strcpy(card->driver, "ATIIXP-MODEM");
1279 strcpy(card->shortname, "ATI IXP Modem");
1280 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1281 goto __error;
1282
1283 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1284 goto __error;
1285
1286 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
1287 goto __error;
1288
1289 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1290 goto __error;
1291
1292 snd_atiixp_proc_init(chip);
1293
1294 snd_atiixp_chip_start(chip);
1295
1296 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1297 card->shortname, revision, chip->addr, chip->irq);
1298
1299 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1300
1301 if ((err = snd_card_register(card)) < 0)
1302 goto __error;
1303
1304 pci_set_drvdata(pci, card);
1305 dev++;
1306 return 0;
1307
1308 __error:
1309 snd_card_free(card);
1310 return err;
1311 }
1312
1313 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1314 {
1315 snd_card_free(pci_get_drvdata(pci));
1316 pci_set_drvdata(pci, NULL);
1317 }
1318
1319 static struct pci_driver driver = {
1320 .name = "ATI IXP MC97 controller",
1321 .id_table = snd_atiixp_ids,
1322 .probe = snd_atiixp_probe,
1323 .remove = __devexit_p(snd_atiixp_remove),
1324 SND_PCI_PM_CALLBACKS
1325 };
1326
1327
1328 static int __init alsa_card_atiixp_init(void)
1329 {
1330 return pci_register_driver(&driver);
1331 }
1332
1333 static void __exit alsa_card_atiixp_exit(void)
1334 {
1335 pci_unregister_driver(&driver);
1336 }
1337
1338 module_init(alsa_card_atiixp_init)
1339 module_exit(alsa_card_atiixp_exit)
kernel source for telekom puls (alcatel/mediatek)