scripts/Makefile.build

   1 # ==========================================================================
   2 # Building
   3 # ==========================================================================
   4
   5 src := $(obj)
   6
   7 PHONY := __build
   8 __build:
   9
  10 # Init all relevant variables used in kbuild files so
  11 # 1) they have correct type
  12 # 2) they do not inherit any value from the environment
  13 obj-y :=
  14 obj-m :=
  15 lib-y :=
  16 lib-m :=
  17 always :=
  18 targets :=
  19 subdir-y :=
  20 subdir-m :=
  21 EXTRA_AFLAGS   :=
  22 EXTRA_CFLAGS   :=
  23 EXTRA_CPPFLAGS :=
  24 EXTRA_LDFLAGS  :=
  25 asflags-y  :=
  26 ccflags-y  :=
  27 cppflags-y :=
  28 ldflags-y  :=
  29
  30 # Read auto.conf if it exists, otherwise ignore
  31 -include include/config/auto.conf
  32
  33 include scripts/Kbuild.include
  34
  35 # For backward compatibility check that these variables do not change
  36 save-cflags := $(CFLAGS)
  37
  38 # The filename Kbuild has precedence over Makefile
  39 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  40 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  41 include $(kbuild-file)
  42
  43 # If the save-* variables changed error out
  44 ifeq ($(KBUILD_NOPEDANTIC),)
  45         ifneq ("$(save-cflags)","$(CFLAGS)")
  46                 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
  47         endif
  48 endif
  49 include scripts/Makefile.lib
  50
  51 ifdef host-progs
  52 ifneq ($(hostprogs-y),$(host-progs))
  53 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  54 hostprogs-y += $(host-progs)
  55 endif
  56 endif
  57
  58 # Do not include host rules unless needed
  59 ifneq ($(hostprogs-y)$(hostprogs-m),)
  60 include scripts/Makefile.host
  61 endif
  62
  63 ifneq ($(KBUILD_SRC),)
  64 # Create output directory if not already present
  65 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  66
  67 # Create directories for object files if directory does not exist
  68 # Needed when obj-y := dir/file.o syntax is used
  69 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  70 endif
  71
  72 ifndef obj
  73 $(warning kbuild: Makefile.build is included improperly)
  74 endif
  75
  76 # ===========================================================================
  77
  78 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  79 lib-target := $(obj)/lib.a
  80 endif
  81
  82 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
  83 builtin-target := $(obj)/built-in.o
  84 endif
  85
  86 modorder-target := $(obj)/modules.order
  87
  88 # We keep a list of all modules in $(MODVERDIR)
  89
  90 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  91          $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  92          $(subdir-ym) $(always)
  93         @:
  94
  95 # Linus' kernel sanity checking tool
  96 ifneq ($(KBUILD_CHECKSRC),0)
  97   ifeq ($(KBUILD_CHECKSRC),2)
  98     quiet_cmd_force_checksrc = CHECK   $<
  99           cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
 100   else
 101       quiet_cmd_checksrc     = CHECK   $<
 102             cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
 103   endif
 104 endif
 105
 106 # Do section mismatch analysis for each module/built-in.o
 107 ifdef CONFIG_DEBUG_SECTION_MISMATCH
 108   cmd_secanalysis = ; scripts/mod/modpost $@
 109 endif
 110
 111 # Compile C sources (.c)
 112 # ---------------------------------------------------------------------------
 113
 114 # Default is built-in, unless we know otherwise
 115 modkern_cflags := $(CFLAGS_KERNEL)
 116 quiet_modtag := $(empty)   $(empty)
 117
 118 $(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
 119 $(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
 120 $(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
 121 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
 122
 123 $(real-objs-m)        : quiet_modtag := [M]
 124 $(real-objs-m:.o=.i)  : quiet_modtag := [M]
 125 $(real-objs-m:.o=.s)  : quiet_modtag := [M]
 126 $(real-objs-m:.o=.lst): quiet_modtag := [M]
 127
 128 $(obj-m)              : quiet_modtag := [M]
 129
 130 # Default for not multi-part modules
 131 modname = $(basetarget)
 132
 133 $(multi-objs-m)         : modname = $(modname-multi)
 134 $(multi-objs-m:.o=.i)   : modname = $(modname-multi)
 135 $(multi-objs-m:.o=.s)   : modname = $(modname-multi)
 136 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
 137 $(multi-objs-y)         : modname = $(modname-multi)
 138 $(multi-objs-y:.o=.i)   : modname = $(modname-multi)
 139 $(multi-objs-y:.o=.s)   : modname = $(modname-multi)
 140 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
 141
 142 quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
 143 cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
 144
 145 $(obj)/%.s: $(src)/%.c FORCE
 146         $(call if_changed_dep,cc_s_c)
 147
 148 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
 149 cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
 150
 151 $(obj)/%.i: $(src)/%.c FORCE
 152         $(call if_changed_dep,cc_i_c)
 153
 154 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
 155 cmd_cc_symtypes_c          = \
 156                 $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
 157                 | $(GENKSYMS) -T $@ >/dev/null;                         \
 158                 test -s $@ || rm -f $@
 159
 160 $(obj)/%.symtypes : $(src)/%.c FORCE
 161         $(call if_changed_dep,cc_symtypes_c)
 162
 163 # C (.c) files
 164 # The C file is compiled and updated dependency information is generated.
 165 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
 166
 167 quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
 168
 169 ifndef CONFIG_MODVERSIONS
 170 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
 171
 172 else
 173 # When module versioning is enabled the following steps are executed:
 174 # o compile a .tmp_<file>.o from <file>.c
 175 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
 176 #   not export symbols, we just rename .tmp_<file>.o to <file>.o and
 177 #   are done.
 178 # o otherwise, we calculate symbol versions using the good old
 179 #   genksyms on the preprocessed source and postprocess them in a way
 180 #   that they are usable as a linker script
 181 # o generate <file>.o from .tmp_<file>.o using the linker to
 182 #   replace the unresolved symbols __crc_exported_symbol with
 183 #   the actual value of the checksum generated by genksyms
 184
 185 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
 186 cmd_modversions =                                                       \
 187         if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then     \
 188                 $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
 189                 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES),                  \
 190                               -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH)   \
 191                 > $(@D)/.tmp_$(@F:.o=.ver);                             \
 192                                                                         \
 193                 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F)              \
 194                         -T $(@D)/.tmp_$(@F:.o=.ver);                    \
 195                 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);        \
 196         else                                                            \
 197                 mv -f $(@D)/.tmp_$(@F) $@;                              \
 198         fi;
 199 endif
 200
 201 ifdef CONFIG_64BIT
 202 arch_bits = 64
 203 else
 204 arch_bits = 32
 205 endif
 206
 207 ifdef CONFIG_FTRACE_MCOUNT_RECORD
 208 cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl \
 209         "$(ARCH)" "$(arch_bits)" "$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" \
 210         "$(NM)" "$(RM)" "$(MV)" "$(@)";
 211 endif
 212
 213 define rule_cc_o_c
 214         $(call echo-cmd,checksrc) $(cmd_checksrc)                         \
 215         $(call echo-cmd,cc_o_c) $(cmd_cc_o_c);                            \
 216         $(cmd_modversions)                                                \
 217         $(cmd_record_mcount)                                              \
 218         scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
 219                                                       $(dot-target).tmp;  \
 220         rm -f $(depfile);                                                 \
 221         mv -f $(dot-target).tmp $(dot-target).cmd
 222 endef
 223
 224 # Built-in and composite module parts
 225 $(obj)/%.o: $(src)/%.c FORCE
 226         $(call cmd,force_checksrc)
 227         $(call if_changed_rule,cc_o_c)
 228
 229 # Single-part modules are special since we need to mark them in $(MODVERDIR)
 230
 231 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
 232         $(call cmd,force_checksrc)
 233         $(call if_changed_rule,cc_o_c)
 234         @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
 235
 236 quiet_cmd_cc_lst_c = MKLST   $@
 237       cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
 238                      $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
 239                                      System.map $(OBJDUMP) > $@
 240
 241 $(obj)/%.lst: $(src)/%.c FORCE
 242         $(call if_changed_dep,cc_lst_c)
 243
 244 # Compile assembler sources (.S)
 245 # ---------------------------------------------------------------------------
 246
 247 modkern_aflags := $(AFLAGS_KERNEL)
 248
 249 $(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
 250 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
 251
 252 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
 253 cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 254
 255 $(obj)/%.s: $(src)/%.S FORCE
 256         $(call if_changed_dep,as_s_S)
 257
 258 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 259 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 260
 261 $(obj)/%.o: $(src)/%.S FORCE
 262         $(call if_changed_dep,as_o_S)
 263
 264 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
 265 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 266
 267 # Linker scripts preprocessor (.lds.S -> .lds)
 268 # ---------------------------------------------------------------------------
 269 quiet_cmd_cpp_lds_S = LDS     $@
 270       cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
 271
 272 $(obj)/%.lds: $(src)/%.lds.S FORCE
 273         $(call if_changed_dep,cpp_lds_S)
 274
 275 # Build the compiled-in targets
 276 # ---------------------------------------------------------------------------
 277
 278 # To build objects in subdirs, we need to descend into the directories
 279 $(sort $(subdir-obj-y)): $(subdir-ym) ;
 280
 281 #
 282 # Rule to compile a set of .o files into one .o file
 283 #
 284 ifdef builtin-target
 285 quiet_cmd_link_o_target = LD      $@
 286 # If the list of objects to link is empty, just create an empty built-in.o
 287 cmd_link_o_target = $(if $(strip $(obj-y)),\
 288                       $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
 289                       $(cmd_secanalysis),\
 290                       rm -f $@; $(AR) rcs $@)
 291
 292 $(builtin-target): $(obj-y) FORCE
 293         $(call if_changed,link_o_target)
 294
 295 targets += $(builtin-target)
 296 endif # builtin-target
 297
 298 #
 299 # Rule to create modules.order file
 300 #
 301 # Create commands to either record .ko file or cat modules.order from
 302 # a subdirectory
 303 modorder-cmds =                                         \
 304         $(foreach m, $(modorder),                       \
 305                 $(if $(filter %/modules.order, $m),     \
 306                         cat $m;, echo kernel/$m;))
 307
 308 $(modorder-target): $(subdir-ym) FORCE
 309         $(Q)(cat /dev/null; $(modorder-cmds)) > $@
 310
 311 #
 312 # Rule to compile a set of .o files into one .a file
 313 #
 314 ifdef lib-target
 315 quiet_cmd_link_l_target = AR      $@
 316 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
 317
 318 $(lib-target): $(lib-y) FORCE
 319         $(call if_changed,link_l_target)
 320
 321 targets += $(lib-target)
 322 endif
 323
 324 #
 325 # Rule to link composite objects
 326 #
 327 #  Composite objects are specified in kbuild makefile as follows:
 328 #    <composite-object>-objs := <list of .o files>
 329 #  or
 330 #    <composite-object>-y    := <list of .o files>
 331 link_multi_deps =                     \
 332 $(filter $(addprefix $(obj)/,         \
 333 $($(subst $(obj)/,,$(@:.o=-objs)))    \
 334 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
 335
 336 quiet_cmd_link_multi-y = LD      $@
 337 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
 338
 339 quiet_cmd_link_multi-m = LD [M]  $@
 340 cmd_link_multi-m = $(cmd_link_multi-y)
 341
 342 # We would rather have a list of rules like
 343 #       foo.o: $(foo-objs)
 344 # but that's not so easy, so we rather make all composite objects depend
 345 # on the set of all their parts
 346 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
 347         $(call if_changed,link_multi-y)
 348
 349 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
 350         $(call if_changed,link_multi-m)
 351         @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
 352
 353 targets += $(multi-used-y) $(multi-used-m)
 354
 355
 356 # Descending
 357 # ---------------------------------------------------------------------------
 358
 359 PHONY += $(subdir-ym)
 360 $(subdir-ym):
 361         $(Q)$(MAKE) $(build)=$@
 362
 363 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
 364 # ---------------------------------------------------------------------------
 365
 366 PHONY += FORCE
 367
 368 FORCE:
 369
 370 # Read all saved command lines and dependencies for the $(targets) we
 371 # may be building above, using $(if_changed{,_dep}). As an
 372 # optimization, we don't need to read them if the target does not
 373 # exist, we will rebuild anyway in that case.
 374
 375 targets := $(wildcard $(sort $(targets)))
 376 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
 377
 378 ifneq ($(cmd_files),)
 379   include $(cmd_files)
 380 endif
 381
 382
 383 # Declare the contents of the .PHONY variable as phony.  We keep that
 384 # information in a variable se we can use it in if_changed and friends.
 385
 386 .PHONY: $(PHONY)