Merge tag 'firewire-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee139...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / serial_core.h
1 /*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22
23 #include <linux/serial.h>
24
25 /*
26 * The type definitions. These are from Ted Ts'o's serial.h
27 */
28 #define PORT_UNKNOWN 0
29 #define PORT_8250 1
30 #define PORT_16450 2
31 #define PORT_16550 3
32 #define PORT_16550A 4
33 #define PORT_CIRRUS 5
34 #define PORT_16650 6
35 #define PORT_16650V2 7
36 #define PORT_16750 8
37 #define PORT_STARTECH 9
38 #define PORT_16C950 10
39 #define PORT_16654 11
40 #define PORT_16850 12
41 #define PORT_RSA 13
42 #define PORT_NS16550A 14
43 #define PORT_XSCALE 15
44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
48 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
49 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
50 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
51 #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
52 #define PORT_MAX_8250 23 /* max port ID */
53
54 /*
55 * ARM specific type numbers. These are not currently guaranteed
56 * to be implemented, and will change in the future. These are
57 * separate so any additions to the old serial.c that occur before
58 * we are merged can be easily merged here.
59 */
60 #define PORT_PXA 31
61 #define PORT_AMBA 32
62 #define PORT_CLPS711X 33
63 #define PORT_SA1100 34
64 #define PORT_UART00 35
65 #define PORT_21285 37
66
67 /* Sparc type numbers. */
68 #define PORT_SUNZILOG 38
69 #define PORT_SUNSAB 39
70
71 /* DEC */
72 #define PORT_DZ 46
73 #define PORT_ZS 47
74
75 /* Parisc type numbers. */
76 #define PORT_MUX 48
77
78 /* Atmel AT91 / AT32 SoC */
79 #define PORT_ATMEL 49
80
81 /* Macintosh Zilog type numbers */
82 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
83 #define PORT_PMAC_ZILOG 51
84
85 /* SH-SCI */
86 #define PORT_SCI 52
87 #define PORT_SCIF 53
88 #define PORT_IRDA 54
89
90 /* Samsung S3C2410 SoC and derivatives thereof */
91 #define PORT_S3C2410 55
92
93 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
94 #define PORT_IP22ZILOG 56
95
96 /* Sharp LH7a40x -- an ARM9 SoC series */
97 #define PORT_LH7A40X 57
98
99 /* PPC CPM type number */
100 #define PORT_CPM 58
101
102 /* MPC52xx (and MPC512x) type numbers */
103 #define PORT_MPC52xx 59
104
105 /* IBM icom */
106 #define PORT_ICOM 60
107
108 /* Samsung S3C2440 SoC */
109 #define PORT_S3C2440 61
110
111 /* Motorola i.MX SoC */
112 #define PORT_IMX 62
113
114 /* Marvell MPSC */
115 #define PORT_MPSC 63
116
117 /* TXX9 type number */
118 #define PORT_TXX9 64
119
120 /* NEC VR4100 series SIU/DSIU */
121 #define PORT_VR41XX_SIU 65
122 #define PORT_VR41XX_DSIU 66
123
124 /* Samsung S3C2400 SoC */
125 #define PORT_S3C2400 67
126
127 /* M32R SIO */
128 #define PORT_M32R_SIO 68
129
130 /*Digi jsm */
131 #define PORT_JSM 69
132
133 #define PORT_PNX8XXX 70
134
135 /* Hilscher netx */
136 #define PORT_NETX 71
137
138 /* SUN4V Hypervisor Console */
139 #define PORT_SUNHV 72
140
141 #define PORT_S3C2412 73
142
143 /* Xilinx uartlite */
144 #define PORT_UARTLITE 74
145
146 /* Blackfin bf5xx */
147 #define PORT_BFIN 75
148
149 /* Micrel KS8695 */
150 #define PORT_KS8695 76
151
152 /* Broadcom SB1250, etc. SOC */
153 #define PORT_SB1250_DUART 77
154
155 /* Freescale ColdFire */
156 #define PORT_MCF 78
157
158 /* Blackfin SPORT */
159 #define PORT_BFIN_SPORT 79
160
161 /* MN10300 on-chip UART numbers */
162 #define PORT_MN10300 80
163 #define PORT_MN10300_CTS 81
164
165 #define PORT_SC26XX 82
166
167 /* SH-SCI */
168 #define PORT_SCIFA 83
169
170 #define PORT_S3C6400 84
171
172 /* NWPSERIAL */
173 #define PORT_NWPSERIAL 85
174
175 /* MAX3100 */
176 #define PORT_MAX3100 86
177
178 /* Timberdale UART */
179 #define PORT_TIMBUART 87
180
181 /* Qualcomm MSM SoCs */
182 #define PORT_MSM 88
183
184 /* BCM63xx family SoCs */
185 #define PORT_BCM63XX 89
186
187 /* Aeroflex Gaisler GRLIB APBUART */
188 #define PORT_APBUART 90
189
190 /* Altera UARTs */
191 #define PORT_ALTERA_JTAGUART 91
192 #define PORT_ALTERA_UART 92
193
194 /* SH-SCI */
195 #define PORT_SCIFB 93
196
197 /* MAX310X */
198 #define PORT_MAX310X 94
199
200 /* High Speed UART for Medfield */
201 #define PORT_MFD 95
202
203 /* TI OMAP-UART */
204 #define PORT_OMAP 96
205
206 /* VIA VT8500 SoC */
207 #define PORT_VT8500 97
208
209 /* Xilinx PSS UART */
210 #define PORT_XUARTPS 98
211
212 /* Atheros AR933X SoC */
213 #define PORT_AR933X 99
214
215 /* Energy Micro efm32 SoC */
216 #define PORT_EFMUART 100
217
218 #ifdef __KERNEL__
219
220 #include <linux/compiler.h>
221 #include <linux/interrupt.h>
222 #include <linux/circ_buf.h>
223 #include <linux/spinlock.h>
224 #include <linux/sched.h>
225 #include <linux/tty.h>
226 #include <linux/mutex.h>
227 #include <linux/sysrq.h>
228 #include <linux/pps_kernel.h>
229
230 struct uart_port;
231 struct serial_struct;
232 struct device;
233
234 /*
235 * This structure describes all the operations that can be
236 * done on the physical hardware.
237 */
238 struct uart_ops {
239 unsigned int (*tx_empty)(struct uart_port *);
240 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
241 unsigned int (*get_mctrl)(struct uart_port *);
242 void (*stop_tx)(struct uart_port *);
243 void (*start_tx)(struct uart_port *);
244 void (*send_xchar)(struct uart_port *, char ch);
245 void (*stop_rx)(struct uart_port *);
246 void (*enable_ms)(struct uart_port *);
247 void (*break_ctl)(struct uart_port *, int ctl);
248 int (*startup)(struct uart_port *);
249 void (*shutdown)(struct uart_port *);
250 void (*flush_buffer)(struct uart_port *);
251 void (*set_termios)(struct uart_port *, struct ktermios *new,
252 struct ktermios *old);
253 void (*set_ldisc)(struct uart_port *, int new);
254 void (*pm)(struct uart_port *, unsigned int state,
255 unsigned int oldstate);
256 int (*set_wake)(struct uart_port *, unsigned int state);
257
258 /*
259 * Return a string describing the type of the port
260 */
261 const char *(*type)(struct uart_port *);
262
263 /*
264 * Release IO and memory resources used by the port.
265 * This includes iounmap if necessary.
266 */
267 void (*release_port)(struct uart_port *);
268
269 /*
270 * Request IO and memory resources used by the port.
271 * This includes iomapping the port if necessary.
272 */
273 int (*request_port)(struct uart_port *);
274 void (*config_port)(struct uart_port *, int);
275 int (*verify_port)(struct uart_port *, struct serial_struct *);
276 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
277 #ifdef CONFIG_CONSOLE_POLL
278 int (*poll_init)(struct uart_port *);
279 void (*poll_put_char)(struct uart_port *, unsigned char);
280 int (*poll_get_char)(struct uart_port *);
281 #endif
282 };
283
284 #define NO_POLL_CHAR 0x00ff0000
285 #define UART_CONFIG_TYPE (1 << 0)
286 #define UART_CONFIG_IRQ (1 << 1)
287
288 struct uart_icount {
289 __u32 cts;
290 __u32 dsr;
291 __u32 rng;
292 __u32 dcd;
293 __u32 rx;
294 __u32 tx;
295 __u32 frame;
296 __u32 overrun;
297 __u32 parity;
298 __u32 brk;
299 __u32 buf_overrun;
300 };
301
302 typedef unsigned int __bitwise__ upf_t;
303
304 struct uart_port {
305 spinlock_t lock; /* port lock */
306 unsigned long iobase; /* in/out[bwl] */
307 unsigned char __iomem *membase; /* read/write[bwl] */
308 unsigned int (*serial_in)(struct uart_port *, int);
309 void (*serial_out)(struct uart_port *, int, int);
310 void (*set_termios)(struct uart_port *,
311 struct ktermios *new,
312 struct ktermios *old);
313 int (*handle_irq)(struct uart_port *);
314 void (*pm)(struct uart_port *, unsigned int state,
315 unsigned int old);
316 void (*handle_break)(struct uart_port *);
317 unsigned int irq; /* irq number */
318 unsigned long irqflags; /* irq flags */
319 unsigned int uartclk; /* base uart clock */
320 unsigned int fifosize; /* tx fifo size */
321 unsigned char x_char; /* xon/xoff char */
322 unsigned char regshift; /* reg offset shift */
323 unsigned char iotype; /* io access style */
324 unsigned char unused1;
325
326 #define UPIO_PORT (0)
327 #define UPIO_HUB6 (1)
328 #define UPIO_MEM (2)
329 #define UPIO_MEM32 (3)
330 #define UPIO_AU (4) /* Au1x00 type IO */
331 #define UPIO_TSI (5) /* Tsi108/109 type IO */
332 #define UPIO_RM9000 (6) /* RM9000 type IO */
333
334 unsigned int read_status_mask; /* driver specific */
335 unsigned int ignore_status_mask; /* driver specific */
336 struct uart_state *state; /* pointer to parent state */
337 struct uart_icount icount; /* statistics */
338
339 struct console *cons; /* struct console, if any */
340 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
341 unsigned long sysrq; /* sysrq timeout */
342 #endif
343
344 upf_t flags;
345
346 #define UPF_FOURPORT ((__force upf_t) (1 << 1))
347 #define UPF_SAK ((__force upf_t) (1 << 2))
348 #define UPF_SPD_MASK ((__force upf_t) (0x1030))
349 #define UPF_SPD_HI ((__force upf_t) (0x0010))
350 #define UPF_SPD_VHI ((__force upf_t) (0x0020))
351 #define UPF_SPD_CUST ((__force upf_t) (0x0030))
352 #define UPF_SPD_SHI ((__force upf_t) (0x1000))
353 #define UPF_SPD_WARP ((__force upf_t) (0x1010))
354 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
355 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
356 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
357 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
358 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
359 #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
360 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
361 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
362 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
363 #define UPF_EXAR_EFR ((__force upf_t) (1 << 25))
364 #define UPF_BUG_THRE ((__force upf_t) (1 << 26))
365 /* The exact UART type is known and should not be probed. */
366 #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
367 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
368 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
369 #define UPF_DEAD ((__force upf_t) (1 << 30))
370 #define UPF_IOREMAP ((__force upf_t) (1 << 31))
371
372 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
373 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
374
375 unsigned int mctrl; /* current modem ctrl settings */
376 unsigned int timeout; /* character-based timeout */
377 unsigned int type; /* port type */
378 const struct uart_ops *ops;
379 unsigned int custom_divisor;
380 unsigned int line; /* port index */
381 resource_size_t mapbase; /* for ioremap */
382 struct device *dev; /* parent device */
383 unsigned char hub6; /* this should be in the 8250 driver */
384 unsigned char suspended;
385 unsigned char irq_wake;
386 unsigned char unused[2];
387 void *private_data; /* generic platform data pointer */
388 };
389
390 static inline int serial_port_in(struct uart_port *up, int offset)
391 {
392 return up->serial_in(up, offset);
393 }
394
395 static inline void serial_port_out(struct uart_port *up, int offset, int value)
396 {
397 up->serial_out(up, offset, value);
398 }
399
400 /*
401 * This is the state information which is persistent across opens.
402 */
403 struct uart_state {
404 struct tty_port port;
405
406 int pm_state;
407 struct circ_buf xmit;
408
409 struct uart_port *uart_port;
410 };
411
412 #define UART_XMIT_SIZE PAGE_SIZE
413
414
415 /* number of characters left in xmit buffer before we ask for more */
416 #define WAKEUP_CHARS 256
417
418 struct module;
419 struct tty_driver;
420
421 struct uart_driver {
422 struct module *owner;
423 const char *driver_name;
424 const char *dev_name;
425 int major;
426 int minor;
427 int nr;
428 struct console *cons;
429
430 /*
431 * these are private; the low level driver should not
432 * touch these; they should be initialised to NULL
433 */
434 struct uart_state *state;
435 struct tty_driver *tty_driver;
436 };
437
438 void uart_write_wakeup(struct uart_port *port);
439
440 /*
441 * Baud rate helpers.
442 */
443 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
444 unsigned int baud);
445 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
446 struct ktermios *old, unsigned int min,
447 unsigned int max);
448 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
449
450 /* Base timer interval for polling */
451 static inline int uart_poll_timeout(struct uart_port *port)
452 {
453 int timeout = port->timeout;
454
455 return timeout > 6 ? (timeout / 2 - 2) : 1;
456 }
457
458 /*
459 * Console helpers.
460 */
461 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
462 struct console *c);
463 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
464 int *flow);
465 int uart_set_options(struct uart_port *port, struct console *co, int baud,
466 int parity, int bits, int flow);
467 struct tty_driver *uart_console_device(struct console *co, int *index);
468 void uart_console_write(struct uart_port *port, const char *s,
469 unsigned int count,
470 void (*putchar)(struct uart_port *, int));
471
472 /*
473 * Port/driver registration/removal
474 */
475 int uart_register_driver(struct uart_driver *uart);
476 void uart_unregister_driver(struct uart_driver *uart);
477 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
478 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
479 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
480
481 /*
482 * Power Management
483 */
484 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
485 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
486
487 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
488 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
489
490 #define uart_circ_chars_pending(circ) \
491 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
492
493 #define uart_circ_chars_free(circ) \
494 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
495
496 static inline int uart_tx_stopped(struct uart_port *port)
497 {
498 struct tty_struct *tty = port->state->port.tty;
499 if(tty->stopped || tty->hw_stopped)
500 return 1;
501 return 0;
502 }
503
504 /*
505 * The following are helper functions for the low level drivers.
506 */
507
508 extern void uart_handle_dcd_change(struct uart_port *uport,
509 unsigned int status);
510 extern void uart_handle_cts_change(struct uart_port *uport,
511 unsigned int status);
512
513 extern void uart_insert_char(struct uart_port *port, unsigned int status,
514 unsigned int overrun, unsigned int ch, unsigned int flag);
515
516 #ifdef SUPPORT_SYSRQ
517 static inline int
518 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
519 {
520 if (port->sysrq) {
521 if (ch && time_before(jiffies, port->sysrq)) {
522 handle_sysrq(ch);
523 port->sysrq = 0;
524 return 1;
525 }
526 port->sysrq = 0;
527 }
528 return 0;
529 }
530 #else
531 #define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; })
532 #endif
533
534 /*
535 * We do the SysRQ and SAK checking like this...
536 */
537 static inline int uart_handle_break(struct uart_port *port)
538 {
539 struct uart_state *state = port->state;
540
541 if (port->handle_break)
542 port->handle_break(port);
543
544 #ifdef SUPPORT_SYSRQ
545 if (port->cons && port->cons->index == port->line) {
546 if (!port->sysrq) {
547 port->sysrq = jiffies + HZ*5;
548 return 1;
549 }
550 port->sysrq = 0;
551 }
552 #endif
553 if (port->flags & UPF_SAK)
554 do_SAK(state->port.tty);
555 return 0;
556 }
557
558 /*
559 * UART_ENABLE_MS - determine if port should enable modem status irqs
560 */
561 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
562 (cflag) & CRTSCTS || \
563 !((cflag) & CLOCAL))
564
565 #endif
566
567 #endif /* LINUX_SERIAL_CORE_H */