include/linux/pci.h

   1 /*
   2  *      pci.h
   3  *
   4  *      PCI defines and function prototypes
   5  *      Copyright 1994, Drew Eckhardt
   6  *      Copyright 1997--1999 Martin Mares <mj@ucw.cz>
   7  *
   8  *      For more information, please consult the following manuals (look at
   9  *      http://www.pcisig.com/ for how to get them):
  10  *
  11  *      PCI BIOS Specification
  12  *      PCI Local Bus Specification
  13  *      PCI to PCI Bridge Specification
  14  *      PCI System Design Guide
  15  */
  16
  17 #ifndef LINUX_PCI_H
  18 #define LINUX_PCI_H
  19
  20 #include <linux/mod_devicetable.h>
  21
  22 /* Include the pci register defines */
  23 #include <linux/pci_regs.h>
  24
  25 /* Include the ID list */
  26 #include <linux/pci_ids.h>
  27
  28 /*
  29  * The PCI interface treats multi-function devices as independent
  30  * devices.  The slot/function address of each device is encoded
  31  * in a single byte as follows:
  32  *
  33  *      7:3 = slot
  34  *      2:0 = function
  35  */
  36 #define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
  37 #define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
  38 #define PCI_FUNC(devfn)         ((devfn) & 0x07)
  39
  40 /* Ioctls for /proc/bus/pci/X/Y nodes. */
  41 #define PCIIOC_BASE             ('P' << 24 | 'C' << 16 | 'I' << 8)
  42 #define PCIIOC_CONTROLLER       (PCIIOC_BASE | 0x00)    /* Get controller for PCI device. */
  43 #define PCIIOC_MMAP_IS_IO       (PCIIOC_BASE | 0x01)    /* Set mmap state to I/O space. */
  44 #define PCIIOC_MMAP_IS_MEM      (PCIIOC_BASE | 0x02)    /* Set mmap state to MEM space. */
  45 #define PCIIOC_WRITE_COMBINE    (PCIIOC_BASE | 0x03)    /* Enable/disable write-combining. */
  46
  47 #ifdef __KERNEL__
  48
  49 #include <linux/types.h>
  50 #include <linux/config.h>
  51 #include <linux/ioport.h>
  52 #include <linux/list.h>
  53 #include <linux/errno.h>
  54 #include <linux/device.h>
  55
  56 /* File state for mmap()s on /proc/bus/pci/X/Y */
  57 enum pci_mmap_state {
  58         pci_mmap_io,
  59         pci_mmap_mem
  60 };
  61
  62 /* This defines the direction arg to the DMA mapping routines. */
  63 #define PCI_DMA_BIDIRECTIONAL   0
  64 #define PCI_DMA_TODEVICE        1
  65 #define PCI_DMA_FROMDEVICE      2
  66 #define PCI_DMA_NONE            3
  67
  68 #define DEVICE_COUNT_COMPATIBLE 4
  69 #define DEVICE_COUNT_RESOURCE   12
  70
  71 typedef int __bitwise pci_power_t;
  72
  73 #define PCI_D0          ((pci_power_t __force) 0)
  74 #define PCI_D1          ((pci_power_t __force) 1)
  75 #define PCI_D2          ((pci_power_t __force) 2)
  76 #define PCI_D3hot       ((pci_power_t __force) 3)
  77 #define PCI_D3cold      ((pci_power_t __force) 4)
  78 #define PCI_UNKNOWN     ((pci_power_t __force) 5)
  79 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
  80
  81 /*
  82  * The pci_dev structure is used to describe PCI devices.
  83  */
  84 struct pci_dev {
  85         struct list_head global_list;   /* node in list of all PCI devices */
  86         struct list_head bus_list;      /* node in per-bus list */
  87         struct pci_bus  *bus;           /* bus this device is on */
  88         struct pci_bus  *subordinate;   /* bus this device bridges to */
  89
  90         void            *sysdata;       /* hook for sys-specific extension */
  91         struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
  92
  93         unsigned int    devfn;          /* encoded device & function index */
  94         unsigned short  vendor;
  95         unsigned short  device;
  96         unsigned short  subsystem_vendor;
  97         unsigned short  subsystem_device;
  98         unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
  99         u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
 100         u8              rom_base_reg;   /* which config register controls the ROM */
 101
 102         struct pci_driver *driver;      /* which driver has allocated this device */
 103         u64             dma_mask;       /* Mask of the bits of bus address this
 104                                            device implements.  Normally this is
 105                                            0xffffffff.  You only need to change
 106                                            this if your device has broken DMA
 107                                            or supports 64-bit transfers.  */
 108
 109         pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
 110                                            this is D0-D3, D0 being fully functional,
 111                                            and D3 being off. */
 112
 113         struct  device  dev;            /* Generic device interface */
 114
 115         /* device is compatible with these IDs */
 116         unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
 117         unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
 118
 119         int             cfg_size;       /* Size of configuration space */
 120
 121         /*
 122          * Instead of touching interrupt line and base address registers
 123          * directly, use the values stored here. They might be different!
 124          */
 125         unsigned int    irq;
 126         struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
 127
 128         /* These fields are used by common fixups */
 129         unsigned int    transparent:1;  /* Transparent PCI bridge */
 130         unsigned int    multifunction:1;/* Part of multi-function device */
 131         /* keep track of device state */
 132         unsigned int    is_enabled:1;   /* pci_enable_device has been called */
 133         unsigned int    is_busmaster:1; /* device is busmaster */
 134         unsigned int    no_msi:1;       /* device may not use msi */
 135
 136         u32             saved_config_space[16]; /* config space saved at suspend time */
 137         struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
 138         int rom_attr_enabled;           /* has display of the rom attribute been enabled? */
 139         struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
 140 };
 141
 142 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
 143 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
 144 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
 145 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
 146
 147 /*
 148  *  For PCI devices, the region numbers are assigned this way:
 149  *
 150  *      0-5     standard PCI regions
 151  *      6       expansion ROM
 152  *      7-10    bridges: address space assigned to buses behind the bridge
 153  */
 154
 155 #define PCI_ROM_RESOURCE        6
 156 #define PCI_BRIDGE_RESOURCES    7
 157 #define PCI_NUM_RESOURCES       11
 158
 159 #ifndef PCI_BUS_NUM_RESOURCES
 160 #define PCI_BUS_NUM_RESOURCES   8
 161 #endif
 162
 163 #define PCI_REGION_FLAG_MASK    0x0fU   /* These bits of resource flags tell us the PCI region flags */
 164
 165 struct pci_bus {
 166         struct list_head node;          /* node in list of buses */
 167         struct pci_bus  *parent;        /* parent bus this bridge is on */
 168         struct list_head children;      /* list of child buses */
 169         struct list_head devices;       /* list of devices on this bus */
 170         struct pci_dev  *self;          /* bridge device as seen by parent */
 171         struct resource *resource[PCI_BUS_NUM_RESOURCES];
 172                                         /* address space routed to this bus */
 173
 174         struct pci_ops  *ops;           /* configuration access functions */
 175         void            *sysdata;       /* hook for sys-specific extension */
 176         struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
 177
 178         unsigned char   number;         /* bus number */
 179         unsigned char   primary;        /* number of primary bridge */
 180         unsigned char   secondary;      /* number of secondary bridge */
 181         unsigned char   subordinate;    /* max number of subordinate buses */
 182
 183         char            name[48];
 184
 185         unsigned short  bridge_ctl;     /* manage NO_ISA/FBB/et al behaviors */
 186         unsigned short  pad2;
 187         struct device           *bridge;
 188         struct class_device     class_dev;
 189         struct bin_attribute    *legacy_io; /* legacy I/O for this bus */
 190         struct bin_attribute    *legacy_mem; /* legacy mem */
 191 };
 192
 193 #define pci_bus_b(n)    list_entry(n, struct pci_bus, node)
 194 #define to_pci_bus(n)   container_of(n, struct pci_bus, class_dev)
 195
 196 /*
 197  * Error values that may be returned by PCI functions.
 198  */
 199 #define PCIBIOS_SUCCESSFUL              0x00
 200 #define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
 201 #define PCIBIOS_BAD_VENDOR_ID           0x83
 202 #define PCIBIOS_DEVICE_NOT_FOUND        0x86
 203 #define PCIBIOS_BAD_REGISTER_NUMBER     0x87
 204 #define PCIBIOS_SET_FAILED              0x88
 205 #define PCIBIOS_BUFFER_TOO_SMALL        0x89
 206
 207 /* Low-level architecture-dependent routines */
 208
 209 struct pci_ops {
 210         int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
 211         int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
 212 };
 213
 214 struct pci_raw_ops {
 215         int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
 216                     int reg, int len, u32 *val);
 217         int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
 218                      int reg, int len, u32 val);
 219 };
 220
 221 extern struct pci_raw_ops *raw_pci_ops;
 222
 223 struct pci_bus_region {
 224         unsigned long start;
 225         unsigned long end;
 226 };
 227
 228 struct pci_dynids {
 229         spinlock_t lock;            /* protects list, index */
 230         struct list_head list;      /* for IDs added at runtime */
 231         unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
 232 };
 233
 234 struct module;
 235 struct pci_driver {
 236         struct list_head node;
 237         char *name;
 238         struct module *owner;
 239         const struct pci_device_id *id_table;   /* must be non-NULL for probe to be called */
 240         int  (*probe)  (struct pci_dev *dev, const struct pci_device_id *id);   /* New device inserted */
 241         void (*remove) (struct pci_dev *dev);   /* Device removed (NULL if not a hot-plug capable driver) */
 242         int  (*suspend) (struct pci_dev *dev, pm_message_t state);      /* Device suspended */
 243         int  (*resume) (struct pci_dev *dev);                   /* Device woken up */
 244         int  (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable);   /* Enable wake event */
 245         void (*shutdown) (struct pci_dev *dev);
 246
 247         struct device_driver    driver;
 248         struct pci_dynids dynids;
 249 };
 250
 251 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
 252
 253 /**
 254  * PCI_DEVICE - macro used to describe a specific pci device
 255  * @vend: the 16 bit PCI Vendor ID
 256  * @dev: the 16 bit PCI Device ID
 257  *
 258  * This macro is used to create a struct pci_device_id that matches a
 259  * specific device.  The subvendor and subdevice fields will be set to
 260  * PCI_ANY_ID.
 261  */
 262 #define PCI_DEVICE(vend,dev) \
 263         .vendor = (vend), .device = (dev), \
 264         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 265
 266 /**
 267  * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
 268  * @dev_class: the class, subclass, prog-if triple for this device
 269  * @dev_class_mask: the class mask for this device
 270  *
 271  * This macro is used to create a struct pci_device_id that matches a
 272  * specific PCI class.  The vendor, device, subvendor, and subdevice
 273  * fields will be set to PCI_ANY_ID.
 274  */
 275 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
 276         .class = (dev_class), .class_mask = (dev_class_mask), \
 277         .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
 278         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 279
 280 /*
 281  * pci_module_init is obsolete, this stays here till we fix up all usages of it
 282  * in the tree.
 283  */
 284 #define pci_module_init pci_register_driver
 285
 286 /* these external functions are only available when PCI support is enabled */
 287 #ifdef CONFIG_PCI
 288
 289 extern struct bus_type pci_bus_type;
 290
 291 /* Do NOT directly access these two variables, unless you are arch specific pci
 292  * code, or pci core code. */
 293 extern struct list_head pci_root_buses; /* list of all known PCI buses */
 294 extern struct list_head pci_devices;    /* list of all devices */
 295
 296 void pcibios_fixup_bus(struct pci_bus *);
 297 int pcibios_enable_device(struct pci_dev *, int mask);
 298 char *pcibios_setup (char *str);
 299
 300 /* Used only when drivers/pci/setup.c is used */
 301 void pcibios_align_resource(void *, struct resource *,
 302                             unsigned long, unsigned long);
 303 void pcibios_update_irq(struct pci_dev *, int irq);
 304
 305 /* Generic PCI functions used internally */
 306
 307 extern struct pci_bus *pci_find_bus(int domain, int busnr);
 308 void pci_bus_add_devices(struct pci_bus *bus);
 309 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 310 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
 311 {
 312         struct pci_bus *root_bus;
 313         root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
 314         if (root_bus)
 315                 pci_bus_add_devices(root_bus);
 316         return root_bus;
 317 }
 318 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 319 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
 320 int pci_scan_slot(struct pci_bus *bus, int devfn);
 321 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
 322 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
 323 unsigned int pci_scan_child_bus(struct pci_bus *bus);
 324 void pci_bus_add_device(struct pci_dev *dev);
 325 void pci_read_bridge_bases(struct pci_bus *child);
 326 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
 327 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
 328 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
 329 extern void pci_dev_put(struct pci_dev *dev);
 330 extern void pci_remove_bus(struct pci_bus *b);
 331 extern void pci_remove_bus_device(struct pci_dev *dev);
 332 void pci_setup_cardbus(struct pci_bus *bus);
 333
 334 /* Generic PCI functions exported to card drivers */
 335
 336 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 337 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 338 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
 339 int pci_find_capability (struct pci_dev *dev, int cap);
 340 int pci_find_ext_capability (struct pci_dev *dev, int cap);
 341 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
 342
 343 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
 344 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 345                                 unsigned int ss_vendor, unsigned int ss_device,
 346                                 struct pci_dev *from);
 347 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
 348 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
 349 int pci_dev_present(const struct pci_device_id *ids);
 350
 351 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
 352 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
 353 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
 354 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
 355 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
 356 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
 357
 358 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
 359 {
 360         return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
 361 }
 362 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
 363 {
 364         return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
 365 }
 366 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
 367 {
 368         return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
 369 }
 370 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
 371 {
 372         return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
 373 }
 374 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
 375 {
 376         return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
 377 }
 378 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
 379 {
 380         return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
 381 }
 382
 383 int __must_check pci_enable_device(struct pci_dev *dev);
 384 int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);
 385 void pci_disable_device(struct pci_dev *dev);
 386 void pci_set_master(struct pci_dev *dev);
 387 #define HAVE_PCI_SET_MWI
 388 int __must_check pci_set_mwi(struct pci_dev *dev);
 389 void pci_clear_mwi(struct pci_dev *dev);
 390 void pci_intx(struct pci_dev *dev, int enable);
 391 int __must_check pci_set_dma_mask(struct pci_dev *dev, u64 mask);
 392 int __must_check pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
 393 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
 394 int pci_assign_resource(struct pci_dev *dev, int i);
 395 void pci_restore_bars(struct pci_dev *dev);
 396
 397 /* ROM control related routines */
 398 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
 399 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
 400 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
 401 void pci_remove_rom(struct pci_dev *pdev);
 402
 403 /* Power management related routines */
 404 int pci_save_state(struct pci_dev *dev);
 405 int pci_restore_state(struct pci_dev *dev);
 406 int __must_check pci_set_power_state(struct pci_dev *dev, pci_power_t state);
 407 pci_power_t __must_check pci_choose_state(struct pci_dev *dev, pm_message_t state);
 408 int __must_check pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
 409
 410 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
 411 void pci_bus_assign_resources(struct pci_bus *bus);
 412 void pci_bus_size_bridges(struct pci_bus *bus);
 413 int pci_claim_resource(struct pci_dev *, int);
 414 void pci_assign_unassigned_resources(void);
 415 void pdev_enable_device(struct pci_dev *);
 416 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
 417 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
 418                     int (*)(struct pci_dev *, u8, u8));
 419 #define HAVE_PCI_REQ_REGIONS    2
 420 int pci_request_regions(struct pci_dev *, char *);
 421 void pci_release_regions(struct pci_dev *);
 422 int pci_request_region(struct pci_dev *, int, char *);
 423 void pci_release_region(struct pci_dev *, int);
 424
 425 /* drivers/pci/bus.c */
 426 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
 427                            unsigned long size, unsigned long align,
 428                            unsigned long min, unsigned int type_mask,
 429                            void (*alignf)(void *, struct resource *,
 430                                           unsigned long, unsigned long),
 431                            void *alignf_data);
 432 void pci_enable_bridges(struct pci_bus *bus);
 433
 434 /* New-style probing supporting hot-pluggable devices */
 435 int pci_register_driver(struct pci_driver *);
 436 void pci_unregister_driver(struct pci_driver *);
 437 void pci_remove_behind_bridge(struct pci_dev *);
 438 struct pci_driver *pci_dev_driver(const struct pci_dev *);
 439 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
 440 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
 441 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
 442
 443 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
 444                   void *userdata);
 445
 446 /* kmem_cache style wrapper around pci_alloc_consistent() */
 447
 448 #include <linux/dmapool.h>
 449
 450 #define pci_pool dma_pool
 451 #define pci_pool_create(name, pdev, size, align, allocation) \
 452                 dma_pool_create(name, &pdev->dev, size, align, allocation)
 453 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
 454 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
 455 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
 456
 457 enum pci_dma_burst_strategy {
 458         PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
 459                                    strategy_parameter is N/A */
 460         PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
 461                                    byte boundaries */
 462         PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
 463                                    strategy_parameter byte boundaries */
 464 };
 465
 466 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
 467 extern struct pci_dev *isa_bridge;
 468 #endif
 469
 470 struct msix_entry {
 471         u16     vector; /* kernel uses to write allocated vector */
 472         u16     entry;  /* driver uses to specify entry, OS writes */
 473 };
 474
 475 #ifndef CONFIG_PCI_MSI
 476 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
 477 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
 478 static inline void pci_disable_msi(struct pci_dev *dev) {}
 479 static inline int pci_enable_msix(struct pci_dev* dev,
 480         struct msix_entry *entries, int nvec) {return -1;}
 481 static inline void pci_disable_msix(struct pci_dev *dev) {}
 482 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
 483 #else
 484 extern void pci_scan_msi_device(struct pci_dev *dev);
 485 extern int pci_enable_msi(struct pci_dev *dev);
 486 extern void pci_disable_msi(struct pci_dev *dev);
 487 extern int pci_enable_msix(struct pci_dev* dev,
 488         struct msix_entry *entries, int nvec);
 489 extern void pci_disable_msix(struct pci_dev *dev);
 490 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
 491 #endif
 492
 493 /*
 494  * PCI domain support.  Sometimes called PCI segment (eg by ACPI),
 495  * a PCI domain is defined to be a set of PCI busses which share
 496  * configuration space.
 497  */
 498 #ifndef CONFIG_PCI_DOMAINS
 499 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
 500 static inline int pci_proc_domain(struct pci_bus *bus)
 501 {
 502         return 0;
 503 }
 504 #endif
 505
 506 #else /* CONFIG_PCI is not enabled */
 507
 508 /*
 509  *  If the system does not have PCI, clearly these return errors.  Define
 510  *  these as simple inline functions to avoid hair in drivers.
 511  */
 512
 513 #define _PCI_NOP(o,s,t) \
 514         static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
 515                 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
 516 #define _PCI_NOP_ALL(o,x)       _PCI_NOP(o,byte,u8 x) \
 517                                 _PCI_NOP(o,word,u16 x) \
 518                                 _PCI_NOP(o,dword,u32 x)
 519 _PCI_NOP_ALL(read, *)
 520 _PCI_NOP_ALL(write,)
 521
 522 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
 523 { return NULL; }
 524
 525 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
 526 { return NULL; }
 527
 528 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
 529 { return NULL; }
 530
 531 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 532 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
 533 { return NULL; }
 534
 535 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
 536 { return NULL; }
 537
 538 #define pci_dev_present(ids)    (0)
 539 #define pci_dev_put(dev)        do { } while (0)
 540
 541 static inline void pci_set_master(struct pci_dev *dev) { }
 542 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
 543 static inline void pci_disable_device(struct pci_dev *dev) { }
 544 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
 545 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
 546 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
 547 static inline void pci_unregister_driver(struct pci_driver *drv) { }
 548 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
 549 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
 550 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
 551
 552 /* Power management related routines */
 553 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
 554 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
 555 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
 556 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
 557 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
 558
 559 #define isa_bridge      ((struct pci_dev *)NULL)
 560
 561 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
 562
 563 #endif /* CONFIG_PCI */
 564
 565 /* Include architecture-dependent settings and functions */
 566
 567 #include <asm/pci.h>
 568
 569 /* these helpers provide future and backwards compatibility
 570  * for accessing popular PCI BAR info */
 571 #define pci_resource_start(dev,bar)   ((dev)->resource[(bar)].start)
 572 #define pci_resource_end(dev,bar)     ((dev)->resource[(bar)].end)
 573 #define pci_resource_flags(dev,bar)   ((dev)->resource[(bar)].flags)
 574 #define pci_resource_len(dev,bar) \
 575         ((pci_resource_start((dev),(bar)) == 0 &&       \
 576           pci_resource_end((dev),(bar)) ==              \
 577           pci_resource_start((dev),(bar))) ? 0 :        \
 578                                                         \
 579          (pci_resource_end((dev),(bar)) -               \
 580           pci_resource_start((dev),(bar)) + 1))
 581
 582 /* Similar to the helpers above, these manipulate per-pci_dev
 583  * driver-specific data.  They are really just a wrapper around
 584  * the generic device structure functions of these calls.
 585  */
 586 static inline void *pci_get_drvdata (struct pci_dev *pdev)
 587 {
 588         return dev_get_drvdata(&pdev->dev);
 589 }
 590
 591 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
 592 {
 593         dev_set_drvdata(&pdev->dev, data);
 594 }
 595
 596 /* If you want to know what to call your pci_dev, ask this function.
 597  * Again, it's a wrapper around the generic device.
 598  */
 599 static inline char *pci_name(struct pci_dev *pdev)
 600 {
 601         return pdev->dev.bus_id;
 602 }
 603
 604
 605 /* Some archs don't want to expose struct resource to userland as-is
 606  * in sysfs and /proc
 607  */
 608 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
 609 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
 610                 const struct resource *rsrc, u64 *start, u64 *end)
 611 {
 612         *start = rsrc->start;
 613         *end = rsrc->end;
 614 }
 615 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
 616
 617
 618 /*
 619  *  The world is not perfect and supplies us with broken PCI devices.
 620  *  For at least a part of these bugs we need a work-around, so both
 621  *  generic (drivers/pci/quirks.c) and per-architecture code can define
 622  *  fixup hooks to be called for particular buggy devices.
 623  */
 624
 625 struct pci_fixup {
 626         u16 vendor, device;     /* You can use PCI_ANY_ID here of course */
 627         void (*hook)(struct pci_dev *dev);
 628 };
 629
 630 enum pci_fixup_pass {
 631         pci_fixup_early,        /* Before probing BARs */
 632         pci_fixup_header,       /* After reading configuration header */
 633         pci_fixup_final,        /* Final phase of device fixups */
 634         pci_fixup_enable,       /* pci_enable_device() time */
 635 };
 636
 637 /* Anonymous variables would be nice... */
 638 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook)  \
 639         static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
 640         __attribute__((__section__(#section))) = { vendor, device, hook };
 641 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook)                   \
 642         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,                     \
 643                         vendor##device##hook, vendor, device, hook)
 644 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook)                  \
 645         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,                    \
 646                         vendor##device##hook, vendor, device, hook)
 647 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook)                   \
 648         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,                     \
 649                         vendor##device##hook, vendor, device, hook)
 650 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook)                  \
 651         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,                    \
 652                         vendor##device##hook, vendor, device, hook)
 653
 654
 655 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
 656
 657 extern int pci_pci_problems;
 658 #define PCIPCI_FAIL             1
 659 #define PCIPCI_TRITON           2
 660 #define PCIPCI_NATOMA           4
 661 #define PCIPCI_VIAETBF          8
 662 #define PCIPCI_VSFX             16
 663 #define PCIPCI_ALIMAGIK         32
 664
 665 #endif /* __KERNEL__ */
 666 #endif /* LINUX_PCI_H */