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ide: remove dead/obsolete ->busproc method
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / ide.h
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
22 #endif
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
25 #include <asm/io.h>
26 #include <asm/semaphore.h>
27 #include <asm/mutex.h>
28
29 #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
30 # define SUPPORT_VLB_SYNC 0
31 #else
32 # define SUPPORT_VLB_SYNC 1
33 #endif
34
35 /*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40 #define IDE_NO_IRQ (-1)
41
42 typedef unsigned char byte; /* used everywhere */
43
44 /*
45 * Probably not wise to fiddle with these
46 */
47 #define ERROR_MAX 8 /* Max read/write errors per sector */
48 #define ERROR_RESET 3 /* Reset controller every 4th retry */
49 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51 /*
52 * Tune flags
53 */
54 #define IDE_TUNE_NOAUTO 2
55 #define IDE_TUNE_AUTO 1
56 #define IDE_TUNE_DEFAULT 0
57
58 /*
59 * state flags
60 */
61
62 #define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67 /*
68 * Definitions for accessing IDE controller registers
69 */
70 #define IDE_NR_PORTS (10)
71
72 #define IDE_DATA_OFFSET (0)
73 #define IDE_ERROR_OFFSET (1)
74 #define IDE_NSECTOR_OFFSET (2)
75 #define IDE_SECTOR_OFFSET (3)
76 #define IDE_LCYL_OFFSET (4)
77 #define IDE_HCYL_OFFSET (5)
78 #define IDE_SELECT_OFFSET (6)
79 #define IDE_STATUS_OFFSET (7)
80 #define IDE_CONTROL_OFFSET (8)
81 #define IDE_IRQ_OFFSET (9)
82
83 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85
86 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
96
97 #define IDE_FEATURE_REG IDE_ERROR_REG
98 #define IDE_COMMAND_REG IDE_STATUS_REG
99 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100 #define IDE_IREASON_REG IDE_NSECTOR_REG
101 #define IDE_BCOUNTL_REG IDE_LCYL_REG
102 #define IDE_BCOUNTH_REG IDE_HCYL_REG
103
104 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108 #define DRIVE_READY (READY_STAT | SEEK_STAT)
109
110 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
111
112 #define SATA_NR_PORTS (3) /* 16 possible ?? */
113
114 #define SATA_STATUS_OFFSET (0)
115 #define SATA_ERROR_OFFSET (1)
116 #define SATA_CONTROL_OFFSET (2)
117
118 /*
119 * Our Physical Region Descriptor (PRD) table should be large enough
120 * to handle the biggest I/O request we are likely to see. Since requests
121 * can have no more than 256 sectors, and since the typical blocksize is
122 * two or more sectors, we could get by with a limit of 128 entries here for
123 * the usual worst case. Most requests seem to include some contiguous blocks,
124 * further reducing the number of table entries required.
125 *
126 * The driver reverts to PIO mode for individual requests that exceed
127 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
128 * 100% of all crazy scenarios here is not necessary.
129 *
130 * As it turns out though, we must allocate a full 4KB page for this,
131 * so the two PRD tables (ide0 & ide1) will each get half of that,
132 * allowing each to have about 256 entries (8 bytes each) from this.
133 */
134 #define PRD_BYTES 8
135 #define PRD_ENTRIES 256
136
137 /*
138 * Some more useful definitions
139 */
140 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
141 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
142 #define SECTOR_SIZE 512
143 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
144 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
145
146 /*
147 * Timeouts for various operations:
148 */
149 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
150 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
151 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
152 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
153 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
154 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
155
156 /*
157 * Check for an interrupt and acknowledge the interrupt status
158 */
159 struct hwif_s;
160 typedef int (ide_ack_intr_t)(struct hwif_s *);
161
162 /*
163 * hwif_chipset_t is used to keep track of the specific hardware
164 * chipset used by each IDE interface, if known.
165 */
166 enum { ide_unknown, ide_generic, ide_pci,
167 ide_cmd640, ide_dtc2278, ide_ali14xx,
168 ide_qd65xx, ide_umc8672, ide_ht6560b,
169 ide_rz1000, ide_trm290,
170 ide_cmd646, ide_cy82c693, ide_4drives,
171 ide_pmac, ide_etrax100, ide_acorn,
172 ide_au1xxx, ide_palm3710, ide_forced
173 };
174
175 typedef u8 hwif_chipset_t;
176
177 /*
178 * Structure to hold all information about the location of this port
179 */
180 typedef struct hw_regs_s {
181 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
182 int irq; /* our irq number */
183 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
184 hwif_chipset_t chipset;
185 struct device *dev;
186 } hw_regs_t;
187
188 struct hwif_s * ide_find_port(unsigned long);
189 void ide_init_port_data(struct hwif_s *, unsigned int);
190 void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
191
192 static inline void ide_std_init_ports(hw_regs_t *hw,
193 unsigned long io_addr,
194 unsigned long ctl_addr)
195 {
196 unsigned int i;
197
198 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
199 hw->io_ports[i] = io_addr++;
200
201 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
202 }
203
204 #include <asm/ide.h>
205
206 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
207 #undef MAX_HWIFS
208 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
209 #endif
210
211 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
212 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
213 # define ide_default_io_base(index) (0)
214 # define ide_default_irq(base) (0)
215 # define ide_init_default_irq(base) (0)
216 #endif
217
218 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
219 static inline void ide_init_hwif_ports(hw_regs_t *hw,
220 unsigned long io_addr,
221 unsigned long ctl_addr,
222 int *irq)
223 {
224 if (!ctl_addr)
225 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
226 else
227 ide_std_init_ports(hw, io_addr, ctl_addr);
228
229 if (irq)
230 *irq = 0;
231
232 hw->io_ports[IDE_IRQ_OFFSET] = 0;
233
234 #ifdef CONFIG_PPC32
235 if (ppc_ide_md.ide_init_hwif)
236 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
237 #endif
238 }
239 #else
240 static inline void ide_init_hwif_ports(hw_regs_t *hw,
241 unsigned long io_addr,
242 unsigned long ctl_addr,
243 int *irq)
244 {
245 if (io_addr || ctl_addr)
246 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
247 }
248 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
249
250 /* Currently only m68k, apus and m8xx need it */
251 #ifndef IDE_ARCH_ACK_INTR
252 # define ide_ack_intr(hwif) (1)
253 #endif
254
255 /* Currently only Atari needs it */
256 #ifndef IDE_ARCH_LOCK
257 # define ide_release_lock() do {} while (0)
258 # define ide_get_lock(hdlr, data) do {} while (0)
259 #endif /* IDE_ARCH_LOCK */
260
261 /*
262 * Now for the data we need to maintain per-drive: ide_drive_t
263 */
264
265 #define ide_scsi 0x21
266 #define ide_disk 0x20
267 #define ide_optical 0x7
268 #define ide_cdrom 0x5
269 #define ide_tape 0x1
270 #define ide_floppy 0x0
271
272 /*
273 * Special Driver Flags
274 *
275 * set_geometry : respecify drive geometry
276 * recalibrate : seek to cyl 0
277 * set_multmode : set multmode count
278 * set_tune : tune interface for drive
279 * serviced : service command
280 * reserved : unused
281 */
282 typedef union {
283 unsigned all : 8;
284 struct {
285 unsigned set_geometry : 1;
286 unsigned recalibrate : 1;
287 unsigned set_multmode : 1;
288 unsigned set_tune : 1;
289 unsigned serviced : 1;
290 unsigned reserved : 3;
291 } b;
292 } special_t;
293
294 /*
295 * ATA-IDE Select Register, aka Device-Head
296 *
297 * head : always zeros here
298 * unit : drive select number: 0/1
299 * bit5 : always 1
300 * lba : using LBA instead of CHS
301 * bit7 : always 1
302 */
303 typedef union {
304 unsigned all : 8;
305 struct {
306 #if defined(__LITTLE_ENDIAN_BITFIELD)
307 unsigned head : 4;
308 unsigned unit : 1;
309 unsigned bit5 : 1;
310 unsigned lba : 1;
311 unsigned bit7 : 1;
312 #elif defined(__BIG_ENDIAN_BITFIELD)
313 unsigned bit7 : 1;
314 unsigned lba : 1;
315 unsigned bit5 : 1;
316 unsigned unit : 1;
317 unsigned head : 4;
318 #else
319 #error "Please fix <asm/byteorder.h>"
320 #endif
321 } b;
322 } select_t, ata_select_t;
323
324 /*
325 * Status returned from various ide_ functions
326 */
327 typedef enum {
328 ide_stopped, /* no drive operation was started */
329 ide_started, /* a drive operation was started, handler was set */
330 } ide_startstop_t;
331
332 struct ide_driver_s;
333 struct ide_settings_s;
334
335 #ifdef CONFIG_BLK_DEV_IDEACPI
336 struct ide_acpi_drive_link;
337 struct ide_acpi_hwif_link;
338 #endif
339
340 typedef struct ide_drive_s {
341 char name[4]; /* drive name, such as "hda" */
342 char driver_req[10]; /* requests specific driver */
343
344 struct request_queue *queue; /* request queue */
345
346 struct request *rq; /* current request */
347 struct ide_drive_s *next; /* circular list of hwgroup drives */
348 void *driver_data; /* extra driver data */
349 struct hd_driveid *id; /* drive model identification info */
350 #ifdef CONFIG_IDE_PROC_FS
351 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
352 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
353 #endif
354 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
355
356 unsigned long sleep; /* sleep until this time */
357 unsigned long service_start; /* time we started last request */
358 unsigned long service_time; /* service time of last request */
359 unsigned long timeout; /* max time to wait for irq */
360
361 special_t special; /* special action flags */
362 select_t select; /* basic drive/head select reg value */
363
364 u8 keep_settings; /* restore settings after drive reset */
365 u8 using_dma; /* disk is using dma for read/write */
366 u8 retry_pio; /* retrying dma capable host in pio */
367 u8 state; /* retry state */
368 u8 waiting_for_dma; /* dma currently in progress */
369 u8 unmask; /* okay to unmask other irqs */
370 u8 noflush; /* don't attempt flushes */
371 u8 dsc_overlap; /* DSC overlap */
372 u8 nice1; /* give potential excess bandwidth */
373
374 unsigned present : 1; /* drive is physically present */
375 unsigned dead : 1; /* device ejected hint */
376 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
377 unsigned noprobe : 1; /* from: hdx=noprobe */
378 unsigned removable : 1; /* 1 if need to do check_media_change */
379 unsigned attach : 1; /* needed for removable devices */
380 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
381 unsigned no_unmask : 1; /* disallow setting unmask bit */
382 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
383 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
384 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
385 unsigned nodma : 1; /* disallow DMA */
386 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
387 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
388 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
389 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
390 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
391 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
392 unsigned post_reset : 1;
393 unsigned udma33_warned : 1;
394
395 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
396 u8 quirk_list; /* considered quirky, set for a specific host */
397 u8 init_speed; /* transfer rate set at boot */
398 u8 current_speed; /* current transfer rate set */
399 u8 desired_speed; /* desired transfer rate set */
400 u8 dn; /* now wide spread use */
401 u8 wcache; /* status of write cache */
402 u8 acoustic; /* acoustic management */
403 u8 media; /* disk, cdrom, tape, floppy, ... */
404 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
405 u8 ready_stat; /* min status value for drive ready */
406 u8 mult_count; /* current multiple sector setting */
407 u8 mult_req; /* requested multiple sector setting */
408 u8 tune_req; /* requested drive tuning setting */
409 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
410 u8 bad_wstat; /* used for ignoring WRERR_STAT */
411 u8 nowerr; /* used for ignoring WRERR_STAT */
412 u8 sect0; /* offset of first sector for DM6:DDO */
413 u8 head; /* "real" number of heads */
414 u8 sect; /* "real" sectors per track */
415 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
416 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
417
418 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
419 unsigned int cyl; /* "real" number of cyls */
420 unsigned int drive_data; /* used by set_pio_mode/selectproc */
421 unsigned int failures; /* current failure count */
422 unsigned int max_failures; /* maximum allowed failure count */
423 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
424
425 u64 capacity64; /* total number of sectors */
426
427 int lun; /* logical unit */
428 int crc_count; /* crc counter to reduce drive speed */
429 #ifdef CONFIG_BLK_DEV_IDEACPI
430 struct ide_acpi_drive_link *acpidata;
431 #endif
432 struct list_head list;
433 struct device gendev;
434 struct completion gendev_rel_comp; /* to deal with device release() */
435 } ide_drive_t;
436
437 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
438
439 #define IDE_CHIPSET_PCI_MASK \
440 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
441 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
442
443 struct ide_port_info;
444
445 typedef struct hwif_s {
446 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
447 struct hwif_s *mate; /* other hwif from same PCI chip */
448 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
449 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
450
451 char name[6]; /* name of interface, eg. "ide0" */
452
453 /* task file registers for pata and sata */
454 unsigned long io_ports[IDE_NR_PORTS];
455 unsigned long sata_scr[SATA_NR_PORTS];
456
457 ide_drive_t drives[MAX_DRIVES]; /* drive info */
458
459 u8 major; /* our major number */
460 u8 index; /* 0 for ide0; 1 for ide1; ... */
461 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
462 u8 bus_state; /* power state of the IDE bus */
463
464 u32 host_flags;
465
466 u8 pio_mask;
467
468 u8 ultra_mask;
469 u8 mwdma_mask;
470 u8 swdma_mask;
471
472 u8 cbl; /* cable type */
473
474 hwif_chipset_t chipset; /* sub-module for tuning.. */
475
476 struct device *dev;
477
478 const struct ide_port_info *cds; /* chipset device struct */
479
480 ide_ack_intr_t *ack_intr;
481
482 void (*rw_disk)(ide_drive_t *, struct request *);
483
484 #if 0
485 ide_hwif_ops_t *hwifops;
486 #else
487 /* host specific initialization of devices on a port */
488 void (*port_init_devs)(struct hwif_s *);
489 /* routine to program host for PIO mode */
490 void (*set_pio_mode)(ide_drive_t *, const u8);
491 /* routine to program host for DMA mode */
492 void (*set_dma_mode)(ide_drive_t *, const u8);
493 /* tweaks hardware to select drive */
494 void (*selectproc)(ide_drive_t *);
495 /* chipset polling based on hba specifics */
496 int (*reset_poll)(ide_drive_t *);
497 /* chipset specific changes to default for device-hba resets */
498 void (*pre_reset)(ide_drive_t *);
499 /* routine to reset controller after a disk reset */
500 void (*resetproc)(ide_drive_t *);
501 /* special host masking for drive selection */
502 void (*maskproc)(ide_drive_t *, int);
503 /* check host's drive quirk list */
504 void (*quirkproc)(ide_drive_t *);
505 #endif
506 u8 (*mdma_filter)(ide_drive_t *);
507 u8 (*udma_filter)(ide_drive_t *);
508
509 u8 (*cable_detect)(struct hwif_s *);
510
511 void (*ata_input_data)(ide_drive_t *, void *, u32);
512 void (*ata_output_data)(ide_drive_t *, void *, u32);
513
514 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
515 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
516
517 void (*dma_host_set)(ide_drive_t *, int);
518 int (*dma_setup)(ide_drive_t *);
519 void (*dma_exec_cmd)(ide_drive_t *, u8);
520 void (*dma_start)(ide_drive_t *);
521 int (*ide_dma_end)(ide_drive_t *drive);
522 int (*ide_dma_test_irq)(ide_drive_t *drive);
523 void (*ide_dma_clear_irq)(ide_drive_t *drive);
524 void (*dma_lost_irq)(ide_drive_t *drive);
525 void (*dma_timeout)(ide_drive_t *drive);
526
527 void (*OUTB)(u8 addr, unsigned long port);
528 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
529 void (*OUTW)(u16 addr, unsigned long port);
530 void (*OUTSW)(unsigned long port, void *addr, u32 count);
531 void (*OUTSL)(unsigned long port, void *addr, u32 count);
532
533 u8 (*INB)(unsigned long port);
534 u16 (*INW)(unsigned long port);
535 void (*INSW)(unsigned long port, void *addr, u32 count);
536 void (*INSL)(unsigned long port, void *addr, u32 count);
537
538 /* dma physical region descriptor table (cpu view) */
539 unsigned int *dmatable_cpu;
540 /* dma physical region descriptor table (dma view) */
541 dma_addr_t dmatable_dma;
542 /* Scatter-gather list used to build the above */
543 struct scatterlist *sg_table;
544 int sg_max_nents; /* Maximum number of entries in it */
545 int sg_nents; /* Current number of entries in it */
546 int sg_dma_direction; /* dma transfer direction */
547
548 /* data phase of the active command (currently only valid for PIO/DMA) */
549 int data_phase;
550
551 unsigned int nsect;
552 unsigned int nleft;
553 struct scatterlist *cursg;
554 unsigned int cursg_ofs;
555
556 int rqsize; /* max sectors per request */
557 int irq; /* our irq number */
558
559 unsigned long dma_base; /* base addr for dma ports */
560 unsigned long dma_command; /* dma command register */
561 unsigned long dma_vendor1; /* dma vendor 1 register */
562 unsigned long dma_status; /* dma status register */
563 unsigned long dma_vendor3; /* dma vendor 3 register */
564 unsigned long dma_prdtable; /* actual prd table address */
565
566 unsigned long config_data; /* for use by chipset-specific code */
567 unsigned long select_data; /* for use by chipset-specific code */
568
569 unsigned long extra_base; /* extra addr for dma ports */
570 unsigned extra_ports; /* number of extra dma ports */
571
572 unsigned noprobe : 1; /* don't probe for this interface */
573 unsigned present : 1; /* this interface exists */
574 unsigned hold : 1; /* this interface is always present */
575 unsigned serialized : 1; /* serialized all channel operation */
576 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
577 unsigned reset : 1; /* reset after probe */
578 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
579 unsigned mmio : 1; /* host uses MMIO */
580 unsigned straight8 : 1; /* Alan's straight 8 check */
581
582 struct device gendev;
583 struct completion gendev_rel_comp; /* To deal with device release() */
584
585 void *hwif_data; /* extra hwif data */
586
587 unsigned dma;
588
589 #ifdef CONFIG_BLK_DEV_IDEACPI
590 struct ide_acpi_hwif_link *acpidata;
591 #endif
592 } ____cacheline_internodealigned_in_smp ide_hwif_t;
593
594 /*
595 * internal ide interrupt handler type
596 */
597 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
598 typedef int (ide_expiry_t)(ide_drive_t *);
599
600 /* used by ide-cd, ide-floppy, etc. */
601 typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
602
603 typedef struct hwgroup_s {
604 /* irq handler, if active */
605 ide_startstop_t (*handler)(ide_drive_t *);
606
607 /* BOOL: protects all fields below */
608 volatile int busy;
609 /* BOOL: wake us up on timer expiry */
610 unsigned int sleeping : 1;
611 /* BOOL: polling active & poll_timeout field valid */
612 unsigned int polling : 1;
613 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
614 unsigned int resetting : 1;
615
616 /* current drive */
617 ide_drive_t *drive;
618 /* ptr to current hwif in linked-list */
619 ide_hwif_t *hwif;
620
621 /* current request */
622 struct request *rq;
623
624 /* failsafe timer */
625 struct timer_list timer;
626 /* timeout value during long polls */
627 unsigned long poll_timeout;
628 /* queried upon timeouts */
629 int (*expiry)(ide_drive_t *);
630
631 int req_gen;
632 int req_gen_timer;
633 } ide_hwgroup_t;
634
635 typedef struct ide_driver_s ide_driver_t;
636
637 extern struct mutex ide_setting_mtx;
638
639 int set_io_32bit(ide_drive_t *, int);
640 int set_pio_mode(ide_drive_t *, int);
641 int set_using_dma(ide_drive_t *, int);
642
643 #ifdef CONFIG_IDE_PROC_FS
644 /*
645 * configurable drive settings
646 */
647
648 #define TYPE_INT 0
649 #define TYPE_BYTE 1
650 #define TYPE_SHORT 2
651
652 #define SETTING_READ (1 << 0)
653 #define SETTING_WRITE (1 << 1)
654 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
655
656 typedef int (ide_procset_t)(ide_drive_t *, int);
657 typedef struct ide_settings_s {
658 char *name;
659 int rw;
660 int data_type;
661 int min;
662 int max;
663 int mul_factor;
664 int div_factor;
665 void *data;
666 ide_procset_t *set;
667 int auto_remove;
668 struct ide_settings_s *next;
669 } ide_settings_t;
670
671 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
672
673 /*
674 * /proc/ide interface
675 */
676 typedef struct {
677 const char *name;
678 mode_t mode;
679 read_proc_t *read_proc;
680 write_proc_t *write_proc;
681 } ide_proc_entry_t;
682
683 void proc_ide_create(void);
684 void proc_ide_destroy(void);
685 void ide_proc_register_port(ide_hwif_t *);
686 void ide_proc_port_register_devices(ide_hwif_t *);
687 void ide_proc_unregister_device(ide_drive_t *);
688 void ide_proc_unregister_port(ide_hwif_t *);
689 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
690 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
691
692 void ide_add_generic_settings(ide_drive_t *);
693
694 read_proc_t proc_ide_read_capacity;
695 read_proc_t proc_ide_read_geometry;
696
697 #ifdef CONFIG_BLK_DEV_IDEPCI
698 void ide_pci_create_host_proc(const char *, get_info_t *);
699 #endif
700
701 /*
702 * Standard exit stuff:
703 */
704 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
705 { \
706 len -= off; \
707 if (len < count) { \
708 *eof = 1; \
709 if (len <= 0) \
710 return 0; \
711 } else \
712 len = count; \
713 *start = page + off; \
714 return len; \
715 }
716 #else
717 static inline void proc_ide_create(void) { ; }
718 static inline void proc_ide_destroy(void) { ; }
719 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
720 static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
721 static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
722 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
723 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
724 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
725 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
726 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
727 #endif
728
729 /*
730 * Power Management step value (rq->pm->pm_step).
731 *
732 * The step value starts at 0 (ide_pm_state_start_suspend) for a
733 * suspend operation or 1000 (ide_pm_state_start_resume) for a
734 * resume operation.
735 *
736 * For each step, the core calls the subdriver start_power_step() first.
737 * This can return:
738 * - ide_stopped : In this case, the core calls us back again unless
739 * step have been set to ide_power_state_completed.
740 * - ide_started : In this case, the channel is left busy until an
741 * async event (interrupt) occurs.
742 * Typically, start_power_step() will issue a taskfile request with
743 * do_rw_taskfile().
744 *
745 * Upon reception of the interrupt, the core will call complete_power_step()
746 * with the error code if any. This routine should update the step value
747 * and return. It should not start a new request. The core will call
748 * start_power_step for the new step value, unless step have been set to
749 * ide_power_state_completed.
750 *
751 * Subdrivers are expected to define their own additional power
752 * steps from 1..999 for suspend and from 1001..1999 for resume,
753 * other values are reserved for future use.
754 */
755
756 enum {
757 ide_pm_state_completed = -1,
758 ide_pm_state_start_suspend = 0,
759 ide_pm_state_start_resume = 1000,
760 };
761
762 /*
763 * Subdrivers support.
764 *
765 * The gendriver.owner field should be set to the module owner of this driver.
766 * The gendriver.name field should be set to the name of this driver
767 */
768 struct ide_driver_s {
769 const char *version;
770 u8 media;
771 unsigned supports_dsc_overlap : 1;
772 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
773 int (*end_request)(ide_drive_t *, int, int);
774 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
775 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
776 struct device_driver gen_driver;
777 int (*probe)(ide_drive_t *);
778 void (*remove)(ide_drive_t *);
779 void (*resume)(ide_drive_t *);
780 void (*shutdown)(ide_drive_t *);
781 #ifdef CONFIG_IDE_PROC_FS
782 ide_proc_entry_t *proc;
783 #endif
784 };
785
786 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
787
788 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
789
790 /*
791 * ide_hwifs[] is the master data structure used to keep track
792 * of just about everything in ide.c. Whenever possible, routines
793 * should be using pointers to a drive (ide_drive_t *) or
794 * pointers to a hwif (ide_hwif_t *), rather than indexing this
795 * structure directly (the allocation/layout may change!).
796 *
797 */
798 #ifndef _IDE_C
799 extern ide_hwif_t ide_hwifs[]; /* master data repository */
800 #endif
801 extern int noautodma;
802
803 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
804 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
805 int uptodate, int nr_sectors);
806
807 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
808
809 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
810 ide_expiry_t *);
811
812 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
813
814 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
815
816 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
817
818 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
819
820 extern void ide_fix_driveid(struct hd_driveid *);
821
822 extern void ide_fixstring(u8 *, const int, const int);
823
824 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
825
826 extern ide_startstop_t ide_do_reset (ide_drive_t *);
827
828 extern void ide_init_drive_cmd (struct request *rq);
829
830 /*
831 * "action" parameter type for ide_do_drive_cmd() below.
832 */
833 typedef enum {
834 ide_wait, /* insert rq at end of list, and wait for it */
835 ide_preempt, /* insert rq in front of current request */
836 ide_head_wait, /* insert rq in front of current request and wait for it */
837 ide_end /* insert rq at end of list, but don't wait for it */
838 } ide_action_t;
839
840 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
841
842 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
843
844 enum {
845 IDE_TFLAG_LBA48 = (1 << 0),
846 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
847 IDE_TFLAG_FLAGGED = (1 << 2),
848 IDE_TFLAG_OUT_DATA = (1 << 3),
849 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
850 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
851 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
852 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
853 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
854 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
855 IDE_TFLAG_OUT_HOB_NSECT |
856 IDE_TFLAG_OUT_HOB_LBAL |
857 IDE_TFLAG_OUT_HOB_LBAM |
858 IDE_TFLAG_OUT_HOB_LBAH,
859 IDE_TFLAG_OUT_FEATURE = (1 << 9),
860 IDE_TFLAG_OUT_NSECT = (1 << 10),
861 IDE_TFLAG_OUT_LBAL = (1 << 11),
862 IDE_TFLAG_OUT_LBAM = (1 << 12),
863 IDE_TFLAG_OUT_LBAH = (1 << 13),
864 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
865 IDE_TFLAG_OUT_NSECT |
866 IDE_TFLAG_OUT_LBAL |
867 IDE_TFLAG_OUT_LBAM |
868 IDE_TFLAG_OUT_LBAH,
869 IDE_TFLAG_OUT_DEVICE = (1 << 14),
870 IDE_TFLAG_WRITE = (1 << 15),
871 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
872 IDE_TFLAG_IN_DATA = (1 << 17),
873 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
874 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
875 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
876 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
877 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
878 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
879 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
880 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
881 IDE_TFLAG_IN_HOB_LBAM |
882 IDE_TFLAG_IN_HOB_LBAH,
883 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
884 IDE_TFLAG_IN_HOB_NSECT |
885 IDE_TFLAG_IN_HOB_LBA,
886 IDE_TFLAG_IN_NSECT = (1 << 25),
887 IDE_TFLAG_IN_LBAL = (1 << 26),
888 IDE_TFLAG_IN_LBAM = (1 << 27),
889 IDE_TFLAG_IN_LBAH = (1 << 28),
890 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
891 IDE_TFLAG_IN_LBAM |
892 IDE_TFLAG_IN_LBAH,
893 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
894 IDE_TFLAG_IN_LBA,
895 IDE_TFLAG_IN_DEVICE = (1 << 29),
896 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
897 IDE_TFLAG_IN_HOB,
898 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
899 IDE_TFLAG_IN_TF,
900 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
901 IDE_TFLAG_IN_DEVICE,
902 /* force 16-bit I/O operations */
903 IDE_TFLAG_IO_16BIT = (1 << 30),
904 /* ide_task_t was allocated using kmalloc() */
905 IDE_TFLAG_DYN = (1 << 31),
906 };
907
908 struct ide_taskfile {
909 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
910
911 u8 hob_feature; /* 1-5: additional data to support LBA48 */
912 u8 hob_nsect;
913 u8 hob_lbal;
914 u8 hob_lbam;
915 u8 hob_lbah;
916
917 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
918
919 union { /*  7: */
920 u8 error; /* read: error */
921 u8 feature; /* write: feature */
922 };
923
924 u8 nsect; /* 8: number of sectors */
925 u8 lbal; /* 9: LBA low */
926 u8 lbam; /* 10: LBA mid */
927 u8 lbah; /* 11: LBA high */
928
929 u8 device; /* 12: device select */
930
931 union { /* 13: */
932 u8 status; /*  read: status  */
933 u8 command; /* write: command */
934 };
935 };
936
937 typedef struct ide_task_s {
938 union {
939 struct ide_taskfile tf;
940 u8 tf_array[14];
941 };
942 u32 tf_flags;
943 int data_phase;
944 struct request *rq; /* copy of request */
945 void *special; /* valid_t generally */
946 } ide_task_t;
947
948 void ide_tf_load(ide_drive_t *, ide_task_t *);
949 void ide_tf_read(ide_drive_t *, ide_task_t *);
950
951 extern void SELECT_DRIVE(ide_drive_t *);
952 extern void SELECT_MASK(ide_drive_t *, int);
953
954 extern int drive_is_ready(ide_drive_t *);
955
956 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
957
958 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
959
960 void task_end_request(ide_drive_t *, struct request *, u8);
961
962 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
963 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
964
965 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
966 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
967 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
968
969 extern int system_bus_clock(void);
970
971 extern int ide_driveid_update(ide_drive_t *);
972 extern int ide_config_drive_speed(ide_drive_t *, u8);
973 extern u8 eighty_ninty_three (ide_drive_t *);
974 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
975
976 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
977
978 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
979
980 extern int ide_spin_wait_hwgroup(ide_drive_t *);
981 extern void ide_timer_expiry(unsigned long);
982 extern irqreturn_t ide_intr(int irq, void *dev_id);
983 extern void do_ide_request(struct request_queue *);
984
985 void ide_init_disk(struct gendisk *, ide_drive_t *);
986
987 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
988 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
989 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
990 #else
991 #define ide_pci_register_driver(d) pci_register_driver(d)
992 #endif
993
994 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
995 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
996
997 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
998 void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
999 #else
1000 static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1001 const struct ide_port_info *d) { }
1002 #endif
1003
1004 extern void default_hwif_iops(ide_hwif_t *);
1005 extern void default_hwif_mmiops(ide_hwif_t *);
1006 extern void default_hwif_transport(ide_hwif_t *);
1007
1008 typedef struct ide_pci_enablebit_s {
1009 u8 reg; /* byte pci reg holding the enable-bit */
1010 u8 mask; /* mask to isolate the enable-bit */
1011 u8 val; /* value of masked reg when "enabled" */
1012 } ide_pci_enablebit_t;
1013
1014 enum {
1015 /* Uses ISA control ports not PCI ones. */
1016 IDE_HFLAG_ISA_PORTS = (1 << 0),
1017 /* single port device */
1018 IDE_HFLAG_SINGLE = (1 << 1),
1019 /* don't use legacy PIO blacklist */
1020 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1021 /* don't use conservative PIO "downgrade" */
1022 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1023 /* use PIO8/9 for prefetch off/on */
1024 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1025 /* use PIO6/7 for fast-devsel off/on */
1026 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1027 /* use 100-102 and 200-202 PIO values to set DMA modes */
1028 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1029 /*
1030 * keep DMA setting when programming PIO mode, may be used only
1031 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1032 */
1033 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1034 /* program host for the transfer mode after programming device */
1035 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1036 /* don't program host/device for the transfer mode ("smart" hosts) */
1037 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1038 /* trust BIOS for programming chipset/device for DMA */
1039 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1040 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
1041 IDE_HFLAG_VDMA = (1 << 11),
1042 /* ATAPI DMA is unsupported */
1043 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1044 /* set if host is a "bootable" controller */
1045 IDE_HFLAG_BOOTABLE = (1 << 13),
1046 /* host doesn't support DMA */
1047 IDE_HFLAG_NO_DMA = (1 << 14),
1048 /* check if host is PCI IDE device before allowing DMA */
1049 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1050 /* don't autotune PIO */
1051 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
1052 /* host is CS5510/CS5520 */
1053 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
1054 /* no LBA48 */
1055 IDE_HFLAG_NO_LBA48 = (1 << 17),
1056 /* no LBA48 DMA */
1057 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1058 /* data FIFO is cleared by an error */
1059 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1060 /* serialize ports */
1061 IDE_HFLAG_SERIALIZE = (1 << 20),
1062 /* use legacy IRQs */
1063 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1064 /* force use of legacy IRQs */
1065 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1066 /* limit LBA48 requests to 256 sectors */
1067 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1068 /* use 32-bit I/O ops */
1069 IDE_HFLAG_IO_32BIT = (1 << 24),
1070 /* unmask IRQs */
1071 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1072 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1073 /* host is CY82C693 */
1074 IDE_HFLAG_CY82C693 = (1 << 27),
1075 /* force host out of "simplex" mode */
1076 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1077 /* DSC overlap is unsupported */
1078 IDE_HFLAG_NO_DSC = (1 << 29),
1079 /* never use 32-bit I/O ops */
1080 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1081 /* never unmask IRQs */
1082 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1083 };
1084
1085 #ifdef CONFIG_BLK_DEV_OFFBOARD
1086 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1087 #else
1088 # define IDE_HFLAG_OFF_BOARD 0
1089 #endif
1090
1091 struct ide_port_info {
1092 char *name;
1093 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1094 void (*init_iops)(ide_hwif_t *);
1095 void (*init_hwif)(ide_hwif_t *);
1096 void (*init_dma)(ide_hwif_t *, unsigned long);
1097 ide_pci_enablebit_t enablebits[2];
1098 hwif_chipset_t chipset;
1099 u8 extra;
1100 u32 host_flags;
1101 u8 pio_mask;
1102 u8 swdma_mask;
1103 u8 mwdma_mask;
1104 u8 udma_mask;
1105 };
1106
1107 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1108 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1109
1110 void ide_map_sg(ide_drive_t *, struct request *);
1111 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1112
1113 #define BAD_DMA_DRIVE 0
1114 #define GOOD_DMA_DRIVE 1
1115
1116 struct drive_list_entry {
1117 const char *id_model;
1118 const char *id_firmware;
1119 };
1120
1121 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1122
1123 #ifdef CONFIG_BLK_DEV_IDEDMA
1124 int __ide_dma_bad_drive(ide_drive_t *);
1125 int ide_id_dma_bug(ide_drive_t *);
1126
1127 u8 ide_find_dma_mode(ide_drive_t *, u8);
1128
1129 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1130 {
1131 return ide_find_dma_mode(drive, XFER_UDMA_6);
1132 }
1133
1134 void ide_dma_off_quietly(ide_drive_t *);
1135 void ide_dma_off(ide_drive_t *);
1136 void ide_dma_on(ide_drive_t *);
1137 int ide_set_dma(ide_drive_t *);
1138 void ide_check_dma_crc(ide_drive_t *);
1139 ide_startstop_t ide_dma_intr(ide_drive_t *);
1140
1141 int ide_build_sglist(ide_drive_t *, struct request *);
1142 void ide_destroy_dmatable(ide_drive_t *);
1143
1144 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1145 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1146 extern int ide_release_dma(ide_hwif_t *);
1147 extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1148
1149 void ide_dma_host_set(ide_drive_t *, int);
1150 extern int ide_dma_setup(ide_drive_t *);
1151 extern void ide_dma_start(ide_drive_t *);
1152 extern int __ide_dma_end(ide_drive_t *);
1153 extern void ide_dma_lost_irq(ide_drive_t *);
1154 extern void ide_dma_timeout(ide_drive_t *);
1155 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1156
1157 #else
1158 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1159 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1160 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1161 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1162 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1163 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1164 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1165 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1166 static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1167 #endif /* CONFIG_BLK_DEV_IDEDMA */
1168
1169 #ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1170 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1171 #endif
1172
1173 #ifdef CONFIG_BLK_DEV_IDEACPI
1174 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1175 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1176 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1177 extern void ide_acpi_init(ide_hwif_t *hwif);
1178 void ide_acpi_port_init_devices(ide_hwif_t *);
1179 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1180 #else
1181 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1182 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1183 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1184 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1185 static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
1186 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1187 #endif
1188
1189 void ide_remove_port_from_hwgroup(ide_hwif_t *);
1190 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1191 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1192 void ide_unregister(unsigned int, int, int);
1193
1194 void ide_register_region(struct gendisk *);
1195 void ide_unregister_region(struct gendisk *);
1196
1197 void ide_undecoded_slave(ide_drive_t *);
1198
1199 int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1200 int ide_device_add(u8 idx[4], const struct ide_port_info *);
1201 void ide_port_unregister_devices(ide_hwif_t *);
1202 void ide_port_scan(ide_hwif_t *);
1203
1204 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1205 {
1206 return hwif->hwif_data;
1207 }
1208
1209 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1210 {
1211 hwif->hwif_data = data;
1212 }
1213
1214 const char *ide_xfer_verbose(u8 mode);
1215 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1216 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1217
1218 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1219 {
1220 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1221 }
1222
1223 static inline int ide_dev_is_sata(struct hd_driveid *id)
1224 {
1225 /*
1226 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1227 * verifying that word 80 by casting it to a signed type --
1228 * this trick allows us to filter out the reserved values of
1229 * 0x0000 and 0xffff along with the earlier ATA revisions...
1230 */
1231 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1232 return 1;
1233 return 0;
1234 }
1235
1236 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1237 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1238
1239 typedef struct ide_pio_timings_s {
1240 int setup_time; /* Address setup (ns) minimum */
1241 int active_time; /* Active pulse (ns) minimum */
1242 int cycle_time; /* Cycle time (ns) minimum = */
1243 /* active + recovery (+ setup for some chips) */
1244 } ide_pio_timings_t;
1245
1246 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1247 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1248 extern const ide_pio_timings_t ide_pio_timings[6];
1249
1250 int ide_set_pio_mode(ide_drive_t *, u8);
1251 int ide_set_dma_mode(ide_drive_t *, u8);
1252
1253 void ide_set_pio(ide_drive_t *, u8);
1254
1255 static inline void ide_set_max_pio(ide_drive_t *drive)
1256 {
1257 ide_set_pio(drive, 255);
1258 }
1259
1260 extern spinlock_t ide_lock;
1261 extern struct mutex ide_cfg_mtx;
1262 /*
1263 * Structure locking:
1264 *
1265 * ide_cfg_mtx and ide_lock together protect changes to
1266 * ide_hwif_t->{next,hwgroup}
1267 * ide_drive_t->next
1268 *
1269 * ide_hwgroup_t->busy: ide_lock
1270 * ide_hwgroup_t->hwif: ide_lock
1271 * ide_hwif_t->mate: constant, no locking
1272 * ide_drive_t->hwif: constant, no locking
1273 */
1274
1275 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1276
1277 extern struct bus_type ide_bus_type;
1278
1279 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1280 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1281
1282 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1283 #define ide_id_has_flush_cache_ext(id) \
1284 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1285
1286 static inline void ide_dump_identify(u8 *id)
1287 {
1288 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1289 }
1290
1291 static inline int hwif_to_node(ide_hwif_t *hwif)
1292 {
1293 struct pci_dev *dev = to_pci_dev(hwif->dev);
1294 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
1295 }
1296
1297 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1298 {
1299 ide_hwif_t *hwif = HWIF(drive);
1300
1301 return &hwif->drives[(drive->dn ^ 1) & 1];
1302 }
1303
1304 static inline void ide_set_irq(ide_drive_t *drive, int on)
1305 {
1306 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1307 }
1308
1309 static inline u8 ide_read_status(ide_drive_t *drive)
1310 {
1311 ide_hwif_t *hwif = drive->hwif;
1312
1313 return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1314 }
1315
1316 static inline u8 ide_read_altstatus(ide_drive_t *drive)
1317 {
1318 ide_hwif_t *hwif = drive->hwif;
1319
1320 return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]);
1321 }
1322
1323 static inline u8 ide_read_error(ide_drive_t *drive)
1324 {
1325 ide_hwif_t *hwif = drive->hwif;
1326
1327 return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]);
1328 }
1329
1330 #endif /* _IDE_H */
kernel source for telekom puls (alcatel/mediatek)