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ide: add CONFIG_IDE_ARCH_OBSOLETE_DEFAULTS (take 2)
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / ide.h
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
22 #endif
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
25 #include <asm/io.h>
26 #include <asm/semaphore.h>
27 #include <asm/mutex.h>
28
29 #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
30 # define SUPPORT_VLB_SYNC 0
31 #else
32 # define SUPPORT_VLB_SYNC 1
33 #endif
34
35 /*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40 #define IDE_NO_IRQ (-1)
41
42 typedef unsigned char byte; /* used everywhere */
43
44 /*
45 * Probably not wise to fiddle with these
46 */
47 #define ERROR_MAX 8 /* Max read/write errors per sector */
48 #define ERROR_RESET 3 /* Reset controller every 4th retry */
49 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51 /*
52 * Tune flags
53 */
54 #define IDE_TUNE_NOAUTO 2
55 #define IDE_TUNE_AUTO 1
56 #define IDE_TUNE_DEFAULT 0
57
58 /*
59 * state flags
60 */
61
62 #define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67 /*
68 * Definitions for accessing IDE controller registers
69 */
70 #define IDE_NR_PORTS (10)
71
72 #define IDE_DATA_OFFSET (0)
73 #define IDE_ERROR_OFFSET (1)
74 #define IDE_NSECTOR_OFFSET (2)
75 #define IDE_SECTOR_OFFSET (3)
76 #define IDE_LCYL_OFFSET (4)
77 #define IDE_HCYL_OFFSET (5)
78 #define IDE_SELECT_OFFSET (6)
79 #define IDE_STATUS_OFFSET (7)
80 #define IDE_CONTROL_OFFSET (8)
81 #define IDE_IRQ_OFFSET (9)
82
83 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85 #define IDE_ALTSTATUS_OFFSET IDE_CONTROL_OFFSET
86 #define IDE_IREASON_OFFSET IDE_NSECTOR_OFFSET
87 #define IDE_BCOUNTL_OFFSET IDE_LCYL_OFFSET
88 #define IDE_BCOUNTH_OFFSET IDE_HCYL_OFFSET
89
90 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
91 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
92 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
93 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
94 #define DRIVE_READY (READY_STAT | SEEK_STAT)
95
96 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
97
98 #define SATA_NR_PORTS (3) /* 16 possible ?? */
99
100 #define SATA_STATUS_OFFSET (0)
101 #define SATA_ERROR_OFFSET (1)
102 #define SATA_CONTROL_OFFSET (2)
103
104 /*
105 * Our Physical Region Descriptor (PRD) table should be large enough
106 * to handle the biggest I/O request we are likely to see. Since requests
107 * can have no more than 256 sectors, and since the typical blocksize is
108 * two or more sectors, we could get by with a limit of 128 entries here for
109 * the usual worst case. Most requests seem to include some contiguous blocks,
110 * further reducing the number of table entries required.
111 *
112 * The driver reverts to PIO mode for individual requests that exceed
113 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
114 * 100% of all crazy scenarios here is not necessary.
115 *
116 * As it turns out though, we must allocate a full 4KB page for this,
117 * so the two PRD tables (ide0 & ide1) will each get half of that,
118 * allowing each to have about 256 entries (8 bytes each) from this.
119 */
120 #define PRD_BYTES 8
121 #define PRD_ENTRIES 256
122
123 /*
124 * Some more useful definitions
125 */
126 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
127 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
128 #define SECTOR_SIZE 512
129 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
130 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
131
132 /*
133 * Timeouts for various operations:
134 */
135 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
136 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
137 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
138 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
139 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
140 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
141
142 /*
143 * Check for an interrupt and acknowledge the interrupt status
144 */
145 struct hwif_s;
146 typedef int (ide_ack_intr_t)(struct hwif_s *);
147
148 /*
149 * hwif_chipset_t is used to keep track of the specific hardware
150 * chipset used by each IDE interface, if known.
151 */
152 enum { ide_unknown, ide_generic, ide_pci,
153 ide_cmd640, ide_dtc2278, ide_ali14xx,
154 ide_qd65xx, ide_umc8672, ide_ht6560b,
155 ide_rz1000, ide_trm290,
156 ide_cmd646, ide_cy82c693, ide_4drives,
157 ide_pmac, ide_etrax100, ide_acorn,
158 ide_au1xxx, ide_palm3710
159 };
160
161 typedef u8 hwif_chipset_t;
162
163 /*
164 * Structure to hold all information about the location of this port
165 */
166 typedef struct hw_regs_s {
167 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
168 int irq; /* our irq number */
169 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
170 hwif_chipset_t chipset;
171 struct device *dev;
172 } hw_regs_t;
173
174 struct hwif_s * ide_find_port(unsigned long);
175 void ide_init_port_data(struct hwif_s *, unsigned int);
176 void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
177
178 static inline void ide_std_init_ports(hw_regs_t *hw,
179 unsigned long io_addr,
180 unsigned long ctl_addr)
181 {
182 unsigned int i;
183
184 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
185 hw->io_ports[i] = io_addr++;
186
187 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
188 }
189
190 #include <asm/ide.h>
191
192 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
193 #undef MAX_HWIFS
194 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
195 #endif
196
197 /* Currently only m68k, apus and m8xx need it */
198 #ifndef IDE_ARCH_ACK_INTR
199 # define ide_ack_intr(hwif) (1)
200 #endif
201
202 /* Currently only Atari needs it */
203 #ifndef IDE_ARCH_LOCK
204 # define ide_release_lock() do {} while (0)
205 # define ide_get_lock(hdlr, data) do {} while (0)
206 #endif /* IDE_ARCH_LOCK */
207
208 /*
209 * Now for the data we need to maintain per-drive: ide_drive_t
210 */
211
212 #define ide_scsi 0x21
213 #define ide_disk 0x20
214 #define ide_optical 0x7
215 #define ide_cdrom 0x5
216 #define ide_tape 0x1
217 #define ide_floppy 0x0
218
219 /*
220 * Special Driver Flags
221 *
222 * set_geometry : respecify drive geometry
223 * recalibrate : seek to cyl 0
224 * set_multmode : set multmode count
225 * set_tune : tune interface for drive
226 * serviced : service command
227 * reserved : unused
228 */
229 typedef union {
230 unsigned all : 8;
231 struct {
232 unsigned set_geometry : 1;
233 unsigned recalibrate : 1;
234 unsigned set_multmode : 1;
235 unsigned set_tune : 1;
236 unsigned serviced : 1;
237 unsigned reserved : 3;
238 } b;
239 } special_t;
240
241 /*
242 * ATA-IDE Select Register, aka Device-Head
243 *
244 * head : always zeros here
245 * unit : drive select number: 0/1
246 * bit5 : always 1
247 * lba : using LBA instead of CHS
248 * bit7 : always 1
249 */
250 typedef union {
251 unsigned all : 8;
252 struct {
253 #if defined(__LITTLE_ENDIAN_BITFIELD)
254 unsigned head : 4;
255 unsigned unit : 1;
256 unsigned bit5 : 1;
257 unsigned lba : 1;
258 unsigned bit7 : 1;
259 #elif defined(__BIG_ENDIAN_BITFIELD)
260 unsigned bit7 : 1;
261 unsigned lba : 1;
262 unsigned bit5 : 1;
263 unsigned unit : 1;
264 unsigned head : 4;
265 #else
266 #error "Please fix <asm/byteorder.h>"
267 #endif
268 } b;
269 } select_t, ata_select_t;
270
271 /*
272 * Status returned from various ide_ functions
273 */
274 typedef enum {
275 ide_stopped, /* no drive operation was started */
276 ide_started, /* a drive operation was started, handler was set */
277 } ide_startstop_t;
278
279 struct ide_driver_s;
280 struct ide_settings_s;
281
282 #ifdef CONFIG_BLK_DEV_IDEACPI
283 struct ide_acpi_drive_link;
284 struct ide_acpi_hwif_link;
285 #endif
286
287 typedef struct ide_drive_s {
288 char name[4]; /* drive name, such as "hda" */
289 char driver_req[10]; /* requests specific driver */
290
291 struct request_queue *queue; /* request queue */
292
293 struct request *rq; /* current request */
294 struct ide_drive_s *next; /* circular list of hwgroup drives */
295 void *driver_data; /* extra driver data */
296 struct hd_driveid *id; /* drive model identification info */
297 #ifdef CONFIG_IDE_PROC_FS
298 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
299 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
300 #endif
301 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
302
303 unsigned long sleep; /* sleep until this time */
304 unsigned long service_start; /* time we started last request */
305 unsigned long service_time; /* service time of last request */
306 unsigned long timeout; /* max time to wait for irq */
307
308 special_t special; /* special action flags */
309 select_t select; /* basic drive/head select reg value */
310
311 u8 keep_settings; /* restore settings after drive reset */
312 u8 using_dma; /* disk is using dma for read/write */
313 u8 retry_pio; /* retrying dma capable host in pio */
314 u8 state; /* retry state */
315 u8 waiting_for_dma; /* dma currently in progress */
316 u8 unmask; /* okay to unmask other irqs */
317 u8 noflush; /* don't attempt flushes */
318 u8 dsc_overlap; /* DSC overlap */
319 u8 nice1; /* give potential excess bandwidth */
320
321 unsigned present : 1; /* drive is physically present */
322 unsigned dead : 1; /* device ejected hint */
323 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
324 unsigned noprobe : 1; /* from: hdx=noprobe */
325 unsigned removable : 1; /* 1 if need to do check_media_change */
326 unsigned attach : 1; /* needed for removable devices */
327 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
328 unsigned no_unmask : 1; /* disallow setting unmask bit */
329 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
330 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
331 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
332 unsigned nodma : 1; /* disallow DMA */
333 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
334 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
335 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
336 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
337 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
338 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
339 unsigned post_reset : 1;
340 unsigned udma33_warned : 1;
341
342 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
343 u8 quirk_list; /* considered quirky, set for a specific host */
344 u8 init_speed; /* transfer rate set at boot */
345 u8 current_speed; /* current transfer rate set */
346 u8 desired_speed; /* desired transfer rate set */
347 u8 dn; /* now wide spread use */
348 u8 wcache; /* status of write cache */
349 u8 acoustic; /* acoustic management */
350 u8 media; /* disk, cdrom, tape, floppy, ... */
351 u8 ctl; /* "normal" value for Control register */
352 u8 ready_stat; /* min status value for drive ready */
353 u8 mult_count; /* current multiple sector setting */
354 u8 mult_req; /* requested multiple sector setting */
355 u8 tune_req; /* requested drive tuning setting */
356 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
357 u8 bad_wstat; /* used for ignoring WRERR_STAT */
358 u8 nowerr; /* used for ignoring WRERR_STAT */
359 u8 sect0; /* offset of first sector for DM6:DDO */
360 u8 head; /* "real" number of heads */
361 u8 sect; /* "real" sectors per track */
362 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
363 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
364
365 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
366 unsigned int cyl; /* "real" number of cyls */
367 unsigned int drive_data; /* used by set_pio_mode/selectproc */
368 unsigned int failures; /* current failure count */
369 unsigned int max_failures; /* maximum allowed failure count */
370 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
371
372 u64 capacity64; /* total number of sectors */
373
374 int lun; /* logical unit */
375 int crc_count; /* crc counter to reduce drive speed */
376 #ifdef CONFIG_BLK_DEV_IDEACPI
377 struct ide_acpi_drive_link *acpidata;
378 #endif
379 struct list_head list;
380 struct device gendev;
381 struct completion gendev_rel_comp; /* to deal with device release() */
382 } ide_drive_t;
383
384 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
385
386 #define IDE_CHIPSET_PCI_MASK \
387 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
388 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
389
390 struct ide_port_info;
391
392 typedef struct hwif_s {
393 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
394 struct hwif_s *mate; /* other hwif from same PCI chip */
395 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
396 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
397
398 char name[6]; /* name of interface, eg. "ide0" */
399
400 /* task file registers for pata and sata */
401 unsigned long io_ports[IDE_NR_PORTS];
402 unsigned long sata_scr[SATA_NR_PORTS];
403
404 ide_drive_t drives[MAX_DRIVES]; /* drive info */
405
406 u8 major; /* our major number */
407 u8 index; /* 0 for ide0; 1 for ide1; ... */
408 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
409 u8 bus_state; /* power state of the IDE bus */
410
411 u32 host_flags;
412
413 u8 pio_mask;
414
415 u8 ultra_mask;
416 u8 mwdma_mask;
417 u8 swdma_mask;
418
419 u8 cbl; /* cable type */
420
421 hwif_chipset_t chipset; /* sub-module for tuning.. */
422
423 struct device *dev;
424
425 const struct ide_port_info *cds; /* chipset device struct */
426
427 ide_ack_intr_t *ack_intr;
428
429 void (*rw_disk)(ide_drive_t *, struct request *);
430
431 #if 0
432 ide_hwif_ops_t *hwifops;
433 #else
434 /* host specific initialization of devices on a port */
435 void (*port_init_devs)(struct hwif_s *);
436 /* routine to program host for PIO mode */
437 void (*set_pio_mode)(ide_drive_t *, const u8);
438 /* routine to program host for DMA mode */
439 void (*set_dma_mode)(ide_drive_t *, const u8);
440 /* tweaks hardware to select drive */
441 void (*selectproc)(ide_drive_t *);
442 /* chipset polling based on hba specifics */
443 int (*reset_poll)(ide_drive_t *);
444 /* chipset specific changes to default for device-hba resets */
445 void (*pre_reset)(ide_drive_t *);
446 /* routine to reset controller after a disk reset */
447 void (*resetproc)(ide_drive_t *);
448 /* special host masking for drive selection */
449 void (*maskproc)(ide_drive_t *, int);
450 /* check host's drive quirk list */
451 void (*quirkproc)(ide_drive_t *);
452 #endif
453 u8 (*mdma_filter)(ide_drive_t *);
454 u8 (*udma_filter)(ide_drive_t *);
455
456 u8 (*cable_detect)(struct hwif_s *);
457
458 void (*ata_input_data)(ide_drive_t *, void *, u32);
459 void (*ata_output_data)(ide_drive_t *, void *, u32);
460
461 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
462 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
463
464 void (*dma_host_set)(ide_drive_t *, int);
465 int (*dma_setup)(ide_drive_t *);
466 void (*dma_exec_cmd)(ide_drive_t *, u8);
467 void (*dma_start)(ide_drive_t *);
468 int (*ide_dma_end)(ide_drive_t *drive);
469 int (*ide_dma_test_irq)(ide_drive_t *drive);
470 void (*ide_dma_clear_irq)(ide_drive_t *drive);
471 void (*dma_lost_irq)(ide_drive_t *drive);
472 void (*dma_timeout)(ide_drive_t *drive);
473
474 void (*OUTB)(u8 addr, unsigned long port);
475 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
476 void (*OUTW)(u16 addr, unsigned long port);
477 void (*OUTSW)(unsigned long port, void *addr, u32 count);
478 void (*OUTSL)(unsigned long port, void *addr, u32 count);
479
480 u8 (*INB)(unsigned long port);
481 u16 (*INW)(unsigned long port);
482 void (*INSW)(unsigned long port, void *addr, u32 count);
483 void (*INSL)(unsigned long port, void *addr, u32 count);
484
485 /* dma physical region descriptor table (cpu view) */
486 unsigned int *dmatable_cpu;
487 /* dma physical region descriptor table (dma view) */
488 dma_addr_t dmatable_dma;
489 /* Scatter-gather list used to build the above */
490 struct scatterlist *sg_table;
491 int sg_max_nents; /* Maximum number of entries in it */
492 int sg_nents; /* Current number of entries in it */
493 int sg_dma_direction; /* dma transfer direction */
494
495 /* data phase of the active command (currently only valid for PIO/DMA) */
496 int data_phase;
497
498 unsigned int nsect;
499 unsigned int nleft;
500 struct scatterlist *cursg;
501 unsigned int cursg_ofs;
502
503 int rqsize; /* max sectors per request */
504 int irq; /* our irq number */
505
506 unsigned long dma_base; /* base addr for dma ports */
507 unsigned long dma_command; /* dma command register */
508 unsigned long dma_vendor1; /* dma vendor 1 register */
509 unsigned long dma_status; /* dma status register */
510 unsigned long dma_vendor3; /* dma vendor 3 register */
511 unsigned long dma_prdtable; /* actual prd table address */
512
513 unsigned long config_data; /* for use by chipset-specific code */
514 unsigned long select_data; /* for use by chipset-specific code */
515
516 unsigned long extra_base; /* extra addr for dma ports */
517 unsigned extra_ports; /* number of extra dma ports */
518
519 unsigned noprobe : 1; /* don't probe for this interface */
520 unsigned present : 1; /* this interface exists */
521 unsigned serialized : 1; /* serialized all channel operation */
522 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
523 unsigned reset : 1; /* reset after probe */
524 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
525 unsigned mmio : 1; /* host uses MMIO */
526 unsigned straight8 : 1; /* Alan's straight 8 check */
527
528 struct device gendev;
529 struct device *portdev;
530
531 struct completion gendev_rel_comp; /* To deal with device release() */
532
533 void *hwif_data; /* extra hwif data */
534
535 unsigned dma;
536
537 #ifdef CONFIG_BLK_DEV_IDEACPI
538 struct ide_acpi_hwif_link *acpidata;
539 #endif
540 } ____cacheline_internodealigned_in_smp ide_hwif_t;
541
542 /*
543 * internal ide interrupt handler type
544 */
545 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
546 typedef int (ide_expiry_t)(ide_drive_t *);
547
548 /* used by ide-cd, ide-floppy, etc. */
549 typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
550
551 typedef struct hwgroup_s {
552 /* irq handler, if active */
553 ide_startstop_t (*handler)(ide_drive_t *);
554
555 /* BOOL: protects all fields below */
556 volatile int busy;
557 /* BOOL: wake us up on timer expiry */
558 unsigned int sleeping : 1;
559 /* BOOL: polling active & poll_timeout field valid */
560 unsigned int polling : 1;
561 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
562 unsigned int resetting : 1;
563
564 /* current drive */
565 ide_drive_t *drive;
566 /* ptr to current hwif in linked-list */
567 ide_hwif_t *hwif;
568
569 /* current request */
570 struct request *rq;
571
572 /* failsafe timer */
573 struct timer_list timer;
574 /* timeout value during long polls */
575 unsigned long poll_timeout;
576 /* queried upon timeouts */
577 int (*expiry)(ide_drive_t *);
578
579 int req_gen;
580 int req_gen_timer;
581 } ide_hwgroup_t;
582
583 typedef struct ide_driver_s ide_driver_t;
584
585 extern struct mutex ide_setting_mtx;
586
587 int set_io_32bit(ide_drive_t *, int);
588 int set_pio_mode(ide_drive_t *, int);
589 int set_using_dma(ide_drive_t *, int);
590
591 /* ATAPI packet command flags */
592 enum {
593 /* set when an error is considered normal - no retry (ide-tape) */
594 PC_FLAG_ABORT = (1 << 0),
595 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
596 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
597 PC_FLAG_DMA_OK = (1 << 3),
598 PC_FLAG_DMA_RECOMMENDED = (1 << 4),
599 PC_FLAG_DMA_IN_PROGRESS = (1 << 5),
600 PC_FLAG_DMA_ERROR = (1 << 6),
601 PC_FLAG_WRITING = (1 << 7),
602 /* command timed out */
603 PC_FLAG_TIMEDOUT = (1 << 8),
604 };
605
606 struct ide_atapi_pc {
607 /* actual packet bytes */
608 u8 c[12];
609 /* incremented on each retry */
610 int retries;
611 int error;
612
613 /* bytes to transfer */
614 int req_xfer;
615 /* bytes actually transferred */
616 int xferred;
617
618 /* data buffer */
619 u8 *buf;
620 /* current buffer position */
621 u8 *cur_pos;
622 int buf_size;
623 /* missing/available data on the current buffer */
624 int b_count;
625
626 /* the corresponding request */
627 struct request *rq;
628
629 unsigned long flags;
630
631 /*
632 * those are more or less driver-specific and some of them are subject
633 * to change/removal later.
634 */
635 u8 pc_buf[256];
636 void (*idefloppy_callback) (ide_drive_t *);
637 ide_startstop_t (*idetape_callback) (ide_drive_t *);
638
639 /* idetape only */
640 struct idetape_bh *bh;
641 char *b_data;
642
643 /* idescsi only for now */
644 struct scatterlist *sg;
645 unsigned int sg_cnt;
646
647 struct scsi_cmnd *scsi_cmd;
648 void (*done) (struct scsi_cmnd *);
649
650 unsigned long timeout;
651 };
652
653 #ifdef CONFIG_IDE_PROC_FS
654 /*
655 * configurable drive settings
656 */
657
658 #define TYPE_INT 0
659 #define TYPE_BYTE 1
660 #define TYPE_SHORT 2
661
662 #define SETTING_READ (1 << 0)
663 #define SETTING_WRITE (1 << 1)
664 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
665
666 typedef int (ide_procset_t)(ide_drive_t *, int);
667 typedef struct ide_settings_s {
668 char *name;
669 int rw;
670 int data_type;
671 int min;
672 int max;
673 int mul_factor;
674 int div_factor;
675 void *data;
676 ide_procset_t *set;
677 int auto_remove;
678 struct ide_settings_s *next;
679 } ide_settings_t;
680
681 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
682
683 /*
684 * /proc/ide interface
685 */
686 typedef struct {
687 const char *name;
688 mode_t mode;
689 read_proc_t *read_proc;
690 write_proc_t *write_proc;
691 } ide_proc_entry_t;
692
693 void proc_ide_create(void);
694 void proc_ide_destroy(void);
695 void ide_proc_register_port(ide_hwif_t *);
696 void ide_proc_port_register_devices(ide_hwif_t *);
697 void ide_proc_unregister_device(ide_drive_t *);
698 void ide_proc_unregister_port(ide_hwif_t *);
699 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
700 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
701
702 void ide_add_generic_settings(ide_drive_t *);
703
704 read_proc_t proc_ide_read_capacity;
705 read_proc_t proc_ide_read_geometry;
706
707 #ifdef CONFIG_BLK_DEV_IDEPCI
708 void ide_pci_create_host_proc(const char *, get_info_t *);
709 #endif
710
711 /*
712 * Standard exit stuff:
713 */
714 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
715 { \
716 len -= off; \
717 if (len < count) { \
718 *eof = 1; \
719 if (len <= 0) \
720 return 0; \
721 } else \
722 len = count; \
723 *start = page + off; \
724 return len; \
725 }
726 #else
727 static inline void proc_ide_create(void) { ; }
728 static inline void proc_ide_destroy(void) { ; }
729 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
730 static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
731 static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
732 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
733 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
734 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
735 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
736 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
737 #endif
738
739 /*
740 * Power Management step value (rq->pm->pm_step).
741 *
742 * The step value starts at 0 (ide_pm_state_start_suspend) for a
743 * suspend operation or 1000 (ide_pm_state_start_resume) for a
744 * resume operation.
745 *
746 * For each step, the core calls the subdriver start_power_step() first.
747 * This can return:
748 * - ide_stopped : In this case, the core calls us back again unless
749 * step have been set to ide_power_state_completed.
750 * - ide_started : In this case, the channel is left busy until an
751 * async event (interrupt) occurs.
752 * Typically, start_power_step() will issue a taskfile request with
753 * do_rw_taskfile().
754 *
755 * Upon reception of the interrupt, the core will call complete_power_step()
756 * with the error code if any. This routine should update the step value
757 * and return. It should not start a new request. The core will call
758 * start_power_step for the new step value, unless step have been set to
759 * ide_power_state_completed.
760 *
761 * Subdrivers are expected to define their own additional power
762 * steps from 1..999 for suspend and from 1001..1999 for resume,
763 * other values are reserved for future use.
764 */
765
766 enum {
767 ide_pm_state_completed = -1,
768 ide_pm_state_start_suspend = 0,
769 ide_pm_state_start_resume = 1000,
770 };
771
772 /*
773 * Subdrivers support.
774 *
775 * The gendriver.owner field should be set to the module owner of this driver.
776 * The gendriver.name field should be set to the name of this driver
777 */
778 struct ide_driver_s {
779 const char *version;
780 u8 media;
781 unsigned supports_dsc_overlap : 1;
782 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
783 int (*end_request)(ide_drive_t *, int, int);
784 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
785 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
786 struct device_driver gen_driver;
787 int (*probe)(ide_drive_t *);
788 void (*remove)(ide_drive_t *);
789 void (*resume)(ide_drive_t *);
790 void (*shutdown)(ide_drive_t *);
791 #ifdef CONFIG_IDE_PROC_FS
792 ide_proc_entry_t *proc;
793 #endif
794 };
795
796 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
797
798 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
799
800 /*
801 * ide_hwifs[] is the master data structure used to keep track
802 * of just about everything in ide.c. Whenever possible, routines
803 * should be using pointers to a drive (ide_drive_t *) or
804 * pointers to a hwif (ide_hwif_t *), rather than indexing this
805 * structure directly (the allocation/layout may change!).
806 *
807 */
808 #ifndef _IDE_C
809 extern ide_hwif_t ide_hwifs[]; /* master data repository */
810 #endif
811 extern int noautodma;
812
813 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
814 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
815 int uptodate, int nr_sectors);
816
817 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
818
819 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
820 ide_expiry_t *);
821
822 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
823
824 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
825
826 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
827
828 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
829
830 extern void ide_fix_driveid(struct hd_driveid *);
831
832 extern void ide_fixstring(u8 *, const int, const int);
833
834 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
835
836 extern ide_startstop_t ide_do_reset (ide_drive_t *);
837
838 extern void ide_init_drive_cmd (struct request *rq);
839
840 /*
841 * "action" parameter type for ide_do_drive_cmd() below.
842 */
843 typedef enum {
844 ide_wait, /* insert rq at end of list, and wait for it */
845 ide_preempt, /* insert rq in front of current request */
846 ide_head_wait, /* insert rq in front of current request and wait for it */
847 ide_end /* insert rq at end of list, but don't wait for it */
848 } ide_action_t;
849
850 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
851
852 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
853
854 enum {
855 IDE_TFLAG_LBA48 = (1 << 0),
856 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
857 IDE_TFLAG_FLAGGED = (1 << 2),
858 IDE_TFLAG_OUT_DATA = (1 << 3),
859 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
860 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
861 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
862 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
863 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
864 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
865 IDE_TFLAG_OUT_HOB_NSECT |
866 IDE_TFLAG_OUT_HOB_LBAL |
867 IDE_TFLAG_OUT_HOB_LBAM |
868 IDE_TFLAG_OUT_HOB_LBAH,
869 IDE_TFLAG_OUT_FEATURE = (1 << 9),
870 IDE_TFLAG_OUT_NSECT = (1 << 10),
871 IDE_TFLAG_OUT_LBAL = (1 << 11),
872 IDE_TFLAG_OUT_LBAM = (1 << 12),
873 IDE_TFLAG_OUT_LBAH = (1 << 13),
874 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
875 IDE_TFLAG_OUT_NSECT |
876 IDE_TFLAG_OUT_LBAL |
877 IDE_TFLAG_OUT_LBAM |
878 IDE_TFLAG_OUT_LBAH,
879 IDE_TFLAG_OUT_DEVICE = (1 << 14),
880 IDE_TFLAG_WRITE = (1 << 15),
881 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
882 IDE_TFLAG_IN_DATA = (1 << 17),
883 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
884 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
885 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
886 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
887 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
888 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
889 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
890 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
891 IDE_TFLAG_IN_HOB_LBAM |
892 IDE_TFLAG_IN_HOB_LBAH,
893 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
894 IDE_TFLAG_IN_HOB_NSECT |
895 IDE_TFLAG_IN_HOB_LBA,
896 IDE_TFLAG_IN_NSECT = (1 << 25),
897 IDE_TFLAG_IN_LBAL = (1 << 26),
898 IDE_TFLAG_IN_LBAM = (1 << 27),
899 IDE_TFLAG_IN_LBAH = (1 << 28),
900 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
901 IDE_TFLAG_IN_LBAM |
902 IDE_TFLAG_IN_LBAH,
903 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
904 IDE_TFLAG_IN_LBA,
905 IDE_TFLAG_IN_DEVICE = (1 << 29),
906 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
907 IDE_TFLAG_IN_HOB,
908 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
909 IDE_TFLAG_IN_TF,
910 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
911 IDE_TFLAG_IN_DEVICE,
912 /* force 16-bit I/O operations */
913 IDE_TFLAG_IO_16BIT = (1 << 30),
914 /* ide_task_t was allocated using kmalloc() */
915 IDE_TFLAG_DYN = (1 << 31),
916 };
917
918 struct ide_taskfile {
919 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
920
921 u8 hob_feature; /* 1-5: additional data to support LBA48 */
922 u8 hob_nsect;
923 u8 hob_lbal;
924 u8 hob_lbam;
925 u8 hob_lbah;
926
927 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
928
929 union { /*  7: */
930 u8 error; /* read: error */
931 u8 feature; /* write: feature */
932 };
933
934 u8 nsect; /* 8: number of sectors */
935 u8 lbal; /* 9: LBA low */
936 u8 lbam; /* 10: LBA mid */
937 u8 lbah; /* 11: LBA high */
938
939 u8 device; /* 12: device select */
940
941 union { /* 13: */
942 u8 status; /*  read: status  */
943 u8 command; /* write: command */
944 };
945 };
946
947 typedef struct ide_task_s {
948 union {
949 struct ide_taskfile tf;
950 u8 tf_array[14];
951 };
952 u32 tf_flags;
953 int data_phase;
954 struct request *rq; /* copy of request */
955 void *special; /* valid_t generally */
956 } ide_task_t;
957
958 void ide_tf_load(ide_drive_t *, ide_task_t *);
959 void ide_tf_read(ide_drive_t *, ide_task_t *);
960
961 extern void SELECT_DRIVE(ide_drive_t *);
962 extern void SELECT_MASK(ide_drive_t *, int);
963
964 extern int drive_is_ready(ide_drive_t *);
965
966 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
967
968 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
969
970 void task_end_request(ide_drive_t *, struct request *, u8);
971
972 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
973 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
974
975 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
976 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
977 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
978
979 extern int system_bus_clock(void);
980
981 extern int ide_driveid_update(ide_drive_t *);
982 extern int ide_config_drive_speed(ide_drive_t *, u8);
983 extern u8 eighty_ninty_three (ide_drive_t *);
984 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
985
986 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
987
988 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
989
990 extern int ide_spin_wait_hwgroup(ide_drive_t *);
991 extern void ide_timer_expiry(unsigned long);
992 extern irqreturn_t ide_intr(int irq, void *dev_id);
993 extern void do_ide_request(struct request_queue *);
994
995 void ide_init_disk(struct gendisk *, ide_drive_t *);
996
997 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
998 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
999 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1000 #else
1001 #define ide_pci_register_driver(d) pci_register_driver(d)
1002 #endif
1003
1004 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1005 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1006
1007 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1008 void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1009 #else
1010 static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1011 const struct ide_port_info *d) { }
1012 #endif
1013
1014 extern void default_hwif_iops(ide_hwif_t *);
1015 extern void default_hwif_mmiops(ide_hwif_t *);
1016 extern void default_hwif_transport(ide_hwif_t *);
1017
1018 typedef struct ide_pci_enablebit_s {
1019 u8 reg; /* byte pci reg holding the enable-bit */
1020 u8 mask; /* mask to isolate the enable-bit */
1021 u8 val; /* value of masked reg when "enabled" */
1022 } ide_pci_enablebit_t;
1023
1024 enum {
1025 /* Uses ISA control ports not PCI ones. */
1026 IDE_HFLAG_ISA_PORTS = (1 << 0),
1027 /* single port device */
1028 IDE_HFLAG_SINGLE = (1 << 1),
1029 /* don't use legacy PIO blacklist */
1030 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1031 /* don't use conservative PIO "downgrade" */
1032 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1033 /* use PIO8/9 for prefetch off/on */
1034 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1035 /* use PIO6/7 for fast-devsel off/on */
1036 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1037 /* use 100-102 and 200-202 PIO values to set DMA modes */
1038 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1039 /*
1040 * keep DMA setting when programming PIO mode, may be used only
1041 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1042 */
1043 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1044 /* program host for the transfer mode after programming device */
1045 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1046 /* don't program host/device for the transfer mode ("smart" hosts) */
1047 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1048 /* trust BIOS for programming chipset/device for DMA */
1049 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1050 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
1051 IDE_HFLAG_VDMA = (1 << 11),
1052 /* ATAPI DMA is unsupported */
1053 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1054 /* set if host is a "bootable" controller */
1055 IDE_HFLAG_BOOTABLE = (1 << 13),
1056 /* host doesn't support DMA */
1057 IDE_HFLAG_NO_DMA = (1 << 14),
1058 /* check if host is PCI IDE device before allowing DMA */
1059 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1060 /* don't autotune PIO */
1061 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
1062 /* host is CS5510/CS5520 */
1063 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
1064 /* no LBA48 */
1065 IDE_HFLAG_NO_LBA48 = (1 << 17),
1066 /* no LBA48 DMA */
1067 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1068 /* data FIFO is cleared by an error */
1069 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1070 /* serialize ports */
1071 IDE_HFLAG_SERIALIZE = (1 << 20),
1072 /* use legacy IRQs */
1073 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1074 /* force use of legacy IRQs */
1075 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1076 /* limit LBA48 requests to 256 sectors */
1077 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1078 /* use 32-bit I/O ops */
1079 IDE_HFLAG_IO_32BIT = (1 << 24),
1080 /* unmask IRQs */
1081 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1082 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1083 /* host is CY82C693 */
1084 IDE_HFLAG_CY82C693 = (1 << 27),
1085 /* force host out of "simplex" mode */
1086 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1087 /* DSC overlap is unsupported */
1088 IDE_HFLAG_NO_DSC = (1 << 29),
1089 /* never use 32-bit I/O ops */
1090 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1091 /* never unmask IRQs */
1092 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1093 };
1094
1095 #ifdef CONFIG_BLK_DEV_OFFBOARD
1096 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1097 #else
1098 # define IDE_HFLAG_OFF_BOARD 0
1099 #endif
1100
1101 struct ide_port_info {
1102 char *name;
1103 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1104 void (*init_iops)(ide_hwif_t *);
1105 void (*init_hwif)(ide_hwif_t *);
1106 void (*init_dma)(ide_hwif_t *, unsigned long);
1107 ide_pci_enablebit_t enablebits[2];
1108 hwif_chipset_t chipset;
1109 u8 extra;
1110 u32 host_flags;
1111 u8 pio_mask;
1112 u8 swdma_mask;
1113 u8 mwdma_mask;
1114 u8 udma_mask;
1115 };
1116
1117 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1118 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1119
1120 void ide_map_sg(ide_drive_t *, struct request *);
1121 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1122
1123 #define BAD_DMA_DRIVE 0
1124 #define GOOD_DMA_DRIVE 1
1125
1126 struct drive_list_entry {
1127 const char *id_model;
1128 const char *id_firmware;
1129 };
1130
1131 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1132
1133 #ifdef CONFIG_BLK_DEV_IDEDMA
1134 int __ide_dma_bad_drive(ide_drive_t *);
1135 int ide_id_dma_bug(ide_drive_t *);
1136
1137 u8 ide_find_dma_mode(ide_drive_t *, u8);
1138
1139 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1140 {
1141 return ide_find_dma_mode(drive, XFER_UDMA_6);
1142 }
1143
1144 void ide_dma_off_quietly(ide_drive_t *);
1145 void ide_dma_off(ide_drive_t *);
1146 void ide_dma_on(ide_drive_t *);
1147 int ide_set_dma(ide_drive_t *);
1148 void ide_check_dma_crc(ide_drive_t *);
1149 ide_startstop_t ide_dma_intr(ide_drive_t *);
1150
1151 int ide_build_sglist(ide_drive_t *, struct request *);
1152 void ide_destroy_dmatable(ide_drive_t *);
1153
1154 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1155 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1156 extern int ide_release_dma(ide_hwif_t *);
1157 extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1158
1159 void ide_dma_host_set(ide_drive_t *, int);
1160 extern int ide_dma_setup(ide_drive_t *);
1161 extern void ide_dma_start(ide_drive_t *);
1162 extern int __ide_dma_end(ide_drive_t *);
1163 extern void ide_dma_lost_irq(ide_drive_t *);
1164 extern void ide_dma_timeout(ide_drive_t *);
1165 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1166
1167 #else
1168 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1169 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1170 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1171 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1172 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1173 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1174 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1175 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1176 static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1177 #endif /* CONFIG_BLK_DEV_IDEDMA */
1178
1179 #ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1180 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1181 #endif
1182
1183 #ifdef CONFIG_BLK_DEV_IDEACPI
1184 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1185 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1186 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1187 extern void ide_acpi_init(ide_hwif_t *hwif);
1188 void ide_acpi_port_init_devices(ide_hwif_t *);
1189 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1190 #else
1191 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1192 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1193 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1194 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1195 static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
1196 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1197 #endif
1198
1199 void ide_remove_port_from_hwgroup(ide_hwif_t *);
1200 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1201 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1202 void ide_unregister(unsigned int);
1203
1204 void ide_register_region(struct gendisk *);
1205 void ide_unregister_region(struct gendisk *);
1206
1207 void ide_undecoded_slave(ide_drive_t *);
1208
1209 int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1210 int ide_device_add(u8 idx[4], const struct ide_port_info *);
1211 void ide_port_unregister_devices(ide_hwif_t *);
1212 void ide_port_scan(ide_hwif_t *);
1213
1214 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1215 {
1216 return hwif->hwif_data;
1217 }
1218
1219 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1220 {
1221 hwif->hwif_data = data;
1222 }
1223
1224 const char *ide_xfer_verbose(u8 mode);
1225 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1226 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1227
1228 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1229 {
1230 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1231 }
1232
1233 static inline int ide_dev_is_sata(struct hd_driveid *id)
1234 {
1235 /*
1236 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1237 * verifying that word 80 by casting it to a signed type --
1238 * this trick allows us to filter out the reserved values of
1239 * 0x0000 and 0xffff along with the earlier ATA revisions...
1240 */
1241 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1242 return 1;
1243 return 0;
1244 }
1245
1246 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1247 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1248
1249 typedef struct ide_pio_timings_s {
1250 int setup_time; /* Address setup (ns) minimum */
1251 int active_time; /* Active pulse (ns) minimum */
1252 int cycle_time; /* Cycle time (ns) minimum = */
1253 /* active + recovery (+ setup for some chips) */
1254 } ide_pio_timings_t;
1255
1256 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1257 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1258 extern const ide_pio_timings_t ide_pio_timings[6];
1259
1260 int ide_set_pio_mode(ide_drive_t *, u8);
1261 int ide_set_dma_mode(ide_drive_t *, u8);
1262
1263 void ide_set_pio(ide_drive_t *, u8);
1264
1265 static inline void ide_set_max_pio(ide_drive_t *drive)
1266 {
1267 ide_set_pio(drive, 255);
1268 }
1269
1270 extern spinlock_t ide_lock;
1271 extern struct mutex ide_cfg_mtx;
1272 /*
1273 * Structure locking:
1274 *
1275 * ide_cfg_mtx and ide_lock together protect changes to
1276 * ide_hwif_t->{next,hwgroup}
1277 * ide_drive_t->next
1278 *
1279 * ide_hwgroup_t->busy: ide_lock
1280 * ide_hwgroup_t->hwif: ide_lock
1281 * ide_hwif_t->mate: constant, no locking
1282 * ide_drive_t->hwif: constant, no locking
1283 */
1284
1285 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1286
1287 extern struct bus_type ide_bus_type;
1288 extern struct class *ide_port_class;
1289
1290 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1291 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1292
1293 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1294 #define ide_id_has_flush_cache_ext(id) \
1295 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1296
1297 static inline void ide_dump_identify(u8 *id)
1298 {
1299 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1300 }
1301
1302 static inline int hwif_to_node(ide_hwif_t *hwif)
1303 {
1304 struct pci_dev *dev = to_pci_dev(hwif->dev);
1305 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
1306 }
1307
1308 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1309 {
1310 ide_hwif_t *hwif = HWIF(drive);
1311
1312 return &hwif->drives[(drive->dn ^ 1) & 1];
1313 }
1314
1315 static inline void ide_set_irq(ide_drive_t *drive, int on)
1316 {
1317 ide_hwif_t *hwif = drive->hwif;
1318
1319 hwif->OUTB(drive->ctl | (on ? 0 : 2),
1320 hwif->io_ports[IDE_CONTROL_OFFSET]);
1321 }
1322
1323 static inline u8 ide_read_status(ide_drive_t *drive)
1324 {
1325 ide_hwif_t *hwif = drive->hwif;
1326
1327 return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1328 }
1329
1330 static inline u8 ide_read_altstatus(ide_drive_t *drive)
1331 {
1332 ide_hwif_t *hwif = drive->hwif;
1333
1334 return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]);
1335 }
1336
1337 static inline u8 ide_read_error(ide_drive_t *drive)
1338 {
1339 ide_hwif_t *hwif = drive->hwif;
1340
1341 return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]);
1342 }
1343
1344 /*
1345 * Too bad. The drive wants to send us data which we are not ready to accept.
1346 * Just throw it away.
1347 */
1348 static inline void ide_atapi_discard_data(ide_drive_t *drive, unsigned bcount)
1349 {
1350 ide_hwif_t *hwif = drive->hwif;
1351
1352 /* FIXME: use ->atapi_input_bytes */
1353 while (bcount--)
1354 (void)hwif->INB(hwif->io_ports[IDE_DATA_OFFSET]);
1355 }
1356
1357 static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount)
1358 {
1359 ide_hwif_t *hwif = drive->hwif;
1360
1361 /* FIXME: use ->atapi_output_bytes */
1362 while (bcount--)
1363 hwif->OUTB(0, hwif->io_ports[IDE_DATA_OFFSET]);
1364 }
1365
1366 #endif /* _IDE_H */
kernel source for telekom puls (alcatel/mediatek)