projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ide: merge ide_hwgroup_t with ide_hwif_t (v2)
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / ide.h
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/ata.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #include <linux/pm.h>
21 #ifdef CONFIG_BLK_DEV_IDEACPI
22 #include <acpi/acpi.h>
23 #endif
24 #include <asm/byteorder.h>
25 #include <asm/system.h>
26 #include <asm/io.h>
27 #include <asm/mutex.h>
28
29 #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
30 # define SUPPORT_VLB_SYNC 0
31 #else
32 # define SUPPORT_VLB_SYNC 1
33 #endif
34
35 typedef unsigned char byte; /* used everywhere */
36
37 /*
38 * Probably not wise to fiddle with these
39 */
40 #define ERROR_MAX 8 /* Max read/write errors per sector */
41 #define ERROR_RESET 3 /* Reset controller every 4th retry */
42 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
43
44 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
45
46 /*
47 * Definitions for accessing IDE controller registers
48 */
49 #define IDE_NR_PORTS (10)
50
51 struct ide_io_ports {
52 unsigned long data_addr;
53
54 union {
55 unsigned long error_addr; /* read: error */
56 unsigned long feature_addr; /* write: feature */
57 };
58
59 unsigned long nsect_addr;
60 unsigned long lbal_addr;
61 unsigned long lbam_addr;
62 unsigned long lbah_addr;
63
64 unsigned long device_addr;
65
66 union {
67 unsigned long status_addr; /*  read: status  */
68 unsigned long command_addr; /* write: command */
69 };
70
71 unsigned long ctl_addr;
72
73 unsigned long irq_addr;
74 };
75
76 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
77
78 #define BAD_R_STAT (ATA_BUSY | ATA_ERR)
79 #define BAD_W_STAT (BAD_R_STAT | ATA_DF)
80 #define BAD_STAT (BAD_R_STAT | ATA_DRQ)
81 #define DRIVE_READY (ATA_DRDY | ATA_DSC)
82
83 #define BAD_CRC (ATA_ABORTED | ATA_ICRC)
84
85 #define SATA_NR_PORTS (3) /* 16 possible ?? */
86
87 #define SATA_STATUS_OFFSET (0)
88 #define SATA_ERROR_OFFSET (1)
89 #define SATA_CONTROL_OFFSET (2)
90
91 /*
92 * Our Physical Region Descriptor (PRD) table should be large enough
93 * to handle the biggest I/O request we are likely to see. Since requests
94 * can have no more than 256 sectors, and since the typical blocksize is
95 * two or more sectors, we could get by with a limit of 128 entries here for
96 * the usual worst case. Most requests seem to include some contiguous blocks,
97 * further reducing the number of table entries required.
98 *
99 * The driver reverts to PIO mode for individual requests that exceed
100 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
101 * 100% of all crazy scenarios here is not necessary.
102 *
103 * As it turns out though, we must allocate a full 4KB page for this,
104 * so the two PRD tables (ide0 & ide1) will each get half of that,
105 * allowing each to have about 256 entries (8 bytes each) from this.
106 */
107 #define PRD_BYTES 8
108 #define PRD_ENTRIES 256
109
110 /*
111 * Some more useful definitions
112 */
113 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
114 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
115 #define SECTOR_SIZE 512
116
117 /*
118 * Timeouts for various operations:
119 */
120 enum {
121 /* spec allows up to 20ms */
122 WAIT_DRQ = HZ / 10, /* 100ms */
123 /* some laptops are very slow */
124 WAIT_READY = 5 * HZ, /* 5s */
125 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
126 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
127 /* worst case when spinning up */
128 WAIT_WORSTCASE = 30 * HZ, /* 30s */
129 /* maximum wait for an IRQ to happen */
130 WAIT_CMD = 10 * HZ, /* 10s */
131 /* Some drives require a longer IRQ timeout. */
132 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
133 /*
134 * Some drives (for example, Seagate STT3401A Travan) require a very
135 * long timeout, because they don't return an interrupt or clear their
136 * BSY bit until after the command completes (even retension commands).
137 */
138 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
139 /* minimum sleep time */
140 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
141 };
142
143 /*
144 * Op codes for special requests to be handled by ide_special_rq().
145 * Values should be in the range of 0x20 to 0x3f.
146 */
147 #define REQ_DRIVE_RESET 0x20
148 #define REQ_DEVSET_EXEC 0x21
149 #define REQ_PARK_HEADS 0x22
150 #define REQ_UNPARK_HEADS 0x23
151
152 /*
153 * Check for an interrupt and acknowledge the interrupt status
154 */
155 struct hwif_s;
156 typedef int (ide_ack_intr_t)(struct hwif_s *);
157
158 /*
159 * hwif_chipset_t is used to keep track of the specific hardware
160 * chipset used by each IDE interface, if known.
161 */
162 enum { ide_unknown, ide_generic, ide_pci,
163 ide_cmd640, ide_dtc2278, ide_ali14xx,
164 ide_qd65xx, ide_umc8672, ide_ht6560b,
165 ide_4drives, ide_pmac, ide_acorn,
166 ide_au1xxx, ide_palm3710
167 };
168
169 typedef u8 hwif_chipset_t;
170
171 /*
172 * Structure to hold all information about the location of this port
173 */
174 typedef struct hw_regs_s {
175 union {
176 struct ide_io_ports io_ports;
177 unsigned long io_ports_array[IDE_NR_PORTS];
178 };
179
180 int irq; /* our irq number */
181 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
182 hwif_chipset_t chipset;
183 struct device *dev, *parent;
184 unsigned long config;
185 } hw_regs_t;
186
187 void ide_init_port_data(struct hwif_s *, unsigned int);
188 void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
189
190 static inline void ide_std_init_ports(hw_regs_t *hw,
191 unsigned long io_addr,
192 unsigned long ctl_addr)
193 {
194 unsigned int i;
195
196 for (i = 0; i <= 7; i++)
197 hw->io_ports_array[i] = io_addr++;
198
199 hw->io_ports.ctl_addr = ctl_addr;
200 }
201
202 /* for IDE PCI controllers in legacy mode, temporary */
203 static inline int __ide_default_irq(unsigned long base)
204 {
205 switch (base) {
206 #ifdef CONFIG_IA64
207 case 0x1f0: return isa_irq_to_vector(14);
208 case 0x170: return isa_irq_to_vector(15);
209 #else
210 case 0x1f0: return 14;
211 case 0x170: return 15;
212 #endif
213 }
214 return 0;
215 }
216
217 #if defined(CONFIG_ARM) || defined(CONFIG_FRV) || defined(CONFIG_M68K) || \
218 defined(CONFIG_MIPS) || defined(CONFIG_MN10300) || defined(CONFIG_PARISC) \
219 || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || defined(CONFIG_SPARC64)
220 #include <asm/ide.h>
221 #else
222 #include <asm-generic/ide_iops.h>
223 #endif
224
225 #define MAX_HWIFS 10
226
227 /* Currently only m68k, apus and m8xx need it */
228 #ifndef IDE_ARCH_ACK_INTR
229 # define ide_ack_intr(hwif) (1)
230 #endif
231
232 /* Currently only Atari needs it */
233 #ifndef IDE_ARCH_LOCK
234 # define ide_release_lock() do {} while (0)
235 # define ide_get_lock(hdlr, data) do {} while (0)
236 #endif /* IDE_ARCH_LOCK */
237
238 /*
239 * Now for the data we need to maintain per-drive: ide_drive_t
240 */
241
242 #define ide_scsi 0x21
243 #define ide_disk 0x20
244 #define ide_optical 0x7
245 #define ide_cdrom 0x5
246 #define ide_tape 0x1
247 #define ide_floppy 0x0
248
249 /*
250 * Special Driver Flags
251 *
252 * set_geometry : respecify drive geometry
253 * recalibrate : seek to cyl 0
254 * set_multmode : set multmode count
255 * reserved : unused
256 */
257 typedef union {
258 unsigned all : 8;
259 struct {
260 unsigned set_geometry : 1;
261 unsigned recalibrate : 1;
262 unsigned set_multmode : 1;
263 unsigned reserved : 5;
264 } b;
265 } special_t;
266
267 /*
268 * Status returned from various ide_ functions
269 */
270 typedef enum {
271 ide_stopped, /* no drive operation was started */
272 ide_started, /* a drive operation was started, handler was set */
273 } ide_startstop_t;
274
275 enum {
276 IDE_TFLAG_LBA48 = (1 << 0),
277 IDE_TFLAG_FLAGGED = (1 << 2),
278 IDE_TFLAG_OUT_DATA = (1 << 3),
279 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
280 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
281 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
282 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
283 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
284 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
285 IDE_TFLAG_OUT_HOB_NSECT |
286 IDE_TFLAG_OUT_HOB_LBAL |
287 IDE_TFLAG_OUT_HOB_LBAM |
288 IDE_TFLAG_OUT_HOB_LBAH,
289 IDE_TFLAG_OUT_FEATURE = (1 << 9),
290 IDE_TFLAG_OUT_NSECT = (1 << 10),
291 IDE_TFLAG_OUT_LBAL = (1 << 11),
292 IDE_TFLAG_OUT_LBAM = (1 << 12),
293 IDE_TFLAG_OUT_LBAH = (1 << 13),
294 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
295 IDE_TFLAG_OUT_NSECT |
296 IDE_TFLAG_OUT_LBAL |
297 IDE_TFLAG_OUT_LBAM |
298 IDE_TFLAG_OUT_LBAH,
299 IDE_TFLAG_OUT_DEVICE = (1 << 14),
300 IDE_TFLAG_WRITE = (1 << 15),
301 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
302 IDE_TFLAG_IN_DATA = (1 << 17),
303 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
304 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
305 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
306 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
307 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
308 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
309 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
310 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
311 IDE_TFLAG_IN_HOB_LBAM |
312 IDE_TFLAG_IN_HOB_LBAH,
313 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
314 IDE_TFLAG_IN_HOB_NSECT |
315 IDE_TFLAG_IN_HOB_LBA,
316 IDE_TFLAG_IN_FEATURE = (1 << 1),
317 IDE_TFLAG_IN_NSECT = (1 << 25),
318 IDE_TFLAG_IN_LBAL = (1 << 26),
319 IDE_TFLAG_IN_LBAM = (1 << 27),
320 IDE_TFLAG_IN_LBAH = (1 << 28),
321 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
322 IDE_TFLAG_IN_LBAM |
323 IDE_TFLAG_IN_LBAH,
324 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
325 IDE_TFLAG_IN_LBA,
326 IDE_TFLAG_IN_DEVICE = (1 << 29),
327 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
328 IDE_TFLAG_IN_HOB,
329 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
330 IDE_TFLAG_IN_TF,
331 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
332 IDE_TFLAG_IN_DEVICE,
333 /* force 16-bit I/O operations */
334 IDE_TFLAG_IO_16BIT = (1 << 30),
335 /* ide_task_t was allocated using kmalloc() */
336 IDE_TFLAG_DYN = (1 << 31),
337 };
338
339 struct ide_taskfile {
340 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
341
342 u8 hob_feature; /* 1-5: additional data to support LBA48 */
343 u8 hob_nsect;
344 u8 hob_lbal;
345 u8 hob_lbam;
346 u8 hob_lbah;
347
348 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
349
350 union { /*  7: */
351 u8 error; /* read: error */
352 u8 feature; /* write: feature */
353 };
354
355 u8 nsect; /* 8: number of sectors */
356 u8 lbal; /* 9: LBA low */
357 u8 lbam; /* 10: LBA mid */
358 u8 lbah; /* 11: LBA high */
359
360 u8 device; /* 12: device select */
361
362 union { /* 13: */
363 u8 status; /*  read: status  */
364 u8 command; /* write: command */
365 };
366 };
367
368 typedef struct ide_task_s {
369 union {
370 struct ide_taskfile tf;
371 u8 tf_array[14];
372 };
373 u32 tf_flags;
374 int data_phase;
375 struct request *rq; /* copy of request */
376 void *special; /* valid_t generally */
377 } ide_task_t;
378
379 /* ATAPI packet command flags */
380 enum {
381 /* set when an error is considered normal - no retry (ide-tape) */
382 PC_FLAG_ABORT = (1 << 0),
383 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
384 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
385 PC_FLAG_DMA_OK = (1 << 3),
386 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
387 PC_FLAG_DMA_ERROR = (1 << 5),
388 PC_FLAG_WRITING = (1 << 6),
389 /* command timed out */
390 PC_FLAG_TIMEDOUT = (1 << 7),
391 };
392
393 /*
394 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
395 * This is used for several packet commands (not for READ/WRITE commands).
396 */
397 #define IDE_PC_BUFFER_SIZE 256
398 #define ATAPI_WAIT_PC (60 * HZ)
399
400 struct ide_atapi_pc {
401 /* actual packet bytes */
402 u8 c[12];
403 /* incremented on each retry */
404 int retries;
405 int error;
406
407 /* bytes to transfer */
408 int req_xfer;
409 /* bytes actually transferred */
410 int xferred;
411
412 /* data buffer */
413 u8 *buf;
414 /* current buffer position */
415 u8 *cur_pos;
416 int buf_size;
417 /* missing/available data on the current buffer */
418 int b_count;
419
420 /* the corresponding request */
421 struct request *rq;
422
423 unsigned long flags;
424
425 /*
426 * those are more or less driver-specific and some of them are subject
427 * to change/removal later.
428 */
429 u8 pc_buf[IDE_PC_BUFFER_SIZE];
430
431 /* idetape only */
432 struct idetape_bh *bh;
433 char *b_data;
434
435 /* idescsi only for now */
436 struct scatterlist *sg;
437 unsigned int sg_cnt;
438
439 struct scsi_cmnd *scsi_cmd;
440 void (*done) (struct scsi_cmnd *);
441
442 unsigned long timeout;
443 };
444
445 struct ide_devset;
446 struct ide_driver_s;
447
448 #ifdef CONFIG_BLK_DEV_IDEACPI
449 struct ide_acpi_drive_link;
450 struct ide_acpi_hwif_link;
451 #endif
452
453 struct ide_drive_s;
454
455 struct ide_disk_ops {
456 int (*check)(struct ide_drive_s *, const char *);
457 int (*get_capacity)(struct ide_drive_s *);
458 void (*setup)(struct ide_drive_s *);
459 void (*flush)(struct ide_drive_s *);
460 int (*init_media)(struct ide_drive_s *, struct gendisk *);
461 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
462 int);
463 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
464 sector_t);
465 int (*end_request)(struct ide_drive_s *, int, int);
466 int (*ioctl)(struct ide_drive_s *, struct block_device *,
467 fmode_t, unsigned int, unsigned long);
468 };
469
470 /* ATAPI device flags */
471 enum {
472 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
473
474 /* ide-cd */
475 /* Drive cannot eject the disc. */
476 IDE_AFLAG_NO_EJECT = (1 << 1),
477 /* Drive is a pre ATAPI 1.2 drive. */
478 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
479 /* TOC addresses are in BCD. */
480 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
481 /* TOC track numbers are in BCD. */
482 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
483 /*
484 * Drive does not provide data in multiples of SECTOR_SIZE
485 * when more than one interrupt is needed.
486 */
487 IDE_AFLAG_LIMIT_NFRAMES = (1 << 5),
488 /* Saved TOC information is current. */
489 IDE_AFLAG_TOC_VALID = (1 << 6),
490 /* We think that the drive door is locked. */
491 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
492 /* SET_CD_SPEED command is unsupported. */
493 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
494 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
495 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
496 IDE_AFLAG_SANYO_3CD = (1 << 11),
497 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
498 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
499 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
500
501 /* ide-floppy */
502 /* Avoid commands not supported in Clik drive */
503 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
504 /* Requires BH algorithm for packets */
505 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
506 /* Supports format progress report */
507 IDE_AFLAG_SRFP = (1 << 17),
508
509 /* ide-tape */
510 IDE_AFLAG_IGNORE_DSC = (1 << 18),
511 /* 0 When the tape position is unknown */
512 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
513 /* Device already opened */
514 IDE_AFLAG_BUSY = (1 << 20),
515 /* Attempt to auto-detect the current user block size */
516 IDE_AFLAG_DETECT_BS = (1 << 21),
517 /* Currently on a filemark */
518 IDE_AFLAG_FILEMARK = (1 << 22),
519 /* 0 = no tape is loaded, so we don't rewind after ejecting */
520 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
521
522 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
523 };
524
525 /* device flags */
526 enum {
527 /* restore settings after device reset */
528 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
529 /* device is using DMA for read/write */
530 IDE_DFLAG_USING_DMA = (1 << 1),
531 /* okay to unmask other IRQs */
532 IDE_DFLAG_UNMASK = (1 << 2),
533 /* don't attempt flushes */
534 IDE_DFLAG_NOFLUSH = (1 << 3),
535 /* DSC overlap */
536 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
537 /* give potential excess bandwidth */
538 IDE_DFLAG_NICE1 = (1 << 5),
539 /* device is physically present */
540 IDE_DFLAG_PRESENT = (1 << 6),
541 /* device ejected hint */
542 IDE_DFLAG_DEAD = (1 << 7),
543 /* id read from device (synthetic if not set) */
544 IDE_DFLAG_ID_READ = (1 << 8),
545 IDE_DFLAG_NOPROBE = (1 << 9),
546 /* need to do check_media_change() */
547 IDE_DFLAG_REMOVABLE = (1 << 10),
548 /* needed for removable devices */
549 IDE_DFLAG_ATTACH = (1 << 11),
550 IDE_DFLAG_FORCED_GEOM = (1 << 12),
551 /* disallow setting unmask bit */
552 IDE_DFLAG_NO_UNMASK = (1 << 13),
553 /* disallow enabling 32-bit I/O */
554 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
555 /* for removable only: door lock/unlock works */
556 IDE_DFLAG_DOORLOCKING = (1 << 15),
557 /* disallow DMA */
558 IDE_DFLAG_NODMA = (1 << 16),
559 /* powermanagment told us not to do anything, so sleep nicely */
560 IDE_DFLAG_BLOCKED = (1 << 17),
561 /* sleeping & sleep field valid */
562 IDE_DFLAG_SLEEPING = (1 << 18),
563 IDE_DFLAG_POST_RESET = (1 << 19),
564 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
565 IDE_DFLAG_LBA48 = (1 << 21),
566 /* status of write cache */
567 IDE_DFLAG_WCACHE = (1 << 22),
568 /* used for ignoring ATA_DF */
569 IDE_DFLAG_NOWERR = (1 << 23),
570 /* retrying in PIO */
571 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
572 IDE_DFLAG_LBA = (1 << 25),
573 /* don't unload heads */
574 IDE_DFLAG_NO_UNLOAD = (1 << 26),
575 /* heads unloaded, please don't reset port */
576 IDE_DFLAG_PARKED = (1 << 27),
577 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
578 /* write protect */
579 IDE_DFLAG_WP = (1 << 29),
580 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
581 };
582
583 struct ide_drive_s {
584 char name[4]; /* drive name, such as "hda" */
585 char driver_req[10]; /* requests specific driver */
586
587 struct request_queue *queue; /* request queue */
588
589 struct request *rq; /* current request */
590 void *driver_data; /* extra driver data */
591 u16 *id; /* identification info */
592 #ifdef CONFIG_IDE_PROC_FS
593 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
594 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
595 #endif
596 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
597
598 const struct ide_disk_ops *disk_ops;
599
600 unsigned long dev_flags;
601
602 unsigned long sleep; /* sleep until this time */
603 unsigned long timeout; /* max time to wait for irq */
604
605 special_t special; /* special action flags */
606
607 u8 select; /* basic drive/head select reg value */
608 u8 retry_pio; /* retrying dma capable host in pio */
609 u8 waiting_for_dma; /* dma currently in progress */
610 u8 dma; /* atapi dma flag */
611
612 u8 quirk_list; /* considered quirky, set for a specific host */
613 u8 init_speed; /* transfer rate set at boot */
614 u8 current_speed; /* current transfer rate set */
615 u8 desired_speed; /* desired transfer rate set */
616 u8 dn; /* now wide spread use */
617 u8 acoustic; /* acoustic management */
618 u8 media; /* disk, cdrom, tape, floppy, ... */
619 u8 ready_stat; /* min status value for drive ready */
620 u8 mult_count; /* current multiple sector setting */
621 u8 mult_req; /* requested multiple sector setting */
622 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
623 u8 bad_wstat; /* used for ignoring ATA_DF */
624 u8 head; /* "real" number of heads */
625 u8 sect; /* "real" sectors per track */
626 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
627 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
628
629 /* delay this long before sending packet command */
630 u8 pc_delay;
631
632 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
633 unsigned int cyl; /* "real" number of cyls */
634 unsigned int drive_data; /* used by set_pio_mode/selectproc */
635 unsigned int failures; /* current failure count */
636 unsigned int max_failures; /* maximum allowed failure count */
637 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
638
639 u64 capacity64; /* total number of sectors */
640
641 int lun; /* logical unit */
642 int crc_count; /* crc counter to reduce drive speed */
643
644 unsigned long debug_mask; /* debugging levels switch */
645
646 #ifdef CONFIG_BLK_DEV_IDEACPI
647 struct ide_acpi_drive_link *acpidata;
648 #endif
649 struct list_head list;
650 struct device gendev;
651 struct completion gendev_rel_comp; /* to deal with device release() */
652
653 /* current packet command */
654 struct ide_atapi_pc *pc;
655
656 /* callback for packet commands */
657 void (*pc_callback)(struct ide_drive_s *, int);
658
659 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
660 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
661 unsigned int, int);
662
663 unsigned long atapi_flags;
664
665 struct ide_atapi_pc request_sense_pc;
666 struct request request_sense_rq;
667 };
668
669 typedef struct ide_drive_s ide_drive_t;
670
671 #define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
672
673 #define to_ide_drv(obj, cont_type) \
674 container_of(obj, struct cont_type, kref)
675
676 #define ide_drv_g(disk, cont_type) \
677 container_of((disk)->private_data, struct cont_type, driver)
678
679 struct ide_port_info;
680
681 struct ide_tp_ops {
682 void (*exec_command)(struct hwif_s *, u8);
683 u8 (*read_status)(struct hwif_s *);
684 u8 (*read_altstatus)(struct hwif_s *);
685 u8 (*read_sff_dma_status)(struct hwif_s *);
686
687 void (*set_irq)(struct hwif_s *, int);
688
689 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
690 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
691
692 void (*input_data)(ide_drive_t *, struct request *, void *,
693 unsigned int);
694 void (*output_data)(ide_drive_t *, struct request *, void *,
695 unsigned int);
696 };
697
698 extern const struct ide_tp_ops default_tp_ops;
699
700 /**
701 * struct ide_port_ops - IDE port operations
702 *
703 * @init_dev: host specific initialization of a device
704 * @set_pio_mode: routine to program host for PIO mode
705 * @set_dma_mode: routine to program host for DMA mode
706 * @selectproc: tweaks hardware to select drive
707 * @reset_poll: chipset polling based on hba specifics
708 * @pre_reset: chipset specific changes to default for device-hba resets
709 * @resetproc: routine to reset controller after a disk reset
710 * @maskproc: special host masking for drive selection
711 * @quirkproc: check host's drive quirk list
712 * @clear_irq: clear IRQ
713 *
714 * @mdma_filter: filter MDMA modes
715 * @udma_filter: filter UDMA modes
716 *
717 * @cable_detect: detect cable type
718 */
719 struct ide_port_ops {
720 void (*init_dev)(ide_drive_t *);
721 void (*set_pio_mode)(ide_drive_t *, const u8);
722 void (*set_dma_mode)(ide_drive_t *, const u8);
723 void (*selectproc)(ide_drive_t *);
724 int (*reset_poll)(ide_drive_t *);
725 void (*pre_reset)(ide_drive_t *);
726 void (*resetproc)(ide_drive_t *);
727 void (*maskproc)(ide_drive_t *, int);
728 void (*quirkproc)(ide_drive_t *);
729 void (*clear_irq)(ide_drive_t *);
730
731 u8 (*mdma_filter)(ide_drive_t *);
732 u8 (*udma_filter)(ide_drive_t *);
733
734 u8 (*cable_detect)(struct hwif_s *);
735 };
736
737 struct ide_dma_ops {
738 void (*dma_host_set)(struct ide_drive_s *, int);
739 int (*dma_setup)(struct ide_drive_s *);
740 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
741 void (*dma_start)(struct ide_drive_s *);
742 int (*dma_end)(struct ide_drive_s *);
743 int (*dma_test_irq)(struct ide_drive_s *);
744 void (*dma_lost_irq)(struct ide_drive_s *);
745 void (*dma_timeout)(struct ide_drive_s *);
746 };
747
748 struct ide_host;
749
750 typedef struct hwif_s {
751 struct hwif_s *mate; /* other hwif from same PCI chip */
752 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
753
754 struct ide_host *host;
755
756 char name[6]; /* name of interface, eg. "ide0" */
757
758 struct ide_io_ports io_ports;
759
760 unsigned long sata_scr[SATA_NR_PORTS];
761
762 ide_drive_t drives[MAX_DRIVES]; /* drive info */
763
764 u8 major; /* our major number */
765 u8 index; /* 0 for ide0; 1 for ide1; ... */
766 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
767
768 u32 host_flags;
769
770 u8 pio_mask;
771
772 u8 ultra_mask;
773 u8 mwdma_mask;
774 u8 swdma_mask;
775
776 u8 cbl; /* cable type */
777
778 hwif_chipset_t chipset; /* sub-module for tuning.. */
779
780 struct device *dev;
781
782 ide_ack_intr_t *ack_intr;
783
784 void (*rw_disk)(ide_drive_t *, struct request *);
785
786 const struct ide_tp_ops *tp_ops;
787 const struct ide_port_ops *port_ops;
788 const struct ide_dma_ops *dma_ops;
789
790 /* dma physical region descriptor table (cpu view) */
791 unsigned int *dmatable_cpu;
792 /* dma physical region descriptor table (dma view) */
793 dma_addr_t dmatable_dma;
794
795 /* maximum number of PRD table entries */
796 int prd_max_nents;
797 /* PRD entry size in bytes */
798 int prd_ent_size;
799
800 /* Scatter-gather list used to build the above */
801 struct scatterlist *sg_table;
802 int sg_max_nents; /* Maximum number of entries in it */
803 int sg_nents; /* Current number of entries in it */
804 int sg_dma_direction; /* dma transfer direction */
805
806 /* data phase of the active command (currently only valid for PIO/DMA) */
807 int data_phase;
808
809 struct ide_task_s task; /* current command */
810
811 unsigned int nsect;
812 unsigned int nleft;
813 struct scatterlist *cursg;
814 unsigned int cursg_ofs;
815
816 int rqsize; /* max sectors per request */
817 int irq; /* our irq number */
818
819 unsigned long dma_base; /* base addr for dma ports */
820
821 unsigned long config_data; /* for use by chipset-specific code */
822 unsigned long select_data; /* for use by chipset-specific code */
823
824 unsigned long extra_base; /* extra addr for dma ports */
825 unsigned extra_ports; /* number of extra dma ports */
826
827 unsigned present : 1; /* this interface exists */
828 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
829 unsigned busy : 1; /* serializes devices on a port */
830
831 struct device gendev;
832 struct device *portdev;
833
834 struct completion gendev_rel_comp; /* To deal with device release() */
835
836 void *hwif_data; /* extra hwif data */
837
838 #ifdef CONFIG_BLK_DEV_IDEACPI
839 struct ide_acpi_hwif_link *acpidata;
840 #endif
841
842 /* IRQ handler, if active */
843 ide_startstop_t (*handler)(ide_drive_t *);
844
845 /* BOOL: polling active & poll_timeout field valid */
846 unsigned int polling : 1;
847
848 /* current drive */
849 ide_drive_t *cur_dev;
850
851 /* current request */
852 struct request *rq;
853
854 /* failsafe timer */
855 struct timer_list timer;
856 /* timeout value during long polls */
857 unsigned long poll_timeout;
858 /* queried upon timeouts */
859 int (*expiry)(ide_drive_t *);
860
861 int req_gen;
862 int req_gen_timer;
863
864 spinlock_t lock;
865 } ____cacheline_internodealigned_in_smp ide_hwif_t;
866
867 #define MAX_HOST_PORTS 4
868
869 struct ide_host {
870 ide_hwif_t *ports[MAX_HOST_PORTS];
871 unsigned int n_ports;
872 struct device *dev[2];
873 unsigned int (*init_chipset)(struct pci_dev *);
874 unsigned long host_flags;
875 void *host_priv;
876 ide_hwif_t *cur_port; /* for hosts requiring serialization */
877
878 /* used for hosts requiring serialization */
879 volatile long host_busy;
880 };
881
882 #define IDE_HOST_BUSY 0
883
884 /*
885 * internal ide interrupt handler type
886 */
887 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
888 typedef int (ide_expiry_t)(ide_drive_t *);
889
890 /* used by ide-cd, ide-floppy, etc. */
891 typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
892
893 typedef struct ide_driver_s ide_driver_t;
894
895 extern struct mutex ide_setting_mtx;
896
897 /*
898 * configurable drive settings
899 */
900
901 #define DS_SYNC (1 << 0)
902
903 struct ide_devset {
904 int (*get)(ide_drive_t *);
905 int (*set)(ide_drive_t *, int);
906 unsigned int flags;
907 };
908
909 #define __DEVSET(_flags, _get, _set) { \
910 .flags = _flags, \
911 .get = _get, \
912 .set = _set, \
913 }
914
915 #define ide_devset_get(name, field) \
916 static int get_##name(ide_drive_t *drive) \
917 { \
918 return drive->field; \
919 }
920
921 #define ide_devset_set(name, field) \
922 static int set_##name(ide_drive_t *drive, int arg) \
923 { \
924 drive->field = arg; \
925 return 0; \
926 }
927
928 #define ide_devset_get_flag(name, flag) \
929 static int get_##name(ide_drive_t *drive) \
930 { \
931 return !!(drive->dev_flags & flag); \
932 }
933
934 #define ide_devset_set_flag(name, flag) \
935 static int set_##name(ide_drive_t *drive, int arg) \
936 { \
937 if (arg) \
938 drive->dev_flags |= flag; \
939 else \
940 drive->dev_flags &= ~flag; \
941 return 0; \
942 }
943
944 #define __IDE_DEVSET(_name, _flags, _get, _set) \
945 const struct ide_devset ide_devset_##_name = \
946 __DEVSET(_flags, _get, _set)
947
948 #define IDE_DEVSET(_name, _flags, _get, _set) \
949 static __IDE_DEVSET(_name, _flags, _get, _set)
950
951 #define ide_devset_rw(_name, _func) \
952 IDE_DEVSET(_name, 0, get_##_func, set_##_func)
953
954 #define ide_devset_w(_name, _func) \
955 IDE_DEVSET(_name, 0, NULL, set_##_func)
956
957 #define ide_ext_devset_rw(_name, _func) \
958 __IDE_DEVSET(_name, 0, get_##_func, set_##_func)
959
960 #define ide_ext_devset_rw_sync(_name, _func) \
961 __IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
962
963 #define ide_decl_devset(_name) \
964 extern const struct ide_devset ide_devset_##_name
965
966 ide_decl_devset(io_32bit);
967 ide_decl_devset(keepsettings);
968 ide_decl_devset(pio_mode);
969 ide_decl_devset(unmaskirq);
970 ide_decl_devset(using_dma);
971
972 #ifdef CONFIG_IDE_PROC_FS
973 /*
974 * /proc/ide interface
975 */
976
977 #define ide_devset_rw_field(_name, _field) \
978 ide_devset_get(_name, _field); \
979 ide_devset_set(_name, _field); \
980 IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
981
982 #define ide_devset_rw_flag(_name, _field) \
983 ide_devset_get_flag(_name, _field); \
984 ide_devset_set_flag(_name, _field); \
985 IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
986
987 struct ide_proc_devset {
988 const char *name;
989 const struct ide_devset *setting;
990 int min, max;
991 int (*mulf)(ide_drive_t *);
992 int (*divf)(ide_drive_t *);
993 };
994
995 #define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
996 .name = __stringify(_name), \
997 .setting = &ide_devset_##_name, \
998 .min = _min, \
999 .max = _max, \
1000 .mulf = _mulf, \
1001 .divf = _divf, \
1002 }
1003
1004 #define IDE_PROC_DEVSET(_name, _min, _max) \
1005 __IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
1006
1007 typedef struct {
1008 const char *name;
1009 mode_t mode;
1010 read_proc_t *read_proc;
1011 write_proc_t *write_proc;
1012 } ide_proc_entry_t;
1013
1014 void proc_ide_create(void);
1015 void proc_ide_destroy(void);
1016 void ide_proc_register_port(ide_hwif_t *);
1017 void ide_proc_port_register_devices(ide_hwif_t *);
1018 void ide_proc_unregister_device(ide_drive_t *);
1019 void ide_proc_unregister_port(ide_hwif_t *);
1020 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
1021 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
1022
1023 read_proc_t proc_ide_read_capacity;
1024 read_proc_t proc_ide_read_geometry;
1025
1026 /*
1027 * Standard exit stuff:
1028 */
1029 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
1030 { \
1031 len -= off; \
1032 if (len < count) { \
1033 *eof = 1; \
1034 if (len <= 0) \
1035 return 0; \
1036 } else \
1037 len = count; \
1038 *start = page + off; \
1039 return len; \
1040 }
1041 #else
1042 static inline void proc_ide_create(void) { ; }
1043 static inline void proc_ide_destroy(void) { ; }
1044 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
1045 static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
1046 static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
1047 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
1048 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
1049 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
1050 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
1051 #endif
1052
1053 enum {
1054 /* enter/exit functions */
1055 IDE_DBG_FUNC = (1 << 0),
1056 /* sense key/asc handling */
1057 IDE_DBG_SENSE = (1 << 1),
1058 /* packet commands handling */
1059 IDE_DBG_PC = (1 << 2),
1060 /* request handling */
1061 IDE_DBG_RQ = (1 << 3),
1062 /* driver probing/setup */
1063 IDE_DBG_PROBE = (1 << 4),
1064 };
1065
1066 /* DRV_NAME has to be defined in the driver before using the macro below */
1067 #define __ide_debug_log(lvl, fmt, args...) \
1068 { \
1069 if (unlikely(drive->debug_mask & lvl)) \
1070 printk(KERN_INFO DRV_NAME ": " fmt, ## args); \
1071 }
1072
1073 /*
1074 * Power Management state machine (rq->pm->pm_step).
1075 *
1076 * For each step, the core calls ide_start_power_step() first.
1077 * This can return:
1078 * - ide_stopped : In this case, the core calls us back again unless
1079 * step have been set to ide_power_state_completed.
1080 * - ide_started : In this case, the channel is left busy until an
1081 * async event (interrupt) occurs.
1082 * Typically, ide_start_power_step() will issue a taskfile request with
1083 * do_rw_taskfile().
1084 *
1085 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1086 * with the error code if any. This routine should update the step value
1087 * and return. It should not start a new request. The core will call
1088 * ide_start_power_step() for the new step value, unless step have been
1089 * set to IDE_PM_COMPLETED.
1090 */
1091 enum {
1092 IDE_PM_START_SUSPEND,
1093 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1094 IDE_PM_STANDBY,
1095
1096 IDE_PM_START_RESUME,
1097 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1098 IDE_PM_IDLE,
1099 IDE_PM_RESTORE_DMA,
1100
1101 IDE_PM_COMPLETED,
1102 };
1103
1104 int generic_ide_suspend(struct device *, pm_message_t);
1105 int generic_ide_resume(struct device *);
1106
1107 void ide_complete_power_step(ide_drive_t *, struct request *);
1108 ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
1109 void ide_complete_pm_request(ide_drive_t *, struct request *);
1110 void ide_check_pm_state(ide_drive_t *, struct request *);
1111
1112 /*
1113 * Subdrivers support.
1114 *
1115 * The gendriver.owner field should be set to the module owner of this driver.
1116 * The gendriver.name field should be set to the name of this driver
1117 */
1118 struct ide_driver_s {
1119 const char *version;
1120 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1121 int (*end_request)(ide_drive_t *, int, int);
1122 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1123 struct device_driver gen_driver;
1124 int (*probe)(ide_drive_t *);
1125 void (*remove)(ide_drive_t *);
1126 void (*resume)(ide_drive_t *);
1127 void (*shutdown)(ide_drive_t *);
1128 #ifdef CONFIG_IDE_PROC_FS
1129 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1130 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
1131 #endif
1132 };
1133
1134 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1135
1136 int ide_device_get(ide_drive_t *);
1137 void ide_device_put(ide_drive_t *);
1138
1139 struct ide_ioctl_devset {
1140 unsigned int get_ioctl;
1141 unsigned int set_ioctl;
1142 const struct ide_devset *setting;
1143 };
1144
1145 int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1146 unsigned long, const struct ide_ioctl_devset *);
1147
1148 int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1149
1150 extern int ide_vlb_clk;
1151 extern int ide_pci_clk;
1152
1153 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
1154 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1155 int uptodate, int nr_sectors);
1156
1157 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1158
1159 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1160 ide_expiry_t *);
1161
1162 void ide_execute_pkt_cmd(ide_drive_t *);
1163
1164 void ide_pad_transfer(ide_drive_t *, int, int);
1165
1166 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1167
1168 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1169
1170 void ide_fix_driveid(u16 *);
1171
1172 extern void ide_fixstring(u8 *, const int, const int);
1173
1174 int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
1175
1176 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1177
1178 extern ide_startstop_t ide_do_reset (ide_drive_t *);
1179
1180 extern int ide_devset_execute(ide_drive_t *drive,
1181 const struct ide_devset *setting, int arg);
1182
1183 extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
1184
1185 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1186
1187 void ide_tf_dump(const char *, struct ide_taskfile *);
1188
1189 void ide_exec_command(ide_hwif_t *, u8);
1190 u8 ide_read_status(ide_hwif_t *);
1191 u8 ide_read_altstatus(ide_hwif_t *);
1192 u8 ide_read_sff_dma_status(ide_hwif_t *);
1193
1194 void ide_set_irq(ide_hwif_t *, int);
1195
1196 void ide_tf_load(ide_drive_t *, ide_task_t *);
1197 void ide_tf_read(ide_drive_t *, ide_task_t *);
1198
1199 void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int);
1200 void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int);
1201
1202 int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
1203
1204 extern void SELECT_DRIVE(ide_drive_t *);
1205 void SELECT_MASK(ide_drive_t *, int);
1206
1207 u8 ide_read_error(ide_drive_t *);
1208 void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
1209
1210 extern int drive_is_ready(ide_drive_t *);
1211
1212 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
1213
1214 int ide_check_atapi_device(ide_drive_t *, const char *);
1215
1216 void ide_init_pc(struct ide_atapi_pc *);
1217
1218 /* Disk head parking */
1219 extern wait_queue_head_t ide_park_wq;
1220 ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1221 char *buf);
1222 ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1223 const char *buf, size_t len);
1224
1225 /*
1226 * Special requests for ide-tape block device strategy routine.
1227 *
1228 * In order to service a character device command, we add special requests to
1229 * the tail of our block device request queue and wait for their completion.
1230 */
1231 enum {
1232 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1233 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1234 REQ_IDETAPE_READ = (1 << 2),
1235 REQ_IDETAPE_WRITE = (1 << 3),
1236 };
1237
1238 int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
1239
1240 int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
1241 int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
1242 int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
1243 void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1244 void ide_retry_pc(ide_drive_t *, struct gendisk *);
1245
1246 int ide_cd_expiry(ide_drive_t *);
1247
1248 int ide_cd_get_xferlen(struct request *);
1249
1250 ide_startstop_t ide_issue_pc(ide_drive_t *);
1251
1252 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1253
1254 void task_end_request(ide_drive_t *, struct request *, u8);
1255
1256 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
1257 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1258
1259 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1260
1261 extern int ide_driveid_update(ide_drive_t *);
1262 extern int ide_config_drive_speed(ide_drive_t *, u8);
1263 extern u8 eighty_ninty_three (ide_drive_t *);
1264 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1265
1266 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1267
1268 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1269
1270 extern void ide_timer_expiry(unsigned long);
1271 extern irqreturn_t ide_intr(int irq, void *dev_id);
1272 extern void do_ide_request(struct request_queue *);
1273
1274 void ide_init_disk(struct gendisk *, ide_drive_t *);
1275
1276 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1277 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1278 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1279 #else
1280 #define ide_pci_register_driver(d) pci_register_driver(d)
1281 #endif
1282
1283 static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1284 {
1285 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1286 return 1;
1287 return 0;
1288 }
1289
1290 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
1291 hw_regs_t *, hw_regs_t **);
1292 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1293
1294 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1295 int ide_pci_set_master(struct pci_dev *, const char *);
1296 unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
1297 int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
1298 int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1299 #else
1300 static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1301 const struct ide_port_info *d)
1302 {
1303 return -EINVAL;
1304 }
1305 #endif
1306
1307 typedef struct ide_pci_enablebit_s {
1308 u8 reg; /* byte pci reg holding the enable-bit */
1309 u8 mask; /* mask to isolate the enable-bit */
1310 u8 val; /* value of masked reg when "enabled" */
1311 } ide_pci_enablebit_t;
1312
1313 enum {
1314 /* Uses ISA control ports not PCI ones. */
1315 IDE_HFLAG_ISA_PORTS = (1 << 0),
1316 /* single port device */
1317 IDE_HFLAG_SINGLE = (1 << 1),
1318 /* don't use legacy PIO blacklist */
1319 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1320 /* set for the second port of QD65xx */
1321 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
1322 /* use PIO8/9 for prefetch off/on */
1323 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1324 /* use PIO6/7 for fast-devsel off/on */
1325 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1326 /* use 100-102 and 200-202 PIO values to set DMA modes */
1327 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1328 /*
1329 * keep DMA setting when programming PIO mode, may be used only
1330 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1331 */
1332 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1333 /* program host for the transfer mode after programming device */
1334 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1335 /* don't program host/device for the transfer mode ("smart" hosts) */
1336 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1337 /* trust BIOS for programming chipset/device for DMA */
1338 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1339 /* host is CS5510/CS5520 */
1340 IDE_HFLAG_CS5520 = (1 << 11),
1341 /* ATAPI DMA is unsupported */
1342 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1343 /* set if host is a "non-bootable" controller */
1344 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
1345 /* host doesn't support DMA */
1346 IDE_HFLAG_NO_DMA = (1 << 14),
1347 /* check if host is PCI IDE device before allowing DMA */
1348 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1349 /* host uses MMIO */
1350 IDE_HFLAG_MMIO = (1 << 16),
1351 /* no LBA48 */
1352 IDE_HFLAG_NO_LBA48 = (1 << 17),
1353 /* no LBA48 DMA */
1354 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1355 /* data FIFO is cleared by an error */
1356 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1357 /* serialize ports */
1358 IDE_HFLAG_SERIALIZE = (1 << 20),
1359 /* use legacy IRQs */
1360 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1361 /* force use of legacy IRQs */
1362 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1363 /* host is TRM290 */
1364 IDE_HFLAG_TRM290 = (1 << 23),
1365 /* use 32-bit I/O ops */
1366 IDE_HFLAG_IO_32BIT = (1 << 24),
1367 /* unmask IRQs */
1368 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1369 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1370 /* serialize ports if DMA is possible (for sl82c105) */
1371 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
1372 /* force host out of "simplex" mode */
1373 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1374 /* DSC overlap is unsupported */
1375 IDE_HFLAG_NO_DSC = (1 << 29),
1376 /* never use 32-bit I/O ops */
1377 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1378 /* never unmask IRQs */
1379 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1380 };
1381
1382 #ifdef CONFIG_BLK_DEV_OFFBOARD
1383 # define IDE_HFLAG_OFF_BOARD 0
1384 #else
1385 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
1386 #endif
1387
1388 struct ide_port_info {
1389 char *name;
1390 unsigned int (*init_chipset)(struct pci_dev *);
1391 void (*init_iops)(ide_hwif_t *);
1392 void (*init_hwif)(ide_hwif_t *);
1393 int (*init_dma)(ide_hwif_t *,
1394 const struct ide_port_info *);
1395
1396 const struct ide_tp_ops *tp_ops;
1397 const struct ide_port_ops *port_ops;
1398 const struct ide_dma_ops *dma_ops;
1399
1400 ide_pci_enablebit_t enablebits[2];
1401 hwif_chipset_t chipset;
1402
1403 u16 max_sectors; /* if < than the default one */
1404
1405 u32 host_flags;
1406 u8 pio_mask;
1407 u8 swdma_mask;
1408 u8 mwdma_mask;
1409 u8 udma_mask;
1410 };
1411
1412 int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1413 int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1414 const struct ide_port_info *, void *);
1415 void ide_pci_remove(struct pci_dev *);
1416
1417 #ifdef CONFIG_PM
1418 int ide_pci_suspend(struct pci_dev *, pm_message_t);
1419 int ide_pci_resume(struct pci_dev *);
1420 #else
1421 #define ide_pci_suspend NULL
1422 #define ide_pci_resume NULL
1423 #endif
1424
1425 void ide_map_sg(ide_drive_t *, struct request *);
1426 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1427
1428 #define BAD_DMA_DRIVE 0
1429 #define GOOD_DMA_DRIVE 1
1430
1431 struct drive_list_entry {
1432 const char *id_model;
1433 const char *id_firmware;
1434 };
1435
1436 int ide_in_drive_list(u16 *, const struct drive_list_entry *);
1437
1438 #ifdef CONFIG_BLK_DEV_IDEDMA
1439 int ide_dma_good_drive(ide_drive_t *);
1440 int __ide_dma_bad_drive(ide_drive_t *);
1441 int ide_id_dma_bug(ide_drive_t *);
1442
1443 u8 ide_find_dma_mode(ide_drive_t *, u8);
1444
1445 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1446 {
1447 return ide_find_dma_mode(drive, XFER_UDMA_6);
1448 }
1449
1450 void ide_dma_off_quietly(ide_drive_t *);
1451 void ide_dma_off(ide_drive_t *);
1452 void ide_dma_on(ide_drive_t *);
1453 int ide_set_dma(ide_drive_t *);
1454 void ide_check_dma_crc(ide_drive_t *);
1455 ide_startstop_t ide_dma_intr(ide_drive_t *);
1456
1457 int ide_allocate_dma_engine(ide_hwif_t *);
1458 void ide_release_dma_engine(ide_hwif_t *);
1459
1460 int ide_build_sglist(ide_drive_t *, struct request *);
1461 void ide_destroy_dmatable(ide_drive_t *);
1462
1463 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1464 int config_drive_for_dma(ide_drive_t *);
1465 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1466 void ide_dma_host_set(ide_drive_t *, int);
1467 extern int ide_dma_setup(ide_drive_t *);
1468 void ide_dma_exec_cmd(ide_drive_t *, u8);
1469 extern void ide_dma_start(ide_drive_t *);
1470 int ide_dma_end(ide_drive_t *);
1471 int ide_dma_test_irq(ide_drive_t *);
1472 extern const struct ide_dma_ops sff_dma_ops;
1473 #else
1474 static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
1475 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1476
1477 void ide_dma_lost_irq(ide_drive_t *);
1478 void ide_dma_timeout(ide_drive_t *);
1479
1480 #else
1481 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1482 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1483 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1484 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1485 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1486 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1487 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1488 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1489 static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1490 static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1491 #endif /* CONFIG_BLK_DEV_IDEDMA */
1492
1493 #ifdef CONFIG_BLK_DEV_IDEACPI
1494 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1495 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1496 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1497 extern void ide_acpi_init(ide_hwif_t *hwif);
1498 void ide_acpi_port_init_devices(ide_hwif_t *);
1499 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1500 #else
1501 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1502 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1503 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1504 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1505 static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
1506 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1507 #endif
1508
1509 void ide_unregister(ide_hwif_t *);
1510
1511 void ide_register_region(struct gendisk *);
1512 void ide_unregister_region(struct gendisk *);
1513
1514 void ide_undecoded_slave(ide_drive_t *);
1515
1516 void ide_port_apply_params(ide_hwif_t *);
1517 int ide_sysfs_register_port(ide_hwif_t *);
1518
1519 struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
1520 void ide_host_free(struct ide_host *);
1521 int ide_host_register(struct ide_host *, const struct ide_port_info *,
1522 hw_regs_t **);
1523 int ide_host_add(const struct ide_port_info *, hw_regs_t **,
1524 struct ide_host **);
1525 void ide_host_remove(struct ide_host *);
1526 int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
1527 void ide_port_unregister_devices(ide_hwif_t *);
1528 void ide_port_scan(ide_hwif_t *);
1529
1530 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1531 {
1532 return hwif->hwif_data;
1533 }
1534
1535 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1536 {
1537 hwif->hwif_data = data;
1538 }
1539
1540 const char *ide_xfer_verbose(u8 mode);
1541 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1542 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1543
1544 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1545 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1546
1547 struct ide_timing {
1548 u8 mode;
1549 u8 setup; /* t1 */
1550 u16 act8b; /* t2 for 8-bit io */
1551 u16 rec8b; /* t2i for 8-bit io */
1552 u16 cyc8b; /* t0 for 8-bit io */
1553 u16 active; /* t2 or tD */
1554 u16 recover; /* t2i or tK */
1555 u16 cycle; /* t0 */
1556 u16 udma; /* t2CYCTYP/2 */
1557 };
1558
1559 enum {
1560 IDE_TIMING_SETUP = (1 << 0),
1561 IDE_TIMING_ACT8B = (1 << 1),
1562 IDE_TIMING_REC8B = (1 << 2),
1563 IDE_TIMING_CYC8B = (1 << 3),
1564 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1565 IDE_TIMING_CYC8B,
1566 IDE_TIMING_ACTIVE = (1 << 4),
1567 IDE_TIMING_RECOVER = (1 << 5),
1568 IDE_TIMING_CYCLE = (1 << 6),
1569 IDE_TIMING_UDMA = (1 << 7),
1570 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1571 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1572 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1573 };
1574
1575 struct ide_timing *ide_timing_find_mode(u8);
1576 u16 ide_pio_cycle_time(ide_drive_t *, u8);
1577 void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1578 struct ide_timing *, unsigned int);
1579 int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1580
1581 int ide_scan_pio_blacklist(char *);
1582
1583 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1584
1585 int ide_set_pio_mode(ide_drive_t *, u8);
1586 int ide_set_dma_mode(ide_drive_t *, u8);
1587
1588 void ide_set_pio(ide_drive_t *, u8);
1589
1590 static inline void ide_set_max_pio(ide_drive_t *drive)
1591 {
1592 ide_set_pio(drive, 255);
1593 }
1594
1595 extern spinlock_t ide_lock;
1596 extern struct mutex ide_cfg_mtx;
1597
1598 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1599
1600 char *ide_media_string(ide_drive_t *);
1601
1602 extern struct device_attribute ide_dev_attrs[];
1603 extern struct bus_type ide_bus_type;
1604 extern struct class *ide_port_class;
1605
1606 static inline void ide_dump_identify(u8 *id)
1607 {
1608 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1609 }
1610
1611 static inline int hwif_to_node(ide_hwif_t *hwif)
1612 {
1613 return hwif->dev ? dev_to_node(hwif->dev) : -1;
1614 }
1615
1616 static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1617 {
1618 ide_drive_t *peer = &drive->hwif->drives[(drive->dn ^ 1) & 1];
1619
1620 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1621 }
1622 #endif /* _IDE_H */
kernel source for telekom puls (alcatel/mediatek)