include/linux/i2c/twl4030.h

   1 /*
   2  * twl4030.h - header for TWL4030 PM and audio CODEC device
   3  *
   4  * Copyright (C) 2005-2006 Texas Instruments, Inc.
   5  *
   6  * Based on tlv320aic23.c:
   7  * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  22  *
  23  */
  24
  25 #ifndef __TWL4030_H_
  26 #define __TWL4030_H_
  27
  28 #include <linux/types.h>
  29 #include <linux/input/matrix_keypad.h>
  30
  31 /*
  32  * Using the twl4030 core we address registers using a pair
  33  *      { module id, relative register offset }
  34  * which that core then maps to the relevant
  35  *      { i2c slave, absolute register address }
  36  *
  37  * The module IDs are meaningful only to the twl4030 core code,
  38  * which uses them as array indices to look up the first register
  39  * address each module uses within a given i2c slave.
  40  */
  41
  42 /* Slave 0 (i2c address 0x48) */
  43 #define TWL4030_MODULE_USB              0x00
  44
  45 /* Slave 1 (i2c address 0x49) */
  46 #define TWL4030_MODULE_AUDIO_VOICE      0x01
  47 #define TWL4030_MODULE_GPIO             0x02
  48 #define TWL4030_MODULE_INTBR            0x03
  49 #define TWL4030_MODULE_PIH              0x04
  50 #define TWL4030_MODULE_TEST             0x05
  51
  52 /* Slave 2 (i2c address 0x4a) */
  53 #define TWL4030_MODULE_KEYPAD           0x06
  54 #define TWL4030_MODULE_MADC             0x07
  55 #define TWL4030_MODULE_INTERRUPTS       0x08
  56 #define TWL4030_MODULE_LED              0x09
  57 #define TWL4030_MODULE_MAIN_CHARGE      0x0A
  58 #define TWL4030_MODULE_PRECHARGE        0x0B
  59 #define TWL4030_MODULE_PWM0             0x0C
  60 #define TWL4030_MODULE_PWM1             0x0D
  61 #define TWL4030_MODULE_PWMA             0x0E
  62 #define TWL4030_MODULE_PWMB             0x0F
  63
  64 /* Slave 3 (i2c address 0x4b) */
  65 #define TWL4030_MODULE_BACKUP           0x10
  66 #define TWL4030_MODULE_INT              0x11
  67 #define TWL4030_MODULE_PM_MASTER        0x12
  68 #define TWL4030_MODULE_PM_RECEIVER      0x13
  69 #define TWL4030_MODULE_RTC              0x14
  70 #define TWL4030_MODULE_SECURED_REG      0x15
  71
  72 /*
  73  * Read and write single 8-bit registers
  74  */
  75 int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
  76 int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
  77
  78 /*
  79  * Read and write several 8-bit registers at once.
  80  *
  81  * IMPORTANT:  For twl4030_i2c_write(), allocate num_bytes + 1
  82  * for the value, and populate your data starting at offset 1.
  83  */
  84 int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
  85 int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
  86
  87 /*----------------------------------------------------------------------*/
  88
  89 /*
  90  * NOTE:  at up to 1024 registers, this is a big chip.
  91  *
  92  * Avoid putting register declarations in this file, instead of into
  93  * a driver-private file, unless some of the registers in a block
  94  * need to be shared with other drivers.  One example is blocks that
  95  * have Secondary IRQ Handler (SIH) registers.
  96  */
  97
  98 #define TWL4030_SIH_CTRL_EXCLEN_MASK    BIT(0)
  99 #define TWL4030_SIH_CTRL_PENDDIS_MASK   BIT(1)
 100 #define TWL4030_SIH_CTRL_COR_MASK       BIT(2)
 101
 102 /*----------------------------------------------------------------------*/
 103
 104 /*
 105  * GPIO Block Register offsets (use TWL4030_MODULE_GPIO)
 106  */
 107
 108 #define REG_GPIODATAIN1                 0x0
 109 #define REG_GPIODATAIN2                 0x1
 110 #define REG_GPIODATAIN3                 0x2
 111 #define REG_GPIODATADIR1                0x3
 112 #define REG_GPIODATADIR2                0x4
 113 #define REG_GPIODATADIR3                0x5
 114 #define REG_GPIODATAOUT1                0x6
 115 #define REG_GPIODATAOUT2                0x7
 116 #define REG_GPIODATAOUT3                0x8
 117 #define REG_CLEARGPIODATAOUT1           0x9
 118 #define REG_CLEARGPIODATAOUT2           0xA
 119 #define REG_CLEARGPIODATAOUT3           0xB
 120 #define REG_SETGPIODATAOUT1             0xC
 121 #define REG_SETGPIODATAOUT2             0xD
 122 #define REG_SETGPIODATAOUT3             0xE
 123 #define REG_GPIO_DEBEN1                 0xF
 124 #define REG_GPIO_DEBEN2                 0x10
 125 #define REG_GPIO_DEBEN3                 0x11
 126 #define REG_GPIO_CTRL                   0x12
 127 #define REG_GPIOPUPDCTR1                0x13
 128 #define REG_GPIOPUPDCTR2                0x14
 129 #define REG_GPIOPUPDCTR3                0x15
 130 #define REG_GPIOPUPDCTR4                0x16
 131 #define REG_GPIOPUPDCTR5                0x17
 132 #define REG_GPIO_ISR1A                  0x19
 133 #define REG_GPIO_ISR2A                  0x1A
 134 #define REG_GPIO_ISR3A                  0x1B
 135 #define REG_GPIO_IMR1A                  0x1C
 136 #define REG_GPIO_IMR2A                  0x1D
 137 #define REG_GPIO_IMR3A                  0x1E
 138 #define REG_GPIO_ISR1B                  0x1F
 139 #define REG_GPIO_ISR2B                  0x20
 140 #define REG_GPIO_ISR3B                  0x21
 141 #define REG_GPIO_IMR1B                  0x22
 142 #define REG_GPIO_IMR2B                  0x23
 143 #define REG_GPIO_IMR3B                  0x24
 144 #define REG_GPIO_EDR1                   0x28
 145 #define REG_GPIO_EDR2                   0x29
 146 #define REG_GPIO_EDR3                   0x2A
 147 #define REG_GPIO_EDR4                   0x2B
 148 #define REG_GPIO_EDR5                   0x2C
 149 #define REG_GPIO_SIH_CTRL               0x2D
 150
 151 /* Up to 18 signals are available as GPIOs, when their
 152  * pins are not assigned to another use (such as ULPI/USB).
 153  */
 154 #define TWL4030_GPIO_MAX                18
 155
 156 /*----------------------------------------------------------------------*/
 157
 158 /*
 159  * Keypad register offsets (use TWL4030_MODULE_KEYPAD)
 160  * ... SIH/interrupt only
 161  */
 162
 163 #define TWL4030_KEYPAD_KEYP_ISR1        0x11
 164 #define TWL4030_KEYPAD_KEYP_IMR1        0x12
 165 #define TWL4030_KEYPAD_KEYP_ISR2        0x13
 166 #define TWL4030_KEYPAD_KEYP_IMR2        0x14
 167 #define TWL4030_KEYPAD_KEYP_SIR         0x15    /* test register */
 168 #define TWL4030_KEYPAD_KEYP_EDR         0x16
 169 #define TWL4030_KEYPAD_KEYP_SIH_CTRL    0x17
 170
 171 /*----------------------------------------------------------------------*/
 172
 173 /*
 174  * Multichannel ADC register offsets (use TWL4030_MODULE_MADC)
 175  * ... SIH/interrupt only
 176  */
 177
 178 #define TWL4030_MADC_ISR1               0x61
 179 #define TWL4030_MADC_IMR1               0x62
 180 #define TWL4030_MADC_ISR2               0x63
 181 #define TWL4030_MADC_IMR2               0x64
 182 #define TWL4030_MADC_SIR                0x65    /* test register */
 183 #define TWL4030_MADC_EDR                0x66
 184 #define TWL4030_MADC_SIH_CTRL           0x67
 185
 186 /*----------------------------------------------------------------------*/
 187
 188 /*
 189  * Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS)
 190  */
 191
 192 #define TWL4030_INTERRUPTS_BCIISR1A     0x0
 193 #define TWL4030_INTERRUPTS_BCIISR2A     0x1
 194 #define TWL4030_INTERRUPTS_BCIIMR1A     0x2
 195 #define TWL4030_INTERRUPTS_BCIIMR2A     0x3
 196 #define TWL4030_INTERRUPTS_BCIISR1B     0x4
 197 #define TWL4030_INTERRUPTS_BCIISR2B     0x5
 198 #define TWL4030_INTERRUPTS_BCIIMR1B     0x6
 199 #define TWL4030_INTERRUPTS_BCIIMR2B     0x7
 200 #define TWL4030_INTERRUPTS_BCISIR1      0x8     /* test register */
 201 #define TWL4030_INTERRUPTS_BCISIR2      0x9     /* test register */
 202 #define TWL4030_INTERRUPTS_BCIEDR1      0xa
 203 #define TWL4030_INTERRUPTS_BCIEDR2      0xb
 204 #define TWL4030_INTERRUPTS_BCIEDR3      0xc
 205 #define TWL4030_INTERRUPTS_BCISIHCTRL   0xd
 206
 207 /*----------------------------------------------------------------------*/
 208
 209 /*
 210  * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
 211  */
 212
 213 #define TWL4030_INT_PWR_ISR1            0x0
 214 #define TWL4030_INT_PWR_IMR1            0x1
 215 #define TWL4030_INT_PWR_ISR2            0x2
 216 #define TWL4030_INT_PWR_IMR2            0x3
 217 #define TWL4030_INT_PWR_SIR             0x4     /* test register */
 218 #define TWL4030_INT_PWR_EDR1            0x5
 219 #define TWL4030_INT_PWR_EDR2            0x6
 220 #define TWL4030_INT_PWR_SIH_CTRL        0x7
 221
 222 /*----------------------------------------------------------------------*/
 223
 224 /* Power bus message definitions */
 225
 226 #define DEV_GRP_NULL            0x0
 227 #define DEV_GRP_P1              0x1
 228 #define DEV_GRP_P2              0x2
 229 #define DEV_GRP_P3              0x4
 230
 231 #define RES_GRP_RES             0x0
 232 #define RES_GRP_PP              0x1
 233 #define RES_GRP_RC              0x2
 234 #define RES_GRP_PP_RC           0x3
 235 #define RES_GRP_PR              0x4
 236 #define RES_GRP_PP_PR           0x5
 237 #define RES_GRP_RC_PR           0x6
 238 #define RES_GRP_ALL             0x7
 239
 240 #define RES_TYPE2_R0            0x0
 241
 242 #define RES_TYPE_ALL            0x7
 243
 244 #define RES_STATE_WRST          0xF
 245 #define RES_STATE_ACTIVE        0xE
 246 #define RES_STATE_SLEEP         0x8
 247 #define RES_STATE_OFF           0x0
 248
 249 /*
 250  * Power Bus Message Format ... these can be sent individually by Linux,
 251  * but are usually part of downloaded scripts that are run when various
 252  * power events are triggered.
 253  *
 254  *  Broadcast Message (16 Bits):
 255  *    DEV_GRP[15:13] MT[12]  RES_GRP[11:9]  RES_TYPE2[8:7] RES_TYPE[6:4]
 256  *    RES_STATE[3:0]
 257  *
 258  *  Singular Message (16 Bits):
 259  *    DEV_GRP[15:13] MT[12]  RES_ID[11:4]  RES_STATE[3:0]
 260  */
 261
 262 #define MSG_BROADCAST(devgrp, grp, type, type2, state) \
 263         ( (devgrp) << 13 | 1 << 12 | (grp) << 9 | (type2) << 7 \
 264         | (type) << 4 | (state))
 265
 266 #define MSG_SINGULAR(devgrp, id, state) \
 267         ((devgrp) << 13 | 0 << 12 | (id) << 4 | (state))
 268
 269 /*----------------------------------------------------------------------*/
 270
 271 struct twl4030_bci_platform_data {
 272         int *battery_tmp_tbl;
 273         unsigned int tblsize;
 274 };
 275
 276 /* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
 277 struct twl4030_gpio_platform_data {
 278         int             gpio_base;
 279         unsigned        irq_base, irq_end;
 280
 281         /* package the two LED signals as output-only GPIOs? */
 282         bool            use_leds;
 283
 284         /* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
 285         u8              mmc_cd;
 286
 287         /* if BIT(N) is set, or VMMC(n+1) is linked, debounce GPIO-N */
 288         u32             debounce;
 289
 290         /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
 291          * should be enabled.  Else, if that bit is set in "pulldowns",
 292          * that pulldown is enabled.  Don't waste power by letting any
 293          * digital inputs float...
 294          */
 295         u32             pullups;
 296         u32             pulldowns;
 297
 298         int             (*setup)(struct device *dev,
 299                                 unsigned gpio, unsigned ngpio);
 300         int             (*teardown)(struct device *dev,
 301                                 unsigned gpio, unsigned ngpio);
 302 };
 303
 304 struct twl4030_madc_platform_data {
 305         int             irq_line;
 306 };
 307
 308 /* Boards have uniqe mappings of {row, col} --> keycode.
 309  * Column and row are 8 bits each, but range only from 0..7.
 310  * a PERSISTENT_KEY is "always on" and never reported.
 311  */
 312 #define PERSISTENT_KEY(r, c)    KEY((r), (c), KEY_RESERVED)
 313
 314 struct twl4030_keypad_data {
 315         const struct matrix_keymap_data *keymap_data;
 316         unsigned rows;
 317         unsigned cols;
 318         bool rep;
 319 };
 320
 321 enum twl4030_usb_mode {
 322         T2_USB_MODE_ULPI = 1,
 323         T2_USB_MODE_CEA2011_3PIN = 2,
 324 };
 325
 326 struct twl4030_usb_data {
 327         enum twl4030_usb_mode   usb_mode;
 328 };
 329
 330 struct twl4030_platform_data {
 331         unsigned                                irq_base, irq_end;
 332         struct twl4030_bci_platform_data        *bci;
 333         struct twl4030_gpio_platform_data       *gpio;
 334         struct twl4030_madc_platform_data       *madc;
 335         struct twl4030_keypad_data              *keypad;
 336         struct twl4030_usb_data                 *usb;
 337
 338         /* LDO regulators */
 339         struct regulator_init_data              *vdac;
 340         struct regulator_init_data              *vpll1;
 341         struct regulator_init_data              *vpll2;
 342         struct regulator_init_data              *vmmc1;
 343         struct regulator_init_data              *vmmc2;
 344         struct regulator_init_data              *vsim;
 345         struct regulator_init_data              *vaux1;
 346         struct regulator_init_data              *vaux2;
 347         struct regulator_init_data              *vaux3;
 348         struct regulator_init_data              *vaux4;
 349
 350         /* REVISIT more to come ... _nothing_ should be hard-wired */
 351 };
 352
 353 /*----------------------------------------------------------------------*/
 354
 355 int twl4030_sih_setup(int module);
 356
 357 /* Offsets to Power Registers */
 358 #define TWL4030_VDAC_DEV_GRP            0x3B
 359 #define TWL4030_VDAC_DEDICATED          0x3E
 360 #define TWL4030_VAUX1_DEV_GRP           0x17
 361 #define TWL4030_VAUX1_DEDICATED         0x1A
 362 #define TWL4030_VAUX2_DEV_GRP           0x1B
 363 #define TWL4030_VAUX2_DEDICATED         0x1E
 364 #define TWL4030_VAUX3_DEV_GRP           0x1F
 365 #define TWL4030_VAUX3_DEDICATED         0x22
 366
 367
 368 #if defined(CONFIG_TWL4030_BCI_BATTERY) || \
 369         defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
 370         extern int twl4030charger_usb_en(int enable);
 371 #else
 372         static inline int twl4030charger_usb_en(int enable) { return 0; }
 373 #endif
 374
 375 /*----------------------------------------------------------------------*/
 376
 377 /* Linux-specific regulator identifiers ... for now, we only support
 378  * the LDOs, and leave the three buck converters alone.  VDD1 and VDD2
 379  * need to tie into hardware based voltage scaling (cpufreq etc), while
 380  * VIO is generally fixed.
 381  */
 382
 383 /* EXTERNAL dc-to-dc buck converters */
 384 #define TWL4030_REG_VDD1        0
 385 #define TWL4030_REG_VDD2        1
 386 #define TWL4030_REG_VIO         2
 387
 388 /* EXTERNAL LDOs */
 389 #define TWL4030_REG_VDAC        3
 390 #define TWL4030_REG_VPLL1       4
 391 #define TWL4030_REG_VPLL2       5       /* not on all chips */
 392 #define TWL4030_REG_VMMC1       6
 393 #define TWL4030_REG_VMMC2       7       /* not on all chips */
 394 #define TWL4030_REG_VSIM        8       /* not on all chips */
 395 #define TWL4030_REG_VAUX1       9       /* not on all chips */
 396 #define TWL4030_REG_VAUX2_4030  10      /* (twl4030-specific) */
 397 #define TWL4030_REG_VAUX2       11      /* (twl5030 and newer) */
 398 #define TWL4030_REG_VAUX3       12      /* not on all chips */
 399 #define TWL4030_REG_VAUX4       13      /* not on all chips */
 400
 401 /* INTERNAL LDOs */
 402 #define TWL4030_REG_VINTANA1    14
 403 #define TWL4030_REG_VINTANA2    15
 404 #define TWL4030_REG_VINTDIG     16
 405 #define TWL4030_REG_VUSB1V5     17
 406 #define TWL4030_REG_VUSB1V8     18
 407 #define TWL4030_REG_VUSB3V1     19
 408
 409 #endif /* End of __TWL4030_H */