1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl
;
46 int shared_kernel_pmd
;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch
)(u8 type
, u16 clobber
, void *insnbuf
,
61 unsigned long addr
, unsigned len
);
63 /* Basic arch-specific setup */
64 void (*arch_setup
)(void);
65 char *(*memory_setup
)(void);
66 void (*post_allocator_init
)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init
)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock
)(void);
84 int (*set_wallclock
)(unsigned long);
86 unsigned long long (*sched_clock
)(void);
87 unsigned long (*get_tsc_khz
)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg
)(int regno
);
93 void (*set_debugreg
)(int regno
, unsigned long value
);
97 unsigned long (*read_cr0
)(void);
98 void (*write_cr0
)(unsigned long);
100 unsigned long (*read_cr4_safe
)(void);
101 unsigned long (*read_cr4
)(void);
102 void (*write_cr4
)(unsigned long);
105 unsigned long (*read_cr8
)(void);
106 void (*write_cr8
)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc
)(void);
111 void (*load_gdt
)(const struct desc_ptr
*);
112 void (*load_idt
)(const struct desc_ptr
*);
113 void (*store_gdt
)(struct desc_ptr
*);
114 void (*store_idt
)(struct desc_ptr
*);
115 void (*set_ldt
)(const void *desc
, unsigned entries
);
116 unsigned long (*store_tr
)(void);
117 void (*load_tls
)(struct thread_struct
*t
, unsigned int cpu
);
119 void (*load_gs_index
)(unsigned int idx
);
121 void (*write_ldt_entry
)(struct desc_struct
*ldt
, int entrynum
,
123 void (*write_gdt_entry
)(struct desc_struct
*,
124 int entrynum
, const void *desc
, int size
);
125 void (*write_idt_entry
)(gate_desc
*,
126 int entrynum
, const gate_desc
*gate
);
127 void (*load_sp0
)(struct tss_struct
*tss
, struct thread_struct
*t
);
129 void (*set_iopl_mask
)(unsigned mask
);
131 void (*wbinvd
)(void);
132 void (*io_delay
)(void);
134 /* cpuid emulation, mostly so that caps bits can be disabled */
135 void (*cpuid
)(unsigned int *eax
, unsigned int *ebx
,
136 unsigned int *ecx
, unsigned int *edx
);
138 /* MSR, PMC and TSR operations.
139 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
140 u64 (*read_msr
)(unsigned int msr
, int *err
);
141 int (*write_msr
)(unsigned int msr
, unsigned low
, unsigned high
);
143 u64 (*read_tsc
)(void);
144 u64 (*read_pmc
)(int counter
);
145 unsigned long long (*read_tscp
)(unsigned int *aux
);
148 * Atomically enable interrupts and return to userspace. This
149 * is only ever used to return to 32-bit processes; in a
150 * 64-bit kernel, it's used for 32-on-64 compat processes, but
151 * never native 64-bit processes. (Jump, not call.)
153 void (*irq_enable_sysexit
)(void);
156 * Switch to usermode gs and return to 64-bit usermode using
157 * sysret. Only used in 64-bit kernels to return to 64-bit
158 * processes. Usermode register state, including %rsp, must
159 * already be restored.
161 void (*usergs_sysret64
)(void);
164 * Switch to usermode gs and return to 32-bit usermode using
165 * sysret. Used to return to 32-on-64 compat processes.
166 * Other usermode register state, including %esp, must already
169 void (*usergs_sysret32
)(void);
171 /* Normal iret. Jump to this with the standard iret stack
175 void (*swapgs
)(void);
177 struct pv_lazy_ops lazy_mode
;
181 void (*init_IRQ
)(void);
184 * Get/set interrupt state. save_fl and restore_fl are only
185 * expected to use X86_EFLAGS_IF; all other bits
186 * returned from save_fl are undefined, and may be ignored by
189 unsigned long (*save_fl
)(void);
190 void (*restore_fl
)(unsigned long);
191 void (*irq_disable
)(void);
192 void (*irq_enable
)(void);
193 void (*safe_halt
)(void);
197 void (*adjust_exception_frame
)(void);
202 #ifdef CONFIG_X86_LOCAL_APIC
204 * Direct APIC operations, principally for VMI. Ideally
205 * these shouldn't be in this interface.
207 void (*apic_write
)(unsigned long reg
, u32 v
);
208 u32 (*apic_read
)(unsigned long reg
);
209 void (*setup_boot_clock
)(void);
210 void (*setup_secondary_clock
)(void);
212 void (*startup_ipi_hook
)(int phys_apicid
,
213 unsigned long start_eip
,
214 unsigned long start_esp
);
220 * Called before/after init_mm pagetable setup. setup_start
221 * may reset %cr3, and may pre-install parts of the pagetable;
222 * pagetable setup is expected to preserve any existing
225 void (*pagetable_setup_start
)(pgd_t
*pgd_base
);
226 void (*pagetable_setup_done
)(pgd_t
*pgd_base
);
228 unsigned long (*read_cr2
)(void);
229 void (*write_cr2
)(unsigned long);
231 unsigned long (*read_cr3
)(void);
232 void (*write_cr3
)(unsigned long);
235 * Hooks for intercepting the creation/use/destruction of an
238 void (*activate_mm
)(struct mm_struct
*prev
,
239 struct mm_struct
*next
);
240 void (*dup_mmap
)(struct mm_struct
*oldmm
,
241 struct mm_struct
*mm
);
242 void (*exit_mmap
)(struct mm_struct
*mm
);
246 void (*flush_tlb_user
)(void);
247 void (*flush_tlb_kernel
)(void);
248 void (*flush_tlb_single
)(unsigned long addr
);
249 void (*flush_tlb_others
)(const cpumask_t
*cpus
, struct mm_struct
*mm
,
252 /* Hooks for allocating and freeing a pagetable top-level */
253 int (*pgd_alloc
)(struct mm_struct
*mm
);
254 void (*pgd_free
)(struct mm_struct
*mm
, pgd_t
*pgd
);
257 * Hooks for allocating/releasing pagetable pages when they're
258 * attached to a pagetable
260 void (*alloc_pte
)(struct mm_struct
*mm
, u32 pfn
);
261 void (*alloc_pmd
)(struct mm_struct
*mm
, u32 pfn
);
262 void (*alloc_pmd_clone
)(u32 pfn
, u32 clonepfn
, u32 start
, u32 count
);
263 void (*alloc_pud
)(struct mm_struct
*mm
, u32 pfn
);
264 void (*release_pte
)(u32 pfn
);
265 void (*release_pmd
)(u32 pfn
);
266 void (*release_pud
)(u32 pfn
);
268 /* Pagetable manipulation functions */
269 void (*set_pte
)(pte_t
*ptep
, pte_t pteval
);
270 void (*set_pte_at
)(struct mm_struct
*mm
, unsigned long addr
,
271 pte_t
*ptep
, pte_t pteval
);
272 void (*set_pmd
)(pmd_t
*pmdp
, pmd_t pmdval
);
273 void (*pte_update
)(struct mm_struct
*mm
, unsigned long addr
,
275 void (*pte_update_defer
)(struct mm_struct
*mm
,
276 unsigned long addr
, pte_t
*ptep
);
278 pte_t (*ptep_modify_prot_start
)(struct mm_struct
*mm
, unsigned long addr
,
280 void (*ptep_modify_prot_commit
)(struct mm_struct
*mm
, unsigned long addr
,
281 pte_t
*ptep
, pte_t pte
);
283 pteval_t (*pte_val
)(pte_t
);
284 pteval_t (*pte_flags
)(pte_t
);
285 pte_t (*make_pte
)(pteval_t pte
);
287 pgdval_t (*pgd_val
)(pgd_t
);
288 pgd_t (*make_pgd
)(pgdval_t pgd
);
290 #if PAGETABLE_LEVELS >= 3
291 #ifdef CONFIG_X86_PAE
292 void (*set_pte_atomic
)(pte_t
*ptep
, pte_t pteval
);
293 void (*set_pte_present
)(struct mm_struct
*mm
, unsigned long addr
,
294 pte_t
*ptep
, pte_t pte
);
295 void (*pte_clear
)(struct mm_struct
*mm
, unsigned long addr
,
297 void (*pmd_clear
)(pmd_t
*pmdp
);
299 #endif /* CONFIG_X86_PAE */
301 void (*set_pud
)(pud_t
*pudp
, pud_t pudval
);
303 pmdval_t (*pmd_val
)(pmd_t
);
304 pmd_t (*make_pmd
)(pmdval_t pmd
);
306 #if PAGETABLE_LEVELS == 4
307 pudval_t (*pud_val
)(pud_t
);
308 pud_t (*make_pud
)(pudval_t pud
);
310 void (*set_pgd
)(pgd_t
*pudp
, pgd_t pgdval
);
311 #endif /* PAGETABLE_LEVELS == 4 */
312 #endif /* PAGETABLE_LEVELS >= 3 */
314 #ifdef CONFIG_HIGHPTE
315 void *(*kmap_atomic_pte
)(struct page
*page
, enum km_type type
);
318 struct pv_lazy_ops lazy_mode
;
322 /* Sometimes the physical address is a pfn, and sometimes its
323 an mfn. We can tell which is which from the index. */
324 void (*set_fixmap
)(unsigned /* enum fixed_addresses */ idx
,
325 unsigned long phys
, pgprot_t flags
);
328 /* This contains all the paravirt structures: we get a convenient
329 * number for each function using the offset which we use to indicate
331 struct paravirt_patch_template
{
332 struct pv_init_ops pv_init_ops
;
333 struct pv_time_ops pv_time_ops
;
334 struct pv_cpu_ops pv_cpu_ops
;
335 struct pv_irq_ops pv_irq_ops
;
336 struct pv_apic_ops pv_apic_ops
;
337 struct pv_mmu_ops pv_mmu_ops
;
340 extern struct pv_info pv_info
;
341 extern struct pv_init_ops pv_init_ops
;
342 extern struct pv_time_ops pv_time_ops
;
343 extern struct pv_cpu_ops pv_cpu_ops
;
344 extern struct pv_irq_ops pv_irq_ops
;
345 extern struct pv_apic_ops pv_apic_ops
;
346 extern struct pv_mmu_ops pv_mmu_ops
;
348 #define PARAVIRT_PATCH(x) \
349 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
351 #define paravirt_type(op) \
352 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
353 [paravirt_opptr] "m" (op)
354 #define paravirt_clobber(clobber) \
355 [paravirt_clobber] "i" (clobber)
358 * Generate some code, and mark it as patchable by the
359 * apply_paravirt() alternate instruction patcher.
361 #define _paravirt_alt(insn_string, type, clobber) \
362 "771:\n\t" insn_string "\n" "772:\n" \
363 ".pushsection .parainstructions,\"a\"\n" \
366 " .byte " type "\n" \
367 " .byte 772b-771b\n" \
368 " .short " clobber "\n" \
371 /* Generate patchable code, with the default asm parameters. */
372 #define paravirt_alt(insn_string) \
373 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
375 /* Simple instruction patching code. */
376 #define DEF_NATIVE(ops, name, code) \
377 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
378 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
380 unsigned paravirt_patch_nop(void);
381 unsigned paravirt_patch_ignore(unsigned len
);
382 unsigned paravirt_patch_call(void *insnbuf
,
383 const void *target
, u16 tgt_clobbers
,
384 unsigned long addr
, u16 site_clobbers
,
386 unsigned paravirt_patch_jmp(void *insnbuf
, const void *target
,
387 unsigned long addr
, unsigned len
);
388 unsigned paravirt_patch_default(u8 type
, u16 clobbers
, void *insnbuf
,
389 unsigned long addr
, unsigned len
);
391 unsigned paravirt_patch_insns(void *insnbuf
, unsigned len
,
392 const char *start
, const char *end
);
394 unsigned native_patch(u8 type
, u16 clobbers
, void *ibuf
,
395 unsigned long addr
, unsigned len
);
397 int paravirt_disable_iospace(void);
400 * This generates an indirect call based on the operation type number.
401 * The type number, computed in PARAVIRT_PATCH, is derived from the
402 * offset into the paravirt_patch_template structure, and can therefore be
403 * freely converted back into a structure offset.
405 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
408 * These macros are intended to wrap calls through one of the paravirt
409 * ops structs, so that they can be later identified and patched at
412 * Normally, a call to a pv_op function is a simple indirect call:
413 * (pv_op_struct.operations)(args...).
415 * Unfortunately, this is a relatively slow operation for modern CPUs,
416 * because it cannot necessarily determine what the destination
417 * address is. In this case, the address is a runtime constant, so at
418 * the very least we can patch the call to e a simple direct call, or
419 * ideally, patch an inline implementation into the callsite. (Direct
420 * calls are essentially free, because the call and return addresses
421 * are completely predictable.)
423 * For i386, these macros rely on the standard gcc "regparm(3)" calling
424 * convention, in which the first three arguments are placed in %eax,
425 * %edx, %ecx (in that order), and the remaining arguments are placed
426 * on the stack. All caller-save registers (eax,edx,ecx) are expected
427 * to be modified (either clobbered or used for return values).
428 * X86_64, on the other hand, already specifies a register-based calling
429 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
430 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
431 * special handling for dealing with 4 arguments, unlike i386.
432 * However, x86_64 also have to clobber all caller saved registers, which
433 * unfortunately, are quite a bit (r8 - r11)
435 * The call instruction itself is marked by placing its start address
436 * and size into the .parainstructions section, so that
437 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
438 * appropriate patching under the control of the backend pv_init_ops
441 * Unfortunately there's no way to get gcc to generate the args setup
442 * for the call, and then allow the call itself to be generated by an
443 * inline asm. Because of this, we must do the complete arg setup and
444 * return value handling from within these macros. This is fairly
447 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
448 * It could be extended to more arguments, but there would be little
449 * to be gained from that. For each number of arguments, there are
450 * the two VCALL and CALL variants for void and non-void functions.
452 * When there is a return value, the invoker of the macro must specify
453 * the return type. The macro then uses sizeof() on that type to
454 * determine whether its a 32 or 64 bit value, and places the return
455 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
456 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
457 * the return value size.
459 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
460 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
463 * Small structures are passed and returned in registers. The macro
464 * calling convention can't directly deal with this, so the wrapper
465 * functions must do this.
467 * These PVOP_* macros are only defined within this header. This
468 * means that all uses must be wrapped in inline functions. This also
469 * makes sure the incoming and outgoing types are always correct.
472 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
473 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
474 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
476 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
477 #define EXTRA_CLOBBERS
478 #define VEXTRA_CLOBBERS
480 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
481 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
482 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
483 "=S" (__esi), "=d" (__edx), \
486 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
488 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
489 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
492 #ifdef CONFIG_PARAVIRT_DEBUG
493 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
495 #define PVOP_TEST_NULL(op) ((void)op)
498 #define __PVOP_CALL(rettype, op, pre, post, ...) \
502 PVOP_TEST_NULL(op); \
503 /* This is 32-bit specific, but is okay in 64-bit */ \
504 /* since this condition will never hold */ \
505 if (sizeof(rettype) > sizeof(unsigned long)) { \
507 paravirt_alt(PARAVIRT_CALL) \
509 : PVOP_CALL_CLOBBERS \
510 : paravirt_type(op), \
511 paravirt_clobber(CLBR_ANY), \
513 : "memory", "cc" EXTRA_CLOBBERS); \
514 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
517 paravirt_alt(PARAVIRT_CALL) \
519 : PVOP_CALL_CLOBBERS \
520 : paravirt_type(op), \
521 paravirt_clobber(CLBR_ANY), \
523 : "memory", "cc" EXTRA_CLOBBERS); \
524 __ret = (rettype)__eax; \
528 #define __PVOP_VCALL(op, pre, post, ...) \
531 PVOP_TEST_NULL(op); \
533 paravirt_alt(PARAVIRT_CALL) \
535 : PVOP_VCALL_CLOBBERS \
536 : paravirt_type(op), \
537 paravirt_clobber(CLBR_ANY), \
539 : "memory", "cc" VEXTRA_CLOBBERS); \
542 #define PVOP_CALL0(rettype, op) \
543 __PVOP_CALL(rettype, op, "", "")
544 #define PVOP_VCALL0(op) \
545 __PVOP_VCALL(op, "", "")
547 #define PVOP_CALL1(rettype, op, arg1) \
548 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
549 #define PVOP_VCALL1(op, arg1) \
550 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
552 #define PVOP_CALL2(rettype, op, arg1, arg2) \
553 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
554 "1" ((unsigned long)(arg2)))
555 #define PVOP_VCALL2(op, arg1, arg2) \
556 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
557 "1" ((unsigned long)(arg2)))
559 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
560 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
561 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
562 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
563 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
564 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
566 /* This is the only difference in x86_64. We can make it much simpler */
568 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
569 __PVOP_CALL(rettype, op, \
570 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
571 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
572 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
573 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
575 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
576 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
577 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
579 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
580 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
581 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
582 "3"((unsigned long)(arg4)))
583 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
584 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
585 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
586 "3"((unsigned long)(arg4)))
589 static inline int paravirt_enabled(void)
591 return pv_info
.paravirt_enabled
;
594 static inline void load_sp0(struct tss_struct
*tss
,
595 struct thread_struct
*thread
)
597 PVOP_VCALL2(pv_cpu_ops
.load_sp0
, tss
, thread
);
600 #define ARCH_SETUP pv_init_ops.arch_setup();
601 static inline unsigned long get_wallclock(void)
603 return PVOP_CALL0(unsigned long, pv_time_ops
.get_wallclock
);
606 static inline int set_wallclock(unsigned long nowtime
)
608 return PVOP_CALL1(int, pv_time_ops
.set_wallclock
, nowtime
);
611 static inline void (*choose_time_init(void))(void)
613 return pv_time_ops
.time_init
;
616 /* The paravirtualized CPUID instruction. */
617 static inline void __cpuid(unsigned int *eax
, unsigned int *ebx
,
618 unsigned int *ecx
, unsigned int *edx
)
620 PVOP_VCALL4(pv_cpu_ops
.cpuid
, eax
, ebx
, ecx
, edx
);
624 * These special macros can be used to get or set a debugging register
626 static inline unsigned long paravirt_get_debugreg(int reg
)
628 return PVOP_CALL1(unsigned long, pv_cpu_ops
.get_debugreg
, reg
);
630 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
631 static inline void set_debugreg(unsigned long val
, int reg
)
633 PVOP_VCALL2(pv_cpu_ops
.set_debugreg
, reg
, val
);
636 static inline void clts(void)
638 PVOP_VCALL0(pv_cpu_ops
.clts
);
641 static inline unsigned long read_cr0(void)
643 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr0
);
646 static inline void write_cr0(unsigned long x
)
648 PVOP_VCALL1(pv_cpu_ops
.write_cr0
, x
);
651 static inline unsigned long read_cr2(void)
653 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr2
);
656 static inline void write_cr2(unsigned long x
)
658 PVOP_VCALL1(pv_mmu_ops
.write_cr2
, x
);
661 static inline unsigned long read_cr3(void)
663 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr3
);
666 static inline void write_cr3(unsigned long x
)
668 PVOP_VCALL1(pv_mmu_ops
.write_cr3
, x
);
671 static inline unsigned long read_cr4(void)
673 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4
);
675 static inline unsigned long read_cr4_safe(void)
677 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4_safe
);
680 static inline void write_cr4(unsigned long x
)
682 PVOP_VCALL1(pv_cpu_ops
.write_cr4
, x
);
686 static inline unsigned long read_cr8(void)
688 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr8
);
691 static inline void write_cr8(unsigned long x
)
693 PVOP_VCALL1(pv_cpu_ops
.write_cr8
, x
);
697 static inline void raw_safe_halt(void)
699 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
702 static inline void halt(void)
704 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
707 static inline void wbinvd(void)
709 PVOP_VCALL0(pv_cpu_ops
.wbinvd
);
712 #define get_kernel_rpl() (pv_info.kernel_rpl)
714 static inline u64
paravirt_read_msr(unsigned msr
, int *err
)
716 return PVOP_CALL2(u64
, pv_cpu_ops
.read_msr
, msr
, err
);
718 static inline int paravirt_write_msr(unsigned msr
, unsigned low
, unsigned high
)
720 return PVOP_CALL3(int, pv_cpu_ops
.write_msr
, msr
, low
, high
);
723 /* These should all do BUG_ON(_err), but our headers are too tangled. */
724 #define rdmsr(msr, val1, val2) \
727 u64 _l = paravirt_read_msr(msr, &_err); \
732 #define wrmsr(msr, val1, val2) \
734 paravirt_write_msr(msr, val1, val2); \
737 #define rdmsrl(msr, val) \
740 val = paravirt_read_msr(msr, &_err); \
743 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
744 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
746 /* rdmsr with exception handling */
747 #define rdmsr_safe(msr, a, b) \
750 u64 _l = paravirt_read_msr(msr, &_err); \
756 static inline int rdmsrl_safe(unsigned msr
, unsigned long long *p
)
760 *p
= paravirt_read_msr(msr
, &err
);
764 static inline u64
paravirt_read_tsc(void)
766 return PVOP_CALL0(u64
, pv_cpu_ops
.read_tsc
);
769 #define rdtscl(low) \
771 u64 _l = paravirt_read_tsc(); \
775 #define rdtscll(val) (val = paravirt_read_tsc())
777 static inline unsigned long long paravirt_sched_clock(void)
779 return PVOP_CALL0(unsigned long long, pv_time_ops
.sched_clock
);
781 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
783 static inline unsigned long long paravirt_read_pmc(int counter
)
785 return PVOP_CALL1(u64
, pv_cpu_ops
.read_pmc
, counter
);
788 #define rdpmc(counter, low, high) \
790 u64 _l = paravirt_read_pmc(counter); \
795 static inline unsigned long long paravirt_rdtscp(unsigned int *aux
)
797 return PVOP_CALL1(u64
, pv_cpu_ops
.read_tscp
, aux
);
800 #define rdtscp(low, high, aux) \
803 unsigned long __val = paravirt_rdtscp(&__aux); \
804 (low) = (u32)__val; \
805 (high) = (u32)(__val >> 32); \
809 #define rdtscpll(val, aux) \
811 unsigned long __aux; \
812 val = paravirt_rdtscp(&__aux); \
816 static inline void load_TR_desc(void)
818 PVOP_VCALL0(pv_cpu_ops
.load_tr_desc
);
820 static inline void load_gdt(const struct desc_ptr
*dtr
)
822 PVOP_VCALL1(pv_cpu_ops
.load_gdt
, dtr
);
824 static inline void load_idt(const struct desc_ptr
*dtr
)
826 PVOP_VCALL1(pv_cpu_ops
.load_idt
, dtr
);
828 static inline void set_ldt(const void *addr
, unsigned entries
)
830 PVOP_VCALL2(pv_cpu_ops
.set_ldt
, addr
, entries
);
832 static inline void store_gdt(struct desc_ptr
*dtr
)
834 PVOP_VCALL1(pv_cpu_ops
.store_gdt
, dtr
);
836 static inline void store_idt(struct desc_ptr
*dtr
)
838 PVOP_VCALL1(pv_cpu_ops
.store_idt
, dtr
);
840 static inline unsigned long paravirt_store_tr(void)
842 return PVOP_CALL0(unsigned long, pv_cpu_ops
.store_tr
);
844 #define store_tr(tr) ((tr) = paravirt_store_tr())
845 static inline void load_TLS(struct thread_struct
*t
, unsigned cpu
)
847 PVOP_VCALL2(pv_cpu_ops
.load_tls
, t
, cpu
);
851 static inline void load_gs_index(unsigned int gs
)
853 PVOP_VCALL1(pv_cpu_ops
.load_gs_index
, gs
);
857 static inline void write_ldt_entry(struct desc_struct
*dt
, int entry
,
860 PVOP_VCALL3(pv_cpu_ops
.write_ldt_entry
, dt
, entry
, desc
);
863 static inline void write_gdt_entry(struct desc_struct
*dt
, int entry
,
864 void *desc
, int type
)
866 PVOP_VCALL4(pv_cpu_ops
.write_gdt_entry
, dt
, entry
, desc
, type
);
869 static inline void write_idt_entry(gate_desc
*dt
, int entry
, const gate_desc
*g
)
871 PVOP_VCALL3(pv_cpu_ops
.write_idt_entry
, dt
, entry
, g
);
873 static inline void set_iopl_mask(unsigned mask
)
875 PVOP_VCALL1(pv_cpu_ops
.set_iopl_mask
, mask
);
878 /* The paravirtualized I/O functions */
879 static inline void slow_down_io(void)
881 pv_cpu_ops
.io_delay();
882 #ifdef REALLY_SLOW_IO
883 pv_cpu_ops
.io_delay();
884 pv_cpu_ops
.io_delay();
885 pv_cpu_ops
.io_delay();
889 #ifdef CONFIG_X86_LOCAL_APIC
891 * Basic functions accessing APICs.
893 static inline void apic_write(unsigned long reg
, u32 v
)
895 PVOP_VCALL2(pv_apic_ops
.apic_write
, reg
, v
);
898 static inline u32
apic_read(unsigned long reg
)
900 return PVOP_CALL1(unsigned long, pv_apic_ops
.apic_read
, reg
);
903 static inline void setup_boot_clock(void)
905 PVOP_VCALL0(pv_apic_ops
.setup_boot_clock
);
908 static inline void setup_secondary_clock(void)
910 PVOP_VCALL0(pv_apic_ops
.setup_secondary_clock
);
914 static inline void paravirt_post_allocator_init(void)
916 if (pv_init_ops
.post_allocator_init
)
917 (*pv_init_ops
.post_allocator_init
)();
920 static inline void paravirt_pagetable_setup_start(pgd_t
*base
)
922 (*pv_mmu_ops
.pagetable_setup_start
)(base
);
925 static inline void paravirt_pagetable_setup_done(pgd_t
*base
)
927 (*pv_mmu_ops
.pagetable_setup_done
)(base
);
931 static inline void startup_ipi_hook(int phys_apicid
, unsigned long start_eip
,
932 unsigned long start_esp
)
934 PVOP_VCALL3(pv_apic_ops
.startup_ipi_hook
,
935 phys_apicid
, start_eip
, start_esp
);
939 static inline void paravirt_activate_mm(struct mm_struct
*prev
,
940 struct mm_struct
*next
)
942 PVOP_VCALL2(pv_mmu_ops
.activate_mm
, prev
, next
);
945 static inline void arch_dup_mmap(struct mm_struct
*oldmm
,
946 struct mm_struct
*mm
)
948 PVOP_VCALL2(pv_mmu_ops
.dup_mmap
, oldmm
, mm
);
951 static inline void arch_exit_mmap(struct mm_struct
*mm
)
953 PVOP_VCALL1(pv_mmu_ops
.exit_mmap
, mm
);
956 static inline void __flush_tlb(void)
958 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_user
);
960 static inline void __flush_tlb_global(void)
962 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_kernel
);
964 static inline void __flush_tlb_single(unsigned long addr
)
966 PVOP_VCALL1(pv_mmu_ops
.flush_tlb_single
, addr
);
969 static inline void flush_tlb_others(cpumask_t cpumask
, struct mm_struct
*mm
,
972 PVOP_VCALL3(pv_mmu_ops
.flush_tlb_others
, &cpumask
, mm
, va
);
975 static inline int paravirt_pgd_alloc(struct mm_struct
*mm
)
977 return PVOP_CALL1(int, pv_mmu_ops
.pgd_alloc
, mm
);
980 static inline void paravirt_pgd_free(struct mm_struct
*mm
, pgd_t
*pgd
)
982 PVOP_VCALL2(pv_mmu_ops
.pgd_free
, mm
, pgd
);
985 static inline void paravirt_alloc_pte(struct mm_struct
*mm
, unsigned pfn
)
987 PVOP_VCALL2(pv_mmu_ops
.alloc_pte
, mm
, pfn
);
989 static inline void paravirt_release_pte(unsigned pfn
)
991 PVOP_VCALL1(pv_mmu_ops
.release_pte
, pfn
);
994 static inline void paravirt_alloc_pmd(struct mm_struct
*mm
, unsigned pfn
)
996 PVOP_VCALL2(pv_mmu_ops
.alloc_pmd
, mm
, pfn
);
999 static inline void paravirt_alloc_pmd_clone(unsigned pfn
, unsigned clonepfn
,
1000 unsigned start
, unsigned count
)
1002 PVOP_VCALL4(pv_mmu_ops
.alloc_pmd_clone
, pfn
, clonepfn
, start
, count
);
1004 static inline void paravirt_release_pmd(unsigned pfn
)
1006 PVOP_VCALL1(pv_mmu_ops
.release_pmd
, pfn
);
1009 static inline void paravirt_alloc_pud(struct mm_struct
*mm
, unsigned pfn
)
1011 PVOP_VCALL2(pv_mmu_ops
.alloc_pud
, mm
, pfn
);
1013 static inline void paravirt_release_pud(unsigned pfn
)
1015 PVOP_VCALL1(pv_mmu_ops
.release_pud
, pfn
);
1018 #ifdef CONFIG_HIGHPTE
1019 static inline void *kmap_atomic_pte(struct page
*page
, enum km_type type
)
1022 ret
= PVOP_CALL2(unsigned long, pv_mmu_ops
.kmap_atomic_pte
, page
, type
);
1027 static inline void pte_update(struct mm_struct
*mm
, unsigned long addr
,
1030 PVOP_VCALL3(pv_mmu_ops
.pte_update
, mm
, addr
, ptep
);
1033 static inline void pte_update_defer(struct mm_struct
*mm
, unsigned long addr
,
1036 PVOP_VCALL3(pv_mmu_ops
.pte_update_defer
, mm
, addr
, ptep
);
1039 static inline pte_t
__pte(pteval_t val
)
1043 if (sizeof(pteval_t
) > sizeof(long))
1044 ret
= PVOP_CALL2(pteval_t
,
1045 pv_mmu_ops
.make_pte
,
1046 val
, (u64
)val
>> 32);
1048 ret
= PVOP_CALL1(pteval_t
,
1049 pv_mmu_ops
.make_pte
,
1052 return (pte_t
) { .pte
= ret
};
1055 static inline pteval_t
pte_val(pte_t pte
)
1059 if (sizeof(pteval_t
) > sizeof(long))
1060 ret
= PVOP_CALL2(pteval_t
, pv_mmu_ops
.pte_val
,
1061 pte
.pte
, (u64
)pte
.pte
>> 32);
1063 ret
= PVOP_CALL1(pteval_t
, pv_mmu_ops
.pte_val
,
1069 static inline pteval_t
pte_flags(pte_t pte
)
1073 if (sizeof(pteval_t
) > sizeof(long))
1074 ret
= PVOP_CALL2(pteval_t
, pv_mmu_ops
.pte_flags
,
1075 pte
.pte
, (u64
)pte
.pte
>> 32);
1077 ret
= PVOP_CALL1(pteval_t
, pv_mmu_ops
.pte_flags
,
1083 static inline pgd_t
__pgd(pgdval_t val
)
1087 if (sizeof(pgdval_t
) > sizeof(long))
1088 ret
= PVOP_CALL2(pgdval_t
, pv_mmu_ops
.make_pgd
,
1089 val
, (u64
)val
>> 32);
1091 ret
= PVOP_CALL1(pgdval_t
, pv_mmu_ops
.make_pgd
,
1094 return (pgd_t
) { ret
};
1097 static inline pgdval_t
pgd_val(pgd_t pgd
)
1101 if (sizeof(pgdval_t
) > sizeof(long))
1102 ret
= PVOP_CALL2(pgdval_t
, pv_mmu_ops
.pgd_val
,
1103 pgd
.pgd
, (u64
)pgd
.pgd
>> 32);
1105 ret
= PVOP_CALL1(pgdval_t
, pv_mmu_ops
.pgd_val
,
1111 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1112 static inline pte_t
ptep_modify_prot_start(struct mm_struct
*mm
, unsigned long addr
,
1117 ret
= PVOP_CALL3(pteval_t
, pv_mmu_ops
.ptep_modify_prot_start
,
1120 return (pte_t
) { .pte
= ret
};
1123 static inline void ptep_modify_prot_commit(struct mm_struct
*mm
, unsigned long addr
,
1124 pte_t
*ptep
, pte_t pte
)
1126 if (sizeof(pteval_t
) > sizeof(long))
1128 pv_mmu_ops
.ptep_modify_prot_commit(mm
, addr
, ptep
, pte
);
1130 PVOP_VCALL4(pv_mmu_ops
.ptep_modify_prot_commit
,
1131 mm
, addr
, ptep
, pte
.pte
);
1134 static inline void set_pte(pte_t
*ptep
, pte_t pte
)
1136 if (sizeof(pteval_t
) > sizeof(long))
1137 PVOP_VCALL3(pv_mmu_ops
.set_pte
, ptep
,
1138 pte
.pte
, (u64
)pte
.pte
>> 32);
1140 PVOP_VCALL2(pv_mmu_ops
.set_pte
, ptep
,
1144 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
1145 pte_t
*ptep
, pte_t pte
)
1147 if (sizeof(pteval_t
) > sizeof(long))
1149 pv_mmu_ops
.set_pte_at(mm
, addr
, ptep
, pte
);
1151 PVOP_VCALL4(pv_mmu_ops
.set_pte_at
, mm
, addr
, ptep
, pte
.pte
);
1154 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmd
)
1156 pmdval_t val
= native_pmd_val(pmd
);
1158 if (sizeof(pmdval_t
) > sizeof(long))
1159 PVOP_VCALL3(pv_mmu_ops
.set_pmd
, pmdp
, val
, (u64
)val
>> 32);
1161 PVOP_VCALL2(pv_mmu_ops
.set_pmd
, pmdp
, val
);
1164 #if PAGETABLE_LEVELS >= 3
1165 static inline pmd_t
__pmd(pmdval_t val
)
1169 if (sizeof(pmdval_t
) > sizeof(long))
1170 ret
= PVOP_CALL2(pmdval_t
, pv_mmu_ops
.make_pmd
,
1171 val
, (u64
)val
>> 32);
1173 ret
= PVOP_CALL1(pmdval_t
, pv_mmu_ops
.make_pmd
,
1176 return (pmd_t
) { ret
};
1179 static inline pmdval_t
pmd_val(pmd_t pmd
)
1183 if (sizeof(pmdval_t
) > sizeof(long))
1184 ret
= PVOP_CALL2(pmdval_t
, pv_mmu_ops
.pmd_val
,
1185 pmd
.pmd
, (u64
)pmd
.pmd
>> 32);
1187 ret
= PVOP_CALL1(pmdval_t
, pv_mmu_ops
.pmd_val
,
1193 static inline void set_pud(pud_t
*pudp
, pud_t pud
)
1195 pudval_t val
= native_pud_val(pud
);
1197 if (sizeof(pudval_t
) > sizeof(long))
1198 PVOP_VCALL3(pv_mmu_ops
.set_pud
, pudp
,
1199 val
, (u64
)val
>> 32);
1201 PVOP_VCALL2(pv_mmu_ops
.set_pud
, pudp
,
1204 #if PAGETABLE_LEVELS == 4
1205 static inline pud_t
__pud(pudval_t val
)
1209 if (sizeof(pudval_t
) > sizeof(long))
1210 ret
= PVOP_CALL2(pudval_t
, pv_mmu_ops
.make_pud
,
1211 val
, (u64
)val
>> 32);
1213 ret
= PVOP_CALL1(pudval_t
, pv_mmu_ops
.make_pud
,
1216 return (pud_t
) { ret
};
1219 static inline pudval_t
pud_val(pud_t pud
)
1223 if (sizeof(pudval_t
) > sizeof(long))
1224 ret
= PVOP_CALL2(pudval_t
, pv_mmu_ops
.pud_val
,
1225 pud
.pud
, (u64
)pud
.pud
>> 32);
1227 ret
= PVOP_CALL1(pudval_t
, pv_mmu_ops
.pud_val
,
1233 static inline void set_pgd(pgd_t
*pgdp
, pgd_t pgd
)
1235 pgdval_t val
= native_pgd_val(pgd
);
1237 if (sizeof(pgdval_t
) > sizeof(long))
1238 PVOP_VCALL3(pv_mmu_ops
.set_pgd
, pgdp
,
1239 val
, (u64
)val
>> 32);
1241 PVOP_VCALL2(pv_mmu_ops
.set_pgd
, pgdp
,
1245 static inline void pgd_clear(pgd_t
*pgdp
)
1247 set_pgd(pgdp
, __pgd(0));
1250 static inline void pud_clear(pud_t
*pudp
)
1252 set_pud(pudp
, __pud(0));
1255 #endif /* PAGETABLE_LEVELS == 4 */
1257 #endif /* PAGETABLE_LEVELS >= 3 */
1259 #ifdef CONFIG_X86_PAE
1260 /* Special-case pte-setting operations for PAE, which can't update a
1261 64-bit pte atomically */
1262 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
1264 PVOP_VCALL3(pv_mmu_ops
.set_pte_atomic
, ptep
,
1265 pte
.pte
, pte
.pte
>> 32);
1268 static inline void set_pte_present(struct mm_struct
*mm
, unsigned long addr
,
1269 pte_t
*ptep
, pte_t pte
)
1272 pv_mmu_ops
.set_pte_present(mm
, addr
, ptep
, pte
);
1275 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
1278 PVOP_VCALL3(pv_mmu_ops
.pte_clear
, mm
, addr
, ptep
);
1281 static inline void pmd_clear(pmd_t
*pmdp
)
1283 PVOP_VCALL1(pv_mmu_ops
.pmd_clear
, pmdp
);
1285 #else /* !CONFIG_X86_PAE */
1286 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
1291 static inline void set_pte_present(struct mm_struct
*mm
, unsigned long addr
,
1292 pte_t
*ptep
, pte_t pte
)
1297 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
1300 set_pte_at(mm
, addr
, ptep
, __pte(0));
1303 static inline void pmd_clear(pmd_t
*pmdp
)
1305 set_pmd(pmdp
, __pmd(0));
1307 #endif /* CONFIG_X86_PAE */
1309 /* Lazy mode for batching updates / context switch */
1310 enum paravirt_lazy_mode
{
1316 enum paravirt_lazy_mode
paravirt_get_lazy_mode(void);
1317 void paravirt_enter_lazy_cpu(void);
1318 void paravirt_leave_lazy_cpu(void);
1319 void paravirt_enter_lazy_mmu(void);
1320 void paravirt_leave_lazy_mmu(void);
1321 void paravirt_leave_lazy(enum paravirt_lazy_mode mode
);
1323 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1324 static inline void arch_enter_lazy_cpu_mode(void)
1326 PVOP_VCALL0(pv_cpu_ops
.lazy_mode
.enter
);
1329 static inline void arch_leave_lazy_cpu_mode(void)
1331 PVOP_VCALL0(pv_cpu_ops
.lazy_mode
.leave
);
1334 static inline void arch_flush_lazy_cpu_mode(void)
1336 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU
)) {
1337 arch_leave_lazy_cpu_mode();
1338 arch_enter_lazy_cpu_mode();
1343 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1344 static inline void arch_enter_lazy_mmu_mode(void)
1346 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.enter
);
1349 static inline void arch_leave_lazy_mmu_mode(void)
1351 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.leave
);
1354 static inline void arch_flush_lazy_mmu_mode(void)
1356 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU
)) {
1357 arch_leave_lazy_mmu_mode();
1358 arch_enter_lazy_mmu_mode();
1362 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx
,
1363 unsigned long phys
, pgprot_t flags
)
1365 pv_mmu_ops
.set_fixmap(idx
, phys
, flags
);
1368 void _paravirt_nop(void);
1369 #define paravirt_nop ((void *)_paravirt_nop)
1371 /* These all sit in the .parainstructions section to tell us what to patch. */
1372 struct paravirt_patch_site
{
1373 u8
*instr
; /* original instructions */
1374 u8 instrtype
; /* type of this instruction */
1375 u8 len
; /* length of original instruction */
1376 u16 clobbers
; /* what registers you may clobber */
1379 extern struct paravirt_patch_site __parainstructions
[],
1380 __parainstructions_end
[];
1382 #ifdef CONFIG_X86_32
1383 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1384 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1385 #define PV_FLAGS_ARG "0"
1386 #define PV_EXTRA_CLOBBERS
1387 #define PV_VEXTRA_CLOBBERS
1389 /* We save some registers, but all of them, that's too much. We clobber all
1390 * caller saved registers but the argument parameter */
1391 #define PV_SAVE_REGS "pushq %%rdi;"
1392 #define PV_RESTORE_REGS "popq %%rdi;"
1393 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1394 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1395 #define PV_FLAGS_ARG "D"
1398 static inline unsigned long __raw_local_save_flags(void)
1402 asm volatile(paravirt_alt(PV_SAVE_REGS
1406 : paravirt_type(pv_irq_ops
.save_fl
),
1407 paravirt_clobber(CLBR_EAX
)
1408 : "memory", "cc" PV_VEXTRA_CLOBBERS
);
1412 static inline void raw_local_irq_restore(unsigned long f
)
1414 asm volatile(paravirt_alt(PV_SAVE_REGS
1419 paravirt_type(pv_irq_ops
.restore_fl
),
1420 paravirt_clobber(CLBR_EAX
)
1421 : "memory", "cc" PV_EXTRA_CLOBBERS
);
1424 static inline void raw_local_irq_disable(void)
1426 asm volatile(paravirt_alt(PV_SAVE_REGS
1430 : paravirt_type(pv_irq_ops
.irq_disable
),
1431 paravirt_clobber(CLBR_EAX
)
1432 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS
);
1435 static inline void raw_local_irq_enable(void)
1437 asm volatile(paravirt_alt(PV_SAVE_REGS
1441 : paravirt_type(pv_irq_ops
.irq_enable
),
1442 paravirt_clobber(CLBR_EAX
)
1443 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS
);
1446 static inline unsigned long __raw_local_irq_save(void)
1450 f
= __raw_local_save_flags();
1451 raw_local_irq_disable();
1455 /* Make sure as little as possible of this mess escapes. */
1456 #undef PARAVIRT_CALL
1470 #else /* __ASSEMBLY__ */
1472 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1476 .pushsection .parainstructions,"a"; \
1485 #ifdef CONFIG_X86_64
1486 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1487 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1488 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1489 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1490 #define PARA_INDIRECT(addr) *addr(%rip)
1492 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1493 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1494 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1495 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1496 #define PARA_INDIRECT(addr) *%cs:addr
1499 #define INTERRUPT_RETURN \
1500 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1501 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1503 #define DISABLE_INTERRUPTS(clobbers) \
1504 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1506 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1509 #define ENABLE_INTERRUPTS(clobbers) \
1510 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1512 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1515 #define USERGS_SYSRET32 \
1516 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1518 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1520 #ifdef CONFIG_X86_32
1521 #define GET_CR0_INTO_EAX \
1522 push %ecx; push %edx; \
1523 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1526 #define ENABLE_INTERRUPTS_SYSEXIT \
1527 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1529 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1532 #else /* !CONFIG_X86_32 */
1535 * If swapgs is used while the userspace stack is still current,
1536 * there's no way to call a pvop. The PV replacement *must* be
1537 * inlined, or the swapgs instruction must be trapped and emulated.
1539 #define SWAPGS_UNSAFE_STACK \
1540 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1544 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1546 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1550 #define GET_CR2_INTO_RCX \
1551 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1555 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1556 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1558 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1560 #define USERGS_SYSRET64 \
1561 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1563 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1565 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1566 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1568 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1569 #endif /* CONFIG_X86_32 */
1571 #endif /* __ASSEMBLY__ */
1572 #endif /* CONFIG_PARAVIRT */
1573 #endif /* __ASM_PARAVIRT_H */