1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
5 #include <linux/delay.h>
6 #include <asm/fixmap.h>
7 #include <asm/apicdef.h>
8 #include <asm/processor.h>
9 #include <asm/system.h>
10 #include <asm/cpufeature.h>
13 #define ARCH_APICTIMER_STOPS_ON_C3 1
21 #define APIC_VERBOSE 1
25 * Define the default level of output to be very little
26 * This can be turned up by using apic=verbose for more
27 * information and apic=debug for _lots_ of information.
28 * apic_verbosity is defined in apic.c
30 #define apic_printk(v, s, a...) do { \
31 if ((v) <= apic_verbosity) \
36 extern void generic_apic_probe(void);
38 #ifdef CONFIG_X86_LOCAL_APIC
40 extern int apic_verbosity
;
41 extern int local_apic_timer_c2_ok
;
43 extern int ioapic_force
;
45 extern int disable_apic
;
47 * Basic functions accessing APICs.
49 #ifdef CONFIG_PARAVIRT
50 #include <asm/paravirt.h>
53 #define apic_write native_apic_mem_write
54 #define apic_write_atomic native_apic_mem_write_atomic
55 #define apic_read native_apic_mem_read
57 #define setup_boot_clock setup_boot_APIC_clock
58 #define setup_secondary_clock setup_secondary_APIC_clock
61 extern int is_vsmp_box(void);
63 static inline void native_apic_mem_write(u32 reg
, u32 v
)
65 *((volatile u32
*)(APIC_BASE
+ reg
)) = v
;
68 static inline void native_apic_mem_write_atomic(u32 reg
, u32 v
)
70 (void)xchg((u32
*)(APIC_BASE
+ reg
), v
);
73 static inline u32
native_apic_mem_read(u32 reg
)
75 return *((volatile u32
*)(APIC_BASE
+ reg
));
78 static inline void native_apic_msr_write(u32 reg
, u32 v
)
80 if (reg
== APIC_DFR
|| reg
== APIC_ID
|| reg
== APIC_LDR
||
84 wrmsr(APIC_BASE_MSR
+ (reg
>> 4), v
, 0);
87 static inline u32
native_apic_msr_read(u32 reg
)
94 rdmsr(APIC_BASE_MSR
+ (reg
>> 4), low
, high
);
99 extern void apic_wait_icr_idle(void);
100 extern u32
safe_apic_wait_icr_idle(void);
101 extern void apic_icr_write(u32 low
, u32 id
);
105 u32 (*read
)(u32 reg
);
106 void (*write
)(u32 reg
, u32 v
);
107 void (*write_atomic
)(u32 reg
, u32 v
);
108 u64 (*icr_read
)(void);
109 void (*icr_write
)(u32 low
, u32 high
);
110 void (*wait_icr_idle
)(void);
111 u32 (*safe_wait_icr_idle
)(void);
114 extern struct apic_ops
*apic_ops
;
116 #define apic_read (apic_ops->read)
117 #define apic_write (apic_ops->write)
118 #define apic_write_atomic (apic_ops->write_atomic)
119 #define apic_icr_read (apic_ops->icr_read)
120 #define apic_icr_write (apic_ops->icr_write)
121 #define apic_wait_icr_idle (apic_ops->wait_icr_idle)
122 #define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
125 extern int get_physical_broadcast(void);
127 #ifdef CONFIG_X86_GOOD_APIC
128 # define FORCE_READ_AROUND_WRITE 0
129 # define apic_read_around(x)
130 # define apic_write_around(x, y) apic_write((x), (y))
132 # define FORCE_READ_AROUND_WRITE 1
133 # define apic_read_around(x) apic_read(x)
134 # define apic_write_around(x, y) apic_write_atomic((x), (y))
138 static inline void ack_x2APIC_irq(void)
140 /* Docs say use 0 for future compatibility */
141 native_apic_msr_write(APIC_EOI
, 0);
146 static inline void ack_APIC_irq(void)
149 * ack_APIC_irq() actually gets compiled as a single instruction:
150 * - a single rmw on Pentium/82489DX
151 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
155 /* Docs say use 0 for future compatibility */
157 apic_write_around(APIC_EOI
, 0);
159 native_apic_mem_write(APIC_EOI
, 0);
163 extern int lapic_get_maxlvt(void);
164 extern void clear_local_APIC(void);
165 extern void connect_bsp_APIC(void);
166 extern void disconnect_bsp_APIC(int virt_wire_setup
);
167 extern void disable_local_APIC(void);
168 extern void lapic_shutdown(void);
169 extern int verify_local_APIC(void);
170 extern void cache_APIC_registers(void);
171 extern void sync_Arb_IDs(void);
172 extern void init_bsp_APIC(void);
173 extern void setup_local_APIC(void);
174 extern void end_local_APIC_setup(void);
175 extern void init_apic_mappings(void);
176 extern void setup_boot_APIC_clock(void);
177 extern void setup_secondary_APIC_clock(void);
178 extern int APIC_init_uniprocessor(void);
179 extern void enable_NMI_through_LVT0(void);
182 * On 32bit this is mach-xxx local
185 extern void early_init_lapic_mapping(void);
186 extern int apic_is_clustered_box(void);
188 static inline int apic_is_clustered_box(void)
194 extern u8
setup_APIC_eilvt_mce(u8 vector
, u8 msg_type
, u8 mask
);
195 extern u8
setup_APIC_eilvt_ibs(u8 vector
, u8 msg_type
, u8 mask
);
198 #else /* !CONFIG_X86_LOCAL_APIC */
199 static inline void lapic_shutdown(void) { }
200 #define local_apic_timer_c2_ok 1
201 static inline void init_apic_mappings(void) { }
203 #endif /* !CONFIG_X86_LOCAL_APIC */
205 #endif /* __ASM_APIC_H */