d9daa028689f91b675583c892c00aa48925b4534
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-sh / dma.h
1 /*
2 * include/asm-sh/dma.h
3 *
4 * Copyright (C) 2003, 2004 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10 #ifndef __ASM_SH_DMA_H
11 #define __ASM_SH_DMA_H
12 #ifdef __KERNEL__
13
14 #include <linux/spinlock.h>
15 #include <linux/wait.h>
16 #include <linux/sysdev.h>
17 #include <linux/device.h>
18 #include <asm/cpu/dma.h>
19 #include <asm/semaphore.h>
20
21 /* The maximum address that we can perform a DMA transfer to on this platform */
22 /* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
23 occurrence should be flagged as an error. */
24 /* But... */
25 /* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
26 #define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
27
28 #ifdef CONFIG_NR_DMA_CHANNELS
29 # define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
30 #else
31 # define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
32 #endif
33
34 /*
35 * Read and write modes can mean drastically different things depending on the
36 * channel configuration. Consult your DMAC documentation and module
37 * implementation for further clues.
38 */
39 #define DMA_MODE_READ 0x00
40 #define DMA_MODE_WRITE 0x01
41 #define DMA_MODE_MASK 0x01
42
43 #define DMA_AUTOINIT 0x10
44
45 /*
46 * DMAC (dma_info) flags
47 */
48 enum {
49 DMAC_CHANNELS_CONFIGURED = 0x00,
50 DMAC_CHANNELS_TEI_CAPABLE = 0x01,
51 };
52
53 /*
54 * DMA channel capabilities / flags
55 */
56 enum {
57 DMA_TEI_CAPABLE = 0x01,
58 DMA_CONFIGURED = 0x02,
59 };
60
61 extern spinlock_t dma_spin_lock;
62
63 struct dma_channel;
64
65 struct dma_ops {
66 int (*request)(struct dma_channel *chan);
67 void (*free)(struct dma_channel *chan);
68
69 int (*get_residue)(struct dma_channel *chan);
70 int (*xfer)(struct dma_channel *chan);
71 void (*configure)(struct dma_channel *chan, unsigned long flags);
72 };
73
74 struct dma_channel {
75 char dev_id[16];
76
77 unsigned int chan; /* Physical channel number */
78 unsigned int vchan; /* Virtual channel number */
79 unsigned int mode;
80 unsigned int count;
81
82 unsigned long sar;
83 unsigned long dar;
84
85 unsigned long flags;
86 atomic_t busy;
87
88 struct semaphore sem;
89 wait_queue_head_t wait_queue;
90
91 struct sys_device dev;
92 char *name;
93 };
94
95 struct dma_info {
96 struct platform_device *pdev;
97
98 const char *name;
99 unsigned int nr_channels;
100 unsigned long flags;
101
102 struct dma_ops *ops;
103 struct dma_channel *channels;
104
105 struct list_head list;
106 };
107
108 #define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
109
110 /* arch/sh/drivers/dma/dma-api.c */
111 extern int dma_xfer(unsigned int chan, unsigned long from,
112 unsigned long to, size_t size, unsigned int mode);
113
114 #define dma_write(chan, from, to, size) \
115 dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
116 #define dma_write_page(chan, from, to) \
117 dma_write(chan, from, to, PAGE_SIZE)
118
119 #define dma_read(chan, from, to, size) \
120 dma_xfer(chan, from, to, size, DMA_MODE_READ)
121 #define dma_read_page(chan, from, to) \
122 dma_read(chan, from, to, PAGE_SIZE)
123
124 extern int request_dma(unsigned int chan, const char *dev_id);
125 extern void free_dma(unsigned int chan);
126 extern int get_dma_residue(unsigned int chan);
127 extern struct dma_info *get_dma_info(unsigned int chan);
128 extern struct dma_channel *get_dma_channel(unsigned int chan);
129 extern void dma_wait_for_completion(unsigned int chan);
130 extern void dma_configure_channel(unsigned int chan, unsigned long flags);
131
132 extern int register_dmac(struct dma_info *info);
133 extern void unregister_dmac(struct dma_info *info);
134
135 #ifdef CONFIG_SYSFS
136 /* arch/sh/drivers/dma/dma-sysfs.c */
137 extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
138 extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
139 #else
140 #define dma_create_sysfs_file(channel, info) do { } while (0)
141 #define dma_remove_sysfs_file(channel, info) do { } while (0)
142 #endif
143
144 #ifdef CONFIG_PCI
145 extern int isa_dma_bridge_buggy;
146 #else
147 #define isa_dma_bridge_buggy (0)
148 #endif
149
150 #endif /* __KERNEL__ */
151 #endif /* __ASM_SH_DMA_H */