Linux-2.6.12-rc2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-sh / cpu-sh2 / cacheflush.h
1 /*
2 * include/asm-sh/cpu-sh2/cacheflush.h
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10 #ifndef __ASM_CPU_SH2_CACHEFLUSH_H
11 #define __ASM_CPU_SH2_CACHEFLUSH_H
12
13 /*
14 * Cache flushing:
15 *
16 * - flush_cache_all() flushes entire cache
17 * - flush_cache_mm(mm) flushes the specified mm context's cache lines
18 * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
19 * - flush_cache_range(vma, start, end) flushes a range of pages
20 *
21 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
22 * - flush_icache_range(start, end) flushes(invalidates) a range for icache
23 * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
24 *
25 * Caches are indexed (effectively) by physical address on SH-2, so
26 * we don't need them.
27 */
28 #define flush_cache_all() do { } while (0)
29 #define flush_cache_mm(mm) do { } while (0)
30 #define flush_cache_range(vma, start, end) do { } while (0)
31 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
32 #define flush_dcache_page(page) do { } while (0)
33 #define flush_dcache_mmap_lock(mapping) do { } while (0)
34 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
35 #define flush_icache_range(start, end) do { } while (0)
36 #define flush_icache_page(vma,pg) do { } while (0)
37 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
38 #define flush_cache_sigtramp(vaddr) do { } while (0)
39
40 #define p3_cache_init() do { } while (0)
41 #endif /* __ASM_CPU_SH2_CACHEFLUSH_H */
42