Linux-2.6.12-rc2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-sh / cpu-sh2 / cache.h
1 /*
2 * include/asm-sh/cpu-sh2/cache.h
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10 #ifndef __ASM_CPU_SH2_CACHE_H
11 #define __ASM_CPU_SH2_CACHE_H
12
13 #define L1_CACHE_SHIFT 4
14
15 #define CCR 0xfffffe92 /* Address of Cache Control Register */
16
17 #define CCR_CACHE_CE 0x01 /* Cache enable */
18 #define CCR_CACHE_ID 0x02 /* Instruction Replacement disable */
19 #define CCR_CACHE_OD 0x04 /* Data Replacement disable */
20 #define CCR_CACHE_TW 0x08 /* Two-way mode */
21 #define CCR_CACHE_CP 0x10 /* Cache purge */
22
23 #define CACHE_OC_ADDRESS_ARRAY 0x60000000
24
25 #define CCR_CACHE_ENABLE CCR_CACHE_CE
26 #define CCR_CACHE_INVALIDATE CCR_CACHE_CP
27 #define CCR_CACHE_ORA CCR_CACHE_TW
28 #define CCR_CACHE_WT 0x00 /* SH-2 is _always_ write-through */
29
30 #endif /* __ASM_CPU_SH2_CACHE_H */
31