include/asm-powerpc/tce.h

   1 /*
   2  * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
   3  * Rewrite, cleanup:
   4  * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  19  */
  20
  21 #ifndef _ASM_POWERPC_TCE_H
  22 #define _ASM_POWERPC_TCE_H
  23
  24 /*
  25  * Tces come in two formats, one for the virtual bus and a different
  26  * format for PCI
  27  */
  28 #define TCE_VB  0
  29 #define TCE_PCI 1
  30
  31 /* TCE page size is 4096 bytes (1 << 12) */
  32
  33 #define TCE_SHIFT       12
  34 #define TCE_PAGE_SIZE   (1 << TCE_SHIFT)
  35 #define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT)
  36
  37
  38 /* tce_entry
  39  * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
  40  * abstracted so layout is irrelevant.
  41  */
  42 union tce_entry {
  43         unsigned long te_word;
  44         struct {
  45                 unsigned int  tb_cacheBits :6;  /* Cache hash bits - not used */
  46                 unsigned int  tb_rsvd      :6;
  47                 unsigned long tb_rpn       :40; /* Real page number */
  48                 unsigned int  tb_valid     :1;  /* Tce is valid (vb only) */
  49                 unsigned int  tb_allio     :1;  /* Tce is valid for all lps (vb only) */
  50                 unsigned int  tb_lpindex   :8;  /* LpIndex for user of TCE (vb only) */
  51                 unsigned int  tb_pciwr     :1;  /* Write allowed (pci only) */
  52                 unsigned int  tb_rdwr      :1;  /* Read allowed  (pci), Write allowed (vb) */
  53         } te_bits;
  54 #define te_cacheBits te_bits.tb_cacheBits
  55 #define te_rpn       te_bits.tb_rpn
  56 #define te_valid     te_bits.tb_valid
  57 #define te_allio     te_bits.tb_allio
  58 #define te_lpindex   te_bits.tb_lpindex
  59 #define te_pciwr     te_bits.tb_pciwr
  60 #define te_rdwr      te_bits.tb_rdwr
  61 };
  62
  63
  64 #endif /* _ASM_POWERPC_TCE_H */