6dcd7a811fe1613ed48d2cffffd4559265092fc2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-powerpc / ppc-pci.h
1 /*
2 * c 2001 PPC 64 Team, IBM Corp
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9 #ifndef _ASM_POWERPC_PPC_PCI_H
10 #define _ASM_POWERPC_PPC_PCI_H
11 #ifdef __KERNEL__
12
13 #ifdef CONFIG_PCI
14
15 #include <linux/pci.h>
16 #include <asm/pci-bridge.h>
17
18 extern unsigned long isa_io_base;
19
20 extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
21 extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
22
23
24 extern struct list_head hose_list;
25 extern int global_phb_number;
26
27 extern void find_and_init_phbs(void);
28
29 extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */
30
31 /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
32 #define BUID_HI(buid) ((buid) >> 32)
33 #define BUID_LO(buid) ((buid) & 0xffffffff)
34
35 /* PCI device_node operations */
36 struct device_node;
37 typedef void *(*traverse_func)(struct device_node *me, void *data);
38 void *traverse_pci_devices(struct device_node *start, traverse_func pre,
39 void *data);
40
41 extern void pci_devs_phb_init(void);
42 extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
43 extern void scan_phb(struct pci_controller *hose);
44
45 /* From rtas_pci.h */
46 extern void init_pci_config_tokens (void);
47 extern unsigned long get_phb_buid (struct device_node *);
48 extern int rtas_setup_phb(struct pci_controller *phb);
49
50 /* From pSeries_pci.h */
51 extern void pSeries_final_fixup(void);
52
53 extern unsigned long pci_probe_only;
54
55 /* ---- EEH internal-use-only related routines ---- */
56 #ifdef CONFIG_EEH
57
58 void pci_addr_cache_insert_device(struct pci_dev *dev);
59 void pci_addr_cache_remove_device(struct pci_dev *dev);
60 void pci_addr_cache_build(void);
61 struct pci_dev *pci_get_device_by_addr(unsigned long addr);
62
63 /**
64 * eeh_slot_error_detail -- record and EEH error condition to the log
65 * @severity: 1 if temporary, 2 if permanent failure.
66 *
67 * Obtains the EEH error details from the RTAS subsystem,
68 * and then logs these details with the RTAS error log system.
69 */
70 void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
71
72 /**
73 * rtas_pci_enable - enable IO transfers for this slot
74 * @pdn: pci device node
75 * @function: either EEH_THAW_MMIO or EEH_THAW_DMA
76 *
77 * Enable I/O transfers to this slot
78 */
79 #define EEH_THAW_MMIO 2
80 #define EEH_THAW_DMA 3
81 int rtas_pci_enable(struct pci_dn *pdn, int function);
82
83 /**
84 * rtas_set_slot_reset -- unfreeze a frozen slot
85 *
86 * Clear the EEH-frozen condition on a slot. This routine
87 * does this by asserting the PCI #RST line for 1/8th of
88 * a second; this routine will sleep while the adapter is
89 * being reset.
90 *
91 * Returns a non-zero value if the reset failed.
92 */
93 int rtas_set_slot_reset (struct pci_dn *);
94 int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
95
96 /**
97 * eeh_restore_bars - Restore device configuration info.
98 *
99 * A reset of a PCI device will clear out its config space.
100 * This routines will restore the config space for this
101 * device, and is children, to values previously obtained
102 * from the firmware.
103 */
104 void eeh_restore_bars(struct pci_dn *);
105
106 /**
107 * rtas_configure_bridge -- firmware initialization of pci bridge
108 *
109 * Ask the firmware to configure all PCI bridges devices
110 * located behind the indicated node. Required after a
111 * pci device reset. Does essentially the same hing as
112 * eeh_restore_bars, but for brdges, and lets firmware
113 * do the work.
114 */
115 void rtas_configure_bridge(struct pci_dn *);
116
117 int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
118 int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
119
120 /**
121 * mark and clear slots: find "partition endpoint" PE and set or
122 * clear the flags for each subnode of the PE.
123 */
124 void eeh_mark_slot (struct device_node *dn, int mode_flag);
125 void eeh_clear_slot (struct device_node *dn, int mode_flag);
126
127 /* Find the associated "Partiationable Endpoint" PE */
128 struct device_node * find_device_pe(struct device_node *dn);
129
130 #endif
131
132 #else /* CONFIG_PCI */
133 static inline void find_and_init_phbs(void) { }
134 static inline void init_pci_config_tokens(void) { }
135 #endif /* !CONFIG_PCI */
136
137 #endif /* __KERNEL__ */
138 #endif /* _ASM_POWERPC_PPC_PCI_H */