Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-powerpc / bitops.h
1 /*
2 * PowerPC atomic bit operations.
3 *
4 * Merged version by David Gibson <david@gibson.dropbear.id.au>.
5 * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
6 * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They
7 * originally took it from the ppc32 code.
8 *
9 * Within a word, bits are numbered LSB first. Lot's of places make
10 * this assumption by directly testing bits with (val & (1<<nr)).
11 * This can cause confusion for large (> 1 word) bitmaps on a
12 * big-endian system because, unlike little endian, the number of each
13 * bit depends on the word size.
14 *
15 * The bitop functions are defined to work on unsigned longs, so for a
16 * ppc64 system the bits end up numbered:
17 * |63..............0|127............64|191...........128|255...........196|
18 * and on ppc32:
19 * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224|
20 *
21 * There are a few little-endian macros used mostly for filesystem
22 * bitmaps, these work on similar bit arrays layouts, but
23 * byte-oriented:
24 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
25 *
26 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
27 * number field needs to be reversed compared to the big-endian bit
28 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
29 *
30 * This program is free software; you can redistribute it and/or
31 * modify it under the terms of the GNU General Public License
32 * as published by the Free Software Foundation; either version
33 * 2 of the License, or (at your option) any later version.
34 */
35
36 #ifndef _ASM_POWERPC_BITOPS_H
37 #define _ASM_POWERPC_BITOPS_H
38
39 #ifdef __KERNEL__
40
41 #include <linux/compiler.h>
42 #include <asm/asm-compat.h>
43 #include <asm/synch.h>
44
45 /*
46 * clear_bit doesn't imply a memory barrier
47 */
48 #define smp_mb__before_clear_bit() smp_mb()
49 #define smp_mb__after_clear_bit() smp_mb()
50
51 #define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
52 #define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
53 #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
54
55 static __inline__ void set_bit(int nr, volatile unsigned long *addr)
56 {
57 unsigned long old;
58 unsigned long mask = BITOP_MASK(nr);
59 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
60
61 __asm__ __volatile__(
62 "1:" PPC_LLARX "%0,0,%3 # set_bit\n"
63 "or %0,%0,%2\n"
64 PPC405_ERR77(0,%3)
65 PPC_STLCX "%0,0,%3\n"
66 "bne- 1b"
67 : "=&r" (old), "+m" (*p)
68 : "r" (mask), "r" (p)
69 : "cc" );
70 }
71
72 static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
73 {
74 unsigned long old;
75 unsigned long mask = BITOP_MASK(nr);
76 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
77
78 __asm__ __volatile__(
79 "1:" PPC_LLARX "%0,0,%3 # clear_bit\n"
80 "andc %0,%0,%2\n"
81 PPC405_ERR77(0,%3)
82 PPC_STLCX "%0,0,%3\n"
83 "bne- 1b"
84 : "=&r" (old), "+m" (*p)
85 : "r" (mask), "r" (p)
86 : "cc" );
87 }
88
89 static __inline__ void change_bit(int nr, volatile unsigned long *addr)
90 {
91 unsigned long old;
92 unsigned long mask = BITOP_MASK(nr);
93 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
94
95 __asm__ __volatile__(
96 "1:" PPC_LLARX "%0,0,%3 # change_bit\n"
97 "xor %0,%0,%2\n"
98 PPC405_ERR77(0,%3)
99 PPC_STLCX "%0,0,%3\n"
100 "bne- 1b"
101 : "=&r" (old), "+m" (*p)
102 : "r" (mask), "r" (p)
103 : "cc" );
104 }
105
106 static __inline__ int test_and_set_bit(unsigned long nr,
107 volatile unsigned long *addr)
108 {
109 unsigned long old, t;
110 unsigned long mask = BITOP_MASK(nr);
111 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
112
113 __asm__ __volatile__(
114 LWSYNC_ON_SMP
115 "1:" PPC_LLARX "%0,0,%3 # test_and_set_bit\n"
116 "or %1,%0,%2 \n"
117 PPC405_ERR77(0,%3)
118 PPC_STLCX "%1,0,%3 \n"
119 "bne- 1b"
120 ISYNC_ON_SMP
121 : "=&r" (old), "=&r" (t)
122 : "r" (mask), "r" (p)
123 : "cc", "memory");
124
125 return (old & mask) != 0;
126 }
127
128 static __inline__ int test_and_clear_bit(unsigned long nr,
129 volatile unsigned long *addr)
130 {
131 unsigned long old, t;
132 unsigned long mask = BITOP_MASK(nr);
133 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
134
135 __asm__ __volatile__(
136 LWSYNC_ON_SMP
137 "1:" PPC_LLARX "%0,0,%3 # test_and_clear_bit\n"
138 "andc %1,%0,%2 \n"
139 PPC405_ERR77(0,%3)
140 PPC_STLCX "%1,0,%3 \n"
141 "bne- 1b"
142 ISYNC_ON_SMP
143 : "=&r" (old), "=&r" (t)
144 : "r" (mask), "r" (p)
145 : "cc", "memory");
146
147 return (old & mask) != 0;
148 }
149
150 static __inline__ int test_and_change_bit(unsigned long nr,
151 volatile unsigned long *addr)
152 {
153 unsigned long old, t;
154 unsigned long mask = BITOP_MASK(nr);
155 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
156
157 __asm__ __volatile__(
158 LWSYNC_ON_SMP
159 "1:" PPC_LLARX "%0,0,%3 # test_and_change_bit\n"
160 "xor %1,%0,%2 \n"
161 PPC405_ERR77(0,%3)
162 PPC_STLCX "%1,0,%3 \n"
163 "bne- 1b"
164 ISYNC_ON_SMP
165 : "=&r" (old), "=&r" (t)
166 : "r" (mask), "r" (p)
167 : "cc", "memory");
168
169 return (old & mask) != 0;
170 }
171
172 static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
173 {
174 unsigned long old;
175
176 __asm__ __volatile__(
177 "1:" PPC_LLARX "%0,0,%3 # set_bits\n"
178 "or %0,%0,%2\n"
179 PPC_STLCX "%0,0,%3\n"
180 "bne- 1b"
181 : "=&r" (old), "+m" (*addr)
182 : "r" (mask), "r" (addr)
183 : "cc");
184 }
185
186 #include <asm-generic/bitops/non-atomic.h>
187
188 /*
189 * Return the zero-based bit position (LE, not IBM bit numbering) of
190 * the most significant 1-bit in a double word.
191 */
192 static __inline__ __attribute__((const))
193 int __ilog2(unsigned long x)
194 {
195 int lz;
196
197 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
198 return BITS_PER_LONG - 1 - lz;
199 }
200
201 static inline __attribute__((const))
202 int __ilog2_u32(u32 n)
203 {
204 int bit;
205 asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n));
206 return 31 - bit;
207 }
208
209 #ifdef __powerpc64__
210 static inline __attribute__((const))
211 int __ilog2_u64(u64 n)
212 {
213 int bit;
214 asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n));
215 return 63 - bit;
216 }
217 #endif
218
219 /*
220 * Determines the bit position of the least significant 0 bit in the
221 * specified double word. The returned bit position will be
222 * zero-based, starting from the right side (63/31 - 0).
223 */
224 static __inline__ unsigned long ffz(unsigned long x)
225 {
226 /* no zero exists anywhere in the 8 byte area. */
227 if ((x = ~x) == 0)
228 return BITS_PER_LONG;
229
230 /*
231 * Calculate the bit position of the least signficant '1' bit in x
232 * (since x has been changed this will actually be the least signficant
233 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
234 * is the least significant * (RIGHT-most) 1-bit of the value in x.
235 */
236 return __ilog2(x & -x);
237 }
238
239 static __inline__ int __ffs(unsigned long x)
240 {
241 return __ilog2(x & -x);
242 }
243
244 /*
245 * ffs: find first bit set. This is defined the same way as
246 * the libc and compiler builtin ffs routines, therefore
247 * differs in spirit from the above ffz (man ffs).
248 */
249 static __inline__ int ffs(int x)
250 {
251 unsigned long i = (unsigned long)x;
252 return __ilog2(i & -i) + 1;
253 }
254
255 /*
256 * fls: find last (most-significant) bit set.
257 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
258 */
259 static __inline__ int fls(unsigned int x)
260 {
261 int lz;
262
263 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
264 return 32 - lz;
265 }
266 #include <asm-generic/bitops/fls64.h>
267
268 #include <asm-generic/bitops/hweight.h>
269
270 #define find_first_zero_bit(addr, size) find_next_zero_bit((addr), (size), 0)
271 unsigned long find_next_zero_bit(const unsigned long *addr,
272 unsigned long size, unsigned long offset);
273 /**
274 * find_first_bit - find the first set bit in a memory region
275 * @addr: The address to start the search at
276 * @size: The maximum size to search
277 *
278 * Returns the bit-number of the first set bit, not the number of the byte
279 * containing a bit.
280 */
281 #define find_first_bit(addr, size) find_next_bit((addr), (size), 0)
282 unsigned long find_next_bit(const unsigned long *addr,
283 unsigned long size, unsigned long offset);
284
285 /* Little-endian versions */
286
287 static __inline__ int test_le_bit(unsigned long nr,
288 __const__ unsigned long *addr)
289 {
290 __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
291 return (tmp[nr >> 3] >> (nr & 7)) & 1;
292 }
293
294 #define __set_le_bit(nr, addr) \
295 __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
296 #define __clear_le_bit(nr, addr) \
297 __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
298
299 #define test_and_set_le_bit(nr, addr) \
300 test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
301 #define test_and_clear_le_bit(nr, addr) \
302 test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
303
304 #define __test_and_set_le_bit(nr, addr) \
305 __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
306 #define __test_and_clear_le_bit(nr, addr) \
307 __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
308
309 #define find_first_zero_le_bit(addr, size) generic_find_next_zero_le_bit((addr), (size), 0)
310 unsigned long generic_find_next_zero_le_bit(const unsigned long *addr,
311 unsigned long size, unsigned long offset);
312
313 /* Bitmap functions for the ext2 filesystem */
314
315 #define ext2_set_bit(nr,addr) \
316 __test_and_set_le_bit((nr), (unsigned long*)addr)
317 #define ext2_clear_bit(nr, addr) \
318 __test_and_clear_le_bit((nr), (unsigned long*)addr)
319
320 #define ext2_set_bit_atomic(lock, nr, addr) \
321 test_and_set_le_bit((nr), (unsigned long*)addr)
322 #define ext2_clear_bit_atomic(lock, nr, addr) \
323 test_and_clear_le_bit((nr), (unsigned long*)addr)
324
325 #define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
326
327 #define ext2_find_first_zero_bit(addr, size) \
328 find_first_zero_le_bit((unsigned long*)addr, size)
329 #define ext2_find_next_zero_bit(addr, size, off) \
330 generic_find_next_zero_le_bit((unsigned long*)addr, size, off)
331
332 /* Bitmap functions for the minix filesystem. */
333
334 #define minix_test_and_set_bit(nr,addr) \
335 __test_and_set_le_bit(nr, (unsigned long *)addr)
336 #define minix_set_bit(nr,addr) \
337 __set_le_bit(nr, (unsigned long *)addr)
338 #define minix_test_and_clear_bit(nr,addr) \
339 __test_and_clear_le_bit(nr, (unsigned long *)addr)
340 #define minix_test_bit(nr,addr) \
341 test_le_bit(nr, (unsigned long *)addr)
342
343 #define minix_find_first_zero_bit(addr,size) \
344 find_first_zero_le_bit((unsigned long *)addr, size)
345
346 #include <asm-generic/bitops/sched.h>
347
348 #endif /* __KERNEL__ */
349
350 #endif /* _ASM_POWERPC_BITOPS_H */