ARM: at91: fix board-rm9200-dt after sys_timer conversion
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-generic / pgtable.h
1 #ifndef _ASM_GENERIC_PGTABLE_H
2 #define _ASM_GENERIC_PGTABLE_H
3
4 #ifndef __ASSEMBLY__
5 #ifdef CONFIG_MMU
6
7 #include <linux/mm_types.h>
8 #include <linux/bug.h>
9
10 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
11 extern int ptep_set_access_flags(struct vm_area_struct *vma,
12 unsigned long address, pte_t *ptep,
13 pte_t entry, int dirty);
14 #endif
15
16 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
17 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
18 unsigned long address, pmd_t *pmdp,
19 pmd_t entry, int dirty);
20 #endif
21
22 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
23 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
24 unsigned long address,
25 pte_t *ptep)
26 {
27 pte_t pte = *ptep;
28 int r = 1;
29 if (!pte_young(pte))
30 r = 0;
31 else
32 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
33 return r;
34 }
35 #endif
36
37 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
38 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
39 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
40 unsigned long address,
41 pmd_t *pmdp)
42 {
43 pmd_t pmd = *pmdp;
44 int r = 1;
45 if (!pmd_young(pmd))
46 r = 0;
47 else
48 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
49 return r;
50 }
51 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
52 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
53 unsigned long address,
54 pmd_t *pmdp)
55 {
56 BUG();
57 return 0;
58 }
59 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
60 #endif
61
62 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
63 int ptep_clear_flush_young(struct vm_area_struct *vma,
64 unsigned long address, pte_t *ptep);
65 #endif
66
67 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
68 int pmdp_clear_flush_young(struct vm_area_struct *vma,
69 unsigned long address, pmd_t *pmdp);
70 #endif
71
72 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
73 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
74 unsigned long address,
75 pte_t *ptep)
76 {
77 pte_t pte = *ptep;
78 pte_clear(mm, address, ptep);
79 return pte;
80 }
81 #endif
82
83 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
84 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
85 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
86 unsigned long address,
87 pmd_t *pmdp)
88 {
89 pmd_t pmd = *pmdp;
90 pmd_clear(pmdp);
91 return pmd;
92 }
93 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
94 #endif
95
96 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
97 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
98 unsigned long address, pte_t *ptep,
99 int full)
100 {
101 pte_t pte;
102 pte = ptep_get_and_clear(mm, address, ptep);
103 return pte;
104 }
105 #endif
106
107 /*
108 * Some architectures may be able to avoid expensive synchronization
109 * primitives when modifications are made to PTE's which are already
110 * not present, or in the process of an address space destruction.
111 */
112 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
113 static inline void pte_clear_not_present_full(struct mm_struct *mm,
114 unsigned long address,
115 pte_t *ptep,
116 int full)
117 {
118 pte_clear(mm, address, ptep);
119 }
120 #endif
121
122 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
123 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
124 unsigned long address,
125 pte_t *ptep);
126 #endif
127
128 #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
129 extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
130 unsigned long address,
131 pmd_t *pmdp);
132 #endif
133
134 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
135 struct mm_struct;
136 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
137 {
138 pte_t old_pte = *ptep;
139 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
140 }
141 #endif
142
143 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
144 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
145 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
146 unsigned long address, pmd_t *pmdp)
147 {
148 pmd_t old_pmd = *pmdp;
149 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
150 }
151 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
152 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
153 unsigned long address, pmd_t *pmdp)
154 {
155 BUG();
156 }
157 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
158 #endif
159
160 #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
161 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
162 unsigned long address, pmd_t *pmdp);
163 #endif
164
165 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
166 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
167 #endif
168
169 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
170 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm);
171 #endif
172
173 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
174 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
175 pmd_t *pmdp);
176 #endif
177
178 #ifndef __HAVE_ARCH_PTE_SAME
179 static inline int pte_same(pte_t pte_a, pte_t pte_b)
180 {
181 return pte_val(pte_a) == pte_val(pte_b);
182 }
183 #endif
184
185 #ifndef __HAVE_ARCH_PMD_SAME
186 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
187 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
188 {
189 return pmd_val(pmd_a) == pmd_val(pmd_b);
190 }
191 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
192 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
193 {
194 BUG();
195 return 0;
196 }
197 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
198 #endif
199
200 #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
201 #define page_test_and_clear_dirty(pfn, mapped) (0)
202 #endif
203
204 #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
205 #define pte_maybe_dirty(pte) pte_dirty(pte)
206 #else
207 #define pte_maybe_dirty(pte) (1)
208 #endif
209
210 #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
211 #define page_test_and_clear_young(pfn) (0)
212 #endif
213
214 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
215 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
216 #endif
217
218 #ifndef __HAVE_ARCH_MOVE_PTE
219 #define move_pte(pte, prot, old_addr, new_addr) (pte)
220 #endif
221
222 #ifndef pte_accessible
223 # define pte_accessible(pte) ((void)(pte),1)
224 #endif
225
226 #ifndef flush_tlb_fix_spurious_fault
227 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
228 #endif
229
230 #ifndef pgprot_noncached
231 #define pgprot_noncached(prot) (prot)
232 #endif
233
234 #ifndef pgprot_writecombine
235 #define pgprot_writecombine pgprot_noncached
236 #endif
237
238 /*
239 * When walking page tables, get the address of the next boundary,
240 * or the end address of the range if that comes earlier. Although no
241 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
242 */
243
244 #define pgd_addr_end(addr, end) \
245 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
246 (__boundary - 1 < (end) - 1)? __boundary: (end); \
247 })
248
249 #ifndef pud_addr_end
250 #define pud_addr_end(addr, end) \
251 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
252 (__boundary - 1 < (end) - 1)? __boundary: (end); \
253 })
254 #endif
255
256 #ifndef pmd_addr_end
257 #define pmd_addr_end(addr, end) \
258 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
259 (__boundary - 1 < (end) - 1)? __boundary: (end); \
260 })
261 #endif
262
263 /*
264 * When walking page tables, we usually want to skip any p?d_none entries;
265 * and any p?d_bad entries - reporting the error before resetting to none.
266 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
267 */
268 void pgd_clear_bad(pgd_t *);
269 void pud_clear_bad(pud_t *);
270 void pmd_clear_bad(pmd_t *);
271
272 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
273 {
274 if (pgd_none(*pgd))
275 return 1;
276 if (unlikely(pgd_bad(*pgd))) {
277 pgd_clear_bad(pgd);
278 return 1;
279 }
280 return 0;
281 }
282
283 static inline int pud_none_or_clear_bad(pud_t *pud)
284 {
285 if (pud_none(*pud))
286 return 1;
287 if (unlikely(pud_bad(*pud))) {
288 pud_clear_bad(pud);
289 return 1;
290 }
291 return 0;
292 }
293
294 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
295 {
296 if (pmd_none(*pmd))
297 return 1;
298 if (unlikely(pmd_bad(*pmd))) {
299 pmd_clear_bad(pmd);
300 return 1;
301 }
302 return 0;
303 }
304
305 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
306 unsigned long addr,
307 pte_t *ptep)
308 {
309 /*
310 * Get the current pte state, but zero it out to make it
311 * non-present, preventing the hardware from asynchronously
312 * updating it.
313 */
314 return ptep_get_and_clear(mm, addr, ptep);
315 }
316
317 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
318 unsigned long addr,
319 pte_t *ptep, pte_t pte)
320 {
321 /*
322 * The pte is non-present, so there's no hardware state to
323 * preserve.
324 */
325 set_pte_at(mm, addr, ptep, pte);
326 }
327
328 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
329 /*
330 * Start a pte protection read-modify-write transaction, which
331 * protects against asynchronous hardware modifications to the pte.
332 * The intention is not to prevent the hardware from making pte
333 * updates, but to prevent any updates it may make from being lost.
334 *
335 * This does not protect against other software modifications of the
336 * pte; the appropriate pte lock must be held over the transation.
337 *
338 * Note that this interface is intended to be batchable, meaning that
339 * ptep_modify_prot_commit may not actually update the pte, but merely
340 * queue the update to be done at some later time. The update must be
341 * actually committed before the pte lock is released, however.
342 */
343 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
344 unsigned long addr,
345 pte_t *ptep)
346 {
347 return __ptep_modify_prot_start(mm, addr, ptep);
348 }
349
350 /*
351 * Commit an update to a pte, leaving any hardware-controlled bits in
352 * the PTE unmodified.
353 */
354 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
355 unsigned long addr,
356 pte_t *ptep, pte_t pte)
357 {
358 __ptep_modify_prot_commit(mm, addr, ptep, pte);
359 }
360 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
361 #endif /* CONFIG_MMU */
362
363 /*
364 * A facility to provide lazy MMU batching. This allows PTE updates and
365 * page invalidations to be delayed until a call to leave lazy MMU mode
366 * is issued. Some architectures may benefit from doing this, and it is
367 * beneficial for both shadow and direct mode hypervisors, which may batch
368 * the PTE updates which happen during this window. Note that using this
369 * interface requires that read hazards be removed from the code. A read
370 * hazard could result in the direct mode hypervisor case, since the actual
371 * write to the page tables may not yet have taken place, so reads though
372 * a raw PTE pointer after it has been modified are not guaranteed to be
373 * up to date. This mode can only be entered and left under the protection of
374 * the page table locks for all page tables which may be modified. In the UP
375 * case, this is required so that preemption is disabled, and in the SMP case,
376 * it must synchronize the delayed page table writes properly on other CPUs.
377 */
378 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
379 #define arch_enter_lazy_mmu_mode() do {} while (0)
380 #define arch_leave_lazy_mmu_mode() do {} while (0)
381 #define arch_flush_lazy_mmu_mode() do {} while (0)
382 #endif
383
384 /*
385 * A facility to provide batching of the reload of page tables and
386 * other process state with the actual context switch code for
387 * paravirtualized guests. By convention, only one of the batched
388 * update (lazy) modes (CPU, MMU) should be active at any given time,
389 * entry should never be nested, and entry and exits should always be
390 * paired. This is for sanity of maintaining and reasoning about the
391 * kernel code. In this case, the exit (end of the context switch) is
392 * in architecture-specific code, and so doesn't need a generic
393 * definition.
394 */
395 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
396 #define arch_start_context_switch(prev) do {} while (0)
397 #endif
398
399 #ifndef __HAVE_PFNMAP_TRACKING
400 /*
401 * Interfaces that can be used by architecture code to keep track of
402 * memory type of pfn mappings specified by the remap_pfn_range,
403 * vm_insert_pfn.
404 */
405
406 /*
407 * track_pfn_remap is called when a _new_ pfn mapping is being established
408 * by remap_pfn_range() for physical range indicated by pfn and size.
409 */
410 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
411 unsigned long pfn, unsigned long addr,
412 unsigned long size)
413 {
414 return 0;
415 }
416
417 /*
418 * track_pfn_insert is called when a _new_ single pfn is established
419 * by vm_insert_pfn().
420 */
421 static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
422 unsigned long pfn)
423 {
424 return 0;
425 }
426
427 /*
428 * track_pfn_copy is called when vma that is covering the pfnmap gets
429 * copied through copy_page_range().
430 */
431 static inline int track_pfn_copy(struct vm_area_struct *vma)
432 {
433 return 0;
434 }
435
436 /*
437 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
438 * untrack can be called for a specific region indicated by pfn and size or
439 * can be for the entire vma (in which case pfn, size are zero).
440 */
441 static inline void untrack_pfn(struct vm_area_struct *vma,
442 unsigned long pfn, unsigned long size)
443 {
444 }
445 #else
446 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
447 unsigned long pfn, unsigned long addr,
448 unsigned long size);
449 extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
450 unsigned long pfn);
451 extern int track_pfn_copy(struct vm_area_struct *vma);
452 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
453 unsigned long size);
454 #endif
455
456 #ifdef __HAVE_COLOR_ZERO_PAGE
457 static inline int is_zero_pfn(unsigned long pfn)
458 {
459 extern unsigned long zero_pfn;
460 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
461 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
462 }
463
464 static inline unsigned long my_zero_pfn(unsigned long addr)
465 {
466 return page_to_pfn(ZERO_PAGE(addr));
467 }
468 #else
469 static inline int is_zero_pfn(unsigned long pfn)
470 {
471 extern unsigned long zero_pfn;
472 return pfn == zero_pfn;
473 }
474
475 static inline unsigned long my_zero_pfn(unsigned long addr)
476 {
477 extern unsigned long zero_pfn;
478 return zero_pfn;
479 }
480 #endif
481
482 #ifdef CONFIG_MMU
483
484 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
485 static inline int pmd_trans_huge(pmd_t pmd)
486 {
487 return 0;
488 }
489 static inline int pmd_trans_splitting(pmd_t pmd)
490 {
491 return 0;
492 }
493 #ifndef __HAVE_ARCH_PMD_WRITE
494 static inline int pmd_write(pmd_t pmd)
495 {
496 BUG();
497 return 0;
498 }
499 #endif /* __HAVE_ARCH_PMD_WRITE */
500 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
501
502 #ifndef pmd_read_atomic
503 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
504 {
505 /*
506 * Depend on compiler for an atomic pmd read. NOTE: this is
507 * only going to work, if the pmdval_t isn't larger than
508 * an unsigned long.
509 */
510 return *pmdp;
511 }
512 #endif
513
514 /*
515 * This function is meant to be used by sites walking pagetables with
516 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
517 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
518 * into a null pmd and the transhuge page fault can convert a null pmd
519 * into an hugepmd or into a regular pmd (if the hugepage allocation
520 * fails). While holding the mmap_sem in read mode the pmd becomes
521 * stable and stops changing under us only if it's not null and not a
522 * transhuge pmd. When those races occurs and this function makes a
523 * difference vs the standard pmd_none_or_clear_bad, the result is
524 * undefined so behaving like if the pmd was none is safe (because it
525 * can return none anyway). The compiler level barrier() is critically
526 * important to compute the two checks atomically on the same pmdval.
527 *
528 * For 32bit kernels with a 64bit large pmd_t this automatically takes
529 * care of reading the pmd atomically to avoid SMP race conditions
530 * against pmd_populate() when the mmap_sem is hold for reading by the
531 * caller (a special atomic read not done by "gcc" as in the generic
532 * version above, is also needed when THP is disabled because the page
533 * fault can populate the pmd from under us).
534 */
535 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
536 {
537 pmd_t pmdval = pmd_read_atomic(pmd);
538 /*
539 * The barrier will stabilize the pmdval in a register or on
540 * the stack so that it will stop changing under the code.
541 *
542 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
543 * pmd_read_atomic is allowed to return a not atomic pmdval
544 * (for example pointing to an hugepage that has never been
545 * mapped in the pmd). The below checks will only care about
546 * the low part of the pmd with 32bit PAE x86 anyway, with the
547 * exception of pmd_none(). So the important thing is that if
548 * the low part of the pmd is found null, the high part will
549 * be also null or the pmd_none() check below would be
550 * confused.
551 */
552 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
553 barrier();
554 #endif
555 if (pmd_none(pmdval))
556 return 1;
557 if (unlikely(pmd_bad(pmdval))) {
558 if (!pmd_trans_huge(pmdval))
559 pmd_clear_bad(pmd);
560 return 1;
561 }
562 return 0;
563 }
564
565 /*
566 * This is a noop if Transparent Hugepage Support is not built into
567 * the kernel. Otherwise it is equivalent to
568 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
569 * places that already verified the pmd is not none and they want to
570 * walk ptes while holding the mmap sem in read mode (write mode don't
571 * need this). If THP is not enabled, the pmd can't go away under the
572 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
573 * run a pmd_trans_unstable before walking the ptes after
574 * split_huge_page_pmd returns (because it may have run when the pmd
575 * become null, but then a page fault can map in a THP and not a
576 * regular page).
577 */
578 static inline int pmd_trans_unstable(pmd_t *pmd)
579 {
580 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
581 return pmd_none_or_trans_huge_or_clear_bad(pmd);
582 #else
583 return 0;
584 #endif
585 }
586
587 #ifdef CONFIG_NUMA_BALANCING
588 #ifdef CONFIG_ARCH_USES_NUMA_PROT_NONE
589 /*
590 * _PAGE_NUMA works identical to _PAGE_PROTNONE (it's actually the
591 * same bit too). It's set only when _PAGE_PRESET is not set and it's
592 * never set if _PAGE_PRESENT is set.
593 *
594 * pte/pmd_present() returns true if pte/pmd_numa returns true. Page
595 * fault triggers on those regions if pte/pmd_numa returns true
596 * (because _PAGE_PRESENT is not set).
597 */
598 #ifndef pte_numa
599 static inline int pte_numa(pte_t pte)
600 {
601 return (pte_flags(pte) &
602 (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
603 }
604 #endif
605
606 #ifndef pmd_numa
607 static inline int pmd_numa(pmd_t pmd)
608 {
609 return (pmd_flags(pmd) &
610 (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
611 }
612 #endif
613
614 /*
615 * pte/pmd_mknuma sets the _PAGE_ACCESSED bitflag automatically
616 * because they're called by the NUMA hinting minor page fault. If we
617 * wouldn't set the _PAGE_ACCESSED bitflag here, the TLB miss handler
618 * would be forced to set it later while filling the TLB after we
619 * return to userland. That would trigger a second write to memory
620 * that we optimize away by setting _PAGE_ACCESSED here.
621 */
622 #ifndef pte_mknonnuma
623 static inline pte_t pte_mknonnuma(pte_t pte)
624 {
625 pte = pte_clear_flags(pte, _PAGE_NUMA);
626 return pte_set_flags(pte, _PAGE_PRESENT|_PAGE_ACCESSED);
627 }
628 #endif
629
630 #ifndef pmd_mknonnuma
631 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
632 {
633 pmd = pmd_clear_flags(pmd, _PAGE_NUMA);
634 return pmd_set_flags(pmd, _PAGE_PRESENT|_PAGE_ACCESSED);
635 }
636 #endif
637
638 #ifndef pte_mknuma
639 static inline pte_t pte_mknuma(pte_t pte)
640 {
641 pte = pte_set_flags(pte, _PAGE_NUMA);
642 return pte_clear_flags(pte, _PAGE_PRESENT);
643 }
644 #endif
645
646 #ifndef pmd_mknuma
647 static inline pmd_t pmd_mknuma(pmd_t pmd)
648 {
649 pmd = pmd_set_flags(pmd, _PAGE_NUMA);
650 return pmd_clear_flags(pmd, _PAGE_PRESENT);
651 }
652 #endif
653 #else
654 extern int pte_numa(pte_t pte);
655 extern int pmd_numa(pmd_t pmd);
656 extern pte_t pte_mknonnuma(pte_t pte);
657 extern pmd_t pmd_mknonnuma(pmd_t pmd);
658 extern pte_t pte_mknuma(pte_t pte);
659 extern pmd_t pmd_mknuma(pmd_t pmd);
660 #endif /* CONFIG_ARCH_USES_NUMA_PROT_NONE */
661 #else
662 static inline int pmd_numa(pmd_t pmd)
663 {
664 return 0;
665 }
666
667 static inline int pte_numa(pte_t pte)
668 {
669 return 0;
670 }
671
672 static inline pte_t pte_mknonnuma(pte_t pte)
673 {
674 return pte;
675 }
676
677 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
678 {
679 return pmd;
680 }
681
682 static inline pte_t pte_mknuma(pte_t pte)
683 {
684 return pte;
685 }
686
687 static inline pmd_t pmd_mknuma(pmd_t pmd)
688 {
689 return pmd;
690 }
691 #endif /* CONFIG_NUMA_BALANCING */
692
693 #endif /* CONFIG_MMU */
694
695 #endif /* !__ASSEMBLY__ */
696
697 #endif /* _ASM_GENERIC_PGTABLE_H */