dma-mapping: add the device argument to dma_mapping_error()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-arm / dma-mapping.h
1 #ifndef ASMARM_DMA_MAPPING_H
2 #define ASMARM_DMA_MAPPING_H
3
4 #ifdef __KERNEL__
5
6 #include <linux/mm.h> /* need struct page */
7
8 #include <linux/scatterlist.h>
9
10 /*
11 * DMA-consistent mapping functions. These allocate/free a region of
12 * uncached, unwrite-buffered mapped memory space for use with DMA
13 * devices. This is the "generic" version. The PCI specific version
14 * is in pci.h
15 *
16 * Note: Drivers should NOT use this function directly, as it will break
17 * platforms with CONFIG_DMABOUNCE.
18 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
19 */
20 extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
21
22 /*
23 * Return whether the given device DMA address mask can be supported
24 * properly. For example, if your device can only drive the low 24-bits
25 * during bus mastering, then you would pass 0x00ffffff as the mask
26 * to this function.
27 *
28 * FIXME: This should really be a platform specific issue - we should
29 * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
30 */
31 static inline int dma_supported(struct device *dev, u64 mask)
32 {
33 return dev->dma_mask && *dev->dma_mask != 0;
34 }
35
36 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
37 {
38 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
39 return -EIO;
40
41 *dev->dma_mask = dma_mask;
42
43 return 0;
44 }
45
46 static inline int dma_get_cache_alignment(void)
47 {
48 return 32;
49 }
50
51 static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
52 {
53 return !!arch_is_coherent();
54 }
55
56 /*
57 * DMA errors are defined by all-bits-set in the DMA address.
58 */
59 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
60 {
61 return dma_addr == ~0;
62 }
63
64 /*
65 * Dummy noncoherent implementation. We don't provide a dma_cache_sync
66 * function so drivers using this API are highlighted with build warnings.
67 */
68 static inline void *
69 dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
70 {
71 return NULL;
72 }
73
74 static inline void
75 dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
76 dma_addr_t handle)
77 {
78 }
79
80 /**
81 * dma_alloc_coherent - allocate consistent memory for DMA
82 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
83 * @size: required memory size
84 * @handle: bus-specific DMA address
85 *
86 * Allocate some uncached, unbuffered memory for a device for
87 * performing DMA. This function allocates pages, and will
88 * return the CPU-viewed address, and sets @handle to be the
89 * device-viewed address.
90 */
91 extern void *
92 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
93
94 /**
95 * dma_free_coherent - free memory allocated by dma_alloc_coherent
96 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
97 * @size: size of memory originally requested in dma_alloc_coherent
98 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
99 * @handle: device-view address returned from dma_alloc_coherent
100 *
101 * Free (and unmap) a DMA buffer previously allocated by
102 * dma_alloc_coherent().
103 *
104 * References to memory and mappings associated with cpu_addr/handle
105 * during and after this call executing are illegal.
106 */
107 extern void
108 dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
109 dma_addr_t handle);
110
111 /**
112 * dma_mmap_coherent - map a coherent DMA allocation into user space
113 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
114 * @vma: vm_area_struct describing requested user mapping
115 * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
116 * @handle: device-view address returned from dma_alloc_coherent
117 * @size: size of memory originally requested in dma_alloc_coherent
118 *
119 * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
120 * into user space. The coherent DMA buffer must not be freed by the
121 * driver until the user space mapping has been released.
122 */
123 int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
124 void *cpu_addr, dma_addr_t handle, size_t size);
125
126
127 /**
128 * dma_alloc_writecombine - allocate writecombining memory for DMA
129 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
130 * @size: required memory size
131 * @handle: bus-specific DMA address
132 *
133 * Allocate some uncached, buffered memory for a device for
134 * performing DMA. This function allocates pages, and will
135 * return the CPU-viewed address, and sets @handle to be the
136 * device-viewed address.
137 */
138 extern void *
139 dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
140
141 #define dma_free_writecombine(dev,size,cpu_addr,handle) \
142 dma_free_coherent(dev,size,cpu_addr,handle)
143
144 int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
145 void *cpu_addr, dma_addr_t handle, size_t size);
146
147
148 /**
149 * dma_map_single - map a single buffer for streaming DMA
150 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
151 * @cpu_addr: CPU direct mapped address of buffer
152 * @size: size of buffer to map
153 * @dir: DMA transfer direction
154 *
155 * Ensure that any data held in the cache is appropriately discarded
156 * or written back.
157 *
158 * The device owns this memory once this call has completed. The CPU
159 * can regain ownership by calling dma_unmap_single() or
160 * dma_sync_single_for_cpu().
161 */
162 #ifndef CONFIG_DMABOUNCE
163 static inline dma_addr_t
164 dma_map_single(struct device *dev, void *cpu_addr, size_t size,
165 enum dma_data_direction dir)
166 {
167 if (!arch_is_coherent())
168 dma_cache_maint(cpu_addr, size, dir);
169
170 return virt_to_dma(dev, (unsigned long)cpu_addr);
171 }
172 #else
173 extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
174 #endif
175
176 /**
177 * dma_map_page - map a portion of a page for streaming DMA
178 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
179 * @page: page that buffer resides in
180 * @offset: offset into page for start of buffer
181 * @size: size of buffer to map
182 * @dir: DMA transfer direction
183 *
184 * Ensure that any data held in the cache is appropriately discarded
185 * or written back.
186 *
187 * The device owns this memory once this call has completed. The CPU
188 * can regain ownership by calling dma_unmap_page() or
189 * dma_sync_single_for_cpu().
190 */
191 static inline dma_addr_t
192 dma_map_page(struct device *dev, struct page *page,
193 unsigned long offset, size_t size,
194 enum dma_data_direction dir)
195 {
196 return dma_map_single(dev, page_address(page) + offset, size, (int)dir);
197 }
198
199 /**
200 * dma_unmap_single - unmap a single buffer previously mapped
201 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
202 * @handle: DMA address of buffer
203 * @size: size of buffer to map
204 * @dir: DMA transfer direction
205 *
206 * Unmap a single streaming mode DMA translation. The handle and size
207 * must match what was provided in the previous dma_map_single() call.
208 * All other usages are undefined.
209 *
210 * After this call, reads by the CPU to the buffer are guaranteed to see
211 * whatever the device wrote there.
212 */
213 #ifndef CONFIG_DMABOUNCE
214 static inline void
215 dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
216 enum dma_data_direction dir)
217 {
218 /* nothing to do */
219 }
220 #else
221 extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
222 #endif
223
224 /**
225 * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
226 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
227 * @handle: DMA address of buffer
228 * @size: size of buffer to map
229 * @dir: DMA transfer direction
230 *
231 * Unmap a single streaming mode DMA translation. The handle and size
232 * must match what was provided in the previous dma_map_single() call.
233 * All other usages are undefined.
234 *
235 * After this call, reads by the CPU to the buffer are guaranteed to see
236 * whatever the device wrote there.
237 */
238 static inline void
239 dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
240 enum dma_data_direction dir)
241 {
242 dma_unmap_single(dev, handle, size, (int)dir);
243 }
244
245 /**
246 * dma_map_sg - map a set of SG buffers for streaming mode DMA
247 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
248 * @sg: list of buffers
249 * @nents: number of buffers to map
250 * @dir: DMA transfer direction
251 *
252 * Map a set of buffers described by scatterlist in streaming
253 * mode for DMA. This is the scatter-gather version of the
254 * above dma_map_single interface. Here the scatter gather list
255 * elements are each tagged with the appropriate dma address
256 * and length. They are obtained via sg_dma_{address,length}(SG).
257 *
258 * NOTE: An implementation may be able to use a smaller number of
259 * DMA address/length pairs than there are SG table elements.
260 * (for example via virtual mapping capabilities)
261 * The routine returns the number of addr/length pairs actually
262 * used, at most nents.
263 *
264 * Device ownership issues as mentioned above for dma_map_single are
265 * the same here.
266 */
267 #ifndef CONFIG_DMABOUNCE
268 static inline int
269 dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
270 enum dma_data_direction dir)
271 {
272 int i;
273
274 for (i = 0; i < nents; i++, sg++) {
275 char *virt;
276
277 sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset;
278 virt = sg_virt(sg);
279
280 if (!arch_is_coherent())
281 dma_cache_maint(virt, sg->length, dir);
282 }
283
284 return nents;
285 }
286 #else
287 extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
288 #endif
289
290 /**
291 * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
292 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
293 * @sg: list of buffers
294 * @nents: number of buffers to map
295 * @dir: DMA transfer direction
296 *
297 * Unmap a set of streaming mode DMA translations.
298 * Again, CPU read rules concerning calls here are the same as for
299 * dma_unmap_single() above.
300 */
301 #ifndef CONFIG_DMABOUNCE
302 static inline void
303 dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
304 enum dma_data_direction dir)
305 {
306
307 /* nothing to do */
308 }
309 #else
310 extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
311 #endif
312
313
314 /**
315 * dma_sync_single_for_cpu
316 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
317 * @handle: DMA address of buffer
318 * @size: size of buffer to map
319 * @dir: DMA transfer direction
320 *
321 * Make physical memory consistent for a single streaming mode DMA
322 * translation after a transfer.
323 *
324 * If you perform a dma_map_single() but wish to interrogate the
325 * buffer using the cpu, yet do not wish to teardown the PCI dma
326 * mapping, you must call this function before doing so. At the
327 * next point you give the PCI dma address back to the card, you
328 * must first the perform a dma_sync_for_device, and then the
329 * device again owns the buffer.
330 */
331 #ifndef CONFIG_DMABOUNCE
332 static inline void
333 dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
334 enum dma_data_direction dir)
335 {
336 if (!arch_is_coherent())
337 dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir);
338 }
339
340 static inline void
341 dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
342 enum dma_data_direction dir)
343 {
344 if (!arch_is_coherent())
345 dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir);
346 }
347 #else
348 extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction);
349 extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction);
350 #endif
351
352
353 /**
354 * dma_sync_sg_for_cpu
355 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
356 * @sg: list of buffers
357 * @nents: number of buffers to map
358 * @dir: DMA transfer direction
359 *
360 * Make physical memory consistent for a set of streaming
361 * mode DMA translations after a transfer.
362 *
363 * The same as dma_sync_single_for_* but for a scatter-gather list,
364 * same rules and usage.
365 */
366 #ifndef CONFIG_DMABOUNCE
367 static inline void
368 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
369 enum dma_data_direction dir)
370 {
371 int i;
372
373 for (i = 0; i < nents; i++, sg++) {
374 char *virt = sg_virt(sg);
375 if (!arch_is_coherent())
376 dma_cache_maint(virt, sg->length, dir);
377 }
378 }
379
380 static inline void
381 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
382 enum dma_data_direction dir)
383 {
384 int i;
385
386 for (i = 0; i < nents; i++, sg++) {
387 char *virt = sg_virt(sg);
388 if (!arch_is_coherent())
389 dma_cache_maint(virt, sg->length, dir);
390 }
391 }
392 #else
393 extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
394 extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
395 #endif
396
397 #ifdef CONFIG_DMABOUNCE
398 /*
399 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
400 * and utilize bounce buffers as needed to work around limited DMA windows.
401 *
402 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
403 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
404 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
405 *
406 * The following are helper functions used by the dmabounce subystem
407 *
408 */
409
410 /**
411 * dmabounce_register_dev
412 *
413 * @dev: valid struct device pointer
414 * @small_buf_size: size of buffers to use with small buffer pool
415 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
416 *
417 * This function should be called by low-level platform code to register
418 * a device as requireing DMA buffer bouncing. The function will allocate
419 * appropriate DMA pools for the device.
420 *
421 */
422 extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
423
424 /**
425 * dmabounce_unregister_dev
426 *
427 * @dev: valid struct device pointer
428 *
429 * This function should be called by low-level platform code when device
430 * that was previously registered with dmabounce_register_dev is removed
431 * from the system.
432 *
433 */
434 extern void dmabounce_unregister_dev(struct device *);
435
436 /**
437 * dma_needs_bounce
438 *
439 * @dev: valid struct device pointer
440 * @dma_handle: dma_handle of unbounced buffer
441 * @size: size of region being mapped
442 *
443 * Platforms that utilize the dmabounce mechanism must implement
444 * this function.
445 *
446 * The dmabounce routines call this function whenever a dma-mapping
447 * is requested to determine whether a given buffer needs to be bounced
448 * or not. The function must return 0 if the buffer is OK for
449 * DMA access and 1 if the buffer needs to be bounced.
450 *
451 */
452 extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
453 #endif /* CONFIG_DMABOUNCE */
454
455 #endif /* __KERNEL__ */
456 #endif