include/asm-arm/arch-at91rm9200/hardware.h

   1 /*
   2  * include/asm-arm/arch-at91rm9200/hardware.h
   3  *
   4  *  Copyright (C) 2003 SAN People
   5  *  Copyright (C) 2003 ATMEL
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  */
  13
  14 #ifndef __ASM_ARCH_HARDWARE_H
  15 #define __ASM_ARCH_HARDWARE_H
  16
  17 #include <asm/sizes.h>
  18
  19 #include <asm/arch/at91rm9200.h>
  20 #include <asm/arch/at91rm9200_sys.h>
  21
  22 /*
  23  * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
  24  * to 0xFEFA0000 .. 0xFF000000.  (384Kb)
  25  */
  26 #define AT91_IO_PHYS_BASE       0xFFFA0000
  27 #define AT91_IO_SIZE            (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
  28 #define AT91_IO_VIRT_BASE       (0xFF000000 - AT91_IO_SIZE)
  29
  30  /* Convert a physical IO address to virtual IO address */
  31 #define AT91_IO_P2V(x)  ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
  32
  33 /*
  34  * Virtual to Physical Address mapping for IO devices.
  35  */
  36 #define AT91_VA_BASE_SYS        AT91_IO_P2V(AT91_BASE_SYS)
  37 #define AT91_VA_BASE_SPI        AT91_IO_P2V(AT91_BASE_SPI)
  38 #define AT91_VA_BASE_SSC2       AT91_IO_P2V(AT91_BASE_SSC2)
  39 #define AT91_VA_BASE_SSC1       AT91_IO_P2V(AT91_BASE_SSC1)
  40 #define AT91_VA_BASE_SSC0       AT91_IO_P2V(AT91_BASE_SSC0)
  41 #define AT91_VA_BASE_US3        AT91_IO_P2V(AT91_BASE_US3)
  42 #define AT91_VA_BASE_US2        AT91_IO_P2V(AT91_BASE_US2)
  43 #define AT91_VA_BASE_US1        AT91_IO_P2V(AT91_BASE_US1)
  44 #define AT91_VA_BASE_US0        AT91_IO_P2V(AT91_BASE_US0)
  45 #define AT91_VA_BASE_EMAC       AT91_IO_P2V(AT91_BASE_EMAC)
  46 #define AT91_VA_BASE_TWI        AT91_IO_P2V(AT91_BASE_TWI)
  47 #define AT91_VA_BASE_MCI        AT91_IO_P2V(AT91_BASE_MCI)
  48 #define AT91_VA_BASE_UDP        AT91_IO_P2V(AT91_BASE_UDP)
  49 #define AT91_VA_BASE_TCB1       AT91_IO_P2V(AT91_BASE_TCB1)
  50 #define AT91_VA_BASE_TCB0       AT91_IO_P2V(AT91_BASE_TCB0)
  51
  52 /* Internal SRAM */
  53 #define AT91_SRAM_BASE          0x00200000      /* Internal SRAM base address */
  54 #define AT91_SRAM_SIZE          0x00004000      /* Internal SRAM SIZE (16Kb) */
  55
  56  /* Internal SRAM is mapped below the IO devices */
  57 #define AT91_SRAM_VIRT_BASE     (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE)
  58
  59 /* Serial ports */
  60 #define AT91_NR_UART            5               /* 4 USART3's and one DBGU port */
  61
  62 /* FLASH */
  63 #define AT91_FLASH_BASE         0x10000000      /* NCS0: Flash physical base address */
  64
  65 /* SDRAM */
  66 #define AT91_SDRAM_BASE         0x20000000      /* NCS1: SDRAM physical base address */
  67
  68 /* SmartMedia */
  69 #define AT91_SMARTMEDIA_BASE    0x40000000      /* NCS3: Smartmedia physical base address */
  70
  71 /* Compact Flash */
  72 #define AT91_CF_BASE            0x50000000      /* NCS4-NCS6: Compact Flash physical base address */
  73
  74 /* Multi-Master Memory controller */
  75 #define AT91_UHP_BASE           0x00300000      /* USB Host controller */
  76
  77 /* Clocks */
  78 #define AT91_SLOW_CLOCK         32768           /* slow clock */
  79
  80 #ifndef __ASSEMBLY__
  81 #include <asm/io.h>
  82
  83 static inline unsigned int at91_sys_read(unsigned int reg_offset)
  84 {
  85         void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
  86
  87         return readl(addr + reg_offset);
  88 }
  89
  90 static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
  91 {
  92         void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
  93
  94         writel(value, addr + reg_offset);
  95 }
  96 #endif
  97
  98 #endif