include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / watchdog / hpwdt.c
1 /*
2 * HP WatchDog Driver
3 * based on
4 *
5 * SoftDog 0.05: A Software Watchdog Device
6 *
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
13 *
14 */
15
16 #include <linux/device.h>
17 #include <linux/fs.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/irq.h>
22 #include <linux/nmi.h>
23 #include <linux/kernel.h>
24 #include <linux/miscdevice.h>
25 #include <linux/mm.h>
26 #include <linux/module.h>
27 #include <linux/kdebug.h>
28 #include <linux/moduleparam.h>
29 #include <linux/notifier.h>
30 #include <linux/pci.h>
31 #include <linux/pci_ids.h>
32 #include <linux/reboot.h>
33 #include <linux/sched.h>
34 #include <linux/timer.h>
35 #include <linux/types.h>
36 #include <linux/uaccess.h>
37 #include <linux/watchdog.h>
38 #include <linux/dmi.h>
39 #include <linux/efi.h>
40 #include <linux/string.h>
41 #include <linux/bootmem.h>
42 #include <asm/desc.h>
43 #include <asm/cacheflush.h>
44
45 #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
46 #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
47 #define PCI_BIOS32_PARAGRAPH_LEN 16
48 #define PCI_ROM_BASE1 0x000F0000
49 #define ROM_SIZE 0x10000
50 #define HPWDT_VERSION "1.1.1"
51
52 struct bios32_service_dir {
53 u32 signature;
54 u32 entry_point;
55 u8 revision;
56 u8 length;
57 u8 checksum;
58 u8 reserved[5];
59 };
60
61 /* type 212 */
62 struct smbios_cru64_info {
63 u8 type;
64 u8 byte_length;
65 u16 handle;
66 u32 signature;
67 u64 physical_address;
68 u32 double_length;
69 u32 double_offset;
70 };
71 #define SMBIOS_CRU64_INFORMATION 212
72
73 struct cmn_registers {
74 union {
75 struct {
76 u8 ral;
77 u8 rah;
78 u16 rea2;
79 };
80 u32 reax;
81 } u1;
82 union {
83 struct {
84 u8 rbl;
85 u8 rbh;
86 u8 reb2l;
87 u8 reb2h;
88 };
89 u32 rebx;
90 } u2;
91 union {
92 struct {
93 u8 rcl;
94 u8 rch;
95 u16 rec2;
96 };
97 u32 recx;
98 } u3;
99 union {
100 struct {
101 u8 rdl;
102 u8 rdh;
103 u16 red2;
104 };
105 u32 redx;
106 } u4;
107
108 u32 resi;
109 u32 redi;
110 u16 rds;
111 u16 res;
112 u32 reflags;
113 } __attribute__((packed));
114
115 #define DEFAULT_MARGIN 30
116 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
117 static unsigned int reload; /* the computed soft_margin */
118 static int nowayout = WATCHDOG_NOWAYOUT;
119 static char expect_release;
120 static unsigned long hpwdt_is_open;
121 static unsigned int allow_kdump;
122 static unsigned int hpwdt_nmi_sourcing;
123 static unsigned int priority; /* hpwdt at end of die_notify list */
124
125 static void __iomem *pci_mem_addr; /* the PCI-memory address */
126 static unsigned long __iomem *hpwdt_timer_reg;
127 static unsigned long __iomem *hpwdt_timer_con;
128
129 static DEFINE_SPINLOCK(rom_lock);
130
131 static void *cru_rom_addr;
132
133 static struct cmn_registers cmn_regs;
134
135 static struct pci_device_id hpwdt_devices[] = {
136 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },
137 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },
138 {0}, /* terminate list */
139 };
140 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
141
142 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
143 unsigned long *pRomEntry);
144
145 #ifndef CONFIG_X86_64
146 /* --32 Bit Bios------------------------------------------------------------ */
147
148 #define HPWDT_ARCH 32
149
150 asm(".text \n\t"
151 ".align 4 \n"
152 "asminline_call: \n\t"
153 "pushl %ebp \n\t"
154 "movl %esp, %ebp \n\t"
155 "pusha \n\t"
156 "pushf \n\t"
157 "push %es \n\t"
158 "push %ds \n\t"
159 "pop %es \n\t"
160 "movl 8(%ebp),%eax \n\t"
161 "movl 4(%eax),%ebx \n\t"
162 "movl 8(%eax),%ecx \n\t"
163 "movl 12(%eax),%edx \n\t"
164 "movl 16(%eax),%esi \n\t"
165 "movl 20(%eax),%edi \n\t"
166 "movl (%eax),%eax \n\t"
167 "push %cs \n\t"
168 "call *12(%ebp) \n\t"
169 "pushf \n\t"
170 "pushl %eax \n\t"
171 "movl 8(%ebp),%eax \n\t"
172 "movl %ebx,4(%eax) \n\t"
173 "movl %ecx,8(%eax) \n\t"
174 "movl %edx,12(%eax) \n\t"
175 "movl %esi,16(%eax) \n\t"
176 "movl %edi,20(%eax) \n\t"
177 "movw %ds,24(%eax) \n\t"
178 "movw %es,26(%eax) \n\t"
179 "popl %ebx \n\t"
180 "movl %ebx,(%eax) \n\t"
181 "popl %ebx \n\t"
182 "movl %ebx,28(%eax) \n\t"
183 "pop %es \n\t"
184 "popf \n\t"
185 "popa \n\t"
186 "leave \n\t"
187 "ret \n\t"
188 ".previous");
189
190
191 /*
192 * cru_detect
193 *
194 * Routine Description:
195 * This function uses the 32-bit BIOS Service Directory record to
196 * search for a $CRU record.
197 *
198 * Return Value:
199 * 0 : SUCCESS
200 * <0 : FAILURE
201 */
202 static int __devinit cru_detect(unsigned long map_entry,
203 unsigned long map_offset)
204 {
205 void *bios32_map;
206 unsigned long *bios32_entrypoint;
207 unsigned long cru_physical_address;
208 unsigned long cru_length;
209 unsigned long physical_bios_base = 0;
210 unsigned long physical_bios_offset = 0;
211 int retval = -ENODEV;
212
213 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
214
215 if (bios32_map == NULL)
216 return -ENODEV;
217
218 bios32_entrypoint = bios32_map + map_offset;
219
220 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
221
222 asminline_call(&cmn_regs, bios32_entrypoint);
223
224 if (cmn_regs.u1.ral != 0) {
225 printk(KERN_WARNING
226 "hpwdt: Call succeeded but with an error: 0x%x\n",
227 cmn_regs.u1.ral);
228 } else {
229 physical_bios_base = cmn_regs.u2.rebx;
230 physical_bios_offset = cmn_regs.u4.redx;
231 cru_length = cmn_regs.u3.recx;
232 cru_physical_address =
233 physical_bios_base + physical_bios_offset;
234
235 /* If the values look OK, then map it in. */
236 if ((physical_bios_base + physical_bios_offset)) {
237 cru_rom_addr =
238 ioremap(cru_physical_address, cru_length);
239 if (cru_rom_addr)
240 retval = 0;
241 }
242
243 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
244 physical_bios_base);
245 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
246 physical_bios_offset);
247 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
248 cru_length);
249 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
250 (unsigned int)&cru_rom_addr);
251 }
252 iounmap(bios32_map);
253 return retval;
254 }
255
256 /*
257 * bios_checksum
258 */
259 static int __devinit bios_checksum(const char __iomem *ptr, int len)
260 {
261 char sum = 0;
262 int i;
263
264 /*
265 * calculate checksum of size bytes. This should add up
266 * to zero if we have a valid header.
267 */
268 for (i = 0; i < len; i++)
269 sum += ptr[i];
270
271 return ((sum == 0) && (len > 0));
272 }
273
274 /*
275 * bios32_present
276 *
277 * Routine Description:
278 * This function finds the 32-bit BIOS Service Directory
279 *
280 * Return Value:
281 * 0 : SUCCESS
282 * <0 : FAILURE
283 */
284 static int __devinit bios32_present(const char __iomem *p)
285 {
286 struct bios32_service_dir *bios_32_ptr;
287 int length;
288 unsigned long map_entry, map_offset;
289
290 bios_32_ptr = (struct bios32_service_dir *) p;
291
292 /*
293 * Search for signature by checking equal to the swizzled value
294 * instead of calling another routine to perform a strcmp.
295 */
296 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
297 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
298 if (bios_checksum(p, length)) {
299 /*
300 * According to the spec, we're looking for the
301 * first 4KB-aligned address below the entrypoint
302 * listed in the header. The Service Directory code
303 * is guaranteed to occupy no more than 2 4KB pages.
304 */
305 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
306 map_offset = bios_32_ptr->entry_point - map_entry;
307
308 return cru_detect(map_entry, map_offset);
309 }
310 }
311 return -ENODEV;
312 }
313
314 static int __devinit detect_cru_service(void)
315 {
316 char __iomem *p, *q;
317 int rc = -1;
318
319 /*
320 * Search from 0x0f0000 through 0x0fffff, inclusive.
321 */
322 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
323 if (p == NULL)
324 return -ENOMEM;
325
326 for (q = p; q < p + ROM_SIZE; q += 16) {
327 rc = bios32_present(q);
328 if (!rc)
329 break;
330 }
331 iounmap(p);
332 return rc;
333 }
334
335 #else
336 /* --64 Bit Bios------------------------------------------------------------ */
337
338 #define HPWDT_ARCH 64
339
340 asm(".text \n\t"
341 ".align 4 \n"
342 "asminline_call: \n\t"
343 "pushq %rbp \n\t"
344 "movq %rsp, %rbp \n\t"
345 "pushq %rax \n\t"
346 "pushq %rbx \n\t"
347 "pushq %rdx \n\t"
348 "pushq %r12 \n\t"
349 "pushq %r9 \n\t"
350 "movq %rsi, %r12 \n\t"
351 "movq %rdi, %r9 \n\t"
352 "movl 4(%r9),%ebx \n\t"
353 "movl 8(%r9),%ecx \n\t"
354 "movl 12(%r9),%edx \n\t"
355 "movl 16(%r9),%esi \n\t"
356 "movl 20(%r9),%edi \n\t"
357 "movl (%r9),%eax \n\t"
358 "call *%r12 \n\t"
359 "pushfq \n\t"
360 "popq %r12 \n\t"
361 "movl %eax, (%r9) \n\t"
362 "movl %ebx, 4(%r9) \n\t"
363 "movl %ecx, 8(%r9) \n\t"
364 "movl %edx, 12(%r9) \n\t"
365 "movl %esi, 16(%r9) \n\t"
366 "movl %edi, 20(%r9) \n\t"
367 "movq %r12, %rax \n\t"
368 "movl %eax, 28(%r9) \n\t"
369 "popq %r9 \n\t"
370 "popq %r12 \n\t"
371 "popq %rdx \n\t"
372 "popq %rbx \n\t"
373 "popq %rax \n\t"
374 "leave \n\t"
375 "ret \n\t"
376 ".previous");
377
378 /*
379 * dmi_find_cru
380 *
381 * Routine Description:
382 * This function checks whether or not a SMBIOS/DMI record is
383 * the 64bit CRU info or not
384 */
385 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
386 {
387 struct smbios_cru64_info *smbios_cru64_ptr;
388 unsigned long cru_physical_address;
389
390 if (dm->type == SMBIOS_CRU64_INFORMATION) {
391 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
392 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
393 cru_physical_address =
394 smbios_cru64_ptr->physical_address +
395 smbios_cru64_ptr->double_offset;
396 cru_rom_addr = ioremap(cru_physical_address,
397 smbios_cru64_ptr->double_length);
398 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
399 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
400 }
401 }
402 }
403
404 static int __devinit detect_cru_service(void)
405 {
406 cru_rom_addr = NULL;
407
408 dmi_walk(dmi_find_cru, NULL);
409
410 /* if cru_rom_addr has been set then we found a CRU service */
411 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
412 }
413
414 /* ------------------------------------------------------------------------- */
415
416 #endif
417
418 /*
419 * Watchdog operations
420 */
421 static void hpwdt_start(void)
422 {
423 reload = (soft_margin * 1000) / 128;
424 iowrite16(reload, hpwdt_timer_reg);
425 iowrite16(0x85, hpwdt_timer_con);
426 }
427
428 static void hpwdt_stop(void)
429 {
430 unsigned long data;
431
432 data = ioread16(hpwdt_timer_con);
433 data &= 0xFE;
434 iowrite16(data, hpwdt_timer_con);
435 }
436
437 static void hpwdt_ping(void)
438 {
439 iowrite16(reload, hpwdt_timer_reg);
440 }
441
442 static int hpwdt_change_timer(int new_margin)
443 {
444 /* Arbitrary, can't find the card's limits */
445 if (new_margin < 30 || new_margin > 600) {
446 printk(KERN_WARNING
447 "hpwdt: New value passed in is invalid: %d seconds.\n",
448 new_margin);
449 return -EINVAL;
450 }
451
452 soft_margin = new_margin;
453 printk(KERN_DEBUG
454 "hpwdt: New timer passed in is %d seconds.\n",
455 new_margin);
456 reload = (soft_margin * 1000) / 128;
457
458 return 0;
459 }
460
461 /*
462 * NMI Handler
463 */
464 static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
465 void *data)
466 {
467 unsigned long rom_pl;
468 static int die_nmi_called;
469
470 if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
471 return NOTIFY_OK;
472
473 if (hpwdt_nmi_sourcing) {
474 spin_lock_irqsave(&rom_lock, rom_pl);
475 if (!die_nmi_called)
476 asminline_call(&cmn_regs, cru_rom_addr);
477 die_nmi_called = 1;
478 spin_unlock_irqrestore(&rom_lock, rom_pl);
479 if (cmn_regs.u1.ral == 0) {
480 printk(KERN_WARNING "hpwdt: An NMI occurred, "
481 "but unable to determine source.\n");
482 } else {
483 if (allow_kdump)
484 hpwdt_stop();
485 panic("An NMI occurred, please see the Integrated "
486 "Management Log for details.\n");
487 }
488 }
489 return NOTIFY_OK;
490 }
491
492 /*
493 * /dev/watchdog handling
494 */
495 static int hpwdt_open(struct inode *inode, struct file *file)
496 {
497 /* /dev/watchdog can only be opened once */
498 if (test_and_set_bit(0, &hpwdt_is_open))
499 return -EBUSY;
500
501 /* Start the watchdog */
502 hpwdt_start();
503 hpwdt_ping();
504
505 return nonseekable_open(inode, file);
506 }
507
508 static int hpwdt_release(struct inode *inode, struct file *file)
509 {
510 /* Stop the watchdog */
511 if (expect_release == 42) {
512 hpwdt_stop();
513 } else {
514 printk(KERN_CRIT
515 "hpwdt: Unexpected close, not stopping watchdog!\n");
516 hpwdt_ping();
517 }
518
519 expect_release = 0;
520
521 /* /dev/watchdog is being closed, make sure it can be re-opened */
522 clear_bit(0, &hpwdt_is_open);
523
524 return 0;
525 }
526
527 static ssize_t hpwdt_write(struct file *file, const char __user *data,
528 size_t len, loff_t *ppos)
529 {
530 /* See if we got the magic character 'V' and reload the timer */
531 if (len) {
532 if (!nowayout) {
533 size_t i;
534
535 /* note: just in case someone wrote the magic character
536 * five months ago... */
537 expect_release = 0;
538
539 /* scan to see whether or not we got the magic char. */
540 for (i = 0; i != len; i++) {
541 char c;
542 if (get_user(c, data + i))
543 return -EFAULT;
544 if (c == 'V')
545 expect_release = 42;
546 }
547 }
548
549 /* someone wrote to us, we should reload the timer */
550 hpwdt_ping();
551 }
552
553 return len;
554 }
555
556 static const struct watchdog_info ident = {
557 .options = WDIOF_SETTIMEOUT |
558 WDIOF_KEEPALIVEPING |
559 WDIOF_MAGICCLOSE,
560 .identity = "HP iLO2 HW Watchdog Timer",
561 };
562
563 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
564 unsigned long arg)
565 {
566 void __user *argp = (void __user *)arg;
567 int __user *p = argp;
568 int new_margin;
569 int ret = -ENOTTY;
570
571 switch (cmd) {
572 case WDIOC_GETSUPPORT:
573 ret = 0;
574 if (copy_to_user(argp, &ident, sizeof(ident)))
575 ret = -EFAULT;
576 break;
577
578 case WDIOC_GETSTATUS:
579 case WDIOC_GETBOOTSTATUS:
580 ret = put_user(0, p);
581 break;
582
583 case WDIOC_KEEPALIVE:
584 hpwdt_ping();
585 ret = 0;
586 break;
587
588 case WDIOC_SETTIMEOUT:
589 ret = get_user(new_margin, p);
590 if (ret)
591 break;
592
593 ret = hpwdt_change_timer(new_margin);
594 if (ret)
595 break;
596
597 hpwdt_ping();
598 /* Fall */
599 case WDIOC_GETTIMEOUT:
600 ret = put_user(soft_margin, p);
601 break;
602 }
603 return ret;
604 }
605
606 /*
607 * Kernel interfaces
608 */
609 static const struct file_operations hpwdt_fops = {
610 .owner = THIS_MODULE,
611 .llseek = no_llseek,
612 .write = hpwdt_write,
613 .unlocked_ioctl = hpwdt_ioctl,
614 .open = hpwdt_open,
615 .release = hpwdt_release,
616 };
617
618 static struct miscdevice hpwdt_miscdev = {
619 .minor = WATCHDOG_MINOR,
620 .name = "watchdog",
621 .fops = &hpwdt_fops,
622 };
623
624 static struct notifier_block die_notifier = {
625 .notifier_call = hpwdt_pretimeout,
626 .priority = 0,
627 };
628
629 /*
630 * Init & Exit
631 */
632
633 #ifdef ARCH_HAS_NMI_WATCHDOG
634 static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
635 {
636 /*
637 * If nmi_watchdog is turned off then we can turn on
638 * our nmi sourcing capability.
639 */
640 if (!nmi_watchdog_active())
641 hpwdt_nmi_sourcing = 1;
642 else
643 dev_warn(&dev->dev, "NMI sourcing is disabled. To enable this "
644 "functionality you must reboot with nmi_watchdog=0 "
645 "and load the hpwdt driver with priority=1.\n");
646 }
647 #else
648 static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
649 {
650 dev_warn(&dev->dev, "NMI sourcing is disabled. "
651 "Your kernel does not support a NMI Watchdog.\n");
652 }
653 #endif
654
655 static int __devinit hpwdt_init_one(struct pci_dev *dev,
656 const struct pci_device_id *ent)
657 {
658 int retval;
659
660 /*
661 * Check if we can do NMI sourcing or not
662 */
663 hpwdt_check_nmi_sourcing(dev);
664
665 /*
666 * First let's find out if we are on an iLO2 server. We will
667 * not run on a legacy ASM box.
668 * So we only support the G5 ProLiant servers and higher.
669 */
670 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
671 dev_warn(&dev->dev,
672 "This server does not have an iLO2 ASIC.\n");
673 return -ENODEV;
674 }
675
676 if (pci_enable_device(dev)) {
677 dev_warn(&dev->dev,
678 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
679 ent->vendor, ent->device);
680 return -ENODEV;
681 }
682
683 pci_mem_addr = pci_iomap(dev, 1, 0x80);
684 if (!pci_mem_addr) {
685 dev_warn(&dev->dev,
686 "Unable to detect the iLO2 server memory.\n");
687 retval = -ENOMEM;
688 goto error_pci_iomap;
689 }
690 hpwdt_timer_reg = pci_mem_addr + 0x70;
691 hpwdt_timer_con = pci_mem_addr + 0x72;
692
693 /* Make sure that we have a valid soft_margin */
694 if (hpwdt_change_timer(soft_margin))
695 hpwdt_change_timer(DEFAULT_MARGIN);
696
697 /*
698 * We need to map the ROM to get the CRU service.
699 * For 32 bit Operating Systems we need to go through the 32 Bit
700 * BIOS Service Directory
701 * For 64 bit Operating Systems we get that service through SMBIOS.
702 */
703 retval = detect_cru_service();
704 if (retval < 0) {
705 dev_warn(&dev->dev,
706 "Unable to detect the %d Bit CRU Service.\n",
707 HPWDT_ARCH);
708 goto error_get_cru;
709 }
710
711 /*
712 * We know this is the only CRU call we need to make so lets keep as
713 * few instructions as possible once the NMI comes in.
714 */
715 cmn_regs.u1.rah = 0x0D;
716 cmn_regs.u1.ral = 0x02;
717
718 /*
719 * If the priority is set to 1, then we will be put first on the
720 * die notify list to handle a critical NMI. The default is to
721 * be last so other users of the NMI signal can function.
722 */
723 if (priority)
724 die_notifier.priority = 0x7FFFFFFF;
725
726 retval = register_die_notifier(&die_notifier);
727 if (retval != 0) {
728 dev_warn(&dev->dev,
729 "Unable to register a die notifier (err=%d).\n",
730 retval);
731 goto error_die_notifier;
732 }
733
734 retval = misc_register(&hpwdt_miscdev);
735 if (retval < 0) {
736 dev_warn(&dev->dev,
737 "Unable to register miscdev on minor=%d (err=%d).\n",
738 WATCHDOG_MINOR, retval);
739 goto error_misc_register;
740 }
741
742 printk(KERN_INFO
743 "hp Watchdog Timer Driver: %s"
744 ", timer margin: %d seconds (nowayout=%d)"
745 ", allow kernel dump: %s (default = 0/OFF)"
746 ", priority: %s (default = 0/LAST).\n",
747 HPWDT_VERSION, soft_margin, nowayout,
748 (allow_kdump == 0) ? "OFF" : "ON",
749 (priority == 0) ? "LAST" : "FIRST");
750
751 return 0;
752
753 error_misc_register:
754 unregister_die_notifier(&die_notifier);
755 error_die_notifier:
756 if (cru_rom_addr)
757 iounmap(cru_rom_addr);
758 error_get_cru:
759 pci_iounmap(dev, pci_mem_addr);
760 error_pci_iomap:
761 pci_disable_device(dev);
762 return retval;
763 }
764
765 static void __devexit hpwdt_exit(struct pci_dev *dev)
766 {
767 if (!nowayout)
768 hpwdt_stop();
769
770 misc_deregister(&hpwdt_miscdev);
771 unregister_die_notifier(&die_notifier);
772
773 if (cru_rom_addr)
774 iounmap(cru_rom_addr);
775 pci_iounmap(dev, pci_mem_addr);
776 pci_disable_device(dev);
777 }
778
779 static struct pci_driver hpwdt_driver = {
780 .name = "hpwdt",
781 .id_table = hpwdt_devices,
782 .probe = hpwdt_init_one,
783 .remove = __devexit_p(hpwdt_exit),
784 };
785
786 static void __exit hpwdt_cleanup(void)
787 {
788 pci_unregister_driver(&hpwdt_driver);
789 }
790
791 static int __init hpwdt_init(void)
792 {
793 return pci_register_driver(&hpwdt_driver);
794 }
795
796 MODULE_AUTHOR("Tom Mingarelli");
797 MODULE_DESCRIPTION("hp watchdog driver");
798 MODULE_LICENSE("GPL");
799 MODULE_VERSION(HPWDT_VERSION);
800 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
801
802 module_param(soft_margin, int, 0);
803 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
804
805 module_param(allow_kdump, int, 0);
806 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
807
808 module_param(nowayout, int, 0);
809 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
810 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
811
812 module_param(priority, int, 0);
813 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
814 " (default = 0/Last)\n");
815
816 module_init(hpwdt_init);
817 module_exit(hpwdt_cleanup);