drivers/video/tridentfb.c

   1 /*
   2  * Frame buffer driver for Trident Blade and Image series
   3  *
   4  * Copyright 2001, 2002 - Jani Monoses   <jani@iv.ro>
   5  *
   6  *
   7  * CREDITS:(in order of appearance)
   8  *      skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
   9  *      Special thanks ;) to Mattia Crivellini <tia@mclink.it>
  10  *      much inspired by the XFree86 4.x Trident driver sources
  11  *      by Alan Hourihane the FreeVGA project
  12  *      Francesco Salvestrini <salvestrini@users.sf.net> XP support,
  13  *      code, suggestions
  14  * TODO:
  15  *      timing value tweaking so it looks good on every monitor in every mode
  16  *      TGUI acceleration
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/fb.h>
  21 #include <linux/init.h>
  22 #include <linux/pci.h>
  23
  24 #include <linux/delay.h>
  25 #include <video/vga.h>
  26 #include <video/trident.h>
  27
  28 #define VERSION         "0.7.9-NEWAPI"
  29
  30 struct tridentfb_par {
  31         void __iomem *io_virt;  /* iospace virtual memory address */
  32         u32 pseudo_pal[16];
  33         int chip_id;
  34         int flatpanel;
  35         void (*init_accel) (struct tridentfb_par *, int, int);
  36         void (*wait_engine) (struct tridentfb_par *);
  37         void (*fill_rect)
  38                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  39         void (*copy_rect)
  40                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  41 };
  42
  43 static unsigned char eng_oper;  /* engine operation... */
  44 static struct fb_ops tridentfb_ops;
  45
  46 static struct fb_fix_screeninfo tridentfb_fix = {
  47         .id = "Trident",
  48         .type = FB_TYPE_PACKED_PIXELS,
  49         .ypanstep = 1,
  50         .visual = FB_VISUAL_PSEUDOCOLOR,
  51         .accel = FB_ACCEL_NONE,
  52 };
  53
  54 /* defaults which are normally overriden by user values */
  55
  56 /* video mode */
  57 static char *mode_option __devinitdata = "640x480";
  58 static int bpp __devinitdata = 8;
  59
  60 static int noaccel __devinitdata;
  61
  62 static int center;
  63 static int stretch;
  64
  65 static int fp __devinitdata;
  66 static int crt __devinitdata;
  67
  68 static int memsize __devinitdata;
  69 static int memdiff __devinitdata;
  70 static int nativex;
  71
  72 module_param(mode_option, charp, 0);
  73 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
  74 module_param_named(mode, mode_option, charp, 0);
  75 MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
  76 module_param(bpp, int, 0);
  77 module_param(center, int, 0);
  78 module_param(stretch, int, 0);
  79 module_param(noaccel, int, 0);
  80 module_param(memsize, int, 0);
  81 module_param(memdiff, int, 0);
  82 module_param(nativex, int, 0);
  83 module_param(fp, int, 0);
  84 MODULE_PARM_DESC(fp, "Define if flatpanel is connected");
  85 module_param(crt, int, 0);
  86 MODULE_PARM_DESC(crt, "Define if CRT is connected");
  87
  88 static int is_oldclock(int id)
  89 {
  90         return  (id == TGUI9440) ||
  91                 (id == TGUI9660) ||
  92                 (id == CYBER9320);
  93 }
  94
  95 static int is_oldprotect(int id)
  96 {
  97         return  (id == TGUI9440) ||
  98                 (id == TGUI9660) ||
  99                 (id == PROVIDIA9685) ||
 100                 (id == CYBER9320) ||
 101                 (id == CYBER9382) ||
 102                 (id == CYBER9385);
 103 }
 104
 105 static int is_blade(int id)
 106 {
 107         return  (id == BLADE3D) ||
 108                 (id == CYBERBLADEE4) ||
 109                 (id == CYBERBLADEi7) ||
 110                 (id == CYBERBLADEi7D) ||
 111                 (id == CYBERBLADEi1) ||
 112                 (id == CYBERBLADEi1D) ||
 113                 (id == CYBERBLADEAi1) ||
 114                 (id == CYBERBLADEAi1D);
 115 }
 116
 117 static int is_xp(int id)
 118 {
 119         return  (id == CYBERBLADEXPAi1) ||
 120                 (id == CYBERBLADEXPm8) ||
 121                 (id == CYBERBLADEXPm16);
 122 }
 123
 124 static int is3Dchip(int id)
 125 {
 126         return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
 127                 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
 128                 (id == CYBER9397) || (id == CYBER9397DVD) ||
 129                 (id == CYBER9520) || (id == CYBER9525DVD) ||
 130                 (id == IMAGE975) || (id == IMAGE985) ||
 131                 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
 132                 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
 133                 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
 134                 (id == CYBERBLADEXPAi1));
 135 }
 136
 137 static int iscyber(int id)
 138 {
 139         switch (id) {
 140         case CYBER9388:
 141         case CYBER9382:
 142         case CYBER9385:
 143         case CYBER9397:
 144         case CYBER9397DVD:
 145         case CYBER9520:
 146         case CYBER9525DVD:
 147         case CYBERBLADEE4:
 148         case CYBERBLADEi7D:
 149         case CYBERBLADEi1:
 150         case CYBERBLADEi1D:
 151         case CYBERBLADEAi1:
 152         case CYBERBLADEAi1D:
 153         case CYBERBLADEXPAi1:
 154                 return 1;
 155
 156         case CYBER9320:
 157         case TGUI9660:
 158         case PROVIDIA9685:
 159         case IMAGE975:
 160         case IMAGE985:
 161         case BLADE3D:
 162         case CYBERBLADEi7:      /* VIA MPV4 integrated version */
 163
 164         default:
 165                 /* case CYBERBLDAEXPm8:  Strange */
 166                 /* case CYBERBLDAEXPm16: Strange */
 167                 return 0;
 168         }
 169 }
 170
 171 static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg)
 172 {
 173         fb_writeb(val, p->io_virt + reg);
 174 }
 175
 176 static inline u8 t_inb(struct tridentfb_par *p, u16 reg)
 177 {
 178         return fb_readb(p->io_virt + reg);
 179 }
 180
 181 static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v)
 182 {
 183         fb_writel(v, par->io_virt + r);
 184 }
 185
 186 static inline u32 readmmr(struct tridentfb_par *par, u16 r)
 187 {
 188         return fb_readl(par->io_virt + r);
 189 }
 190
 191 /*
 192  * Blade specific acceleration.
 193  */
 194
 195 #define point(x, y) ((y) << 16 | (x))
 196 #define STA     0x2120
 197 #define CMD     0x2144
 198 #define ROP     0x2148
 199 #define CLR     0x2160
 200 #define SR1     0x2100
 201 #define SR2     0x2104
 202 #define DR1     0x2108
 203 #define DR2     0x210C
 204
 205 #define ROP_S   0xCC
 206
 207 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 208 {
 209         int v1 = (pitch >> 3) << 20;
 210         int tmp = 0, v2;
 211         switch (bpp) {
 212         case 8:
 213                 tmp = 0;
 214                 break;
 215         case 15:
 216                 tmp = 5;
 217                 break;
 218         case 16:
 219                 tmp = 1;
 220                 break;
 221         case 24:
 222         case 32:
 223                 tmp = 2;
 224                 break;
 225         }
 226         v2 = v1 | (tmp << 29);
 227         writemmr(par, 0x21C0, v2);
 228         writemmr(par, 0x21C4, v2);
 229         writemmr(par, 0x21B8, v2);
 230         writemmr(par, 0x21BC, v2);
 231         writemmr(par, 0x21D0, v1);
 232         writemmr(par, 0x21D4, v1);
 233         writemmr(par, 0x21C8, v1);
 234         writemmr(par, 0x21CC, v1);
 235         writemmr(par, 0x216C, 0);
 236 }
 237
 238 static void blade_wait_engine(struct tridentfb_par *par)
 239 {
 240         while (readmmr(par, STA) & 0xFA800000) ;
 241 }
 242
 243 static void blade_fill_rect(struct tridentfb_par *par,
 244                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 245 {
 246         writemmr(par, CLR, c);
 247         writemmr(par, ROP, rop ? 0x66 : ROP_S);
 248         writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
 249
 250         writemmr(par, DR1, point(x, y));
 251         writemmr(par, DR2, point(x + w - 1, y + h - 1));
 252 }
 253
 254 static void blade_copy_rect(struct tridentfb_par *par,
 255                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 256 {
 257         u32 s1, s2, d1, d2;
 258         int direction = 2;
 259         s1 = point(x1, y1);
 260         s2 = point(x1 + w - 1, y1 + h - 1);
 261         d1 = point(x2, y2);
 262         d2 = point(x2 + w - 1, y2 + h - 1);
 263
 264         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 265                 direction = 0;
 266
 267         writemmr(par, ROP, ROP_S);
 268         writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
 269
 270         writemmr(par, SR1, direction ? s2 : s1);
 271         writemmr(par, SR2, direction ? s1 : s2);
 272         writemmr(par, DR1, direction ? d2 : d1);
 273         writemmr(par, DR2, direction ? d1 : d2);
 274 }
 275
 276 /*
 277  * BladeXP specific acceleration functions
 278  */
 279
 280 #define ROP_P 0xF0
 281 #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff))
 282
 283 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 284 {
 285         int tmp = 0, v1;
 286         unsigned char x = 0;
 287
 288         switch (bpp) {
 289         case 8:
 290                 x = 0;
 291                 break;
 292         case 16:
 293                 x = 1;
 294                 break;
 295         case 24:
 296                 x = 3;
 297                 break;
 298         case 32:
 299                 x = 2;
 300                 break;
 301         }
 302
 303         switch (pitch << (bpp >> 3)) {
 304         case 8192:
 305         case 512:
 306                 x |= 0x00;
 307                 break;
 308         case 1024:
 309                 x |= 0x04;
 310                 break;
 311         case 2048:
 312                 x |= 0x08;
 313                 break;
 314         case 4096:
 315                 x |= 0x0C;
 316                 break;
 317         }
 318
 319         t_outb(par, x, 0x2125);
 320
 321         eng_oper = x | 0x40;
 322
 323         switch (bpp) {
 324         case 8:
 325                 tmp = 18;
 326                 break;
 327         case 15:
 328         case 16:
 329                 tmp = 19;
 330                 break;
 331         case 24:
 332         case 32:
 333                 tmp = 20;
 334                 break;
 335         }
 336
 337         v1 = pitch << tmp;
 338
 339         writemmr(par, 0x2154, v1);
 340         writemmr(par, 0x2150, v1);
 341         t_outb(par, 3, 0x2126);
 342 }
 343
 344 static void xp_wait_engine(struct tridentfb_par *par)
 345 {
 346         int busy;
 347         int count, timeout;
 348
 349         count = 0;
 350         timeout = 0;
 351         for (;;) {
 352                 busy = t_inb(par, STA) & 0x80;
 353                 if (busy != 0x80)
 354                         return;
 355                 count++;
 356                 if (count == 10000000) {
 357                         /* Timeout */
 358                         count = 9990000;
 359                         timeout++;
 360                         if (timeout == 8) {
 361                                 /* Reset engine */
 362                                 t_outb(par, 0x00, 0x2120);
 363                                 return;
 364                         }
 365                 }
 366         }
 367 }
 368
 369 static void xp_fill_rect(struct tridentfb_par *par,
 370                          u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 371 {
 372         writemmr(par, 0x2127, ROP_P);
 373         writemmr(par, 0x2158, c);
 374         writemmr(par, 0x2128, 0x4000);
 375         writemmr(par, 0x2140, masked_point(h, w));
 376         writemmr(par, 0x2138, masked_point(y, x));
 377         t_outb(par, 0x01, 0x2124);
 378         t_outb(par, eng_oper, 0x2125);
 379 }
 380
 381 static void xp_copy_rect(struct tridentfb_par *par,
 382                          u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 383 {
 384         int direction;
 385         u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
 386
 387         direction = 0x0004;
 388
 389         if ((x1 < x2) && (y1 == y2)) {
 390                 direction |= 0x0200;
 391                 x1_tmp = x1 + w - 1;
 392                 x2_tmp = x2 + w - 1;
 393         } else {
 394                 x1_tmp = x1;
 395                 x2_tmp = x2;
 396         }
 397
 398         if (y1 < y2) {
 399                 direction |= 0x0100;
 400                 y1_tmp = y1 + h - 1;
 401                 y2_tmp = y2 + h - 1;
 402         } else {
 403                 y1_tmp = y1;
 404                 y2_tmp = y2;
 405         }
 406
 407         writemmr(par, 0x2128, direction);
 408         t_outb(par, ROP_S, 0x2127);
 409         writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp));
 410         writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp));
 411         writemmr(par, 0x2140, masked_point(h, w));
 412         t_outb(par, 0x01, 0x2124);
 413 }
 414
 415 /*
 416  * Image specific acceleration functions
 417  */
 418 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 419 {
 420         int tmp = 0;
 421         switch (bpp) {
 422         case 8:
 423                 tmp = 0;
 424                 break;
 425         case 15:
 426                 tmp = 5;
 427                 break;
 428         case 16:
 429                 tmp = 1;
 430                 break;
 431         case 24:
 432         case 32:
 433                 tmp = 2;
 434                 break;
 435         }
 436         writemmr(par, 0x2120, 0xF0000000);
 437         writemmr(par, 0x2120, 0x40000000 | tmp);
 438         writemmr(par, 0x2120, 0x80000000);
 439         writemmr(par, 0x2144, 0x00000000);
 440         writemmr(par, 0x2148, 0x00000000);
 441         writemmr(par, 0x2150, 0x00000000);
 442         writemmr(par, 0x2154, 0x00000000);
 443         writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
 444         writemmr(par, 0x216C, 0x00000000);
 445         writemmr(par, 0x2170, 0x00000000);
 446         writemmr(par, 0x217C, 0x00000000);
 447         writemmr(par, 0x2120, 0x10000000);
 448         writemmr(par, 0x2130, (2047 << 16) | 2047);
 449 }
 450
 451 static void image_wait_engine(struct tridentfb_par *par)
 452 {
 453         while (readmmr(par, 0x2164) & 0xF0000000) ;
 454 }
 455
 456 static void image_fill_rect(struct tridentfb_par *par,
 457                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 458 {
 459         writemmr(par, 0x2120, 0x80000000);
 460         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 461
 462         writemmr(par, 0x2144, c);
 463
 464         writemmr(par, DR1, point(x, y));
 465         writemmr(par, DR2, point(x + w - 1, y + h - 1));
 466
 467         writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
 468 }
 469
 470 static void image_copy_rect(struct tridentfb_par *par,
 471                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 472 {
 473         u32 s1, s2, d1, d2;
 474         int direction = 2;
 475         s1 = point(x1, y1);
 476         s2 = point(x1 + w - 1, y1 + h - 1);
 477         d1 = point(x2, y2);
 478         d2 = point(x2 + w - 1, y2 + h - 1);
 479
 480         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 481                 direction = 0;
 482
 483         writemmr(par, 0x2120, 0x80000000);
 484         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 485
 486         writemmr(par, SR1, direction ? s2 : s1);
 487         writemmr(par, SR2, direction ? s1 : s2);
 488         writemmr(par, DR1, direction ? d2 : d1);
 489         writemmr(par, DR2, direction ? d1 : d2);
 490         writemmr(par, 0x2124,
 491                  0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
 492 }
 493
 494 /*
 495  * Accel functions called by the upper layers
 496  */
 497 #ifdef CONFIG_FB_TRIDENT_ACCEL
 498 static void tridentfb_fillrect(struct fb_info *info,
 499                                const struct fb_fillrect *fr)
 500 {
 501         struct tridentfb_par *par = info->par;
 502         int bpp = info->var.bits_per_pixel;
 503         int col = 0;
 504
 505         switch (bpp) {
 506         default:
 507         case 8:
 508                 col |= fr->color;
 509                 col |= col << 8;
 510                 col |= col << 16;
 511                 break;
 512         case 16:
 513                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 514                 break;
 515         case 32:
 516                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 517                 break;
 518         }
 519
 520         par->fill_rect(par, fr->dx, fr->dy, fr->width,
 521                        fr->height, col, fr->rop);
 522         par->wait_engine(par);
 523 }
 524 static void tridentfb_copyarea(struct fb_info *info,
 525                                const struct fb_copyarea *ca)
 526 {
 527         struct tridentfb_par *par = info->par;
 528
 529         par->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy,
 530                        ca->width, ca->height);
 531         par->wait_engine(par);
 532 }
 533 #else /* !CONFIG_FB_TRIDENT_ACCEL */
 534 #define tridentfb_fillrect cfb_fillrect
 535 #define tridentfb_copyarea cfb_copyarea
 536 #endif /* CONFIG_FB_TRIDENT_ACCEL */
 537
 538
 539 /*
 540  * Hardware access functions
 541  */
 542
 543 static inline unsigned char read3X4(struct tridentfb_par *par, int reg)
 544 {
 545         return vga_mm_rcrt(par->io_virt, reg);
 546 }
 547
 548 static inline void write3X4(struct tridentfb_par *par, int reg,
 549                             unsigned char val)
 550 {
 551         vga_mm_wcrt(par->io_virt, reg, val);
 552 }
 553
 554 static inline unsigned char read3CE(struct tridentfb_par *par,
 555                                     unsigned char reg)
 556 {
 557         return vga_mm_rgfx(par->io_virt, reg);
 558 }
 559
 560 static inline void writeAttr(struct tridentfb_par *par, int reg,
 561                              unsigned char val)
 562 {
 563         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
 564         vga_mm_wattr(par->io_virt, reg, val);
 565 }
 566
 567 static inline void write3CE(struct tridentfb_par *par, int reg,
 568                             unsigned char val)
 569 {
 570         vga_mm_wgfx(par->io_virt, reg, val);
 571 }
 572
 573 static void enable_mmio(void)
 574 {
 575         /* Goto New Mode */
 576         vga_io_rseq(0x0B);
 577
 578         /* Unprotect registers */
 579         vga_io_wseq(NewMode1, 0x80);
 580
 581         /* Enable MMIO */
 582         outb(PCIReg, 0x3D4);
 583         outb(inb(0x3D5) | 0x01, 0x3D5);
 584 }
 585
 586 static void disable_mmio(struct tridentfb_par *par)
 587 {
 588         /* Goto New Mode */
 589         vga_mm_rseq(par->io_virt, 0x0B);
 590
 591         /* Unprotect registers */
 592         vga_mm_wseq(par->io_virt, NewMode1, 0x80);
 593
 594         /* Disable MMIO */
 595         t_outb(par, PCIReg, 0x3D4);
 596         t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5);
 597 }
 598
 599 static void crtc_unlock(struct tridentfb_par *par)
 600 {
 601         write3X4(par, VGA_CRTC_V_SYNC_END,
 602                  read3X4(par, VGA_CRTC_V_SYNC_END) & 0x7F);
 603 }
 604
 605 /*  Return flat panel's maximum x resolution */
 606 static int __devinit get_nativex(struct tridentfb_par *par)
 607 {
 608         int x, y, tmp;
 609
 610         if (nativex)
 611                 return nativex;
 612
 613         tmp = (read3CE(par, VertStretch) >> 4) & 3;
 614
 615         switch (tmp) {
 616         case 0:
 617                 x = 1280; y = 1024;
 618                 break;
 619         case 2:
 620                 x = 1024; y = 768;
 621                 break;
 622         case 3:
 623                 x = 800; y = 600;
 624                 break;
 625         case 4:
 626                 x = 1400; y = 1050;
 627                 break;
 628         case 1:
 629         default:
 630                 x = 640;  y = 480;
 631                 break;
 632         }
 633
 634         output("%dx%d flat panel found\n", x, y);
 635         return x;
 636 }
 637
 638 /* Set pitch */
 639 static void set_lwidth(struct tridentfb_par *par, int width)
 640 {
 641         write3X4(par, VGA_CRTC_OFFSET, width & 0xFF);
 642         write3X4(par, AddColReg,
 643                  (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4));
 644 }
 645
 646 /* For resolutions smaller than FP resolution stretch */
 647 static void screen_stretch(struct tridentfb_par *par)
 648 {
 649         if (par->chip_id != CYBERBLADEXPAi1)
 650                 write3CE(par, BiosReg, 0);
 651         else
 652                 write3CE(par, BiosReg, 8);
 653         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1);
 654         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1);
 655 }
 656
 657 /* For resolutions smaller than FP resolution center */
 658 static void screen_center(struct tridentfb_par *par)
 659 {
 660         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80);
 661         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80);
 662 }
 663
 664 /* Address of first shown pixel in display memory */
 665 static void set_screen_start(struct tridentfb_par *par, int base)
 666 {
 667         u8 tmp;
 668         write3X4(par, VGA_CRTC_START_LO, base & 0xFF);
 669         write3X4(par, VGA_CRTC_START_HI, (base & 0xFF00) >> 8);
 670         tmp = read3X4(par, CRTCModuleTest) & 0xDF;
 671         write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
 672         tmp = read3X4(par, CRTHiOrd) & 0xF8;
 673         write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
 674 }
 675
 676 /* Set dotclock frequency */
 677 static void set_vclk(struct tridentfb_par *par, unsigned long freq)
 678 {
 679         int m, n, k;
 680         unsigned long fi, d, di;
 681         unsigned char best_m = 0, best_n = 0, best_k = 0;
 682         unsigned char hi, lo;
 683
 684         d = 20000;
 685         for (k = 1; k >= 0; k--)
 686                 for (m = 0; m < 32; m++)
 687                         for (n = 0; n < 122; n++) {
 688                                 fi = ((14318l * (n + 8)) / (m + 2)) >> k;
 689                                 if ((di = abs(fi - freq)) < d) {
 690                                         d = di;
 691                                         best_n = n;
 692                                         best_m = m;
 693                                         best_k = k;
 694                                 }
 695                                 if (fi > freq)
 696                                         break;
 697                         }
 698
 699         if (is_oldclock(par->chip_id)) {
 700                 lo = best_n | (best_m << 7);
 701                 hi = (best_m >> 1) | (best_k << 4);
 702         } else {
 703                 lo = best_n;
 704                 hi = best_m | (best_k << 6);
 705         }
 706
 707         if (is3Dchip(par->chip_id)) {
 708                 vga_mm_wseq(par->io_virt, ClockHigh, hi);
 709                 vga_mm_wseq(par->io_virt, ClockLow, lo);
 710         } else {
 711                 t_outb(par, lo, 0x43C8);
 712                 t_outb(par, hi, 0x43C9);
 713         }
 714         debug("VCLK = %X %X\n", hi, lo);
 715 }
 716
 717 /* Set number of lines for flat panels*/
 718 static void set_number_of_lines(struct tridentfb_par *par, int lines)
 719 {
 720         int tmp = read3CE(par, CyberEnhance) & 0x8F;
 721         if (lines > 1024)
 722                 tmp |= 0x50;
 723         else if (lines > 768)
 724                 tmp |= 0x30;
 725         else if (lines > 600)
 726                 tmp |= 0x20;
 727         else if (lines > 480)
 728                 tmp |= 0x10;
 729         write3CE(par, CyberEnhance, tmp);
 730 }
 731
 732 /*
 733  * If we see that FP is active we assume we have one.
 734  * Otherwise we have a CRT display. User can override.
 735  */
 736 static int __devinit is_flatpanel(struct tridentfb_par *par)
 737 {
 738         if (fp)
 739                 return 1;
 740         if (crt || !iscyber(par->chip_id))
 741                 return 0;
 742         return (read3CE(par, FPConfig) & 0x10) ? 1 : 0;
 743 }
 744
 745 /* Try detecting the video memory size */
 746 static unsigned int __devinit get_memsize(struct tridentfb_par *par)
 747 {
 748         unsigned char tmp, tmp2;
 749         unsigned int k;
 750
 751         /* If memory size provided by user */
 752         if (memsize)
 753                 k = memsize * Kb;
 754         else
 755                 switch (par->chip_id) {
 756                 case CYBER9525DVD:
 757                         k = 2560 * Kb;
 758                         break;
 759                 default:
 760                         tmp = read3X4(par, SPR) & 0x0F;
 761                         switch (tmp) {
 762
 763                         case 0x01:
 764                                 k = 512 * Kb;
 765                                 break;
 766                         case 0x02:
 767                                 k = 6 * Mb;     /* XP */
 768                                 break;
 769                         case 0x03:
 770                                 k = 1 * Mb;
 771                                 break;
 772                         case 0x04:
 773                                 k = 8 * Mb;
 774                                 break;
 775                         case 0x06:
 776                                 k = 10 * Mb;    /* XP */
 777                                 break;
 778                         case 0x07:
 779                                 k = 2 * Mb;
 780                                 break;
 781                         case 0x08:
 782                                 k = 12 * Mb;    /* XP */
 783                                 break;
 784                         case 0x0A:
 785                                 k = 14 * Mb;    /* XP */
 786                                 break;
 787                         case 0x0C:
 788                                 k = 16 * Mb;    /* XP */
 789                                 break;
 790                         case 0x0E:              /* XP */
 791
 792                                 tmp2 = vga_mm_rseq(par->io_virt, 0xC1);
 793                                 switch (tmp2) {
 794                                 case 0x00:
 795                                         k = 20 * Mb;
 796                                         break;
 797                                 case 0x01:
 798                                         k = 24 * Mb;
 799                                         break;
 800                                 case 0x10:
 801                                         k = 28 * Mb;
 802                                         break;
 803                                 case 0x11:
 804                                         k = 32 * Mb;
 805                                         break;
 806                                 default:
 807                                         k = 1 * Mb;
 808                                         break;
 809                                 }
 810                                 break;
 811
 812                         case 0x0F:
 813                                 k = 4 * Mb;
 814                                 break;
 815                         default:
 816                                 k = 1 * Mb;
 817                                 break;
 818                         }
 819                 }
 820
 821         k -= memdiff * Kb;
 822         output("framebuffer size = %d Kb\n", k / Kb);
 823         return k;
 824 }
 825
 826 /* See if we can handle the video mode described in var */
 827 static int tridentfb_check_var(struct fb_var_screeninfo *var,
 828                                struct fb_info *info)
 829 {
 830         struct tridentfb_par *par = info->par;
 831         int bpp = var->bits_per_pixel;
 832         int ramdac = 230000; /* 230MHz for most 3D chips */
 833         debug("enter\n");
 834
 835         /* check color depth */
 836         if (bpp == 24)
 837                 bpp = var->bits_per_pixel = 32;
 838         if (par->chip_id == TGUI9440 && bpp == 32)
 839                 return -EINVAL;
 840         /* check whether resolution fits on panel and in memory */
 841         if (par->flatpanel && nativex && var->xres > nativex)
 842                 return -EINVAL;
 843         /* various resolution checks */
 844         var->xres = (var->xres + 7) & ~0x7;
 845         if (var->xres != var->xres_virtual)
 846                 var->xres_virtual = var->xres;
 847         if (var->yres > var->yres_virtual)
 848                 var->yres_virtual = var->yres;
 849         if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len)
 850                 return -EINVAL;
 851
 852         switch (bpp) {
 853         case 8:
 854                 var->red.offset = 0;
 855                 var->green.offset = 0;
 856                 var->blue.offset = 0;
 857                 var->red.length = 6;
 858                 var->green.length = 6;
 859                 var->blue.length = 6;
 860                 break;
 861         case 16:
 862                 var->red.offset = 11;
 863                 var->green.offset = 5;
 864                 var->blue.offset = 0;
 865                 var->red.length = 5;
 866                 var->green.length = 6;
 867                 var->blue.length = 5;
 868                 break;
 869         case 32:
 870                 var->red.offset = 16;
 871                 var->green.offset = 8;
 872                 var->blue.offset = 0;
 873                 var->red.length = 8;
 874                 var->green.length = 8;
 875                 var->blue.length = 8;
 876                 break;
 877         default:
 878                 return -EINVAL;
 879         }
 880
 881         if (is_xp(par->chip_id))
 882                 ramdac = 350000;
 883
 884         switch (par->chip_id) {
 885         case TGUI9440:
 886                 ramdac = (bpp >= 16) ? 45000 : 90000;
 887                 break;
 888         case CYBER9320:
 889         case TGUI9660:
 890                 ramdac = 135000;
 891                 break;
 892         case PROVIDIA9685:
 893         case CYBER9388:
 894         case CYBER9382:
 895         case CYBER9385:
 896                 ramdac = 170000;
 897                 break;
 898         }
 899
 900         /* The clock is doubled for 32 bpp */
 901         if (bpp == 32)
 902                 ramdac /= 2;
 903
 904         if (PICOS2KHZ(var->pixclock) > ramdac)
 905                 return -EINVAL;
 906
 907         debug("exit\n");
 908
 909         return 0;
 910
 911 }
 912
 913 /* Pan the display */
 914 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
 915                                  struct fb_info *info)
 916 {
 917         struct tridentfb_par *par = info->par;
 918         unsigned int offset;
 919
 920         debug("enter\n");
 921         offset = (var->xoffset + (var->yoffset * var->xres))
 922                 * var->bits_per_pixel / 32;
 923         info->var.xoffset = var->xoffset;
 924         info->var.yoffset = var->yoffset;
 925         set_screen_start(par, offset);
 926         debug("exit\n");
 927         return 0;
 928 }
 929
 930 static void shadowmode_on(struct tridentfb_par *par)
 931 {
 932         write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81);
 933 }
 934
 935 static void shadowmode_off(struct tridentfb_par *par)
 936 {
 937         write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E);
 938 }
 939
 940 /* Set the hardware to the requested video mode */
 941 static int tridentfb_set_par(struct fb_info *info)
 942 {
 943         struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
 944         u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
 945         u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
 946         struct fb_var_screeninfo *var = &info->var;
 947         int bpp = var->bits_per_pixel;
 948         unsigned char tmp;
 949         unsigned long vclk;
 950
 951         debug("enter\n");
 952         hdispend = var->xres / 8 - 1;
 953         hsyncstart = (var->xres + var->right_margin) / 8 - 1;
 954         hsyncend = (var->xres + var->right_margin + var->hsync_len) / 8 - 1;
 955         htotal = (var->xres + var->left_margin + var->right_margin +
 956                   var->hsync_len) / 8 - 5;
 957         hblankstart = hdispend + 1;
 958         hblankend = htotal + 3;
 959
 960         vdispend = var->yres - 1;
 961         vsyncstart = var->yres + var->lower_margin;
 962         vsyncend = vsyncstart + var->vsync_len;
 963         vtotal = var->upper_margin + vsyncend - 2;
 964         vblankstart = vdispend + 1;
 965         vblankend = vtotal;
 966
 967         crtc_unlock(par);
 968         write3CE(par, CyberControl, 8);
 969
 970         if (par->flatpanel && var->xres < nativex) {
 971                 /*
 972                  * on flat panels with native size larger
 973                  * than requested resolution decide whether
 974                  * we stretch or center
 975                  */
 976                 t_outb(par, 0xEB, VGA_MIS_W);
 977
 978                 shadowmode_on(par);
 979
 980                 if (center)
 981                         screen_center(par);
 982                 else if (stretch)
 983                         screen_stretch(par);
 984
 985         } else {
 986                 t_outb(par, 0x2B, VGA_MIS_W);
 987                 write3CE(par, CyberControl, 8);
 988         }
 989
 990         /* vertical timing values */
 991         write3X4(par, VGA_CRTC_V_TOTAL, vtotal & 0xFF);
 992         write3X4(par, VGA_CRTC_V_DISP_END, vdispend & 0xFF);
 993         write3X4(par, VGA_CRTC_V_SYNC_START, vsyncstart & 0xFF);
 994         write3X4(par, VGA_CRTC_V_SYNC_END, (vsyncend & 0x0F));
 995         write3X4(par, VGA_CRTC_V_BLANK_START, vblankstart & 0xFF);
 996         write3X4(par, VGA_CRTC_V_BLANK_END, vblankend & 0xFF);
 997
 998         /* horizontal timing values */
 999         write3X4(par, VGA_CRTC_H_TOTAL, htotal & 0xFF);
1000         write3X4(par, VGA_CRTC_H_DISP, hdispend & 0xFF);
1001         write3X4(par, VGA_CRTC_H_SYNC_START, hsyncstart & 0xFF);
1002         write3X4(par, VGA_CRTC_H_SYNC_END,
1003                  (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
1004         write3X4(par, VGA_CRTC_H_BLANK_START, hblankstart & 0xFF);
1005         write3X4(par, VGA_CRTC_H_BLANK_END, hblankend & 0x1F);
1006
1007         /* higher bits of vertical timing values */
1008         tmp = 0x10;
1009         if (vtotal & 0x100) tmp |= 0x01;
1010         if (vdispend & 0x100) tmp |= 0x02;
1011         if (vsyncstart & 0x100) tmp |= 0x04;
1012         if (vblankstart & 0x100) tmp |= 0x08;
1013
1014         if (vtotal & 0x200) tmp |= 0x20;
1015         if (vdispend & 0x200) tmp |= 0x40;
1016         if (vsyncstart & 0x200) tmp |= 0x80;
1017         write3X4(par, VGA_CRTC_OVERFLOW, tmp);
1018
1019         tmp = read3X4(par, CRTHiOrd) & 0x07;
1020         tmp |= 0x08;    /* line compare bit 10 */
1021         if (vtotal & 0x400) tmp |= 0x80;
1022         if (vblankstart & 0x400) tmp |= 0x40;
1023         if (vsyncstart & 0x400) tmp |= 0x20;
1024         if (vdispend & 0x400) tmp |= 0x10;
1025         write3X4(par, CRTHiOrd, tmp);
1026
1027         tmp = (htotal >> 8) & 0x01;
1028         tmp |= (hdispend >> 7) & 0x02;
1029         tmp |= (hsyncstart >> 5) & 0x08;
1030         tmp |= (hblankstart >> 4) & 0x10;
1031         write3X4(par, HorizOverflow, tmp);
1032
1033         tmp = 0x40;
1034         if (vblankstart & 0x200) tmp |= 0x20;
1035 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80;  /* double scan for 200 line modes */
1036         write3X4(par, VGA_CRTC_MAX_SCAN, tmp);
1037
1038         write3X4(par, VGA_CRTC_LINE_COMPARE, 0xFF);
1039         write3X4(par, VGA_CRTC_PRESET_ROW, 0);
1040         write3X4(par, VGA_CRTC_MODE, 0xC3);
1041
1042         write3X4(par, LinearAddReg, 0x20);      /* enable linear addressing */
1043
1044         tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
1045         /* enable access extended memory */
1046         write3X4(par, CRTCModuleTest, tmp);
1047
1048         /* enable GE for text acceleration */
1049         write3X4(par, GraphEngReg, 0x80);
1050
1051 #ifdef CONFIG_FB_TRIDENT_ACCEL
1052         par->init_accel(par, info->var.xres, bpp);
1053 #endif
1054
1055         switch (bpp) {
1056         case 8:
1057                 tmp = 0x00;
1058                 break;
1059         case 16:
1060                 tmp = 0x05;
1061                 break;
1062         case 24:
1063                 tmp = 0x29;
1064                 break;
1065         case 32:
1066                 tmp = 0x09;
1067                 break;
1068         }
1069
1070         write3X4(par, PixelBusReg, tmp);
1071
1072         tmp = read3X4(par, DRAMControl);
1073         if (!is_oldprotect(par->chip_id))
1074                 tmp |= 0x10;
1075         if (iscyber(par->chip_id))
1076                 tmp |= 0x20;
1077         write3X4(par, DRAMControl, tmp);        /* both IO, linear enable */
1078
1079         write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40);
1080         if (!is_xp(par->chip_id))
1081                 write3X4(par, Performance, read3X4(par, Performance) | 0x10);
1082         /* MMIO & PCI read and write burst enable */
1083         if (par->chip_id != TGUI9440)
1084                 write3X4(par, PCIReg, read3X4(par, PCIReg) | 0x06);
1085
1086         vga_mm_wseq(par->io_virt, 0, 3);
1087         vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */
1088         /* enable 4 maps because needed in chain4 mode */
1089         vga_mm_wseq(par->io_virt, 2, 0x0F);
1090         vga_mm_wseq(par->io_virt, 3, 0);
1091         vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */
1092
1093         /* convert from picoseconds to kHz */
1094         vclk = PICOS2KHZ(info->var.pixclock);
1095
1096         /* divide clock by 2 if 32bpp chain4 mode display and CPU path */
1097         tmp = read3CE(par, MiscExtFunc) & 0xF0;
1098         if (bpp == 32 || (par->chip_id == TGUI9440 && bpp == 16)) {
1099                 tmp |= 8;
1100                 vclk *= 2;
1101         }
1102         set_vclk(par, vclk);
1103         write3CE(par, MiscExtFunc, tmp | 0x12);
1104         write3CE(par, 0x5, 0x40);       /* no CGA compat, allow 256 col */
1105         write3CE(par, 0x6, 0x05);       /* graphics mode */
1106         write3CE(par, 0x7, 0x0F);       /* planes? */
1107
1108         if (par->chip_id == CYBERBLADEXPAi1) {
1109                 /* This fixes snow-effect in 32 bpp */
1110                 write3X4(par, VGA_CRTC_H_SYNC_START, 0x84);
1111         }
1112
1113         /* graphics mode and support 256 color modes */
1114         writeAttr(par, 0x10, 0x41);
1115         writeAttr(par, 0x12, 0x0F);     /* planes */
1116         writeAttr(par, 0x13, 0);        /* horizontal pel panning */
1117
1118         /* colors */
1119         for (tmp = 0; tmp < 0x10; tmp++)
1120                 writeAttr(par, tmp, tmp);
1121         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
1122         t_outb(par, 0x20, VGA_ATT_W);           /* enable attr */
1123
1124         switch (bpp) {
1125         case 8:
1126                 tmp = 0;
1127                 break;
1128         case 15:
1129                 tmp = 0x10;
1130                 break;
1131         case 16:
1132                 tmp = 0x30;
1133                 break;
1134         case 24:
1135         case 32:
1136                 tmp = 0xD0;
1137                 break;
1138         }
1139
1140         t_inb(par, VGA_PEL_IW);
1141         t_inb(par, VGA_PEL_MSK);
1142         t_inb(par, VGA_PEL_MSK);
1143         t_inb(par, VGA_PEL_MSK);
1144         t_inb(par, VGA_PEL_MSK);
1145         t_outb(par, tmp, VGA_PEL_MSK);
1146         t_inb(par, VGA_PEL_IW);
1147
1148         if (par->flatpanel)
1149                 set_number_of_lines(par, info->var.yres);
1150         set_lwidth(par, info->var.xres * bpp / (4 * 16));
1151         info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1152         info->fix.line_length = info->var.xres * (bpp >> 3);
1153         info->cmap.len = (bpp == 8) ? 256 : 16;
1154         debug("exit\n");
1155         return 0;
1156 }
1157
1158 /* Set one color register */
1159 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1160                                unsigned blue, unsigned transp,
1161                                struct fb_info *info)
1162 {
1163         int bpp = info->var.bits_per_pixel;
1164         struct tridentfb_par *par = info->par;
1165
1166         if (regno >= info->cmap.len)
1167                 return 1;
1168
1169         if (bpp == 8) {
1170                 t_outb(par, 0xFF, VGA_PEL_MSK);
1171                 t_outb(par, regno, VGA_PEL_IW);
1172
1173                 t_outb(par, red >> 10, VGA_PEL_D);
1174                 t_outb(par, green >> 10, VGA_PEL_D);
1175                 t_outb(par, blue >> 10, VGA_PEL_D);
1176
1177         } else if (regno < 16) {
1178                 if (bpp == 16) {        /* RGB 565 */
1179                         u32 col;
1180
1181                         col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
1182                                 ((blue & 0xF800) >> 11);
1183                         col |= col << 16;
1184                         ((u32 *)(info->pseudo_palette))[regno] = col;
1185                 } else if (bpp == 32)           /* ARGB 8888 */
1186                         ((u32*)info->pseudo_palette)[regno] =
1187                                 ((transp & 0xFF00) << 16)       |
1188                                 ((red & 0xFF00) << 8)           |
1189                                 ((green & 0xFF00))              |
1190                                 ((blue & 0xFF00) >> 8);
1191         }
1192
1193 /*      debug("exit\n"); */
1194         return 0;
1195 }
1196
1197 /* Try blanking the screen.For flat panels it does nothing */
1198 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1199 {
1200         unsigned char PMCont, DPMSCont;
1201         struct tridentfb_par *par = info->par;
1202
1203         debug("enter\n");
1204         if (par->flatpanel)
1205                 return 0;
1206         t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */
1207         PMCont = t_inb(par, 0x83C6) & 0xFC;
1208         DPMSCont = read3CE(par, PowerStatus) & 0xFC;
1209         switch (blank_mode) {
1210         case FB_BLANK_UNBLANK:
1211                 /* Screen: On, HSync: On, VSync: On */
1212         case FB_BLANK_NORMAL:
1213                 /* Screen: Off, HSync: On, VSync: On */
1214                 PMCont |= 0x03;
1215                 DPMSCont |= 0x00;
1216                 break;
1217         case FB_BLANK_HSYNC_SUSPEND:
1218                 /* Screen: Off, HSync: Off, VSync: On */
1219                 PMCont |= 0x02;
1220                 DPMSCont |= 0x01;
1221                 break;
1222         case FB_BLANK_VSYNC_SUSPEND:
1223                 /* Screen: Off, HSync: On, VSync: Off */
1224                 PMCont |= 0x02;
1225                 DPMSCont |= 0x02;
1226                 break;
1227         case FB_BLANK_POWERDOWN:
1228                 /* Screen: Off, HSync: Off, VSync: Off */
1229                 PMCont |= 0x00;
1230                 DPMSCont |= 0x03;
1231                 break;
1232         }
1233
1234         write3CE(par, PowerStatus, DPMSCont);
1235         t_outb(par, 4, 0x83C8);
1236         t_outb(par, PMCont, 0x83C6);
1237
1238         debug("exit\n");
1239
1240         /* let fbcon do a softblank for us */
1241         return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
1242 }
1243
1244 static struct fb_ops tridentfb_ops = {
1245         .owner = THIS_MODULE,
1246         .fb_setcolreg = tridentfb_setcolreg,
1247         .fb_pan_display = tridentfb_pan_display,
1248         .fb_blank = tridentfb_blank,
1249         .fb_check_var = tridentfb_check_var,
1250         .fb_set_par = tridentfb_set_par,
1251         .fb_fillrect = tridentfb_fillrect,
1252         .fb_copyarea = tridentfb_copyarea,
1253         .fb_imageblit = cfb_imageblit,
1254 };
1255
1256 static int __devinit trident_pci_probe(struct pci_dev *dev,
1257                                        const struct pci_device_id *id)
1258 {
1259         int err;
1260         unsigned char revision;
1261         struct fb_info *info;
1262         struct tridentfb_par *default_par;
1263         int defaultaccel;
1264         int chip3D;
1265         int chip_id;
1266
1267         err = pci_enable_device(dev);
1268         if (err)
1269                 return err;
1270
1271         info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev);
1272         if (!info)
1273                 return -ENOMEM;
1274         default_par = info->par;
1275
1276         chip_id = id->device;
1277
1278         if (chip_id == CYBERBLADEi1)
1279                 output("*** Please do use cyblafb, Cyberblade/i1 support "
1280                        "will soon be removed from tridentfb!\n");
1281
1282
1283         /* If PCI id is 0x9660 then further detect chip type */
1284
1285         if (chip_id == TGUI9660) {
1286                 revision = vga_io_rseq(RevisionID);
1287
1288                 switch (revision) {
1289                 case 0x21:
1290                         chip_id = PROVIDIA9685;
1291                         break;
1292                 case 0x22:
1293                 case 0x23:
1294                         chip_id = CYBER9397;
1295                         break;
1296                 case 0x2A:
1297                         chip_id = CYBER9397DVD;
1298                         break;
1299                 case 0x30:
1300                 case 0x33:
1301                 case 0x34:
1302                 case 0x35:
1303                 case 0x38:
1304                 case 0x3A:
1305                 case 0xB3:
1306                         chip_id = CYBER9385;
1307                         break;
1308                 case 0x40 ... 0x43:
1309                         chip_id = CYBER9382;
1310                         break;
1311                 case 0x4A:
1312                         chip_id = CYBER9388;
1313                         break;
1314                 default:
1315                         break;
1316                 }
1317         }
1318
1319         chip3D = is3Dchip(chip_id);
1320
1321         if (is_xp(chip_id)) {
1322                 default_par->init_accel = xp_init_accel;
1323                 default_par->wait_engine = xp_wait_engine;
1324                 default_par->fill_rect = xp_fill_rect;
1325                 default_par->copy_rect = xp_copy_rect;
1326         } else if (is_blade(chip_id)) {
1327                 default_par->init_accel = blade_init_accel;
1328                 default_par->wait_engine = blade_wait_engine;
1329                 default_par->fill_rect = blade_fill_rect;
1330                 default_par->copy_rect = blade_copy_rect;
1331         } else {
1332                 default_par->init_accel = image_init_accel;
1333                 default_par->wait_engine = image_wait_engine;
1334                 default_par->fill_rect = image_fill_rect;
1335                 default_par->copy_rect = image_copy_rect;
1336         }
1337
1338         default_par->chip_id = chip_id;
1339
1340         /* acceleration is on by default for 3D chips */
1341         defaultaccel = chip3D && !noaccel;
1342
1343         /* setup MMIO region */
1344         tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
1345         tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
1346
1347         if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1348                 debug("request_region failed!\n");
1349                 framebuffer_release(info);
1350                 return -1;
1351         }
1352
1353         default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start,
1354                                                tridentfb_fix.mmio_len);
1355
1356         if (!default_par->io_virt) {
1357                 debug("ioremap failed\n");
1358                 err = -1;
1359                 goto out_unmap1;
1360         }
1361
1362         /* setup framebuffer memory */
1363         tridentfb_fix.smem_start = pci_resource_start(dev, 0);
1364         tridentfb_fix.smem_len = get_memsize(default_par);
1365
1366         enable_mmio();
1367
1368         if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1369                 debug("request_mem_region failed!\n");
1370                 disable_mmio(info->par);
1371                 err = -1;
1372                 goto out_unmap1;
1373         }
1374
1375         info->screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1376                                             tridentfb_fix.smem_len);
1377
1378         if (!info->screen_base) {
1379                 debug("ioremap failed\n");
1380                 err = -1;
1381                 goto out_unmap2;
1382         }
1383
1384         output("%s board found\n", pci_name(dev));
1385         default_par->flatpanel = is_flatpanel(default_par);
1386
1387         if (default_par->flatpanel)
1388                 nativex = get_nativex(default_par);
1389
1390         info->fix = tridentfb_fix;
1391         info->fbops = &tridentfb_ops;
1392         info->pseudo_palette = default_par->pseudo_pal;
1393
1394         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1395 #ifdef CONFIG_FB_TRIDENT_ACCEL
1396         info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
1397 #endif
1398         if (!fb_find_mode(&info->var, info,
1399                           mode_option, NULL, 0, NULL, bpp)) {
1400                 err = -EINVAL;
1401                 goto out_unmap2;
1402         }
1403         err = fb_alloc_cmap(&info->cmap, 256, 0);
1404         if (err < 0)
1405                 goto out_unmap2;
1406
1407         if (defaultaccel && default_par->init_accel)
1408                 info->var.accel_flags |= FB_ACCELF_TEXT;
1409         else
1410                 info->var.accel_flags &= ~FB_ACCELF_TEXT;
1411         info->var.activate |= FB_ACTIVATE_NOW;
1412         info->device = &dev->dev;
1413         if (register_framebuffer(info) < 0) {
1414                 printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
1415                 fb_dealloc_cmap(&info->cmap);
1416                 err = -EINVAL;
1417                 goto out_unmap2;
1418         }
1419         output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1420            info->node, info->fix.id, info->var.xres,
1421            info->var.yres, info->var.bits_per_pixel);
1422
1423         pci_set_drvdata(dev, info);
1424         return 0;
1425
1426 out_unmap2:
1427         if (info->screen_base)
1428                 iounmap(info->screen_base);
1429         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1430         disable_mmio(info->par);
1431 out_unmap1:
1432         if (default_par->io_virt)
1433                 iounmap(default_par->io_virt);
1434         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1435         framebuffer_release(info);
1436         return err;
1437 }
1438
1439 static void __devexit trident_pci_remove(struct pci_dev *dev)
1440 {
1441         struct fb_info *info = pci_get_drvdata(dev);
1442         struct tridentfb_par *par = info->par;
1443
1444         unregister_framebuffer(info);
1445         iounmap(par->io_virt);
1446         iounmap(info->screen_base);
1447         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1448         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1449         pci_set_drvdata(dev, NULL);
1450         framebuffer_release(info);
1451 }
1452
1453 /* List of boards that we are trying to support */
1454 static struct pci_device_id trident_devices[] = {
1455         {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1456         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1457         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1458         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1459         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1460         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1461         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1462         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1463         {PCI_VENDOR_ID_TRIDENT, TGUI9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1464         {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1465         {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1466         {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1467         {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1468         {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1469         {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1470         {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1471         {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1472         {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1473         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1474         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1475         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1476         {0,}
1477 };
1478
1479 MODULE_DEVICE_TABLE(pci, trident_devices);
1480
1481 static struct pci_driver tridentfb_pci_driver = {
1482         .name = "tridentfb",
1483         .id_table = trident_devices,
1484         .probe = trident_pci_probe,
1485         .remove = __devexit_p(trident_pci_remove)
1486 };
1487
1488 /*
1489  * Parse user specified options (`video=trident:')
1490  * example:
1491  *      video=trident:800x600,bpp=16,noaccel
1492  */
1493 #ifndef MODULE
1494 static int __init tridentfb_setup(char *options)
1495 {
1496         char *opt;
1497         if (!options || !*options)
1498                 return 0;
1499         while ((opt = strsep(&options, ",")) != NULL) {
1500                 if (!*opt)
1501                         continue;
1502                 if (!strncmp(opt, "noaccel", 7))
1503                         noaccel = 1;
1504                 else if (!strncmp(opt, "fp", 2))
1505                         fp = 1;
1506                 else if (!strncmp(opt, "crt", 3))
1507                         fp = 0;
1508                 else if (!strncmp(opt, "bpp=", 4))
1509                         bpp = simple_strtoul(opt + 4, NULL, 0);
1510                 else if (!strncmp(opt, "center", 6))
1511                         center = 1;
1512                 else if (!strncmp(opt, "stretch", 7))
1513                         stretch = 1;
1514                 else if (!strncmp(opt, "memsize=", 8))
1515                         memsize = simple_strtoul(opt + 8, NULL, 0);
1516                 else if (!strncmp(opt, "memdiff=", 8))
1517                         memdiff = simple_strtoul(opt + 8, NULL, 0);
1518                 else if (!strncmp(opt, "nativex=", 8))
1519                         nativex = simple_strtoul(opt + 8, NULL, 0);
1520                 else
1521                         mode_option = opt;
1522         }
1523         return 0;
1524 }
1525 #endif
1526
1527 static int __init tridentfb_init(void)
1528 {
1529 #ifndef MODULE
1530         char *option = NULL;
1531
1532         if (fb_get_options("tridentfb", &option))
1533                 return -ENODEV;
1534         tridentfb_setup(option);
1535 #endif
1536         output("Trident framebuffer %s initializing\n", VERSION);
1537         return pci_register_driver(&tridentfb_pci_driver);
1538 }
1539
1540 static void __exit tridentfb_exit(void)
1541 {
1542         pci_unregister_driver(&tridentfb_pci_driver);
1543 }
1544
1545 module_init(tridentfb_init);
1546 module_exit(tridentfb_exit);
1547
1548 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1549 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1550 MODULE_LICENSE("GPL");
1551