drivers/video/tridentfb.c

   1 /*
   2  * Frame buffer driver for Trident Blade and Image series
   3  *
   4  * Copyright 2001, 2002 - Jani Monoses   <jani@iv.ro>
   5  *
   6  *
   7  * CREDITS:(in order of appearance)
   8  *      skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
   9  *      Special thanks ;) to Mattia Crivellini <tia@mclink.it>
  10  *      much inspired by the XFree86 4.x Trident driver sources
  11  *      by Alan Hourihane the FreeVGA project
  12  *      Francesco Salvestrini <salvestrini@users.sf.net> XP support,
  13  *      code, suggestions
  14  * TODO:
  15  *      timing value tweaking so it looks good on every monitor in every mode
  16  *      TGUI acceleration
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/fb.h>
  21 #include <linux/init.h>
  22 #include <linux/pci.h>
  23
  24 #include <linux/delay.h>
  25 #include <video/vga.h>
  26 #include <video/trident.h>
  27
  28 #define VERSION         "0.7.9-NEWAPI"
  29
  30 struct tridentfb_par {
  31         void __iomem *io_virt;  /* iospace virtual memory address */
  32         u32 pseudo_pal[16];
  33         int chip_id;
  34         int flatpanel;
  35         void (*init_accel) (struct tridentfb_par *, int, int);
  36         void (*wait_engine) (struct tridentfb_par *);
  37         void (*fill_rect)
  38                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  39         void (*copy_rect)
  40                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  41 };
  42
  43 static unsigned char eng_oper;  /* engine operation... */
  44 static struct fb_ops tridentfb_ops;
  45
  46 static struct fb_fix_screeninfo tridentfb_fix = {
  47         .id = "Trident",
  48         .type = FB_TYPE_PACKED_PIXELS,
  49         .ypanstep = 1,
  50         .visual = FB_VISUAL_PSEUDOCOLOR,
  51         .accel = FB_ACCEL_NONE,
  52 };
  53
  54 /* defaults which are normally overriden by user values */
  55
  56 /* video mode */
  57 static char *mode_option __devinitdata = "640x480";
  58 static int bpp __devinitdata = 8;
  59
  60 static int noaccel __devinitdata;
  61
  62 static int center;
  63 static int stretch;
  64
  65 static int fp __devinitdata;
  66 static int crt __devinitdata;
  67
  68 static int memsize __devinitdata;
  69 static int memdiff __devinitdata;
  70 static int nativex;
  71
  72 module_param(mode_option, charp, 0);
  73 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
  74 module_param_named(mode, mode_option, charp, 0);
  75 MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
  76 module_param(bpp, int, 0);
  77 module_param(center, int, 0);
  78 module_param(stretch, int, 0);
  79 module_param(noaccel, int, 0);
  80 module_param(memsize, int, 0);
  81 module_param(memdiff, int, 0);
  82 module_param(nativex, int, 0);
  83 module_param(fp, int, 0);
  84 MODULE_PARM_DESC(fp, "Define if flatpanel is connected");
  85 module_param(crt, int, 0);
  86 MODULE_PARM_DESC(crt, "Define if CRT is connected");
  87
  88 static int is_oldclock(int id)
  89 {
  90         return (id == TGUI9660);
  91 }
  92
  93 static int is_blade(int id)
  94 {
  95         return  (id == BLADE3D) ||
  96                 (id == CYBERBLADEE4) ||
  97                 (id == CYBERBLADEi7) ||
  98                 (id == CYBERBLADEi7D) ||
  99                 (id == CYBERBLADEi1) ||
 100                 (id == CYBERBLADEi1D) ||
 101                 (id == CYBERBLADEAi1) ||
 102                 (id == CYBERBLADEAi1D);
 103 }
 104
 105 static int is_xp(int id)
 106 {
 107         return  (id == CYBERBLADEXPAi1) ||
 108                 (id == CYBERBLADEXPm8) ||
 109                 (id == CYBERBLADEXPm16);
 110 }
 111
 112 static int is3Dchip(int id)
 113 {
 114         return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
 115                 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
 116                 (id == CYBER9397) || (id == CYBER9397DVD) ||
 117                 (id == CYBER9520) || (id == CYBER9525DVD) ||
 118                 (id == IMAGE975) || (id == IMAGE985) ||
 119                 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
 120                 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
 121                 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
 122                 (id == CYBERBLADEXPAi1));
 123 }
 124
 125 static int iscyber(int id)
 126 {
 127         switch (id) {
 128         case CYBER9388:
 129         case CYBER9382:
 130         case CYBER9385:
 131         case CYBER9397:
 132         case CYBER9397DVD:
 133         case CYBER9520:
 134         case CYBER9525DVD:
 135         case CYBERBLADEE4:
 136         case CYBERBLADEi7D:
 137         case CYBERBLADEi1:
 138         case CYBERBLADEi1D:
 139         case CYBERBLADEAi1:
 140         case CYBERBLADEAi1D:
 141         case CYBERBLADEXPAi1:
 142                 return 1;
 143
 144         case CYBER9320:
 145         case TGUI9660:
 146         case IMAGE975:
 147         case IMAGE985:
 148         case BLADE3D:
 149         case CYBERBLADEi7:      /* VIA MPV4 integrated version */
 150
 151         default:
 152                 /* case CYBERBLDAEXPm8:  Strange */
 153                 /* case CYBERBLDAEXPm16: Strange */
 154                 return 0;
 155         }
 156 }
 157
 158 static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg)
 159 {
 160         fb_writeb(val, p->io_virt + reg);
 161 }
 162
 163 static inline u8 t_inb(struct tridentfb_par *p, u16 reg)
 164 {
 165         return fb_readb(p->io_virt + reg);
 166 }
 167
 168 static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v)
 169 {
 170         fb_writel(v, par->io_virt + r);
 171 }
 172
 173 static inline u32 readmmr(struct tridentfb_par *par, u16 r)
 174 {
 175         return fb_readl(par->io_virt + r);
 176 }
 177
 178 /*
 179  * Blade specific acceleration.
 180  */
 181
 182 #define point(x, y) ((y) << 16 | (x))
 183 #define STA     0x2120
 184 #define CMD     0x2144
 185 #define ROP     0x2148
 186 #define CLR     0x2160
 187 #define SR1     0x2100
 188 #define SR2     0x2104
 189 #define DR1     0x2108
 190 #define DR2     0x210C
 191
 192 #define ROP_S   0xCC
 193
 194 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 195 {
 196         int v1 = (pitch >> 3) << 20;
 197         int tmp = 0, v2;
 198         switch (bpp) {
 199         case 8:
 200                 tmp = 0;
 201                 break;
 202         case 15:
 203                 tmp = 5;
 204                 break;
 205         case 16:
 206                 tmp = 1;
 207                 break;
 208         case 24:
 209         case 32:
 210                 tmp = 2;
 211                 break;
 212         }
 213         v2 = v1 | (tmp << 29);
 214         writemmr(par, 0x21C0, v2);
 215         writemmr(par, 0x21C4, v2);
 216         writemmr(par, 0x21B8, v2);
 217         writemmr(par, 0x21BC, v2);
 218         writemmr(par, 0x21D0, v1);
 219         writemmr(par, 0x21D4, v1);
 220         writemmr(par, 0x21C8, v1);
 221         writemmr(par, 0x21CC, v1);
 222         writemmr(par, 0x216C, 0);
 223 }
 224
 225 static void blade_wait_engine(struct tridentfb_par *par)
 226 {
 227         while (readmmr(par, STA) & 0xFA800000) ;
 228 }
 229
 230 static void blade_fill_rect(struct tridentfb_par *par,
 231                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 232 {
 233         writemmr(par, CLR, c);
 234         writemmr(par, ROP, rop ? 0x66 : ROP_S);
 235         writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
 236
 237         writemmr(par, DR1, point(x, y));
 238         writemmr(par, DR2, point(x + w - 1, y + h - 1));
 239 }
 240
 241 static void blade_copy_rect(struct tridentfb_par *par,
 242                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 243 {
 244         u32 s1, s2, d1, d2;
 245         int direction = 2;
 246         s1 = point(x1, y1);
 247         s2 = point(x1 + w - 1, y1 + h - 1);
 248         d1 = point(x2, y2);
 249         d2 = point(x2 + w - 1, y2 + h - 1);
 250
 251         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 252                 direction = 0;
 253
 254         writemmr(par, ROP, ROP_S);
 255         writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
 256
 257         writemmr(par, SR1, direction ? s2 : s1);
 258         writemmr(par, SR2, direction ? s1 : s2);
 259         writemmr(par, DR1, direction ? d2 : d1);
 260         writemmr(par, DR2, direction ? d1 : d2);
 261 }
 262
 263 /*
 264  * BladeXP specific acceleration functions
 265  */
 266
 267 #define ROP_P 0xF0
 268 #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff))
 269
 270 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 271 {
 272         int tmp = 0, v1;
 273         unsigned char x = 0;
 274
 275         switch (bpp) {
 276         case 8:
 277                 x = 0;
 278                 break;
 279         case 16:
 280                 x = 1;
 281                 break;
 282         case 24:
 283                 x = 3;
 284                 break;
 285         case 32:
 286                 x = 2;
 287                 break;
 288         }
 289
 290         switch (pitch << (bpp >> 3)) {
 291         case 8192:
 292         case 512:
 293                 x |= 0x00;
 294                 break;
 295         case 1024:
 296                 x |= 0x04;
 297                 break;
 298         case 2048:
 299                 x |= 0x08;
 300                 break;
 301         case 4096:
 302                 x |= 0x0C;
 303                 break;
 304         }
 305
 306         t_outb(par, x, 0x2125);
 307
 308         eng_oper = x | 0x40;
 309
 310         switch (bpp) {
 311         case 8:
 312                 tmp = 18;
 313                 break;
 314         case 15:
 315         case 16:
 316                 tmp = 19;
 317                 break;
 318         case 24:
 319         case 32:
 320                 tmp = 20;
 321                 break;
 322         }
 323
 324         v1 = pitch << tmp;
 325
 326         writemmr(par, 0x2154, v1);
 327         writemmr(par, 0x2150, v1);
 328         t_outb(par, 3, 0x2126);
 329 }
 330
 331 static void xp_wait_engine(struct tridentfb_par *par)
 332 {
 333         int busy;
 334         int count, timeout;
 335
 336         count = 0;
 337         timeout = 0;
 338         for (;;) {
 339                 busy = t_inb(par, STA) & 0x80;
 340                 if (busy != 0x80)
 341                         return;
 342                 count++;
 343                 if (count == 10000000) {
 344                         /* Timeout */
 345                         count = 9990000;
 346                         timeout++;
 347                         if (timeout == 8) {
 348                                 /* Reset engine */
 349                                 t_outb(par, 0x00, 0x2120);
 350                                 return;
 351                         }
 352                 }
 353         }
 354 }
 355
 356 static void xp_fill_rect(struct tridentfb_par *par,
 357                          u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 358 {
 359         writemmr(par, 0x2127, ROP_P);
 360         writemmr(par, 0x2158, c);
 361         writemmr(par, 0x2128, 0x4000);
 362         writemmr(par, 0x2140, masked_point(h, w));
 363         writemmr(par, 0x2138, masked_point(y, x));
 364         t_outb(par, 0x01, 0x2124);
 365         t_outb(par, eng_oper, 0x2125);
 366 }
 367
 368 static void xp_copy_rect(struct tridentfb_par *par,
 369                          u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 370 {
 371         int direction;
 372         u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
 373
 374         direction = 0x0004;
 375
 376         if ((x1 < x2) && (y1 == y2)) {
 377                 direction |= 0x0200;
 378                 x1_tmp = x1 + w - 1;
 379                 x2_tmp = x2 + w - 1;
 380         } else {
 381                 x1_tmp = x1;
 382                 x2_tmp = x2;
 383         }
 384
 385         if (y1 < y2) {
 386                 direction |= 0x0100;
 387                 y1_tmp = y1 + h - 1;
 388                 y2_tmp = y2 + h - 1;
 389         } else {
 390                 y1_tmp = y1;
 391                 y2_tmp = y2;
 392         }
 393
 394         writemmr(par, 0x2128, direction);
 395         t_outb(par, ROP_S, 0x2127);
 396         writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp));
 397         writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp));
 398         writemmr(par, 0x2140, masked_point(h, w));
 399         t_outb(par, 0x01, 0x2124);
 400 }
 401
 402 /*
 403  * Image specific acceleration functions
 404  */
 405 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 406 {
 407         int tmp = 0;
 408         switch (bpp) {
 409         case 8:
 410                 tmp = 0;
 411                 break;
 412         case 15:
 413                 tmp = 5;
 414                 break;
 415         case 16:
 416                 tmp = 1;
 417                 break;
 418         case 24:
 419         case 32:
 420                 tmp = 2;
 421                 break;
 422         }
 423         writemmr(par, 0x2120, 0xF0000000);
 424         writemmr(par, 0x2120, 0x40000000 | tmp);
 425         writemmr(par, 0x2120, 0x80000000);
 426         writemmr(par, 0x2144, 0x00000000);
 427         writemmr(par, 0x2148, 0x00000000);
 428         writemmr(par, 0x2150, 0x00000000);
 429         writemmr(par, 0x2154, 0x00000000);
 430         writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
 431         writemmr(par, 0x216C, 0x00000000);
 432         writemmr(par, 0x2170, 0x00000000);
 433         writemmr(par, 0x217C, 0x00000000);
 434         writemmr(par, 0x2120, 0x10000000);
 435         writemmr(par, 0x2130, (2047 << 16) | 2047);
 436 }
 437
 438 static void image_wait_engine(struct tridentfb_par *par)
 439 {
 440         while (readmmr(par, 0x2164) & 0xF0000000) ;
 441 }
 442
 443 static void image_fill_rect(struct tridentfb_par *par,
 444                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 445 {
 446         writemmr(par, 0x2120, 0x80000000);
 447         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 448
 449         writemmr(par, 0x2144, c);
 450
 451         writemmr(par, DR1, point(x, y));
 452         writemmr(par, DR2, point(x + w - 1, y + h - 1));
 453
 454         writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
 455 }
 456
 457 static void image_copy_rect(struct tridentfb_par *par,
 458                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 459 {
 460         u32 s1, s2, d1, d2;
 461         int direction = 2;
 462         s1 = point(x1, y1);
 463         s2 = point(x1 + w - 1, y1 + h - 1);
 464         d1 = point(x2, y2);
 465         d2 = point(x2 + w - 1, y2 + h - 1);
 466
 467         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 468                 direction = 0;
 469
 470         writemmr(par, 0x2120, 0x80000000);
 471         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 472
 473         writemmr(par, SR1, direction ? s2 : s1);
 474         writemmr(par, SR2, direction ? s1 : s2);
 475         writemmr(par, DR1, direction ? d2 : d1);
 476         writemmr(par, DR2, direction ? d1 : d2);
 477         writemmr(par, 0x2124,
 478                  0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
 479 }
 480
 481 /*
 482  * Accel functions called by the upper layers
 483  */
 484 #ifdef CONFIG_FB_TRIDENT_ACCEL
 485 static void tridentfb_fillrect(struct fb_info *info,
 486                                const struct fb_fillrect *fr)
 487 {
 488         struct tridentfb_par *par = info->par;
 489         int bpp = info->var.bits_per_pixel;
 490         int col = 0;
 491
 492         switch (bpp) {
 493         default:
 494         case 8:
 495                 col |= fr->color;
 496                 col |= col << 8;
 497                 col |= col << 16;
 498                 break;
 499         case 16:
 500                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 501                 break;
 502         case 32:
 503                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 504                 break;
 505         }
 506
 507         par->fill_rect(par, fr->dx, fr->dy, fr->width,
 508                        fr->height, col, fr->rop);
 509         par->wait_engine(par);
 510 }
 511 static void tridentfb_copyarea(struct fb_info *info,
 512                                const struct fb_copyarea *ca)
 513 {
 514         struct tridentfb_par *par = info->par;
 515
 516         par->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy,
 517                        ca->width, ca->height);
 518         par->wait_engine(par);
 519 }
 520 #else /* !CONFIG_FB_TRIDENT_ACCEL */
 521 #define tridentfb_fillrect cfb_fillrect
 522 #define tridentfb_copyarea cfb_copyarea
 523 #endif /* CONFIG_FB_TRIDENT_ACCEL */
 524
 525
 526 /*
 527  * Hardware access functions
 528  */
 529
 530 static inline unsigned char read3X4(struct tridentfb_par *par, int reg)
 531 {
 532         return vga_mm_rcrt(par->io_virt, reg);
 533 }
 534
 535 static inline void write3X4(struct tridentfb_par *par, int reg,
 536                             unsigned char val)
 537 {
 538         vga_mm_wcrt(par->io_virt, reg, val);
 539 }
 540
 541 static inline unsigned char read3CE(struct tridentfb_par *par,
 542                                     unsigned char reg)
 543 {
 544         return vga_mm_rgfx(par->io_virt, reg);
 545 }
 546
 547 static inline void writeAttr(struct tridentfb_par *par, int reg,
 548                              unsigned char val)
 549 {
 550         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
 551         vga_mm_wattr(par->io_virt, reg, val);
 552 }
 553
 554 static inline void write3CE(struct tridentfb_par *par, int reg,
 555                             unsigned char val)
 556 {
 557         vga_mm_wgfx(par->io_virt, reg, val);
 558 }
 559
 560 static void enable_mmio(void)
 561 {
 562         /* Goto New Mode */
 563         vga_io_rseq(0x0B);
 564
 565         /* Unprotect registers */
 566         vga_io_wseq(NewMode1, 0x80);
 567
 568         /* Enable MMIO */
 569         outb(PCIReg, 0x3D4);
 570         outb(inb(0x3D5) | 0x01, 0x3D5);
 571 }
 572
 573 static void disable_mmio(struct tridentfb_par *par)
 574 {
 575         /* Goto New Mode */
 576         vga_mm_rseq(par->io_virt, 0x0B);
 577
 578         /* Unprotect registers */
 579         vga_mm_wseq(par->io_virt, NewMode1, 0x80);
 580
 581         /* Disable MMIO */
 582         t_outb(par, PCIReg, 0x3D4);
 583         t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5);
 584 }
 585
 586 static void crtc_unlock(struct tridentfb_par *par)
 587 {
 588         write3X4(par, VGA_CRTC_V_SYNC_END,
 589                  read3X4(par, VGA_CRTC_V_SYNC_END) & 0x7F);
 590 }
 591
 592 /*  Return flat panel's maximum x resolution */
 593 static int __devinit get_nativex(struct tridentfb_par *par)
 594 {
 595         int x, y, tmp;
 596
 597         if (nativex)
 598                 return nativex;
 599
 600         tmp = (read3CE(par, VertStretch) >> 4) & 3;
 601
 602         switch (tmp) {
 603         case 0:
 604                 x = 1280; y = 1024;
 605                 break;
 606         case 2:
 607                 x = 1024; y = 768;
 608                 break;
 609         case 3:
 610                 x = 800; y = 600;
 611                 break;
 612         case 4:
 613                 x = 1400; y = 1050;
 614                 break;
 615         case 1:
 616         default:
 617                 x = 640;  y = 480;
 618                 break;
 619         }
 620
 621         output("%dx%d flat panel found\n", x, y);
 622         return x;
 623 }
 624
 625 /* Set pitch */
 626 static void set_lwidth(struct tridentfb_par *par, int width)
 627 {
 628         write3X4(par, VGA_CRTC_OFFSET, width & 0xFF);
 629         write3X4(par, AddColReg,
 630                  (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4));
 631 }
 632
 633 /* For resolutions smaller than FP resolution stretch */
 634 static void screen_stretch(struct tridentfb_par *par)
 635 {
 636         if (par->chip_id != CYBERBLADEXPAi1)
 637                 write3CE(par, BiosReg, 0);
 638         else
 639                 write3CE(par, BiosReg, 8);
 640         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1);
 641         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1);
 642 }
 643
 644 /* For resolutions smaller than FP resolution center */
 645 static void screen_center(struct tridentfb_par *par)
 646 {
 647         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80);
 648         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80);
 649 }
 650
 651 /* Address of first shown pixel in display memory */
 652 static void set_screen_start(struct tridentfb_par *par, int base)
 653 {
 654         u8 tmp;
 655         write3X4(par, VGA_CRTC_START_LO, base & 0xFF);
 656         write3X4(par, VGA_CRTC_START_HI, (base & 0xFF00) >> 8);
 657         tmp = read3X4(par, CRTCModuleTest) & 0xDF;
 658         write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
 659         tmp = read3X4(par, CRTHiOrd) & 0xF8;
 660         write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
 661 }
 662
 663 /* Set dotclock frequency */
 664 static void set_vclk(struct tridentfb_par *par, unsigned long freq)
 665 {
 666         int m, n, k;
 667         unsigned long fi, d, di;
 668         unsigned char best_m = 0, best_n = 0, best_k = 0;
 669         unsigned char hi, lo;
 670
 671         d = 20000;
 672         for (k = 1; k >= 0; k--)
 673                 for (m = 0; m < 32; m++)
 674                         for (n = 0; n < 122; n++) {
 675                                 fi = ((14318l * (n + 8)) / (m + 2)) >> k;
 676                                 if ((di = abs(fi - freq)) < d) {
 677                                         d = di;
 678                                         best_n = n;
 679                                         best_m = m;
 680                                         best_k = k;
 681                                 }
 682                                 if (fi > freq)
 683                                         break;
 684                         }
 685
 686         if (is_oldclock(par->chip_id)) {
 687                 lo = best_n | (best_m << 7);
 688                 hi = (best_m >> 1) | (best_k << 4);
 689         } else {
 690                 lo = best_n;
 691                 hi = best_m | (best_k << 6);
 692         }
 693
 694         if (is3Dchip(par->chip_id)) {
 695                 vga_mm_wseq(par->io_virt, ClockHigh, hi);
 696                 vga_mm_wseq(par->io_virt, ClockLow, lo);
 697         } else {
 698                 t_outb(par, lo, 0x43C8);
 699                 t_outb(par, hi, 0x43C9);
 700         }
 701         debug("VCLK = %X %X\n", hi, lo);
 702 }
 703
 704 /* Set number of lines for flat panels*/
 705 static void set_number_of_lines(struct tridentfb_par *par, int lines)
 706 {
 707         int tmp = read3CE(par, CyberEnhance) & 0x8F;
 708         if (lines > 1024)
 709                 tmp |= 0x50;
 710         else if (lines > 768)
 711                 tmp |= 0x30;
 712         else if (lines > 600)
 713                 tmp |= 0x20;
 714         else if (lines > 480)
 715                 tmp |= 0x10;
 716         write3CE(par, CyberEnhance, tmp);
 717 }
 718
 719 /*
 720  * If we see that FP is active we assume we have one.
 721  * Otherwise we have a CRT display. User can override.
 722  */
 723 static int __devinit is_flatpanel(struct tridentfb_par *par)
 724 {
 725         if (fp)
 726                 return 1;
 727         if (crt || !iscyber(par->chip_id))
 728                 return 0;
 729         return (read3CE(par, FPConfig) & 0x10) ? 1 : 0;
 730 }
 731
 732 /* Try detecting the video memory size */
 733 static unsigned int __devinit get_memsize(struct tridentfb_par *par)
 734 {
 735         unsigned char tmp, tmp2;
 736         unsigned int k;
 737
 738         /* If memory size provided by user */
 739         if (memsize)
 740                 k = memsize * Kb;
 741         else
 742                 switch (par->chip_id) {
 743                 case CYBER9525DVD:
 744                         k = 2560 * Kb;
 745                         break;
 746                 default:
 747                         tmp = read3X4(par, SPR) & 0x0F;
 748                         switch (tmp) {
 749
 750                         case 0x01:
 751                                 k = 512 * Kb;
 752                                 break;
 753                         case 0x02:
 754                                 k = 6 * Mb;     /* XP */
 755                                 break;
 756                         case 0x03:
 757                                 k = 1 * Mb;
 758                                 break;
 759                         case 0x04:
 760                                 k = 8 * Mb;
 761                                 break;
 762                         case 0x06:
 763                                 k = 10 * Mb;    /* XP */
 764                                 break;
 765                         case 0x07:
 766                                 k = 2 * Mb;
 767                                 break;
 768                         case 0x08:
 769                                 k = 12 * Mb;    /* XP */
 770                                 break;
 771                         case 0x0A:
 772                                 k = 14 * Mb;    /* XP */
 773                                 break;
 774                         case 0x0C:
 775                                 k = 16 * Mb;    /* XP */
 776                                 break;
 777                         case 0x0E:              /* XP */
 778
 779                                 tmp2 = vga_mm_rseq(par->io_virt, 0xC1);
 780                                 switch (tmp2) {
 781                                 case 0x00:
 782                                         k = 20 * Mb;
 783                                         break;
 784                                 case 0x01:
 785                                         k = 24 * Mb;
 786                                         break;
 787                                 case 0x10:
 788                                         k = 28 * Mb;
 789                                         break;
 790                                 case 0x11:
 791                                         k = 32 * Mb;
 792                                         break;
 793                                 default:
 794                                         k = 1 * Mb;
 795                                         break;
 796                                 }
 797                                 break;
 798
 799                         case 0x0F:
 800                                 k = 4 * Mb;
 801                                 break;
 802                         default:
 803                                 k = 1 * Mb;
 804                                 break;
 805                         }
 806                 }
 807
 808         k -= memdiff * Kb;
 809         output("framebuffer size = %d Kb\n", k / Kb);
 810         return k;
 811 }
 812
 813 /* See if we can handle the video mode described in var */
 814 static int tridentfb_check_var(struct fb_var_screeninfo *var,
 815                                struct fb_info *info)
 816 {
 817         struct tridentfb_par *par = info->par;
 818         int bpp = var->bits_per_pixel;
 819         debug("enter\n");
 820
 821         /* check color depth */
 822         if (bpp == 24)
 823                 bpp = var->bits_per_pixel = 32;
 824         /* check whether resolution fits on panel and in memory */
 825         if (par->flatpanel && nativex && var->xres > nativex)
 826                 return -EINVAL;
 827         if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len)
 828                 return -EINVAL;
 829
 830         switch (bpp) {
 831         case 8:
 832                 var->red.offset = 0;
 833                 var->green.offset = 0;
 834                 var->blue.offset = 0;
 835                 var->red.length = 6;
 836                 var->green.length = 6;
 837                 var->blue.length = 6;
 838                 break;
 839         case 16:
 840                 var->red.offset = 11;
 841                 var->green.offset = 5;
 842                 var->blue.offset = 0;
 843                 var->red.length = 5;
 844                 var->green.length = 6;
 845                 var->blue.length = 5;
 846                 break;
 847         case 32:
 848                 var->red.offset = 16;
 849                 var->green.offset = 8;
 850                 var->blue.offset = 0;
 851                 var->red.length = 8;
 852                 var->green.length = 8;
 853                 var->blue.length = 8;
 854                 break;
 855         default:
 856                 return -EINVAL;
 857         }
 858         debug("exit\n");
 859
 860         return 0;
 861
 862 }
 863
 864 /* Pan the display */
 865 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
 866                                  struct fb_info *info)
 867 {
 868         struct tridentfb_par *par = info->par;
 869         unsigned int offset;
 870
 871         debug("enter\n");
 872         offset = (var->xoffset + (var->yoffset * var->xres))
 873                 * var->bits_per_pixel / 32;
 874         info->var.xoffset = var->xoffset;
 875         info->var.yoffset = var->yoffset;
 876         set_screen_start(par, offset);
 877         debug("exit\n");
 878         return 0;
 879 }
 880
 881 static void shadowmode_on(struct tridentfb_par *par)
 882 {
 883         write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81);
 884 }
 885
 886 static void shadowmode_off(struct tridentfb_par *par)
 887 {
 888         write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E);
 889 }
 890
 891 /* Set the hardware to the requested video mode */
 892 static int tridentfb_set_par(struct fb_info *info)
 893 {
 894         struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
 895         u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
 896         u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
 897         struct fb_var_screeninfo *var = &info->var;
 898         int bpp = var->bits_per_pixel;
 899         unsigned char tmp;
 900         unsigned long vclk;
 901
 902         debug("enter\n");
 903         hdispend = var->xres / 8 - 1;
 904         hsyncstart = (var->xres + var->right_margin) / 8 - 1;
 905         hsyncend = (var->xres + var->right_margin + var->hsync_len) / 8 - 1;
 906         htotal = (var->xres + var->left_margin + var->right_margin +
 907                   var->hsync_len) / 8 - 5;
 908         hblankstart = hdispend + 2;
 909         hblankend = htotal + 3;
 910
 911         vdispend = var->yres - 1;
 912         vsyncstart = var->yres + var->lower_margin;
 913         vsyncend = vsyncstart + var->vsync_len;
 914         vtotal = var->upper_margin + vsyncend - 2;
 915         vblankstart = vdispend + 2;
 916         vblankend = vtotal;
 917
 918         crtc_unlock(par);
 919         write3CE(par, CyberControl, 8);
 920
 921         if (par->flatpanel && var->xres < nativex) {
 922                 /*
 923                  * on flat panels with native size larger
 924                  * than requested resolution decide whether
 925                  * we stretch or center
 926                  */
 927                 t_outb(par, 0xEB, VGA_MIS_W);
 928
 929                 shadowmode_on(par);
 930
 931                 if (center)
 932                         screen_center(par);
 933                 else if (stretch)
 934                         screen_stretch(par);
 935
 936         } else {
 937                 t_outb(par, 0x2B, VGA_MIS_W);
 938                 write3CE(par, CyberControl, 8);
 939         }
 940
 941         /* vertical timing values */
 942         write3X4(par, VGA_CRTC_V_TOTAL, vtotal & 0xFF);
 943         write3X4(par, VGA_CRTC_V_DISP_END, vdispend & 0xFF);
 944         write3X4(par, VGA_CRTC_V_SYNC_START, vsyncstart & 0xFF);
 945         write3X4(par, VGA_CRTC_V_SYNC_END, (vsyncend & 0x0F));
 946         write3X4(par, VGA_CRTC_V_BLANK_START, vblankstart & 0xFF);
 947         write3X4(par, VGA_CRTC_V_BLANK_END, vblankend & 0xFF);
 948
 949         /* horizontal timing values */
 950         write3X4(par, VGA_CRTC_H_TOTAL, htotal & 0xFF);
 951         write3X4(par, VGA_CRTC_H_DISP, hdispend & 0xFF);
 952         write3X4(par, VGA_CRTC_H_SYNC_START, hsyncstart & 0xFF);
 953         write3X4(par, VGA_CRTC_H_SYNC_END,
 954                  (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
 955         write3X4(par, VGA_CRTC_H_BLANK_START, hblankstart & 0xFF);
 956         write3X4(par, VGA_CRTC_H_BLANK_END, hblankend & 0x1F);
 957
 958         /* higher bits of vertical timing values */
 959         tmp = 0x10;
 960         if (vtotal & 0x100) tmp |= 0x01;
 961         if (vdispend & 0x100) tmp |= 0x02;
 962         if (vsyncstart & 0x100) tmp |= 0x04;
 963         if (vblankstart & 0x100) tmp |= 0x08;
 964
 965         if (vtotal & 0x200) tmp |= 0x20;
 966         if (vdispend & 0x200) tmp |= 0x40;
 967         if (vsyncstart & 0x200) tmp |= 0x80;
 968         write3X4(par, VGA_CRTC_OVERFLOW, tmp);
 969
 970         tmp = read3X4(par, CRTHiOrd) & 0x07;
 971         tmp |= 0x08;    /* line compare bit 10 */
 972         if (vtotal & 0x400) tmp |= 0x80;
 973         if (vblankstart & 0x400) tmp |= 0x40;
 974         if (vsyncstart & 0x400) tmp |= 0x20;
 975         if (vdispend & 0x400) tmp |= 0x10;
 976         write3X4(par, CRTHiOrd, tmp);
 977
 978         tmp = (htotal >> 8) & 0x01;
 979         tmp |= (hdispend >> 7) & 0x02;
 980         tmp |= (hsyncstart >> 5) & 0x08;
 981         tmp |= (hblankstart >> 4) & 0x10;
 982         write3X4(par, HorizOverflow, tmp);
 983
 984         tmp = 0x40;
 985         if (vblankstart & 0x200) tmp |= 0x20;
 986 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80;  /* double scan for 200 line modes */
 987         write3X4(par, VGA_CRTC_MAX_SCAN, tmp);
 988
 989         write3X4(par, VGA_CRTC_LINE_COMPARE, 0xFF);
 990         write3X4(par, VGA_CRTC_PRESET_ROW, 0);
 991         write3X4(par, VGA_CRTC_MODE, 0xC3);
 992
 993         write3X4(par, LinearAddReg, 0x20);      /* enable linear addressing */
 994
 995         tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
 996         /* enable access extended memory */
 997         write3X4(par, CRTCModuleTest, tmp);
 998
 999         /* enable GE for text acceleration */
1000         write3X4(par, GraphEngReg, 0x80);
1001
1002 #ifdef CONFIG_FB_TRIDENT_ACCEL
1003         par->init_accel(par, info->var.xres, bpp);
1004 #endif
1005
1006         switch (bpp) {
1007         case 8:
1008                 tmp = 0x00;
1009                 break;
1010         case 16:
1011                 tmp = 0x05;
1012                 break;
1013         case 24:
1014                 tmp = 0x29;
1015                 break;
1016         case 32:
1017                 tmp = 0x09;
1018                 break;
1019         }
1020
1021         write3X4(par, PixelBusReg, tmp);
1022
1023         tmp = 0x10;
1024         if (iscyber(par->chip_id))
1025                 tmp |= 0x20;
1026         write3X4(par, DRAMControl, tmp);        /* both IO, linear enable */
1027
1028         write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40);
1029         write3X4(par, Performance, 0x92);
1030         /* MMIO & PCI read and write burst enable */
1031         write3X4(par, PCIReg, 0x07);
1032
1033         /* convert from picoseconds to kHz */
1034         vclk = PICOS2KHZ(info->var.pixclock);
1035         if (bpp == 32)
1036                 vclk *= 2;
1037         set_vclk(par, vclk);
1038
1039         vga_mm_wseq(par->io_virt, 0, 3);
1040         vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */
1041         /* enable 4 maps because needed in chain4 mode */
1042         vga_mm_wseq(par->io_virt, 2, 0x0F);
1043         vga_mm_wseq(par->io_virt, 3, 0);
1044         vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */
1045
1046         /* divide clock by 2 if 32bpp chain4 mode display and CPU path */
1047         write3CE(par, MiscExtFunc, (bpp == 32) ? 0x1A : 0x12);
1048         write3CE(par, 0x5, 0x40);       /* no CGA compat, allow 256 col */
1049         write3CE(par, 0x6, 0x05);       /* graphics mode */
1050         write3CE(par, 0x7, 0x0F);       /* planes? */
1051
1052         if (par->chip_id == CYBERBLADEXPAi1) {
1053                 /* This fixes snow-effect in 32 bpp */
1054                 write3X4(par, VGA_CRTC_H_SYNC_START, 0x84);
1055         }
1056
1057         /* graphics mode and support 256 color modes */
1058         writeAttr(par, 0x10, 0x41);
1059         writeAttr(par, 0x12, 0x0F);     /* planes */
1060         writeAttr(par, 0x13, 0);        /* horizontal pel panning */
1061
1062         /* colors */
1063         for (tmp = 0; tmp < 0x10; tmp++)
1064                 writeAttr(par, tmp, tmp);
1065         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
1066         t_outb(par, 0x20, VGA_ATT_W);           /* enable attr */
1067
1068         switch (bpp) {
1069         case 8:
1070                 tmp = 0;
1071                 break;
1072         case 15:
1073                 tmp = 0x10;
1074                 break;
1075         case 16:
1076                 tmp = 0x30;
1077                 break;
1078         case 24:
1079         case 32:
1080                 tmp = 0xD0;
1081                 break;
1082         }
1083
1084         t_inb(par, VGA_PEL_IW);
1085         t_inb(par, VGA_PEL_MSK);
1086         t_inb(par, VGA_PEL_MSK);
1087         t_inb(par, VGA_PEL_MSK);
1088         t_inb(par, VGA_PEL_MSK);
1089         t_outb(par, tmp, VGA_PEL_MSK);
1090         t_inb(par, VGA_PEL_IW);
1091
1092         if (par->flatpanel)
1093                 set_number_of_lines(par, info->var.yres);
1094         set_lwidth(par, info->var.xres * bpp / (4 * 16));
1095         info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1096         info->fix.line_length = info->var.xres * (bpp >> 3);
1097         info->cmap.len = (bpp == 8) ? 256 : 16;
1098         debug("exit\n");
1099         return 0;
1100 }
1101
1102 /* Set one color register */
1103 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1104                                unsigned blue, unsigned transp,
1105                                struct fb_info *info)
1106 {
1107         int bpp = info->var.bits_per_pixel;
1108         struct tridentfb_par *par = info->par;
1109
1110         if (regno >= info->cmap.len)
1111                 return 1;
1112
1113         if (bpp == 8) {
1114                 t_outb(par, 0xFF, VGA_PEL_MSK);
1115                 t_outb(par, regno, VGA_PEL_IW);
1116
1117                 t_outb(par, red >> 10, VGA_PEL_D);
1118                 t_outb(par, green >> 10, VGA_PEL_D);
1119                 t_outb(par, blue >> 10, VGA_PEL_D);
1120
1121         } else if (regno < 16) {
1122                 if (bpp == 16) {        /* RGB 565 */
1123                         u32 col;
1124
1125                         col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
1126                                 ((blue & 0xF800) >> 11);
1127                         col |= col << 16;
1128                         ((u32 *)(info->pseudo_palette))[regno] = col;
1129                 } else if (bpp == 32)           /* ARGB 8888 */
1130                         ((u32*)info->pseudo_palette)[regno] =
1131                                 ((transp & 0xFF00) << 16)       |
1132                                 ((red & 0xFF00) << 8)           |
1133                                 ((green & 0xFF00))              |
1134                                 ((blue & 0xFF00) >> 8);
1135         }
1136
1137 /*      debug("exit\n"); */
1138         return 0;
1139 }
1140
1141 /* Try blanking the screen.For flat panels it does nothing */
1142 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1143 {
1144         unsigned char PMCont, DPMSCont;
1145         struct tridentfb_par *par = info->par;
1146
1147         debug("enter\n");
1148         if (par->flatpanel)
1149                 return 0;
1150         t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */
1151         PMCont = t_inb(par, 0x83C6) & 0xFC;
1152         DPMSCont = read3CE(par, PowerStatus) & 0xFC;
1153         switch (blank_mode) {
1154         case FB_BLANK_UNBLANK:
1155                 /* Screen: On, HSync: On, VSync: On */
1156         case FB_BLANK_NORMAL:
1157                 /* Screen: Off, HSync: On, VSync: On */
1158                 PMCont |= 0x03;
1159                 DPMSCont |= 0x00;
1160                 break;
1161         case FB_BLANK_HSYNC_SUSPEND:
1162                 /* Screen: Off, HSync: Off, VSync: On */
1163                 PMCont |= 0x02;
1164                 DPMSCont |= 0x01;
1165                 break;
1166         case FB_BLANK_VSYNC_SUSPEND:
1167                 /* Screen: Off, HSync: On, VSync: Off */
1168                 PMCont |= 0x02;
1169                 DPMSCont |= 0x02;
1170                 break;
1171         case FB_BLANK_POWERDOWN:
1172                 /* Screen: Off, HSync: Off, VSync: Off */
1173                 PMCont |= 0x00;
1174                 DPMSCont |= 0x03;
1175                 break;
1176         }
1177
1178         write3CE(par, PowerStatus, DPMSCont);
1179         t_outb(par, 4, 0x83C8);
1180         t_outb(par, PMCont, 0x83C6);
1181
1182         debug("exit\n");
1183
1184         /* let fbcon do a softblank for us */
1185         return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
1186 }
1187
1188 static struct fb_ops tridentfb_ops = {
1189         .owner = THIS_MODULE,
1190         .fb_setcolreg = tridentfb_setcolreg,
1191         .fb_pan_display = tridentfb_pan_display,
1192         .fb_blank = tridentfb_blank,
1193         .fb_check_var = tridentfb_check_var,
1194         .fb_set_par = tridentfb_set_par,
1195         .fb_fillrect = tridentfb_fillrect,
1196         .fb_copyarea = tridentfb_copyarea,
1197         .fb_imageblit = cfb_imageblit,
1198 };
1199
1200 static int __devinit trident_pci_probe(struct pci_dev *dev,
1201                                        const struct pci_device_id *id)
1202 {
1203         int err;
1204         unsigned char revision;
1205         struct fb_info *info;
1206         struct tridentfb_par *default_par;
1207         int defaultaccel;
1208         int chip3D;
1209         int chip_id;
1210
1211         err = pci_enable_device(dev);
1212         if (err)
1213                 return err;
1214
1215         info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev);
1216         if (!info)
1217                 return -ENOMEM;
1218         default_par = info->par;
1219
1220         chip_id = id->device;
1221
1222         if (chip_id == CYBERBLADEi1)
1223                 output("*** Please do use cyblafb, Cyberblade/i1 support "
1224                        "will soon be removed from tridentfb!\n");
1225
1226
1227         /* If PCI id is 0x9660 then further detect chip type */
1228
1229         if (chip_id == TGUI9660) {
1230                 revision = vga_io_rseq(RevisionID);
1231
1232                 switch (revision) {
1233                 case 0x22:
1234                 case 0x23:
1235                         chip_id = CYBER9397;
1236                         break;
1237                 case 0x2A:
1238                         chip_id = CYBER9397DVD;
1239                         break;
1240                 case 0x30:
1241                 case 0x33:
1242                 case 0x34:
1243                 case 0x35:
1244                 case 0x38:
1245                 case 0x3A:
1246                 case 0xB3:
1247                         chip_id = CYBER9385;
1248                         break;
1249                 case 0x40 ... 0x43:
1250                         chip_id = CYBER9382;
1251                         break;
1252                 case 0x4A:
1253                         chip_id = CYBER9388;
1254                         break;
1255                 default:
1256                         break;
1257                 }
1258         }
1259
1260         chip3D = is3Dchip(chip_id);
1261
1262         if (is_xp(chip_id)) {
1263                 default_par->init_accel = xp_init_accel;
1264                 default_par->wait_engine = xp_wait_engine;
1265                 default_par->fill_rect = xp_fill_rect;
1266                 default_par->copy_rect = xp_copy_rect;
1267         } else if (is_blade(chip_id)) {
1268                 default_par->init_accel = blade_init_accel;
1269                 default_par->wait_engine = blade_wait_engine;
1270                 default_par->fill_rect = blade_fill_rect;
1271                 default_par->copy_rect = blade_copy_rect;
1272         } else {
1273                 default_par->init_accel = image_init_accel;
1274                 default_par->wait_engine = image_wait_engine;
1275                 default_par->fill_rect = image_fill_rect;
1276                 default_par->copy_rect = image_copy_rect;
1277         }
1278
1279         default_par->chip_id = chip_id;
1280
1281         /* acceleration is on by default for 3D chips */
1282         defaultaccel = chip3D && !noaccel;
1283
1284         /* setup MMIO region */
1285         tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
1286         tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
1287
1288         if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1289                 debug("request_region failed!\n");
1290                 framebuffer_release(info);
1291                 return -1;
1292         }
1293
1294         default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start,
1295                                                tridentfb_fix.mmio_len);
1296
1297         if (!default_par->io_virt) {
1298                 debug("ioremap failed\n");
1299                 err = -1;
1300                 goto out_unmap1;
1301         }
1302
1303         /* setup framebuffer memory */
1304         tridentfb_fix.smem_start = pci_resource_start(dev, 0);
1305         tridentfb_fix.smem_len = get_memsize(default_par);
1306
1307         if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1308                 debug("request_mem_region failed!\n");
1309                 disable_mmio(info->par);
1310                 err = -1;
1311                 goto out_unmap1;
1312         }
1313
1314         enable_mmio();
1315
1316         info->screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1317                                             tridentfb_fix.smem_len);
1318
1319         if (!info->screen_base) {
1320                 debug("ioremap failed\n");
1321                 err = -1;
1322                 goto out_unmap2;
1323         }
1324
1325         output("%s board found\n", pci_name(dev));
1326         default_par->flatpanel = is_flatpanel(default_par);
1327
1328         if (default_par->flatpanel)
1329                 nativex = get_nativex(default_par);
1330
1331         info->fix = tridentfb_fix;
1332         info->fbops = &tridentfb_ops;
1333
1334
1335         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1336 #ifdef CONFIG_FB_TRIDENT_ACCEL
1337         info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
1338 #endif
1339         if (!fb_find_mode(&info->var, info,
1340                           mode_option, NULL, 0, NULL, bpp)) {
1341                 err = -EINVAL;
1342                 goto out_unmap2;
1343         }
1344         err = fb_alloc_cmap(&info->cmap, 256, 0);
1345         if (err < 0)
1346                 goto out_unmap2;
1347
1348         if (defaultaccel && default_par->init_accel)
1349                 info->var.accel_flags |= FB_ACCELF_TEXT;
1350         else
1351                 info->var.accel_flags &= ~FB_ACCELF_TEXT;
1352         info->var.activate |= FB_ACTIVATE_NOW;
1353         info->device = &dev->dev;
1354         if (register_framebuffer(info) < 0) {
1355                 printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
1356                 fb_dealloc_cmap(&info->cmap);
1357                 err = -EINVAL;
1358                 goto out_unmap2;
1359         }
1360         output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1361            info->node, info->fix.id, info->var.xres,
1362            info->var.yres, info->var.bits_per_pixel);
1363
1364         pci_set_drvdata(dev, info);
1365         return 0;
1366
1367 out_unmap2:
1368         if (info->screen_base)
1369                 iounmap(info->screen_base);
1370         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1371         disable_mmio(info->par);
1372 out_unmap1:
1373         if (default_par->io_virt)
1374                 iounmap(default_par->io_virt);
1375         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1376         framebuffer_release(info);
1377         return err;
1378 }
1379
1380 static void __devexit trident_pci_remove(struct pci_dev *dev)
1381 {
1382         struct fb_info *info = pci_get_drvdata(dev);
1383         struct tridentfb_par *par = info->par;
1384
1385         unregister_framebuffer(info);
1386         iounmap(par->io_virt);
1387         iounmap(info->screen_base);
1388         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1389         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1390         pci_set_drvdata(dev, NULL);
1391         framebuffer_release(info);
1392 }
1393
1394 /* List of boards that we are trying to support */
1395 static struct pci_device_id trident_devices[] = {
1396         {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1397         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1398         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1399         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1400         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1401         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1402         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1403         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1404         {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1405         {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1406         {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1407         {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1408         {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1409         {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1410         {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1411         {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1412         {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1413         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1414         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1415         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1416         {0,}
1417 };
1418
1419 MODULE_DEVICE_TABLE(pci, trident_devices);
1420
1421 static struct pci_driver tridentfb_pci_driver = {
1422         .name = "tridentfb",
1423         .id_table = trident_devices,
1424         .probe = trident_pci_probe,
1425         .remove = __devexit_p(trident_pci_remove)
1426 };
1427
1428 /*
1429  * Parse user specified options (`video=trident:')
1430  * example:
1431  *      video=trident:800x600,bpp=16,noaccel
1432  */
1433 #ifndef MODULE
1434 static int __init tridentfb_setup(char *options)
1435 {
1436         char *opt;
1437         if (!options || !*options)
1438                 return 0;
1439         while ((opt = strsep(&options, ",")) != NULL) {
1440                 if (!*opt)
1441                         continue;
1442                 if (!strncmp(opt, "noaccel", 7))
1443                         noaccel = 1;
1444                 else if (!strncmp(opt, "fp", 2))
1445                         fp = 1;
1446                 else if (!strncmp(opt, "crt", 3))
1447                         fp = 0;
1448                 else if (!strncmp(opt, "bpp=", 4))
1449                         bpp = simple_strtoul(opt + 4, NULL, 0);
1450                 else if (!strncmp(opt, "center", 6))
1451                         center = 1;
1452                 else if (!strncmp(opt, "stretch", 7))
1453                         stretch = 1;
1454                 else if (!strncmp(opt, "memsize=", 8))
1455                         memsize = simple_strtoul(opt + 8, NULL, 0);
1456                 else if (!strncmp(opt, "memdiff=", 8))
1457                         memdiff = simple_strtoul(opt + 8, NULL, 0);
1458                 else if (!strncmp(opt, "nativex=", 8))
1459                         nativex = simple_strtoul(opt + 8, NULL, 0);
1460                 else
1461                         mode_option = opt;
1462         }
1463         return 0;
1464 }
1465 #endif
1466
1467 static int __init tridentfb_init(void)
1468 {
1469 #ifndef MODULE
1470         char *option = NULL;
1471
1472         if (fb_get_options("tridentfb", &option))
1473                 return -ENODEV;
1474         tridentfb_setup(option);
1475 #endif
1476         output("Trident framebuffer %s initializing\n", VERSION);
1477         return pci_register_driver(&tridentfb_pci_driver);
1478 }
1479
1480 static void __exit tridentfb_exit(void)
1481 {
1482         pci_unregister_driver(&tridentfb_pci_driver);
1483 }
1484
1485 module_init(tridentfb_init);
1486 module_exit(tridentfb_exit);
1487
1488 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1489 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1490 MODULE_LICENSE("GPL");
1491