drivers/video/tridentfb.c

   1 /*
   2  * Frame buffer driver for Trident Blade and Image series
   3  *
   4  * Copyright 2001, 2002 - Jani Monoses   <jani@iv.ro>
   5  *
   6  *
   7  * CREDITS:(in order of appearance)
   8  *      skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
   9  *      Special thanks ;) to Mattia Crivellini <tia@mclink.it>
  10  *      much inspired by the XFree86 4.x Trident driver sources
  11  *      by Alan Hourihane the FreeVGA project
  12  *      Francesco Salvestrini <salvestrini@users.sf.net> XP support,
  13  *      code, suggestions
  14  * TODO:
  15  *      timing value tweaking so it looks good on every monitor in every mode
  16  *      TGUI acceleration
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/fb.h>
  21 #include <linux/init.h>
  22 #include <linux/pci.h>
  23
  24 #include <linux/delay.h>
  25 #include <video/vga.h>
  26 #include <video/trident.h>
  27
  28 #define VERSION         "0.7.9-NEWAPI"
  29
  30 struct tridentfb_par {
  31         void __iomem *io_virt;  /* iospace virtual memory address */
  32         u32 pseudo_pal[16];
  33         int chip_id;
  34         int flatpanel;
  35         void (*init_accel) (struct tridentfb_par *, int, int);
  36         void (*wait_engine) (struct tridentfb_par *);
  37         void (*fill_rect)
  38                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  39         void (*copy_rect)
  40                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  41 };
  42
  43 static unsigned char eng_oper;  /* engine operation... */
  44 static struct fb_ops tridentfb_ops;
  45
  46 static struct fb_fix_screeninfo tridentfb_fix = {
  47         .id = "Trident",
  48         .type = FB_TYPE_PACKED_PIXELS,
  49         .ypanstep = 1,
  50         .visual = FB_VISUAL_PSEUDOCOLOR,
  51         .accel = FB_ACCEL_NONE,
  52 };
  53
  54 /* defaults which are normally overriden by user values */
  55
  56 /* video mode */
  57 static char *mode_option __devinitdata = "640x480";
  58 static int bpp __devinitdata = 8;
  59
  60 static int noaccel __devinitdata;
  61
  62 static int center;
  63 static int stretch;
  64
  65 static int fp __devinitdata;
  66 static int crt __devinitdata;
  67
  68 static int memsize __devinitdata;
  69 static int memdiff __devinitdata;
  70 static int nativex;
  71
  72 module_param(mode_option, charp, 0);
  73 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
  74 module_param_named(mode, mode_option, charp, 0);
  75 MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
  76 module_param(bpp, int, 0);
  77 module_param(center, int, 0);
  78 module_param(stretch, int, 0);
  79 module_param(noaccel, int, 0);
  80 module_param(memsize, int, 0);
  81 module_param(memdiff, int, 0);
  82 module_param(nativex, int, 0);
  83 module_param(fp, int, 0);
  84 MODULE_PARM_DESC(fp, "Define if flatpanel is connected");
  85 module_param(crt, int, 0);
  86 MODULE_PARM_DESC(crt, "Define if CRT is connected");
  87
  88 static int is_oldclock(int id)
  89 {
  90         return  (id == TGUI9660) ||
  91                 (id == CYBER9320);
  92 }
  93
  94 static int is_oldprotect(int id)
  95 {
  96         return  (id == TGUI9660) ||
  97                 (id == PROVIDIA9685) ||
  98                 (id == CYBER9320) ||
  99                 (id == CYBER9382) ||
 100                 (id == CYBER9385);
 101 }
 102
 103 static int is_blade(int id)
 104 {
 105         return  (id == BLADE3D) ||
 106                 (id == CYBERBLADEE4) ||
 107                 (id == CYBERBLADEi7) ||
 108                 (id == CYBERBLADEi7D) ||
 109                 (id == CYBERBLADEi1) ||
 110                 (id == CYBERBLADEi1D) ||
 111                 (id == CYBERBLADEAi1) ||
 112                 (id == CYBERBLADEAi1D);
 113 }
 114
 115 static int is_xp(int id)
 116 {
 117         return  (id == CYBERBLADEXPAi1) ||
 118                 (id == CYBERBLADEXPm8) ||
 119                 (id == CYBERBLADEXPm16);
 120 }
 121
 122 static int is3Dchip(int id)
 123 {
 124         return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
 125                 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
 126                 (id == CYBER9397) || (id == CYBER9397DVD) ||
 127                 (id == CYBER9520) || (id == CYBER9525DVD) ||
 128                 (id == IMAGE975) || (id == IMAGE985) ||
 129                 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
 130                 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
 131                 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
 132                 (id == CYBERBLADEXPAi1));
 133 }
 134
 135 static int iscyber(int id)
 136 {
 137         switch (id) {
 138         case CYBER9388:
 139         case CYBER9382:
 140         case CYBER9385:
 141         case CYBER9397:
 142         case CYBER9397DVD:
 143         case CYBER9520:
 144         case CYBER9525DVD:
 145         case CYBERBLADEE4:
 146         case CYBERBLADEi7D:
 147         case CYBERBLADEi1:
 148         case CYBERBLADEi1D:
 149         case CYBERBLADEAi1:
 150         case CYBERBLADEAi1D:
 151         case CYBERBLADEXPAi1:
 152                 return 1;
 153
 154         case CYBER9320:
 155         case TGUI9660:
 156         case PROVIDIA9685:
 157         case IMAGE975:
 158         case IMAGE985:
 159         case BLADE3D:
 160         case CYBERBLADEi7:      /* VIA MPV4 integrated version */
 161
 162         default:
 163                 /* case CYBERBLDAEXPm8:  Strange */
 164                 /* case CYBERBLDAEXPm16: Strange */
 165                 return 0;
 166         }
 167 }
 168
 169 static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg)
 170 {
 171         fb_writeb(val, p->io_virt + reg);
 172 }
 173
 174 static inline u8 t_inb(struct tridentfb_par *p, u16 reg)
 175 {
 176         return fb_readb(p->io_virt + reg);
 177 }
 178
 179 static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v)
 180 {
 181         fb_writel(v, par->io_virt + r);
 182 }
 183
 184 static inline u32 readmmr(struct tridentfb_par *par, u16 r)
 185 {
 186         return fb_readl(par->io_virt + r);
 187 }
 188
 189 /*
 190  * Blade specific acceleration.
 191  */
 192
 193 #define point(x, y) ((y) << 16 | (x))
 194 #define STA     0x2120
 195 #define CMD     0x2144
 196 #define ROP     0x2148
 197 #define CLR     0x2160
 198 #define SR1     0x2100
 199 #define SR2     0x2104
 200 #define DR1     0x2108
 201 #define DR2     0x210C
 202
 203 #define ROP_S   0xCC
 204
 205 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 206 {
 207         int v1 = (pitch >> 3) << 20;
 208         int tmp = 0, v2;
 209         switch (bpp) {
 210         case 8:
 211                 tmp = 0;
 212                 break;
 213         case 15:
 214                 tmp = 5;
 215                 break;
 216         case 16:
 217                 tmp = 1;
 218                 break;
 219         case 24:
 220         case 32:
 221                 tmp = 2;
 222                 break;
 223         }
 224         v2 = v1 | (tmp << 29);
 225         writemmr(par, 0x21C0, v2);
 226         writemmr(par, 0x21C4, v2);
 227         writemmr(par, 0x21B8, v2);
 228         writemmr(par, 0x21BC, v2);
 229         writemmr(par, 0x21D0, v1);
 230         writemmr(par, 0x21D4, v1);
 231         writemmr(par, 0x21C8, v1);
 232         writemmr(par, 0x21CC, v1);
 233         writemmr(par, 0x216C, 0);
 234 }
 235
 236 static void blade_wait_engine(struct tridentfb_par *par)
 237 {
 238         while (readmmr(par, STA) & 0xFA800000) ;
 239 }
 240
 241 static void blade_fill_rect(struct tridentfb_par *par,
 242                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 243 {
 244         writemmr(par, CLR, c);
 245         writemmr(par, ROP, rop ? 0x66 : ROP_S);
 246         writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
 247
 248         writemmr(par, DR1, point(x, y));
 249         writemmr(par, DR2, point(x + w - 1, y + h - 1));
 250 }
 251
 252 static void blade_copy_rect(struct tridentfb_par *par,
 253                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 254 {
 255         u32 s1, s2, d1, d2;
 256         int direction = 2;
 257         s1 = point(x1, y1);
 258         s2 = point(x1 + w - 1, y1 + h - 1);
 259         d1 = point(x2, y2);
 260         d2 = point(x2 + w - 1, y2 + h - 1);
 261
 262         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 263                 direction = 0;
 264
 265         writemmr(par, ROP, ROP_S);
 266         writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
 267
 268         writemmr(par, SR1, direction ? s2 : s1);
 269         writemmr(par, SR2, direction ? s1 : s2);
 270         writemmr(par, DR1, direction ? d2 : d1);
 271         writemmr(par, DR2, direction ? d1 : d2);
 272 }
 273
 274 /*
 275  * BladeXP specific acceleration functions
 276  */
 277
 278 #define ROP_P 0xF0
 279 #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff))
 280
 281 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 282 {
 283         int tmp = 0, v1;
 284         unsigned char x = 0;
 285
 286         switch (bpp) {
 287         case 8:
 288                 x = 0;
 289                 break;
 290         case 16:
 291                 x = 1;
 292                 break;
 293         case 24:
 294                 x = 3;
 295                 break;
 296         case 32:
 297                 x = 2;
 298                 break;
 299         }
 300
 301         switch (pitch << (bpp >> 3)) {
 302         case 8192:
 303         case 512:
 304                 x |= 0x00;
 305                 break;
 306         case 1024:
 307                 x |= 0x04;
 308                 break;
 309         case 2048:
 310                 x |= 0x08;
 311                 break;
 312         case 4096:
 313                 x |= 0x0C;
 314                 break;
 315         }
 316
 317         t_outb(par, x, 0x2125);
 318
 319         eng_oper = x | 0x40;
 320
 321         switch (bpp) {
 322         case 8:
 323                 tmp = 18;
 324                 break;
 325         case 15:
 326         case 16:
 327                 tmp = 19;
 328                 break;
 329         case 24:
 330         case 32:
 331                 tmp = 20;
 332                 break;
 333         }
 334
 335         v1 = pitch << tmp;
 336
 337         writemmr(par, 0x2154, v1);
 338         writemmr(par, 0x2150, v1);
 339         t_outb(par, 3, 0x2126);
 340 }
 341
 342 static void xp_wait_engine(struct tridentfb_par *par)
 343 {
 344         int busy;
 345         int count, timeout;
 346
 347         count = 0;
 348         timeout = 0;
 349         for (;;) {
 350                 busy = t_inb(par, STA) & 0x80;
 351                 if (busy != 0x80)
 352                         return;
 353                 count++;
 354                 if (count == 10000000) {
 355                         /* Timeout */
 356                         count = 9990000;
 357                         timeout++;
 358                         if (timeout == 8) {
 359                                 /* Reset engine */
 360                                 t_outb(par, 0x00, 0x2120);
 361                                 return;
 362                         }
 363                 }
 364         }
 365 }
 366
 367 static void xp_fill_rect(struct tridentfb_par *par,
 368                          u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 369 {
 370         writemmr(par, 0x2127, ROP_P);
 371         writemmr(par, 0x2158, c);
 372         writemmr(par, 0x2128, 0x4000);
 373         writemmr(par, 0x2140, masked_point(h, w));
 374         writemmr(par, 0x2138, masked_point(y, x));
 375         t_outb(par, 0x01, 0x2124);
 376         t_outb(par, eng_oper, 0x2125);
 377 }
 378
 379 static void xp_copy_rect(struct tridentfb_par *par,
 380                          u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 381 {
 382         int direction;
 383         u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
 384
 385         direction = 0x0004;
 386
 387         if ((x1 < x2) && (y1 == y2)) {
 388                 direction |= 0x0200;
 389                 x1_tmp = x1 + w - 1;
 390                 x2_tmp = x2 + w - 1;
 391         } else {
 392                 x1_tmp = x1;
 393                 x2_tmp = x2;
 394         }
 395
 396         if (y1 < y2) {
 397                 direction |= 0x0100;
 398                 y1_tmp = y1 + h - 1;
 399                 y2_tmp = y2 + h - 1;
 400         } else {
 401                 y1_tmp = y1;
 402                 y2_tmp = y2;
 403         }
 404
 405         writemmr(par, 0x2128, direction);
 406         t_outb(par, ROP_S, 0x2127);
 407         writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp));
 408         writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp));
 409         writemmr(par, 0x2140, masked_point(h, w));
 410         t_outb(par, 0x01, 0x2124);
 411 }
 412
 413 /*
 414  * Image specific acceleration functions
 415  */
 416 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 417 {
 418         int tmp = 0;
 419         switch (bpp) {
 420         case 8:
 421                 tmp = 0;
 422                 break;
 423         case 15:
 424                 tmp = 5;
 425                 break;
 426         case 16:
 427                 tmp = 1;
 428                 break;
 429         case 24:
 430         case 32:
 431                 tmp = 2;
 432                 break;
 433         }
 434         writemmr(par, 0x2120, 0xF0000000);
 435         writemmr(par, 0x2120, 0x40000000 | tmp);
 436         writemmr(par, 0x2120, 0x80000000);
 437         writemmr(par, 0x2144, 0x00000000);
 438         writemmr(par, 0x2148, 0x00000000);
 439         writemmr(par, 0x2150, 0x00000000);
 440         writemmr(par, 0x2154, 0x00000000);
 441         writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
 442         writemmr(par, 0x216C, 0x00000000);
 443         writemmr(par, 0x2170, 0x00000000);
 444         writemmr(par, 0x217C, 0x00000000);
 445         writemmr(par, 0x2120, 0x10000000);
 446         writemmr(par, 0x2130, (2047 << 16) | 2047);
 447 }
 448
 449 static void image_wait_engine(struct tridentfb_par *par)
 450 {
 451         while (readmmr(par, 0x2164) & 0xF0000000) ;
 452 }
 453
 454 static void image_fill_rect(struct tridentfb_par *par,
 455                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 456 {
 457         writemmr(par, 0x2120, 0x80000000);
 458         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 459
 460         writemmr(par, 0x2144, c);
 461
 462         writemmr(par, DR1, point(x, y));
 463         writemmr(par, DR2, point(x + w - 1, y + h - 1));
 464
 465         writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
 466 }
 467
 468 static void image_copy_rect(struct tridentfb_par *par,
 469                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 470 {
 471         u32 s1, s2, d1, d2;
 472         int direction = 2;
 473         s1 = point(x1, y1);
 474         s2 = point(x1 + w - 1, y1 + h - 1);
 475         d1 = point(x2, y2);
 476         d2 = point(x2 + w - 1, y2 + h - 1);
 477
 478         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 479                 direction = 0;
 480
 481         writemmr(par, 0x2120, 0x80000000);
 482         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 483
 484         writemmr(par, SR1, direction ? s2 : s1);
 485         writemmr(par, SR2, direction ? s1 : s2);
 486         writemmr(par, DR1, direction ? d2 : d1);
 487         writemmr(par, DR2, direction ? d1 : d2);
 488         writemmr(par, 0x2124,
 489                  0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
 490 }
 491
 492 /*
 493  * Accel functions called by the upper layers
 494  */
 495 #ifdef CONFIG_FB_TRIDENT_ACCEL
 496 static void tridentfb_fillrect(struct fb_info *info,
 497                                const struct fb_fillrect *fr)
 498 {
 499         struct tridentfb_par *par = info->par;
 500         int bpp = info->var.bits_per_pixel;
 501         int col = 0;
 502
 503         switch (bpp) {
 504         default:
 505         case 8:
 506                 col |= fr->color;
 507                 col |= col << 8;
 508                 col |= col << 16;
 509                 break;
 510         case 16:
 511                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 512                 break;
 513         case 32:
 514                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 515                 break;
 516         }
 517
 518         par->fill_rect(par, fr->dx, fr->dy, fr->width,
 519                        fr->height, col, fr->rop);
 520         par->wait_engine(par);
 521 }
 522 static void tridentfb_copyarea(struct fb_info *info,
 523                                const struct fb_copyarea *ca)
 524 {
 525         struct tridentfb_par *par = info->par;
 526
 527         par->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy,
 528                        ca->width, ca->height);
 529         par->wait_engine(par);
 530 }
 531 #else /* !CONFIG_FB_TRIDENT_ACCEL */
 532 #define tridentfb_fillrect cfb_fillrect
 533 #define tridentfb_copyarea cfb_copyarea
 534 #endif /* CONFIG_FB_TRIDENT_ACCEL */
 535
 536
 537 /*
 538  * Hardware access functions
 539  */
 540
 541 static inline unsigned char read3X4(struct tridentfb_par *par, int reg)
 542 {
 543         return vga_mm_rcrt(par->io_virt, reg);
 544 }
 545
 546 static inline void write3X4(struct tridentfb_par *par, int reg,
 547                             unsigned char val)
 548 {
 549         vga_mm_wcrt(par->io_virt, reg, val);
 550 }
 551
 552 static inline unsigned char read3CE(struct tridentfb_par *par,
 553                                     unsigned char reg)
 554 {
 555         return vga_mm_rgfx(par->io_virt, reg);
 556 }
 557
 558 static inline void writeAttr(struct tridentfb_par *par, int reg,
 559                              unsigned char val)
 560 {
 561         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
 562         vga_mm_wattr(par->io_virt, reg, val);
 563 }
 564
 565 static inline void write3CE(struct tridentfb_par *par, int reg,
 566                             unsigned char val)
 567 {
 568         vga_mm_wgfx(par->io_virt, reg, val);
 569 }
 570
 571 static void enable_mmio(void)
 572 {
 573         /* Goto New Mode */
 574         vga_io_rseq(0x0B);
 575
 576         /* Unprotect registers */
 577         vga_io_wseq(NewMode1, 0x80);
 578
 579         /* Enable MMIO */
 580         outb(PCIReg, 0x3D4);
 581         outb(inb(0x3D5) | 0x01, 0x3D5);
 582 }
 583
 584 static void disable_mmio(struct tridentfb_par *par)
 585 {
 586         /* Goto New Mode */
 587         vga_mm_rseq(par->io_virt, 0x0B);
 588
 589         /* Unprotect registers */
 590         vga_mm_wseq(par->io_virt, NewMode1, 0x80);
 591
 592         /* Disable MMIO */
 593         t_outb(par, PCIReg, 0x3D4);
 594         t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5);
 595 }
 596
 597 static void crtc_unlock(struct tridentfb_par *par)
 598 {
 599         write3X4(par, VGA_CRTC_V_SYNC_END,
 600                  read3X4(par, VGA_CRTC_V_SYNC_END) & 0x7F);
 601 }
 602
 603 /*  Return flat panel's maximum x resolution */
 604 static int __devinit get_nativex(struct tridentfb_par *par)
 605 {
 606         int x, y, tmp;
 607
 608         if (nativex)
 609                 return nativex;
 610
 611         tmp = (read3CE(par, VertStretch) >> 4) & 3;
 612
 613         switch (tmp) {
 614         case 0:
 615                 x = 1280; y = 1024;
 616                 break;
 617         case 2:
 618                 x = 1024; y = 768;
 619                 break;
 620         case 3:
 621                 x = 800; y = 600;
 622                 break;
 623         case 4:
 624                 x = 1400; y = 1050;
 625                 break;
 626         case 1:
 627         default:
 628                 x = 640;  y = 480;
 629                 break;
 630         }
 631
 632         output("%dx%d flat panel found\n", x, y);
 633         return x;
 634 }
 635
 636 /* Set pitch */
 637 static void set_lwidth(struct tridentfb_par *par, int width)
 638 {
 639         write3X4(par, VGA_CRTC_OFFSET, width & 0xFF);
 640         write3X4(par, AddColReg,
 641                  (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4));
 642 }
 643
 644 /* For resolutions smaller than FP resolution stretch */
 645 static void screen_stretch(struct tridentfb_par *par)
 646 {
 647         if (par->chip_id != CYBERBLADEXPAi1)
 648                 write3CE(par, BiosReg, 0);
 649         else
 650                 write3CE(par, BiosReg, 8);
 651         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1);
 652         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1);
 653 }
 654
 655 /* For resolutions smaller than FP resolution center */
 656 static void screen_center(struct tridentfb_par *par)
 657 {
 658         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80);
 659         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80);
 660 }
 661
 662 /* Address of first shown pixel in display memory */
 663 static void set_screen_start(struct tridentfb_par *par, int base)
 664 {
 665         u8 tmp;
 666         write3X4(par, VGA_CRTC_START_LO, base & 0xFF);
 667         write3X4(par, VGA_CRTC_START_HI, (base & 0xFF00) >> 8);
 668         tmp = read3X4(par, CRTCModuleTest) & 0xDF;
 669         write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
 670         tmp = read3X4(par, CRTHiOrd) & 0xF8;
 671         write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
 672 }
 673
 674 /* Set dotclock frequency */
 675 static void set_vclk(struct tridentfb_par *par, unsigned long freq)
 676 {
 677         int m, n, k;
 678         unsigned long fi, d, di;
 679         unsigned char best_m = 0, best_n = 0, best_k = 0;
 680         unsigned char hi, lo;
 681
 682         d = 20000;
 683         for (k = 1; k >= 0; k--)
 684                 for (m = 0; m < 32; m++)
 685                         for (n = 0; n < 122; n++) {
 686                                 fi = ((14318l * (n + 8)) / (m + 2)) >> k;
 687                                 if ((di = abs(fi - freq)) < d) {
 688                                         d = di;
 689                                         best_n = n;
 690                                         best_m = m;
 691                                         best_k = k;
 692                                 }
 693                                 if (fi > freq)
 694                                         break;
 695                         }
 696
 697         if (is_oldclock(par->chip_id)) {
 698                 lo = best_n | (best_m << 7);
 699                 hi = (best_m >> 1) | (best_k << 4);
 700         } else {
 701                 lo = best_n;
 702                 hi = best_m | (best_k << 6);
 703         }
 704
 705         if (is3Dchip(par->chip_id)) {
 706                 vga_mm_wseq(par->io_virt, ClockHigh, hi);
 707                 vga_mm_wseq(par->io_virt, ClockLow, lo);
 708         } else {
 709                 t_outb(par, lo, 0x43C8);
 710                 t_outb(par, hi, 0x43C9);
 711         }
 712         debug("VCLK = %X %X\n", hi, lo);
 713 }
 714
 715 /* Set number of lines for flat panels*/
 716 static void set_number_of_lines(struct tridentfb_par *par, int lines)
 717 {
 718         int tmp = read3CE(par, CyberEnhance) & 0x8F;
 719         if (lines > 1024)
 720                 tmp |= 0x50;
 721         else if (lines > 768)
 722                 tmp |= 0x30;
 723         else if (lines > 600)
 724                 tmp |= 0x20;
 725         else if (lines > 480)
 726                 tmp |= 0x10;
 727         write3CE(par, CyberEnhance, tmp);
 728 }
 729
 730 /*
 731  * If we see that FP is active we assume we have one.
 732  * Otherwise we have a CRT display. User can override.
 733  */
 734 static int __devinit is_flatpanel(struct tridentfb_par *par)
 735 {
 736         if (fp)
 737                 return 1;
 738         if (crt || !iscyber(par->chip_id))
 739                 return 0;
 740         return (read3CE(par, FPConfig) & 0x10) ? 1 : 0;
 741 }
 742
 743 /* Try detecting the video memory size */
 744 static unsigned int __devinit get_memsize(struct tridentfb_par *par)
 745 {
 746         unsigned char tmp, tmp2;
 747         unsigned int k;
 748
 749         /* If memory size provided by user */
 750         if (memsize)
 751                 k = memsize * Kb;
 752         else
 753                 switch (par->chip_id) {
 754                 case CYBER9525DVD:
 755                         k = 2560 * Kb;
 756                         break;
 757                 default:
 758                         tmp = read3X4(par, SPR) & 0x0F;
 759                         switch (tmp) {
 760
 761                         case 0x01:
 762                                 k = 512 * Kb;
 763                                 break;
 764                         case 0x02:
 765                                 k = 6 * Mb;     /* XP */
 766                                 break;
 767                         case 0x03:
 768                                 k = 1 * Mb;
 769                                 break;
 770                         case 0x04:
 771                                 k = 8 * Mb;
 772                                 break;
 773                         case 0x06:
 774                                 k = 10 * Mb;    /* XP */
 775                                 break;
 776                         case 0x07:
 777                                 k = 2 * Mb;
 778                                 break;
 779                         case 0x08:
 780                                 k = 12 * Mb;    /* XP */
 781                                 break;
 782                         case 0x0A:
 783                                 k = 14 * Mb;    /* XP */
 784                                 break;
 785                         case 0x0C:
 786                                 k = 16 * Mb;    /* XP */
 787                                 break;
 788                         case 0x0E:              /* XP */
 789
 790                                 tmp2 = vga_mm_rseq(par->io_virt, 0xC1);
 791                                 switch (tmp2) {
 792                                 case 0x00:
 793                                         k = 20 * Mb;
 794                                         break;
 795                                 case 0x01:
 796                                         k = 24 * Mb;
 797                                         break;
 798                                 case 0x10:
 799                                         k = 28 * Mb;
 800                                         break;
 801                                 case 0x11:
 802                                         k = 32 * Mb;
 803                                         break;
 804                                 default:
 805                                         k = 1 * Mb;
 806                                         break;
 807                                 }
 808                                 break;
 809
 810                         case 0x0F:
 811                                 k = 4 * Mb;
 812                                 break;
 813                         default:
 814                                 k = 1 * Mb;
 815                                 break;
 816                         }
 817                 }
 818
 819         k -= memdiff * Kb;
 820         output("framebuffer size = %d Kb\n", k / Kb);
 821         return k;
 822 }
 823
 824 /* See if we can handle the video mode described in var */
 825 static int tridentfb_check_var(struct fb_var_screeninfo *var,
 826                                struct fb_info *info)
 827 {
 828         struct tridentfb_par *par = info->par;
 829         int bpp = var->bits_per_pixel;
 830         debug("enter\n");
 831
 832         /* check color depth */
 833         if (bpp == 24)
 834                 bpp = var->bits_per_pixel = 32;
 835         /* check whether resolution fits on panel and in memory */
 836         if (par->flatpanel && nativex && var->xres > nativex)
 837                 return -EINVAL;
 838         if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len)
 839                 return -EINVAL;
 840
 841         switch (bpp) {
 842         case 8:
 843                 var->red.offset = 0;
 844                 var->green.offset = 0;
 845                 var->blue.offset = 0;
 846                 var->red.length = 6;
 847                 var->green.length = 6;
 848                 var->blue.length = 6;
 849                 break;
 850         case 16:
 851                 var->red.offset = 11;
 852                 var->green.offset = 5;
 853                 var->blue.offset = 0;
 854                 var->red.length = 5;
 855                 var->green.length = 6;
 856                 var->blue.length = 5;
 857                 break;
 858         case 32:
 859                 var->red.offset = 16;
 860                 var->green.offset = 8;
 861                 var->blue.offset = 0;
 862                 var->red.length = 8;
 863                 var->green.length = 8;
 864                 var->blue.length = 8;
 865                 break;
 866         default:
 867                 return -EINVAL;
 868         }
 869         debug("exit\n");
 870
 871         return 0;
 872
 873 }
 874
 875 /* Pan the display */
 876 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
 877                                  struct fb_info *info)
 878 {
 879         struct tridentfb_par *par = info->par;
 880         unsigned int offset;
 881
 882         debug("enter\n");
 883         offset = (var->xoffset + (var->yoffset * var->xres))
 884                 * var->bits_per_pixel / 32;
 885         info->var.xoffset = var->xoffset;
 886         info->var.yoffset = var->yoffset;
 887         set_screen_start(par, offset);
 888         debug("exit\n");
 889         return 0;
 890 }
 891
 892 static void shadowmode_on(struct tridentfb_par *par)
 893 {
 894         write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81);
 895 }
 896
 897 static void shadowmode_off(struct tridentfb_par *par)
 898 {
 899         write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E);
 900 }
 901
 902 /* Set the hardware to the requested video mode */
 903 static int tridentfb_set_par(struct fb_info *info)
 904 {
 905         struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
 906         u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
 907         u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
 908         struct fb_var_screeninfo *var = &info->var;
 909         int bpp = var->bits_per_pixel;
 910         unsigned char tmp;
 911         unsigned long vclk;
 912
 913         debug("enter\n");
 914         hdispend = var->xres / 8 - 1;
 915         hsyncstart = (var->xres + var->right_margin) / 8 - 1;
 916         hsyncend = (var->xres + var->right_margin + var->hsync_len) / 8 - 1;
 917         htotal = (var->xres + var->left_margin + var->right_margin +
 918                   var->hsync_len) / 8 - 5;
 919         hblankstart = hdispend + 1;
 920         hblankend = htotal + 3;
 921
 922         vdispend = var->yres - 1;
 923         vsyncstart = var->yres + var->lower_margin;
 924         vsyncend = vsyncstart + var->vsync_len;
 925         vtotal = var->upper_margin + vsyncend - 2;
 926         vblankstart = vdispend + 1;
 927         vblankend = vtotal;
 928
 929         crtc_unlock(par);
 930         write3CE(par, CyberControl, 8);
 931
 932         if (par->flatpanel && var->xres < nativex) {
 933                 /*
 934                  * on flat panels with native size larger
 935                  * than requested resolution decide whether
 936                  * we stretch or center
 937                  */
 938                 t_outb(par, 0xEB, VGA_MIS_W);
 939
 940                 shadowmode_on(par);
 941
 942                 if (center)
 943                         screen_center(par);
 944                 else if (stretch)
 945                         screen_stretch(par);
 946
 947         } else {
 948                 t_outb(par, 0x2B, VGA_MIS_W);
 949                 write3CE(par, CyberControl, 8);
 950         }
 951
 952         /* vertical timing values */
 953         write3X4(par, VGA_CRTC_V_TOTAL, vtotal & 0xFF);
 954         write3X4(par, VGA_CRTC_V_DISP_END, vdispend & 0xFF);
 955         write3X4(par, VGA_CRTC_V_SYNC_START, vsyncstart & 0xFF);
 956         write3X4(par, VGA_CRTC_V_SYNC_END, (vsyncend & 0x0F));
 957         write3X4(par, VGA_CRTC_V_BLANK_START, vblankstart & 0xFF);
 958         write3X4(par, VGA_CRTC_V_BLANK_END, vblankend & 0xFF);
 959
 960         /* horizontal timing values */
 961         write3X4(par, VGA_CRTC_H_TOTAL, htotal & 0xFF);
 962         write3X4(par, VGA_CRTC_H_DISP, hdispend & 0xFF);
 963         write3X4(par, VGA_CRTC_H_SYNC_START, hsyncstart & 0xFF);
 964         write3X4(par, VGA_CRTC_H_SYNC_END,
 965                  (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
 966         write3X4(par, VGA_CRTC_H_BLANK_START, hblankstart & 0xFF);
 967         write3X4(par, VGA_CRTC_H_BLANK_END, hblankend & 0x1F);
 968
 969         /* higher bits of vertical timing values */
 970         tmp = 0x10;
 971         if (vtotal & 0x100) tmp |= 0x01;
 972         if (vdispend & 0x100) tmp |= 0x02;
 973         if (vsyncstart & 0x100) tmp |= 0x04;
 974         if (vblankstart & 0x100) tmp |= 0x08;
 975
 976         if (vtotal & 0x200) tmp |= 0x20;
 977         if (vdispend & 0x200) tmp |= 0x40;
 978         if (vsyncstart & 0x200) tmp |= 0x80;
 979         write3X4(par, VGA_CRTC_OVERFLOW, tmp);
 980
 981         tmp = read3X4(par, CRTHiOrd) & 0x07;
 982         tmp |= 0x08;    /* line compare bit 10 */
 983         if (vtotal & 0x400) tmp |= 0x80;
 984         if (vblankstart & 0x400) tmp |= 0x40;
 985         if (vsyncstart & 0x400) tmp |= 0x20;
 986         if (vdispend & 0x400) tmp |= 0x10;
 987         write3X4(par, CRTHiOrd, tmp);
 988
 989         tmp = (htotal >> 8) & 0x01;
 990         tmp |= (hdispend >> 7) & 0x02;
 991         tmp |= (hsyncstart >> 5) & 0x08;
 992         tmp |= (hblankstart >> 4) & 0x10;
 993         write3X4(par, HorizOverflow, tmp);
 994
 995         tmp = 0x40;
 996         if (vblankstart & 0x200) tmp |= 0x20;
 997 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80;  /* double scan for 200 line modes */
 998         write3X4(par, VGA_CRTC_MAX_SCAN, tmp);
 999
1000         write3X4(par, VGA_CRTC_LINE_COMPARE, 0xFF);
1001         write3X4(par, VGA_CRTC_PRESET_ROW, 0);
1002         write3X4(par, VGA_CRTC_MODE, 0xC3);
1003
1004         write3X4(par, LinearAddReg, 0x20);      /* enable linear addressing */
1005
1006         tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
1007         /* enable access extended memory */
1008         write3X4(par, CRTCModuleTest, tmp);
1009
1010         /* enable GE for text acceleration */
1011         write3X4(par, GraphEngReg, 0x80);
1012
1013 #ifdef CONFIG_FB_TRIDENT_ACCEL
1014         par->init_accel(par, info->var.xres, bpp);
1015 #endif
1016
1017         switch (bpp) {
1018         case 8:
1019                 tmp = 0x00;
1020                 break;
1021         case 16:
1022                 tmp = 0x05;
1023                 break;
1024         case 24:
1025                 tmp = 0x29;
1026                 break;
1027         case 32:
1028                 tmp = 0x09;
1029                 break;
1030         }
1031
1032         write3X4(par, PixelBusReg, tmp);
1033
1034         tmp = read3X4(par, DRAMControl);
1035         if (!is_oldprotect(par->chip_id))
1036                 tmp |= 0x10;
1037         if (iscyber(par->chip_id))
1038                 tmp |= 0x20;
1039         write3X4(par, DRAMControl, tmp);        /* both IO, linear enable */
1040
1041         write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40);
1042         if (!is_xp(par->chip_id))
1043                 write3X4(par, Performance, read3X4(par, Performance) | 0x10);
1044         /* MMIO & PCI read and write burst enable */
1045         write3X4(par, PCIReg, read3X4(par, PCIReg) | 0x06);
1046
1047         /* convert from picoseconds to kHz */
1048         vclk = PICOS2KHZ(info->var.pixclock);
1049         if (bpp == 32)
1050                 vclk *= 2;
1051         set_vclk(par, vclk);
1052
1053         vga_mm_wseq(par->io_virt, 0, 3);
1054         vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */
1055         /* enable 4 maps because needed in chain4 mode */
1056         vga_mm_wseq(par->io_virt, 2, 0x0F);
1057         vga_mm_wseq(par->io_virt, 3, 0);
1058         vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */
1059
1060         /* divide clock by 2 if 32bpp chain4 mode display and CPU path */
1061         write3CE(par, MiscExtFunc, (bpp == 32) ? 0x1A : 0x12);
1062         write3CE(par, 0x5, 0x40);       /* no CGA compat, allow 256 col */
1063         write3CE(par, 0x6, 0x05);       /* graphics mode */
1064         write3CE(par, 0x7, 0x0F);       /* planes? */
1065
1066         if (par->chip_id == CYBERBLADEXPAi1) {
1067                 /* This fixes snow-effect in 32 bpp */
1068                 write3X4(par, VGA_CRTC_H_SYNC_START, 0x84);
1069         }
1070
1071         /* graphics mode and support 256 color modes */
1072         writeAttr(par, 0x10, 0x41);
1073         writeAttr(par, 0x12, 0x0F);     /* planes */
1074         writeAttr(par, 0x13, 0);        /* horizontal pel panning */
1075
1076         /* colors */
1077         for (tmp = 0; tmp < 0x10; tmp++)
1078                 writeAttr(par, tmp, tmp);
1079         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
1080         t_outb(par, 0x20, VGA_ATT_W);           /* enable attr */
1081
1082         switch (bpp) {
1083         case 8:
1084                 tmp = 0;
1085                 break;
1086         case 15:
1087                 tmp = 0x10;
1088                 break;
1089         case 16:
1090                 tmp = 0x30;
1091                 break;
1092         case 24:
1093         case 32:
1094                 tmp = 0xD0;
1095                 break;
1096         }
1097
1098         t_inb(par, VGA_PEL_IW);
1099         t_inb(par, VGA_PEL_MSK);
1100         t_inb(par, VGA_PEL_MSK);
1101         t_inb(par, VGA_PEL_MSK);
1102         t_inb(par, VGA_PEL_MSK);
1103         t_outb(par, tmp, VGA_PEL_MSK);
1104         t_inb(par, VGA_PEL_IW);
1105
1106         if (par->flatpanel)
1107                 set_number_of_lines(par, info->var.yres);
1108         set_lwidth(par, info->var.xres * bpp / (4 * 16));
1109         info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1110         info->fix.line_length = info->var.xres * (bpp >> 3);
1111         info->cmap.len = (bpp == 8) ? 256 : 16;
1112         debug("exit\n");
1113         return 0;
1114 }
1115
1116 /* Set one color register */
1117 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1118                                unsigned blue, unsigned transp,
1119                                struct fb_info *info)
1120 {
1121         int bpp = info->var.bits_per_pixel;
1122         struct tridentfb_par *par = info->par;
1123
1124         if (regno >= info->cmap.len)
1125                 return 1;
1126
1127         if (bpp == 8) {
1128                 t_outb(par, 0xFF, VGA_PEL_MSK);
1129                 t_outb(par, regno, VGA_PEL_IW);
1130
1131                 t_outb(par, red >> 10, VGA_PEL_D);
1132                 t_outb(par, green >> 10, VGA_PEL_D);
1133                 t_outb(par, blue >> 10, VGA_PEL_D);
1134
1135         } else if (regno < 16) {
1136                 if (bpp == 16) {        /* RGB 565 */
1137                         u32 col;
1138
1139                         col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
1140                                 ((blue & 0xF800) >> 11);
1141                         col |= col << 16;
1142                         ((u32 *)(info->pseudo_palette))[regno] = col;
1143                 } else if (bpp == 32)           /* ARGB 8888 */
1144                         ((u32*)info->pseudo_palette)[regno] =
1145                                 ((transp & 0xFF00) << 16)       |
1146                                 ((red & 0xFF00) << 8)           |
1147                                 ((green & 0xFF00))              |
1148                                 ((blue & 0xFF00) >> 8);
1149         }
1150
1151 /*      debug("exit\n"); */
1152         return 0;
1153 }
1154
1155 /* Try blanking the screen.For flat panels it does nothing */
1156 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1157 {
1158         unsigned char PMCont, DPMSCont;
1159         struct tridentfb_par *par = info->par;
1160
1161         debug("enter\n");
1162         if (par->flatpanel)
1163                 return 0;
1164         t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */
1165         PMCont = t_inb(par, 0x83C6) & 0xFC;
1166         DPMSCont = read3CE(par, PowerStatus) & 0xFC;
1167         switch (blank_mode) {
1168         case FB_BLANK_UNBLANK:
1169                 /* Screen: On, HSync: On, VSync: On */
1170         case FB_BLANK_NORMAL:
1171                 /* Screen: Off, HSync: On, VSync: On */
1172                 PMCont |= 0x03;
1173                 DPMSCont |= 0x00;
1174                 break;
1175         case FB_BLANK_HSYNC_SUSPEND:
1176                 /* Screen: Off, HSync: Off, VSync: On */
1177                 PMCont |= 0x02;
1178                 DPMSCont |= 0x01;
1179                 break;
1180         case FB_BLANK_VSYNC_SUSPEND:
1181                 /* Screen: Off, HSync: On, VSync: Off */
1182                 PMCont |= 0x02;
1183                 DPMSCont |= 0x02;
1184                 break;
1185         case FB_BLANK_POWERDOWN:
1186                 /* Screen: Off, HSync: Off, VSync: Off */
1187                 PMCont |= 0x00;
1188                 DPMSCont |= 0x03;
1189                 break;
1190         }
1191
1192         write3CE(par, PowerStatus, DPMSCont);
1193         t_outb(par, 4, 0x83C8);
1194         t_outb(par, PMCont, 0x83C6);
1195
1196         debug("exit\n");
1197
1198         /* let fbcon do a softblank for us */
1199         return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
1200 }
1201
1202 static struct fb_ops tridentfb_ops = {
1203         .owner = THIS_MODULE,
1204         .fb_setcolreg = tridentfb_setcolreg,
1205         .fb_pan_display = tridentfb_pan_display,
1206         .fb_blank = tridentfb_blank,
1207         .fb_check_var = tridentfb_check_var,
1208         .fb_set_par = tridentfb_set_par,
1209         .fb_fillrect = tridentfb_fillrect,
1210         .fb_copyarea = tridentfb_copyarea,
1211         .fb_imageblit = cfb_imageblit,
1212 };
1213
1214 static int __devinit trident_pci_probe(struct pci_dev *dev,
1215                                        const struct pci_device_id *id)
1216 {
1217         int err;
1218         unsigned char revision;
1219         struct fb_info *info;
1220         struct tridentfb_par *default_par;
1221         int defaultaccel;
1222         int chip3D;
1223         int chip_id;
1224
1225         err = pci_enable_device(dev);
1226         if (err)
1227                 return err;
1228
1229         info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev);
1230         if (!info)
1231                 return -ENOMEM;
1232         default_par = info->par;
1233
1234         chip_id = id->device;
1235
1236         if (chip_id == CYBERBLADEi1)
1237                 output("*** Please do use cyblafb, Cyberblade/i1 support "
1238                        "will soon be removed from tridentfb!\n");
1239
1240
1241         /* If PCI id is 0x9660 then further detect chip type */
1242
1243         if (chip_id == TGUI9660) {
1244                 revision = vga_io_rseq(RevisionID);
1245
1246                 switch (revision) {
1247                 case 0x21:
1248                         chip_id = PROVIDIA9685;
1249                         break;
1250                 case 0x22:
1251                 case 0x23:
1252                         chip_id = CYBER9397;
1253                         break;
1254                 case 0x2A:
1255                         chip_id = CYBER9397DVD;
1256                         break;
1257                 case 0x30:
1258                 case 0x33:
1259                 case 0x34:
1260                 case 0x35:
1261                 case 0x38:
1262                 case 0x3A:
1263                 case 0xB3:
1264                         chip_id = CYBER9385;
1265                         break;
1266                 case 0x40 ... 0x43:
1267                         chip_id = CYBER9382;
1268                         break;
1269                 case 0x4A:
1270                         chip_id = CYBER9388;
1271                         break;
1272                 default:
1273                         break;
1274                 }
1275         }
1276
1277         chip3D = is3Dchip(chip_id);
1278
1279         if (is_xp(chip_id)) {
1280                 default_par->init_accel = xp_init_accel;
1281                 default_par->wait_engine = xp_wait_engine;
1282                 default_par->fill_rect = xp_fill_rect;
1283                 default_par->copy_rect = xp_copy_rect;
1284         } else if (is_blade(chip_id)) {
1285                 default_par->init_accel = blade_init_accel;
1286                 default_par->wait_engine = blade_wait_engine;
1287                 default_par->fill_rect = blade_fill_rect;
1288                 default_par->copy_rect = blade_copy_rect;
1289         } else {
1290                 default_par->init_accel = image_init_accel;
1291                 default_par->wait_engine = image_wait_engine;
1292                 default_par->fill_rect = image_fill_rect;
1293                 default_par->copy_rect = image_copy_rect;
1294         }
1295
1296         default_par->chip_id = chip_id;
1297
1298         /* acceleration is on by default for 3D chips */
1299         defaultaccel = chip3D && !noaccel;
1300
1301         /* setup MMIO region */
1302         tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
1303         tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
1304
1305         if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1306                 debug("request_region failed!\n");
1307                 framebuffer_release(info);
1308                 return -1;
1309         }
1310
1311         default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start,
1312                                                tridentfb_fix.mmio_len);
1313
1314         if (!default_par->io_virt) {
1315                 debug("ioremap failed\n");
1316                 err = -1;
1317                 goto out_unmap1;
1318         }
1319
1320         /* setup framebuffer memory */
1321         tridentfb_fix.smem_start = pci_resource_start(dev, 0);
1322         tridentfb_fix.smem_len = get_memsize(default_par);
1323
1324         if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1325                 debug("request_mem_region failed!\n");
1326                 disable_mmio(info->par);
1327                 err = -1;
1328                 goto out_unmap1;
1329         }
1330
1331         enable_mmio();
1332
1333         info->screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1334                                             tridentfb_fix.smem_len);
1335
1336         if (!info->screen_base) {
1337                 debug("ioremap failed\n");
1338                 err = -1;
1339                 goto out_unmap2;
1340         }
1341
1342         output("%s board found\n", pci_name(dev));
1343         default_par->flatpanel = is_flatpanel(default_par);
1344
1345         if (default_par->flatpanel)
1346                 nativex = get_nativex(default_par);
1347
1348         info->fix = tridentfb_fix;
1349         info->fbops = &tridentfb_ops;
1350
1351
1352         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1353 #ifdef CONFIG_FB_TRIDENT_ACCEL
1354         info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
1355 #endif
1356         if (!fb_find_mode(&info->var, info,
1357                           mode_option, NULL, 0, NULL, bpp)) {
1358                 err = -EINVAL;
1359                 goto out_unmap2;
1360         }
1361         err = fb_alloc_cmap(&info->cmap, 256, 0);
1362         if (err < 0)
1363                 goto out_unmap2;
1364
1365         if (defaultaccel && default_par->init_accel)
1366                 info->var.accel_flags |= FB_ACCELF_TEXT;
1367         else
1368                 info->var.accel_flags &= ~FB_ACCELF_TEXT;
1369         info->var.activate |= FB_ACTIVATE_NOW;
1370         info->device = &dev->dev;
1371         if (register_framebuffer(info) < 0) {
1372                 printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
1373                 fb_dealloc_cmap(&info->cmap);
1374                 err = -EINVAL;
1375                 goto out_unmap2;
1376         }
1377         output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1378            info->node, info->fix.id, info->var.xres,
1379            info->var.yres, info->var.bits_per_pixel);
1380
1381         pci_set_drvdata(dev, info);
1382         return 0;
1383
1384 out_unmap2:
1385         if (info->screen_base)
1386                 iounmap(info->screen_base);
1387         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1388         disable_mmio(info->par);
1389 out_unmap1:
1390         if (default_par->io_virt)
1391                 iounmap(default_par->io_virt);
1392         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1393         framebuffer_release(info);
1394         return err;
1395 }
1396
1397 static void __devexit trident_pci_remove(struct pci_dev *dev)
1398 {
1399         struct fb_info *info = pci_get_drvdata(dev);
1400         struct tridentfb_par *par = info->par;
1401
1402         unregister_framebuffer(info);
1403         iounmap(par->io_virt);
1404         iounmap(info->screen_base);
1405         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1406         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1407         pci_set_drvdata(dev, NULL);
1408         framebuffer_release(info);
1409 }
1410
1411 /* List of boards that we are trying to support */
1412 static struct pci_device_id trident_devices[] = {
1413         {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1414         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1415         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1416         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1417         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1418         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1419         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1420         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1421         {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1422         {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1423         {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1424         {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1425         {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1426         {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1427         {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1428         {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1429         {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1430         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1431         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1432         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1433         {0,}
1434 };
1435
1436 MODULE_DEVICE_TABLE(pci, trident_devices);
1437
1438 static struct pci_driver tridentfb_pci_driver = {
1439         .name = "tridentfb",
1440         .id_table = trident_devices,
1441         .probe = trident_pci_probe,
1442         .remove = __devexit_p(trident_pci_remove)
1443 };
1444
1445 /*
1446  * Parse user specified options (`video=trident:')
1447  * example:
1448  *      video=trident:800x600,bpp=16,noaccel
1449  */
1450 #ifndef MODULE
1451 static int __init tridentfb_setup(char *options)
1452 {
1453         char *opt;
1454         if (!options || !*options)
1455                 return 0;
1456         while ((opt = strsep(&options, ",")) != NULL) {
1457                 if (!*opt)
1458                         continue;
1459                 if (!strncmp(opt, "noaccel", 7))
1460                         noaccel = 1;
1461                 else if (!strncmp(opt, "fp", 2))
1462                         fp = 1;
1463                 else if (!strncmp(opt, "crt", 3))
1464                         fp = 0;
1465                 else if (!strncmp(opt, "bpp=", 4))
1466                         bpp = simple_strtoul(opt + 4, NULL, 0);
1467                 else if (!strncmp(opt, "center", 6))
1468                         center = 1;
1469                 else if (!strncmp(opt, "stretch", 7))
1470                         stretch = 1;
1471                 else if (!strncmp(opt, "memsize=", 8))
1472                         memsize = simple_strtoul(opt + 8, NULL, 0);
1473                 else if (!strncmp(opt, "memdiff=", 8))
1474                         memdiff = simple_strtoul(opt + 8, NULL, 0);
1475                 else if (!strncmp(opt, "nativex=", 8))
1476                         nativex = simple_strtoul(opt + 8, NULL, 0);
1477                 else
1478                         mode_option = opt;
1479         }
1480         return 0;
1481 }
1482 #endif
1483
1484 static int __init tridentfb_init(void)
1485 {
1486 #ifndef MODULE
1487         char *option = NULL;
1488
1489         if (fb_get_options("tridentfb", &option))
1490                 return -ENODEV;
1491         tridentfb_setup(option);
1492 #endif
1493         output("Trident framebuffer %s initializing\n", VERSION);
1494         return pci_register_driver(&tridentfb_pci_driver);
1495 }
1496
1497 static void __exit tridentfb_exit(void)
1498 {
1499         pci_unregister_driver(&tridentfb_pci_driver);
1500 }
1501
1502 module_init(tridentfb_init);
1503 module_exit(tridentfb_exit);
1504
1505 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1506 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1507 MODULE_LICENSE("GPL");
1508