2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/module.h>
38 #include <linux/usb/usb_phy_generic.h>
39 #include <linux/platform_data/usb-omap.h>
40 #include <linux/sizes.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/usb/of.h>
48 #include <linux/debugfs.h>
50 #include "musb_core.h"
52 static const struct of_device_id musb_dsps_of_match
[];
55 * DSPS musb wrapper register offset.
56 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
59 struct dsps_musb_wrapper
{
74 /* bit positions for control */
77 /* bit positions for interrupt */
83 unsigned txep_shift
:5;
87 unsigned rxep_shift
:5;
91 /* bit positions for phy_utmi */
92 unsigned otg_disable
:5;
94 /* bit positions for mode */
97 /* miscellaneous stuff */
98 unsigned poll_timeout
;
102 * register shadow for suspend
104 struct dsps_context
{
115 * DSPS glue structure.
119 struct platform_device
*musb
; /* child musb pdev */
120 const struct dsps_musb_wrapper
*wrp
; /* wrapper register offsets */
121 int vbus_irq
; /* optional vbus irq */
122 struct timer_list timer
; /* otg_workaround timer */
123 unsigned long last_timer
; /* last timer data for each instance */
124 bool sw_babble_enabled
;
125 void __iomem
*usbss_base
;
127 struct dsps_context context
;
128 struct debugfs_regset32 regset
;
129 struct dentry
*dbgfs_root
;
132 static const struct debugfs_reg32 dsps_musb_regs
[] = {
133 { "revision", 0x00 },
137 { "intr0_stat", 0x30 },
138 { "intr1_stat", 0x34 },
139 { "intr0_set", 0x38 },
140 { "intr1_set", 0x3c },
144 { "srpfixtime", 0xd4 },
146 { "phy_utmi", 0xe0 },
150 static void dsps_mod_timer(struct dsps_glue
*glue
, int wait_ms
)
155 wait
= msecs_to_jiffies(glue
->wrp
->poll_timeout
);
157 wait
= msecs_to_jiffies(wait_ms
);
159 mod_timer(&glue
->timer
, jiffies
+ wait
);
163 * If no vbus irq from the PMIC is configured, we need to poll VBUS status.
165 static void dsps_mod_timer_optional(struct dsps_glue
*glue
)
170 dsps_mod_timer(glue
, -1);
173 /* USBSS / USB AM335x */
174 #define USBSS_IRQ_STATUS 0x28
175 #define USBSS_IRQ_ENABLER 0x2c
176 #define USBSS_IRQ_CLEARR 0x30
178 #define USBSS_IRQ_PD_COMP (1 << 2)
181 * dsps_musb_enable - enable interrupts
183 static void dsps_musb_enable(struct musb
*musb
)
185 struct device
*dev
= musb
->controller
;
186 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
187 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
188 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
189 void __iomem
*reg_base
= musb
->ctrl_base
;
190 u32 epmask
, coremask
;
192 /* Workaround: setup IRQs through both register sets. */
193 epmask
= ((musb
->epmask
& wrp
->txep_mask
) << wrp
->txep_shift
) |
194 ((musb
->epmask
& wrp
->rxep_mask
) << wrp
->rxep_shift
);
195 coremask
= (wrp
->usb_bitmap
& ~MUSB_INTR_SOF
);
197 musb_writel(reg_base
, wrp
->epintr_set
, epmask
);
198 musb_writel(reg_base
, wrp
->coreintr_set
, coremask
);
199 /* start polling for ID change in dual-role idle mode */
200 if (musb
->xceiv
->otg
->state
== OTG_STATE_B_IDLE
&&
201 musb
->port_mode
== MUSB_PORT_MODE_DUAL_ROLE
)
202 dsps_mod_timer(glue
, -1);
206 * dsps_musb_disable - disable HDRC and flush interrupts
208 static void dsps_musb_disable(struct musb
*musb
)
210 struct device
*dev
= musb
->controller
;
211 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
212 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
213 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
214 void __iomem
*reg_base
= musb
->ctrl_base
;
216 musb_writel(reg_base
, wrp
->coreintr_clear
, wrp
->usb_bitmap
);
217 musb_writel(reg_base
, wrp
->epintr_clear
,
218 wrp
->txep_bitmap
| wrp
->rxep_bitmap
);
219 del_timer_sync(&glue
->timer
);
222 /* Caller must take musb->lock */
223 static int dsps_check_status(struct musb
*musb
, void *unused
)
225 void __iomem
*mregs
= musb
->mregs
;
226 struct device
*dev
= musb
->controller
;
227 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
228 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
230 int skip_session
= 0;
233 del_timer(&glue
->timer
);
236 * We poll because DSPS IP's won't expose several OTG-critical
237 * status change events (from the transceiver) otherwise.
239 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
240 dev_dbg(musb
->controller
, "Poll devctl %02x (%s)\n", devctl
,
241 usb_otg_state_string(musb
->xceiv
->otg
->state
));
243 switch (musb
->xceiv
->otg
->state
) {
244 case OTG_STATE_A_WAIT_VRISE
:
245 dsps_mod_timer_optional(glue
);
247 case OTG_STATE_A_WAIT_BCON
:
248 /* keep VBUS on for host-only mode */
249 if (musb
->port_mode
== MUSB_PORT_MODE_HOST
) {
250 dsps_mod_timer_optional(glue
);
253 musb_writeb(musb
->mregs
, MUSB_DEVCTL
, 0);
257 case OTG_STATE_A_IDLE
:
258 case OTG_STATE_B_IDLE
:
259 if (!glue
->vbus_irq
) {
260 if (devctl
& MUSB_DEVCTL_BDEVICE
) {
261 musb
->xceiv
->otg
->state
= OTG_STATE_B_IDLE
;
264 musb
->xceiv
->otg
->state
= OTG_STATE_A_IDLE
;
267 if (!(devctl
& MUSB_DEVCTL_SESSION
) && !skip_session
)
268 musb_writeb(mregs
, MUSB_DEVCTL
,
269 MUSB_DEVCTL_SESSION
);
271 dsps_mod_timer_optional(glue
);
273 case OTG_STATE_A_WAIT_VFALL
:
274 musb
->xceiv
->otg
->state
= OTG_STATE_A_WAIT_VRISE
;
275 musb_writel(musb
->ctrl_base
, wrp
->coreintr_set
,
276 MUSB_INTR_VBUSERROR
<< wrp
->usb_shift
);
285 static void otg_timer(unsigned long _musb
)
287 struct musb
*musb
= (void *)_musb
;
288 struct device
*dev
= musb
->controller
;
292 err
= pm_runtime_get(dev
);
293 if ((err
!= -EINPROGRESS
) && err
< 0) {
294 dev_err(dev
, "Poll could not pm_runtime_get: %i\n", err
);
295 pm_runtime_put_noidle(dev
);
300 spin_lock_irqsave(&musb
->lock
, flags
);
301 err
= musb_queue_resume_work(musb
, dsps_check_status
, NULL
);
303 dev_err(dev
, "%s resume work: %i\n", __func__
, err
);
304 spin_unlock_irqrestore(&musb
->lock
, flags
);
305 pm_runtime_mark_last_busy(dev
);
306 pm_runtime_put_autosuspend(dev
);
309 static void dsps_musb_clear_ep_rxintr(struct musb
*musb
, int epnum
)
312 struct dsps_glue
*glue
= dev_get_drvdata(musb
->controller
->parent
);
313 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
315 /* musb->lock might already been held */
316 epintr
= (1 << epnum
) << wrp
->rxep_shift
;
317 musb_writel(musb
->ctrl_base
, wrp
->epintr_status
, epintr
);
320 static irqreturn_t
dsps_interrupt(int irq
, void *hci
)
322 struct musb
*musb
= hci
;
323 void __iomem
*reg_base
= musb
->ctrl_base
;
324 struct device
*dev
= musb
->controller
;
325 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
326 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
328 irqreturn_t ret
= IRQ_NONE
;
331 spin_lock_irqsave(&musb
->lock
, flags
);
333 /* Get endpoint interrupts */
334 epintr
= musb_readl(reg_base
, wrp
->epintr_status
);
335 musb
->int_rx
= (epintr
& wrp
->rxep_bitmap
) >> wrp
->rxep_shift
;
336 musb
->int_tx
= (epintr
& wrp
->txep_bitmap
) >> wrp
->txep_shift
;
339 musb_writel(reg_base
, wrp
->epintr_status
, epintr
);
341 /* Get usb core interrupts */
342 usbintr
= musb_readl(reg_base
, wrp
->coreintr_status
);
343 if (!usbintr
&& !epintr
)
346 musb
->int_usb
= (usbintr
& wrp
->usb_bitmap
) >> wrp
->usb_shift
;
348 musb_writel(reg_base
, wrp
->coreintr_status
, usbintr
);
350 dev_dbg(musb
->controller
, "usbintr (%x) epintr(%x)\n",
353 if (usbintr
& ((1 << wrp
->drvvbus
) << wrp
->usb_shift
)) {
354 int drvvbus
= musb_readl(reg_base
, wrp
->status
);
355 void __iomem
*mregs
= musb
->mregs
;
356 u8 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
359 err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
362 * The Mentor core doesn't debounce VBUS as needed
363 * to cope with device connect current spikes. This
364 * means it's not uncommon for bus-powered devices
365 * to get VBUS errors during enumeration.
367 * This is a workaround, but newer RTL from Mentor
368 * seems to allow a better one: "re"-starting sessions
369 * without waiting for VBUS to stop registering in
372 musb
->int_usb
&= ~MUSB_INTR_VBUSERROR
;
373 musb
->xceiv
->otg
->state
= OTG_STATE_A_WAIT_VFALL
;
374 dsps_mod_timer_optional(glue
);
375 WARNING("VBUS error workaround (delay coming)\n");
376 } else if (drvvbus
) {
378 musb
->xceiv
->otg
->default_a
= 1;
379 musb
->xceiv
->otg
->state
= OTG_STATE_A_WAIT_VRISE
;
380 dsps_mod_timer_optional(glue
);
384 musb
->xceiv
->otg
->default_a
= 0;
385 musb
->xceiv
->otg
->state
= OTG_STATE_B_IDLE
;
388 /* NOTE: this must complete power-on within 100 ms. */
389 dev_dbg(musb
->controller
, "VBUS %s (%s)%s, devctl %02x\n",
390 drvvbus
? "on" : "off",
391 usb_otg_state_string(musb
->xceiv
->otg
->state
),
397 if (musb
->int_tx
|| musb
->int_rx
|| musb
->int_usb
)
398 ret
|= musb_interrupt(musb
);
400 /* Poll for ID change and connect */
401 switch (musb
->xceiv
->otg
->state
) {
402 case OTG_STATE_B_IDLE
:
403 case OTG_STATE_A_WAIT_BCON
:
404 dsps_mod_timer_optional(glue
);
411 spin_unlock_irqrestore(&musb
->lock
, flags
);
416 static int dsps_musb_dbg_init(struct musb
*musb
, struct dsps_glue
*glue
)
422 sprintf(buf
, "%s.dsps", dev_name(musb
->controller
));
423 root
= debugfs_create_dir(buf
, NULL
);
426 glue
->dbgfs_root
= root
;
428 glue
->regset
.regs
= dsps_musb_regs
;
429 glue
->regset
.nregs
= ARRAY_SIZE(dsps_musb_regs
);
430 glue
->regset
.base
= musb
->ctrl_base
;
432 file
= debugfs_create_regset32("regdump", S_IRUGO
, root
, &glue
->regset
);
434 debugfs_remove_recursive(root
);
440 static int dsps_musb_init(struct musb
*musb
)
442 struct device
*dev
= musb
->controller
;
443 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
444 struct platform_device
*parent
= to_platform_device(dev
->parent
);
445 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
446 void __iomem
*reg_base
;
451 r
= platform_get_resource_byname(parent
, IORESOURCE_MEM
, "control");
452 reg_base
= devm_ioremap_resource(dev
, r
);
453 if (IS_ERR(reg_base
))
454 return PTR_ERR(reg_base
);
455 musb
->ctrl_base
= reg_base
;
457 /* NOP driver needs change if supporting dual instance */
458 musb
->xceiv
= devm_usb_get_phy_by_phandle(dev
->parent
, "phys", 0);
459 if (IS_ERR(musb
->xceiv
))
460 return PTR_ERR(musb
->xceiv
);
462 musb
->phy
= devm_phy_get(dev
->parent
, "usb2-phy");
464 /* Returns zero if e.g. not clocked */
465 rev
= musb_readl(reg_base
, wrp
->revision
);
469 usb_phy_init(musb
->xceiv
);
470 if (IS_ERR(musb
->phy
)) {
473 ret
= phy_init(musb
->phy
);
476 ret
= phy_power_on(musb
->phy
);
483 setup_timer(&glue
->timer
, otg_timer
, (unsigned long) musb
);
486 musb_writel(reg_base
, wrp
->control
, (1 << wrp
->reset
));
488 musb
->isr
= dsps_interrupt
;
490 /* reset the otgdisable bit, needed for host mode to work */
491 val
= musb_readl(reg_base
, wrp
->phy_utmi
);
492 val
&= ~(1 << wrp
->otg_disable
);
493 musb_writel(musb
->ctrl_base
, wrp
->phy_utmi
, val
);
496 * Check whether the dsps version has babble control enabled.
497 * In latest silicon revision the babble control logic is enabled.
498 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
501 val
= musb_readb(musb
->mregs
, MUSB_BABBLE_CTL
);
502 if (val
& MUSB_BABBLE_RCV_DISABLE
) {
503 glue
->sw_babble_enabled
= true;
504 val
|= MUSB_BABBLE_SW_SESSION_CTRL
;
505 musb_writeb(musb
->mregs
, MUSB_BABBLE_CTL
, val
);
508 dsps_mod_timer(glue
, -1);
510 return dsps_musb_dbg_init(musb
, glue
);
513 static int dsps_musb_exit(struct musb
*musb
)
515 struct device
*dev
= musb
->controller
;
516 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
518 del_timer_sync(&glue
->timer
);
519 usb_phy_shutdown(musb
->xceiv
);
520 phy_power_off(musb
->phy
);
522 debugfs_remove_recursive(glue
->dbgfs_root
);
527 static int dsps_musb_set_mode(struct musb
*musb
, u8 mode
)
529 struct device
*dev
= musb
->controller
;
530 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
531 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
532 void __iomem
*ctrl_base
= musb
->ctrl_base
;
535 reg
= musb_readl(ctrl_base
, wrp
->mode
);
539 reg
&= ~(1 << wrp
->iddig
);
542 * if we're setting mode to host-only or device-only, we're
543 * going to ignore whatever the PHY sends us and just force
544 * ID pin status by SW
546 reg
|= (1 << wrp
->iddig_mux
);
548 musb_writel(ctrl_base
, wrp
->mode
, reg
);
549 musb_writel(ctrl_base
, wrp
->phy_utmi
, 0x02);
551 case MUSB_PERIPHERAL
:
552 reg
|= (1 << wrp
->iddig
);
555 * if we're setting mode to host-only or device-only, we're
556 * going to ignore whatever the PHY sends us and just force
557 * ID pin status by SW
559 reg
|= (1 << wrp
->iddig_mux
);
561 musb_writel(ctrl_base
, wrp
->mode
, reg
);
564 musb_writel(ctrl_base
, wrp
->phy_utmi
, 0x02);
567 dev_err(glue
->dev
, "unsupported mode %d\n", mode
);
574 static bool dsps_sw_babble_control(struct musb
*musb
)
577 bool session_restart
= false;
579 babble_ctl
= musb_readb(musb
->mregs
, MUSB_BABBLE_CTL
);
580 dev_dbg(musb
->controller
, "babble: MUSB_BABBLE_CTL value %x\n",
583 * check line monitor flag to check whether babble is
586 dev_dbg(musb
->controller
, "STUCK_J is %s\n",
587 babble_ctl
& MUSB_BABBLE_STUCK_J
? "set" : "reset");
589 if (babble_ctl
& MUSB_BABBLE_STUCK_J
) {
593 * babble is due to noise, then set transmit idle (d7 bit)
594 * to resume normal operation
596 babble_ctl
= musb_readb(musb
->mregs
, MUSB_BABBLE_CTL
);
597 babble_ctl
|= MUSB_BABBLE_FORCE_TXIDLE
;
598 musb_writeb(musb
->mregs
, MUSB_BABBLE_CTL
, babble_ctl
);
600 /* wait till line monitor flag cleared */
601 dev_dbg(musb
->controller
, "Set TXIDLE, wait J to clear\n");
603 babble_ctl
= musb_readb(musb
->mregs
, MUSB_BABBLE_CTL
);
605 } while ((babble_ctl
& MUSB_BABBLE_STUCK_J
) && timeout
--);
607 /* check whether stuck_at_j bit cleared */
608 if (babble_ctl
& MUSB_BABBLE_STUCK_J
) {
610 * real babble condition has occurred
611 * restart the controller to start the
614 dev_dbg(musb
->controller
, "J not cleared, misc (%x)\n",
616 session_restart
= true;
619 session_restart
= true;
622 return session_restart
;
625 static int dsps_musb_recover(struct musb
*musb
)
627 struct device
*dev
= musb
->controller
;
628 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
629 int session_restart
= 0;
631 if (glue
->sw_babble_enabled
)
632 session_restart
= dsps_sw_babble_control(musb
);
636 return session_restart
? 0 : -EPIPE
;
639 /* Similar to am35x, dm81xx support only 32-bit read operation */
640 static void dsps_read_fifo32(struct musb_hw_ep
*hw_ep
, u16 len
, u8
*dst
)
642 void __iomem
*fifo
= hw_ep
->fifo
;
645 ioread32_rep(fifo
, dst
, len
>> 2);
650 /* Read any remaining 1 to 3 bytes */
652 u32 val
= musb_readl(fifo
, 0);
653 memcpy(dst
, &val
, len
);
657 #ifdef CONFIG_USB_TI_CPPI41_DMA
658 static void dsps_dma_controller_callback(struct dma_controller
*c
)
660 struct musb
*musb
= c
->musb
;
661 struct dsps_glue
*glue
= dev_get_drvdata(musb
->controller
->parent
);
662 void __iomem
*usbss_base
= glue
->usbss_base
;
665 status
= musb_readl(usbss_base
, USBSS_IRQ_STATUS
);
666 if (status
& USBSS_IRQ_PD_COMP
)
667 musb_writel(usbss_base
, USBSS_IRQ_STATUS
, USBSS_IRQ_PD_COMP
);
670 static struct dma_controller
*
671 dsps_dma_controller_create(struct musb
*musb
, void __iomem
*base
)
673 struct dma_controller
*controller
;
674 struct dsps_glue
*glue
= dev_get_drvdata(musb
->controller
->parent
);
675 void __iomem
*usbss_base
= glue
->usbss_base
;
677 controller
= cppi41_dma_controller_create(musb
, base
);
678 if (IS_ERR_OR_NULL(controller
))
681 musb_writel(usbss_base
, USBSS_IRQ_ENABLER
, USBSS_IRQ_PD_COMP
);
682 controller
->dma_callback
= dsps_dma_controller_callback
;
687 static void dsps_dma_controller_destroy(struct dma_controller
*c
)
689 struct musb
*musb
= c
->musb
;
690 struct dsps_glue
*glue
= dev_get_drvdata(musb
->controller
->parent
);
691 void __iomem
*usbss_base
= glue
->usbss_base
;
693 musb_writel(usbss_base
, USBSS_IRQ_CLEARR
, USBSS_IRQ_PD_COMP
);
694 cppi41_dma_controller_destroy(c
);
697 #ifdef CONFIG_PM_SLEEP
698 static void dsps_dma_controller_suspend(struct dsps_glue
*glue
)
700 void __iomem
*usbss_base
= glue
->usbss_base
;
702 musb_writel(usbss_base
, USBSS_IRQ_CLEARR
, USBSS_IRQ_PD_COMP
);
705 static void dsps_dma_controller_resume(struct dsps_glue
*glue
)
707 void __iomem
*usbss_base
= glue
->usbss_base
;
709 musb_writel(usbss_base
, USBSS_IRQ_ENABLER
, USBSS_IRQ_PD_COMP
);
712 #else /* CONFIG_USB_TI_CPPI41_DMA */
713 #ifdef CONFIG_PM_SLEEP
714 static void dsps_dma_controller_suspend(struct dsps_glue
*glue
) {}
715 static void dsps_dma_controller_resume(struct dsps_glue
*glue
) {}
717 #endif /* CONFIG_USB_TI_CPPI41_DMA */
719 static struct musb_platform_ops dsps_ops
= {
720 .quirks
= MUSB_DMA_CPPI41
| MUSB_INDEXED_EP
,
721 .init
= dsps_musb_init
,
722 .exit
= dsps_musb_exit
,
724 #ifdef CONFIG_USB_TI_CPPI41_DMA
725 .dma_init
= dsps_dma_controller_create
,
726 .dma_exit
= dsps_dma_controller_destroy
,
728 .enable
= dsps_musb_enable
,
729 .disable
= dsps_musb_disable
,
731 .set_mode
= dsps_musb_set_mode
,
732 .recover
= dsps_musb_recover
,
733 .clear_ep_rxintr
= dsps_musb_clear_ep_rxintr
,
736 static u64 musb_dmamask
= DMA_BIT_MASK(32);
738 static int get_int_prop(struct device_node
*dn
, const char *s
)
743 ret
= of_property_read_u32(dn
, s
, &val
);
749 static int get_musb_port_mode(struct device
*dev
)
751 enum usb_dr_mode mode
;
753 mode
= usb_get_dr_mode(dev
);
755 case USB_DR_MODE_HOST
:
756 return MUSB_PORT_MODE_HOST
;
758 case USB_DR_MODE_PERIPHERAL
:
759 return MUSB_PORT_MODE_GADGET
;
761 case USB_DR_MODE_UNKNOWN
:
762 case USB_DR_MODE_OTG
:
764 return MUSB_PORT_MODE_DUAL_ROLE
;
768 static int dsps_create_musb_pdev(struct dsps_glue
*glue
,
769 struct platform_device
*parent
)
771 struct musb_hdrc_platform_data pdata
;
772 struct resource resources
[2];
773 struct resource
*res
;
774 struct device
*dev
= &parent
->dev
;
775 struct musb_hdrc_config
*config
;
776 struct platform_device
*musb
;
777 struct device_node
*dn
= parent
->dev
.of_node
;
780 memset(resources
, 0, sizeof(resources
));
781 res
= platform_get_resource_byname(parent
, IORESOURCE_MEM
, "mc");
783 dev_err(dev
, "failed to get memory.\n");
788 res
= platform_get_resource_byname(parent
, IORESOURCE_IRQ
, "mc");
790 dev_err(dev
, "failed to get irq.\n");
795 /* allocate the child platform device */
796 musb
= platform_device_alloc("musb-hdrc",
797 (resources
[0].start
& 0xFFF) == 0x400 ? 0 : 1);
799 dev_err(dev
, "failed to allocate musb device\n");
803 musb
->dev
.parent
= dev
;
804 musb
->dev
.dma_mask
= &musb_dmamask
;
805 musb
->dev
.coherent_dma_mask
= musb_dmamask
;
809 ret
= platform_device_add_resources(musb
, resources
,
810 ARRAY_SIZE(resources
));
812 dev_err(dev
, "failed to add resources\n");
816 config
= devm_kzalloc(&parent
->dev
, sizeof(*config
), GFP_KERNEL
);
821 pdata
.config
= config
;
822 pdata
.platform_ops
= &dsps_ops
;
824 config
->num_eps
= get_int_prop(dn
, "mentor,num-eps");
825 config
->ram_bits
= get_int_prop(dn
, "mentor,ram-bits");
826 config
->host_port_deassert_reset_at_resume
= 1;
827 pdata
.mode
= get_musb_port_mode(dev
);
828 /* DT keeps this entry in mA, musb expects it as per USB spec */
829 pdata
.power
= get_int_prop(dn
, "mentor,power") / 2;
831 ret
= of_property_read_u32(dn
, "mentor,multipoint", &val
);
833 config
->multipoint
= true;
835 config
->maximum_speed
= usb_get_maximum_speed(&parent
->dev
);
836 switch (config
->maximum_speed
) {
840 case USB_SPEED_SUPER
:
841 dev_warn(dev
, "ignore incorrect maximum_speed "
842 "(super-speed) setting in dts");
845 config
->maximum_speed
= USB_SPEED_HIGH
;
848 ret
= platform_device_add_data(musb
, &pdata
, sizeof(pdata
));
850 dev_err(dev
, "failed to add platform_data\n");
854 ret
= platform_device_add(musb
);
856 dev_err(dev
, "failed to register musb device\n");
862 platform_device_put(musb
);
866 static irqreturn_t
dsps_vbus_threaded_irq(int irq
, void *priv
)
868 struct dsps_glue
*glue
= priv
;
869 struct musb
*musb
= platform_get_drvdata(glue
->musb
);
874 dev_dbg(glue
->dev
, "VBUS interrupt\n");
875 dsps_mod_timer(glue
, 0);
880 static int dsps_setup_optional_vbus_irq(struct platform_device
*pdev
,
881 struct dsps_glue
*glue
)
885 glue
->vbus_irq
= platform_get_irq_byname(pdev
, "vbus");
886 if (glue
->vbus_irq
== -EPROBE_DEFER
)
887 return -EPROBE_DEFER
;
889 if (glue
->vbus_irq
<= 0) {
894 error
= devm_request_threaded_irq(glue
->dev
, glue
->vbus_irq
,
895 NULL
, dsps_vbus_threaded_irq
,
902 dev_dbg(glue
->dev
, "VBUS irq %i configured\n", glue
->vbus_irq
);
907 static int dsps_probe(struct platform_device
*pdev
)
909 const struct of_device_id
*match
;
910 const struct dsps_musb_wrapper
*wrp
;
911 struct dsps_glue
*glue
;
914 if (!strcmp(pdev
->name
, "musb-hdrc"))
917 match
= of_match_node(musb_dsps_of_match
, pdev
->dev
.of_node
);
919 dev_err(&pdev
->dev
, "fail to get matching of_match struct\n");
924 if (of_device_is_compatible(pdev
->dev
.of_node
, "ti,musb-dm816"))
925 dsps_ops
.read_fifo
= dsps_read_fifo32
;
928 glue
= devm_kzalloc(&pdev
->dev
, sizeof(*glue
), GFP_KERNEL
);
932 glue
->dev
= &pdev
->dev
;
934 glue
->usbss_base
= of_iomap(pdev
->dev
.parent
->of_node
, 0);
935 if (!glue
->usbss_base
)
938 if (usb_get_dr_mode(&pdev
->dev
) == USB_DR_MODE_PERIPHERAL
) {
939 ret
= dsps_setup_optional_vbus_irq(pdev
, glue
);
944 platform_set_drvdata(pdev
, glue
);
945 pm_runtime_enable(&pdev
->dev
);
946 ret
= dsps_create_musb_pdev(glue
, pdev
);
953 pm_runtime_disable(&pdev
->dev
);
955 iounmap(glue
->usbss_base
);
959 static int dsps_remove(struct platform_device
*pdev
)
961 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
963 platform_device_unregister(glue
->musb
);
965 pm_runtime_disable(&pdev
->dev
);
966 iounmap(glue
->usbss_base
);
971 static const struct dsps_musb_wrapper am33xx_driver_data
= {
976 .epintr_clear
= 0x40,
977 .epintr_status
= 0x30,
978 .coreintr_set
= 0x3c,
979 .coreintr_clear
= 0x44,
980 .coreintr_status
= 0x34,
991 .usb_bitmap
= (0x1ff << 0),
995 .txep_bitmap
= (0xffff << 0),
998 .rxep_bitmap
= (0xfffe << 16),
999 .poll_timeout
= 2000, /* ms */
1002 static const struct of_device_id musb_dsps_of_match
[] = {
1003 { .compatible
= "ti,musb-am33xx",
1004 .data
= &am33xx_driver_data
, },
1005 { .compatible
= "ti,musb-dm816",
1006 .data
= &am33xx_driver_data
, },
1009 MODULE_DEVICE_TABLE(of
, musb_dsps_of_match
);
1011 #ifdef CONFIG_PM_SLEEP
1012 static int dsps_suspend(struct device
*dev
)
1014 struct dsps_glue
*glue
= dev_get_drvdata(dev
);
1015 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
1016 struct musb
*musb
= platform_get_drvdata(glue
->musb
);
1017 void __iomem
*mbase
;
1019 del_timer_sync(&glue
->timer
);
1022 /* This can happen if the musb device is in -EPROBE_DEFER */
1025 mbase
= musb
->ctrl_base
;
1026 glue
->context
.control
= musb_readl(mbase
, wrp
->control
);
1027 glue
->context
.epintr
= musb_readl(mbase
, wrp
->epintr_set
);
1028 glue
->context
.coreintr
= musb_readl(mbase
, wrp
->coreintr_set
);
1029 glue
->context
.phy_utmi
= musb_readl(mbase
, wrp
->phy_utmi
);
1030 glue
->context
.mode
= musb_readl(mbase
, wrp
->mode
);
1031 glue
->context
.tx_mode
= musb_readl(mbase
, wrp
->tx_mode
);
1032 glue
->context
.rx_mode
= musb_readl(mbase
, wrp
->rx_mode
);
1034 dsps_dma_controller_suspend(glue
);
1039 static int dsps_resume(struct device
*dev
)
1041 struct dsps_glue
*glue
= dev_get_drvdata(dev
);
1042 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
1043 struct musb
*musb
= platform_get_drvdata(glue
->musb
);
1044 void __iomem
*mbase
;
1049 dsps_dma_controller_resume(glue
);
1051 mbase
= musb
->ctrl_base
;
1052 musb_writel(mbase
, wrp
->control
, glue
->context
.control
);
1053 musb_writel(mbase
, wrp
->epintr_set
, glue
->context
.epintr
);
1054 musb_writel(mbase
, wrp
->coreintr_set
, glue
->context
.coreintr
);
1055 musb_writel(mbase
, wrp
->phy_utmi
, glue
->context
.phy_utmi
);
1056 musb_writel(mbase
, wrp
->mode
, glue
->context
.mode
);
1057 musb_writel(mbase
, wrp
->tx_mode
, glue
->context
.tx_mode
);
1058 musb_writel(mbase
, wrp
->rx_mode
, glue
->context
.rx_mode
);
1059 if (musb
->xceiv
->otg
->state
== OTG_STATE_B_IDLE
&&
1060 musb
->port_mode
== MUSB_PORT_MODE_DUAL_ROLE
)
1061 dsps_mod_timer(glue
, -1);
1067 static SIMPLE_DEV_PM_OPS(dsps_pm_ops
, dsps_suspend
, dsps_resume
);
1069 static struct platform_driver dsps_usbss_driver
= {
1070 .probe
= dsps_probe
,
1071 .remove
= dsps_remove
,
1073 .name
= "musb-dsps",
1075 .of_match_table
= musb_dsps_of_match
,
1079 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
1080 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
1081 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
1082 MODULE_LICENSE("GPL v2");
1084 module_platform_driver(dsps_usbss_driver
);