Merge tag 'v3.10.90' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / ehci-fsl.c
1 /*
2 * Copyright 2005-2009 MontaVista Software, Inc.
3 * Copyright 2008,2012 Freescale Semiconductor, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
20 * by Hunter Wu.
21 * Power Management support by Dave Liu <daveliu@freescale.com>,
22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
24 */
25
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/err.h>
31 #include <linux/platform_device.h>
32 #include <linux/fsl_devices.h>
33
34 #include "ehci-fsl.h"
35
36 /* configure so an HC device and id are always provided */
37 /* always called with process context; sleeping is OK */
38
39 /**
40 * usb_hcd_fsl_probe - initialize FSL-based HCDs
41 * @drvier: Driver to be used for this HCD
42 * @pdev: USB Host Controller being probed
43 * Context: !in_interrupt()
44 *
45 * Allocates basic resources for this USB host controller.
46 *
47 */
48 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
49 struct platform_device *pdev)
50 {
51 struct fsl_usb2_platform_data *pdata;
52 struct usb_hcd *hcd;
53 struct resource *res;
54 int irq;
55 int retval;
56
57 pr_debug("initializing FSL-SOC USB Controller\n");
58
59 /* Need platform data for setup */
60 pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
61 if (!pdata) {
62 dev_err(&pdev->dev,
63 "No platform data for %s.\n", dev_name(&pdev->dev));
64 return -ENODEV;
65 }
66
67 /*
68 * This is a host mode driver, verify that we're supposed to be
69 * in host mode.
70 */
71 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
72 (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
73 (pdata->operating_mode == FSL_USB2_DR_OTG))) {
74 dev_err(&pdev->dev,
75 "Non Host Mode configured for %s. Wrong driver linked.\n",
76 dev_name(&pdev->dev));
77 return -ENODEV;
78 }
79
80 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
81 if (!res) {
82 dev_err(&pdev->dev,
83 "Found HC with no IRQ. Check %s setup!\n",
84 dev_name(&pdev->dev));
85 return -ENODEV;
86 }
87 irq = res->start;
88
89 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
90 if (!hcd) {
91 retval = -ENOMEM;
92 goto err1;
93 }
94
95 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
96 if (!res) {
97 dev_err(&pdev->dev,
98 "Found HC with no register addr. Check %s setup!\n",
99 dev_name(&pdev->dev));
100 retval = -ENODEV;
101 goto err2;
102 }
103 hcd->rsrc_start = res->start;
104 hcd->rsrc_len = resource_size(res);
105 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
106 driver->description)) {
107 dev_dbg(&pdev->dev, "controller already in use\n");
108 retval = -EBUSY;
109 goto err2;
110 }
111 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
112
113 if (hcd->regs == NULL) {
114 dev_dbg(&pdev->dev, "error mapping memory\n");
115 retval = -EFAULT;
116 goto err3;
117 }
118
119 pdata->regs = hcd->regs;
120
121 if (pdata->power_budget)
122 hcd->power_budget = pdata->power_budget;
123
124 /*
125 * do platform specific init: check the clock, grab/config pins, etc.
126 */
127 if (pdata->init && pdata->init(pdev)) {
128 retval = -ENODEV;
129 goto err4;
130 }
131
132 /* Enable USB controller, 83xx or 8536 */
133 if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
134 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
135
136 /* Don't need to set host mode here. It will be done by tdi_reset() */
137
138 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
139 if (retval != 0)
140 goto err4;
141
142 #ifdef CONFIG_USB_OTG
143 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
144 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
145
146 hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
147 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
148 hcd, ehci, hcd->phy);
149
150 if (!IS_ERR_OR_NULL(hcd->phy)) {
151 retval = otg_set_host(hcd->phy->otg,
152 &ehci_to_hcd(ehci)->self);
153 if (retval) {
154 usb_put_phy(hcd->phy);
155 goto err4;
156 }
157 } else {
158 dev_err(&pdev->dev, "can't find phy\n");
159 retval = -ENODEV;
160 goto err4;
161 }
162 }
163 #endif
164 return retval;
165
166 err4:
167 iounmap(hcd->regs);
168 err3:
169 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
170 err2:
171 usb_put_hcd(hcd);
172 err1:
173 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
174 if (pdata->exit)
175 pdata->exit(pdev);
176 return retval;
177 }
178
179 /* may be called without controller electrically present */
180 /* may be called with controller, bus, and devices active */
181
182 /**
183 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
184 * @dev: USB Host Controller being removed
185 * Context: !in_interrupt()
186 *
187 * Reverses the effect of usb_hcd_fsl_probe().
188 *
189 */
190 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
191 struct platform_device *pdev)
192 {
193 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
194
195 if (!IS_ERR_OR_NULL(hcd->phy)) {
196 otg_set_host(hcd->phy->otg, NULL);
197 usb_put_phy(hcd->phy);
198 }
199
200 usb_remove_hcd(hcd);
201
202 /*
203 * do platform specific un-initialization:
204 * release iomux pins, disable clock, etc.
205 */
206 if (pdata->exit)
207 pdata->exit(pdev);
208 iounmap(hcd->regs);
209 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
210 usb_put_hcd(hcd);
211 }
212
213 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
214 enum fsl_usb2_phy_modes phy_mode,
215 unsigned int port_offset)
216 {
217 u32 portsc;
218 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
219 void __iomem *non_ehci = hcd->regs;
220 struct device *dev = hcd->self.controller;
221 struct fsl_usb2_platform_data *pdata = dev->platform_data;
222
223 if (pdata->controller_ver < 0) {
224 dev_warn(hcd->self.controller, "Could not get controller version\n");
225 return -ENODEV;
226 }
227
228 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
229 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
230
231 switch (phy_mode) {
232 case FSL_USB2_PHY_ULPI:
233 if (pdata->have_sysif_regs && pdata->controller_ver) {
234 /* controller version 1.6 or above */
235 clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
236 setbits32(non_ehci + FSL_SOC_USB_CTRL,
237 ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
238 }
239 portsc |= PORT_PTS_ULPI;
240 break;
241 case FSL_USB2_PHY_SERIAL:
242 portsc |= PORT_PTS_SERIAL;
243 break;
244 case FSL_USB2_PHY_UTMI_WIDE:
245 portsc |= PORT_PTS_PTW;
246 /* fall through */
247 case FSL_USB2_PHY_UTMI:
248 if (pdata->have_sysif_regs && pdata->controller_ver) {
249 /* controller version 1.6 or above */
250 setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
251 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
252 become stable - 10ms*/
253 }
254 /* enable UTMI PHY */
255 if (pdata->have_sysif_regs)
256 setbits32(non_ehci + FSL_SOC_USB_CTRL,
257 CTRL_UTMI_PHY_EN);
258 portsc |= PORT_PTS_UTMI;
259 break;
260 case FSL_USB2_PHY_NONE:
261 break;
262 }
263
264 if (pdata->have_sysif_regs &&
265 pdata->controller_ver > FSL_USB_VER_1_6 &&
266 (phy_mode == FSL_USB2_PHY_ULPI)) {
267 /* check PHY_CLK_VALID to get phy clk valid */
268 if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
269 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) {
270 printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
271 return -EINVAL;
272 }
273 }
274
275 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
276
277 if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
278 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
279
280 return 0;
281 }
282
283 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
284 {
285 struct usb_hcd *hcd = ehci_to_hcd(ehci);
286 struct fsl_usb2_platform_data *pdata;
287 void __iomem *non_ehci = hcd->regs;
288
289 pdata = hcd->self.controller->platform_data;
290
291 if (pdata->have_sysif_regs) {
292 /*
293 * Turn on cache snooping hardware, since some PowerPC platforms
294 * wholly rely on hardware to deal with cache coherent
295 */
296
297 /* Setup Snooping for all the 4GB space */
298 /* SNOOP1 starts from 0x0, size 2G */
299 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
300 /* SNOOP2 starts from 0x80000000, size 2G */
301 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
302 }
303
304 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
305 (pdata->operating_mode == FSL_USB2_DR_OTG))
306 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
307 return -EINVAL;
308
309 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
310 unsigned int chip, rev, svr;
311
312 svr = mfspr(SPRN_SVR);
313 chip = svr >> 16;
314 rev = (svr >> 4) & 0xf;
315
316 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
317 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
318 ehci->has_fsl_port_bug = 1;
319
320 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
321 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
322 return -EINVAL;
323
324 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
325 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
326 return -EINVAL;
327 }
328
329 if (pdata->have_sysif_regs) {
330 #ifdef CONFIG_FSL_SOC_BOOKE
331 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
332 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
333 #else
334 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
335 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
336 #endif
337 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
338 }
339
340 return 0;
341 }
342
343 /* called after powerup, by probe or system-pm "wakeup" */
344 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
345 {
346 if (ehci_fsl_usb_setup(ehci))
347 return -EINVAL;
348
349 return 0;
350 }
351
352 /* called during probe() after chip reset completes */
353 static int ehci_fsl_setup(struct usb_hcd *hcd)
354 {
355 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
356 int retval;
357 struct fsl_usb2_platform_data *pdata;
358 struct device *dev;
359
360 dev = hcd->self.controller;
361 pdata = hcd->self.controller->platform_data;
362 ehci->big_endian_desc = pdata->big_endian_desc;
363 ehci->big_endian_mmio = pdata->big_endian_mmio;
364
365 /* EHCI registers start at offset 0x100 */
366 ehci->caps = hcd->regs + 0x100;
367
368 #ifdef CONFIG_PPC_83xx
369 /*
370 * Deal with MPC834X that need port power to be cycled after the power
371 * fault condition is removed. Otherwise the state machine does not
372 * reflect PORTSC[CSC] correctly.
373 */
374 ehci->need_oc_pp_cycle = 1;
375 #endif
376
377 hcd->has_tt = 1;
378
379 retval = ehci_setup(hcd);
380 if (retval)
381 return retval;
382
383 if (of_device_is_compatible(dev->parent->of_node,
384 "fsl,mpc5121-usb2-dr")) {
385 /*
386 * set SBUSCFG:AHBBRST so that control msgs don't
387 * fail when doing heavy PATA writes.
388 */
389 ehci_writel(ehci, SBUSCFG_INCR8,
390 hcd->regs + FSL_SOC_USB_SBUSCFG);
391 }
392
393 retval = ehci_fsl_reinit(ehci);
394 return retval;
395 }
396
397 struct ehci_fsl {
398 struct ehci_hcd ehci;
399
400 #ifdef CONFIG_PM
401 /* Saved USB PHY settings, need to restore after deep sleep. */
402 u32 usb_ctrl;
403 #endif
404 };
405
406 #ifdef CONFIG_PM
407
408 #ifdef CONFIG_PPC_MPC512x
409 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
410 {
411 struct usb_hcd *hcd = dev_get_drvdata(dev);
412 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
413 struct fsl_usb2_platform_data *pdata = dev->platform_data;
414 u32 tmp;
415
416 #ifdef DEBUG
417 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
418 mode &= USBMODE_CM_MASK;
419 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
420
421 dev_dbg(dev, "suspend=%d already_suspended=%d "
422 "mode=%d usbcmd %08x\n", pdata->suspended,
423 pdata->already_suspended, mode, tmp);
424 #endif
425
426 /*
427 * If the controller is already suspended, then this must be a
428 * PM suspend. Remember this fact, so that we will leave the
429 * controller suspended at PM resume time.
430 */
431 if (pdata->suspended) {
432 dev_dbg(dev, "already suspended, leaving early\n");
433 pdata->already_suspended = 1;
434 return 0;
435 }
436
437 dev_dbg(dev, "suspending...\n");
438
439 ehci->rh_state = EHCI_RH_SUSPENDED;
440 dev->power.power_state = PMSG_SUSPEND;
441
442 /* ignore non-host interrupts */
443 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
444
445 /* stop the controller */
446 tmp = ehci_readl(ehci, &ehci->regs->command);
447 tmp &= ~CMD_RUN;
448 ehci_writel(ehci, tmp, &ehci->regs->command);
449
450 /* save EHCI registers */
451 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
452 pdata->pm_command &= ~CMD_RUN;
453 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
454 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
455 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
456 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
457 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
458 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
459 pdata->pm_configured_flag =
460 ehci_readl(ehci, &ehci->regs->configured_flag);
461 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
462 pdata->pm_usbgenctrl = ehci_readl(ehci,
463 hcd->regs + FSL_SOC_USB_USBGENCTRL);
464
465 /* clear the W1C bits */
466 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
467
468 pdata->suspended = 1;
469
470 /* clear PP to cut power to the port */
471 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
472 tmp &= ~PORT_POWER;
473 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
474
475 return 0;
476 }
477
478 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
479 {
480 struct usb_hcd *hcd = dev_get_drvdata(dev);
481 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
482 struct fsl_usb2_platform_data *pdata = dev->platform_data;
483 u32 tmp;
484
485 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
486 pdata->suspended, pdata->already_suspended);
487
488 /*
489 * If the controller was already suspended at suspend time,
490 * then don't resume it now.
491 */
492 if (pdata->already_suspended) {
493 dev_dbg(dev, "already suspended, leaving early\n");
494 pdata->already_suspended = 0;
495 return 0;
496 }
497
498 if (!pdata->suspended) {
499 dev_dbg(dev, "not suspended, leaving early\n");
500 return 0;
501 }
502
503 pdata->suspended = 0;
504
505 dev_dbg(dev, "resuming...\n");
506
507 /* set host mode */
508 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
509 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
510
511 ehci_writel(ehci, pdata->pm_usbgenctrl,
512 hcd->regs + FSL_SOC_USB_USBGENCTRL);
513 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
514 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
515
516 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
517
518 /* restore EHCI registers */
519 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
520 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
521 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
522 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
523 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
524 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
525 ehci_writel(ehci, pdata->pm_configured_flag,
526 &ehci->regs->configured_flag);
527 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
528
529 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
530 ehci->rh_state = EHCI_RH_RUNNING;
531 dev->power.power_state = PMSG_ON;
532
533 tmp = ehci_readl(ehci, &ehci->regs->command);
534 tmp |= CMD_RUN;
535 ehci_writel(ehci, tmp, &ehci->regs->command);
536
537 usb_hcd_resume_root_hub(hcd);
538
539 return 0;
540 }
541 #else
542 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
543 {
544 return 0;
545 }
546
547 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
548 {
549 return 0;
550 }
551 #endif /* CONFIG_PPC_MPC512x */
552
553 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
554 {
555 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
556
557 return container_of(ehci, struct ehci_fsl, ehci);
558 }
559
560 static int ehci_fsl_drv_suspend(struct device *dev)
561 {
562 struct usb_hcd *hcd = dev_get_drvdata(dev);
563 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
564 void __iomem *non_ehci = hcd->regs;
565
566 if (of_device_is_compatible(dev->parent->of_node,
567 "fsl,mpc5121-usb2-dr")) {
568 return ehci_fsl_mpc512x_drv_suspend(dev);
569 }
570
571 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
572 device_may_wakeup(dev));
573 if (!fsl_deep_sleep())
574 return 0;
575
576 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
577 return 0;
578 }
579
580 static int ehci_fsl_drv_resume(struct device *dev)
581 {
582 struct usb_hcd *hcd = dev_get_drvdata(dev);
583 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
584 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
585 void __iomem *non_ehci = hcd->regs;
586
587 if (of_device_is_compatible(dev->parent->of_node,
588 "fsl,mpc5121-usb2-dr")) {
589 return ehci_fsl_mpc512x_drv_resume(dev);
590 }
591
592 ehci_prepare_ports_for_controller_resume(ehci);
593 if (!fsl_deep_sleep())
594 return 0;
595
596 usb_root_hub_lost_power(hcd->self.root_hub);
597
598 /* Restore USB PHY settings and enable the controller. */
599 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
600
601 ehci_reset(ehci);
602 ehci_fsl_reinit(ehci);
603
604 return 0;
605 }
606
607 static int ehci_fsl_drv_restore(struct device *dev)
608 {
609 struct usb_hcd *hcd = dev_get_drvdata(dev);
610
611 usb_root_hub_lost_power(hcd->self.root_hub);
612 return 0;
613 }
614
615 static struct dev_pm_ops ehci_fsl_pm_ops = {
616 .suspend = ehci_fsl_drv_suspend,
617 .resume = ehci_fsl_drv_resume,
618 .restore = ehci_fsl_drv_restore,
619 };
620
621 #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
622 #else
623 #define EHCI_FSL_PM_OPS NULL
624 #endif /* CONFIG_PM */
625
626 #ifdef CONFIG_USB_OTG
627 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
628 {
629 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
630 u32 status;
631
632 if (!port)
633 return -EINVAL;
634
635 port--;
636
637 /* start port reset before HNP protocol time out */
638 status = readl(&ehci->regs->port_status[port]);
639 if (!(status & PORT_CONNECT))
640 return -ENODEV;
641
642 /* khubd will finish the reset later */
643 if (ehci_is_TDI(ehci)) {
644 writel(PORT_RESET |
645 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
646 &ehci->regs->port_status[port]);
647 } else {
648 writel(PORT_RESET, &ehci->regs->port_status[port]);
649 }
650
651 return 0;
652 }
653 #else
654 #define ehci_start_port_reset NULL
655 #endif /* CONFIG_USB_OTG */
656
657
658 static const struct hc_driver ehci_fsl_hc_driver = {
659 .description = hcd_name,
660 .product_desc = "Freescale On-Chip EHCI Host Controller",
661 .hcd_priv_size = sizeof(struct ehci_fsl),
662
663 /*
664 * generic hardware linkage
665 */
666 .irq = ehci_irq,
667 .flags = HCD_USB2 | HCD_MEMORY,
668
669 /*
670 * basic lifecycle operations
671 */
672 .reset = ehci_fsl_setup,
673 .start = ehci_run,
674 .stop = ehci_stop,
675 .shutdown = ehci_shutdown,
676
677 /*
678 * managing i/o requests and associated device resources
679 */
680 .urb_enqueue = ehci_urb_enqueue,
681 .urb_dequeue = ehci_urb_dequeue,
682 .endpoint_disable = ehci_endpoint_disable,
683 .endpoint_reset = ehci_endpoint_reset,
684
685 /*
686 * scheduling support
687 */
688 .get_frame_number = ehci_get_frame,
689
690 /*
691 * root hub support
692 */
693 .hub_status_data = ehci_hub_status_data,
694 .hub_control = ehci_hub_control,
695 .bus_suspend = ehci_bus_suspend,
696 .bus_resume = ehci_bus_resume,
697 .start_port_reset = ehci_start_port_reset,
698 .relinquish_port = ehci_relinquish_port,
699 .port_handed_over = ehci_port_handed_over,
700
701 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
702 };
703
704 static int ehci_fsl_drv_probe(struct platform_device *pdev)
705 {
706 if (usb_disabled())
707 return -ENODEV;
708
709 /* FIXME we only want one one probe() not two */
710 return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
711 }
712
713 static int ehci_fsl_drv_remove(struct platform_device *pdev)
714 {
715 struct usb_hcd *hcd = platform_get_drvdata(pdev);
716
717 /* FIXME we only want one one remove() not two */
718 usb_hcd_fsl_remove(hcd, pdev);
719 return 0;
720 }
721
722 MODULE_ALIAS("platform:fsl-ehci");
723
724 static struct platform_driver ehci_fsl_driver = {
725 .probe = ehci_fsl_drv_probe,
726 .remove = ehci_fsl_drv_remove,
727 .shutdown = usb_hcd_platform_shutdown,
728 .driver = {
729 .name = "fsl-ehci",
730 .pm = EHCI_FSL_PM_OPS,
731 },
732 };