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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / gadget / lh7a40x_udc.c
1 /*
2 * linux/drivers/usb/gadget/lh7a40x_udc.c
3 * Sharp LH7A40x on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
6 * Copyright (C) 2004 Bo Henriksen, Nordic ID
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24 #include <linux/platform_device.h>
25
26 #include "lh7a40x_udc.h"
27
28 //#define DEBUG printk
29 //#define DEBUG_EP0 printk
30 //#define DEBUG_SETUP printk
31
32 #ifndef DEBUG_EP0
33 # define DEBUG_EP0(fmt,args...)
34 #endif
35 #ifndef DEBUG_SETUP
36 # define DEBUG_SETUP(fmt,args...)
37 #endif
38 #ifndef DEBUG
39 # define NO_STATES
40 # define DEBUG(fmt,args...)
41 #endif
42
43 #define DRIVER_DESC "LH7A40x USB Device Controller"
44 #define DRIVER_VERSION __DATE__
45
46 #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
47 #define _BIT(x) (1<<(x))
48 #endif
49
50 struct lh7a40x_udc *the_controller;
51
52 static const char driver_name[] = "lh7a40x_udc";
53 static const char driver_desc[] = DRIVER_DESC;
54 static const char ep0name[] = "ep0-control";
55
56 /*
57 Local definintions.
58 */
59
60 #ifndef NO_STATES
61 static char *state_names[] = {
62 "WAIT_FOR_SETUP",
63 "DATA_STATE_XMIT",
64 "DATA_STATE_NEED_ZLP",
65 "WAIT_FOR_OUT_STATUS",
66 "DATA_STATE_RECV"
67 };
68 #endif
69
70 /*
71 Local declarations.
72 */
73 static int lh7a40x_ep_enable(struct usb_ep *ep,
74 const struct usb_endpoint_descriptor *);
75 static int lh7a40x_ep_disable(struct usb_ep *ep);
76 static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
77 static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
78 static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned, dma_addr_t *,
79 gfp_t);
80 static void lh7a40x_free_buffer(struct usb_ep *ep, void *, dma_addr_t,
81 unsigned);
82 static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
83 static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
84 static int lh7a40x_set_halt(struct usb_ep *ep, int);
85 static int lh7a40x_fifo_status(struct usb_ep *ep);
86 static int lh7a40x_fifo_status(struct usb_ep *ep);
87 static void lh7a40x_fifo_flush(struct usb_ep *ep);
88 static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
89 static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
90
91 static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
92 int status);
93 static void pio_irq_enable(int bEndpointAddress);
94 static void pio_irq_disable(int bEndpointAddress);
95 static void stop_activity(struct lh7a40x_udc *dev,
96 struct usb_gadget_driver *driver);
97 static void flush(struct lh7a40x_ep *ep);
98 static void udc_enable(struct lh7a40x_udc *dev);
99 static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
100
101 static struct usb_ep_ops lh7a40x_ep_ops = {
102 .enable = lh7a40x_ep_enable,
103 .disable = lh7a40x_ep_disable,
104
105 .alloc_request = lh7a40x_alloc_request,
106 .free_request = lh7a40x_free_request,
107
108 .alloc_buffer = lh7a40x_alloc_buffer,
109 .free_buffer = lh7a40x_free_buffer,
110
111 .queue = lh7a40x_queue,
112 .dequeue = lh7a40x_dequeue,
113
114 .set_halt = lh7a40x_set_halt,
115 .fifo_status = lh7a40x_fifo_status,
116 .fifo_flush = lh7a40x_fifo_flush,
117 };
118
119 /* Inline code */
120
121 static __inline__ int write_packet(struct lh7a40x_ep *ep,
122 struct lh7a40x_request *req, int max)
123 {
124 u8 *buf;
125 int length, count;
126 volatile u32 *fifo = (volatile u32 *)ep->fifo;
127
128 buf = req->req.buf + req->req.actual;
129 prefetch(buf);
130
131 length = req->req.length - req->req.actual;
132 length = min(length, max);
133 req->req.actual += length;
134
135 DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
136
137 count = length;
138 while (count--) {
139 *fifo = *buf++;
140 }
141
142 return length;
143 }
144
145 static __inline__ void usb_set_index(u32 ep)
146 {
147 *(volatile u32 *)io_p2v(USB_INDEX) = ep;
148 }
149
150 static __inline__ u32 usb_read(u32 port)
151 {
152 return *(volatile u32 *)io_p2v(port);
153 }
154
155 static __inline__ void usb_write(u32 val, u32 port)
156 {
157 *(volatile u32 *)io_p2v(port) = val;
158 }
159
160 static __inline__ void usb_set(u32 val, u32 port)
161 {
162 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
163 u32 after = (*ioport) | val;
164 *ioport = after;
165 }
166
167 static __inline__ void usb_clear(u32 val, u32 port)
168 {
169 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
170 u32 after = (*ioport) & ~val;
171 *ioport = after;
172 }
173
174 /*-------------------------------------------------------------------------*/
175
176 #define GPIO_PORTC_DR (0x80000E08)
177 #define GPIO_PORTC_DDR (0x80000E18)
178 #define GPIO_PORTC_PDR (0x80000E70)
179
180 /* get port C pin data register */
181 #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
182 /* get port C data direction register */
183 #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
184 /* set port C data register */
185 #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
186 /* set port C data direction register */
187 #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
188
189 /*
190 * LPD7A404 GPIO's:
191 * Port C bit 1 = USB Port 1 Power Enable
192 * Port C bit 2 = USB Port 1 Data Carrier Detect
193 */
194 #define is_usb_connected() get_portc_pdr(2)
195
196 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
197
198 static const char proc_node_name[] = "driver/udc";
199
200 static int
201 udc_proc_read(char *page, char **start, off_t off, int count,
202 int *eof, void *_dev)
203 {
204 char *buf = page;
205 struct lh7a40x_udc *dev = _dev;
206 char *next = buf;
207 unsigned size = count;
208 unsigned long flags;
209 int t;
210
211 if (off != 0)
212 return 0;
213
214 local_irq_save(flags);
215
216 /* basic device status */
217 t = scnprintf(next, size,
218 DRIVER_DESC "\n"
219 "%s version: %s\n"
220 "Gadget driver: %s\n"
221 "Host: %s\n\n",
222 driver_name, DRIVER_VERSION,
223 dev->driver ? dev->driver->driver.name : "(none)",
224 is_usb_connected()? "full speed" : "disconnected");
225 size -= t;
226 next += t;
227
228 t = scnprintf(next, size,
229 "GPIO:\n"
230 " Port C bit 1: %d, dir %d\n"
231 " Port C bit 2: %d, dir %d\n\n",
232 get_portc_pdr(1), get_portc_ddr(1),
233 get_portc_pdr(2), get_portc_ddr(2)
234 );
235 size -= t;
236 next += t;
237
238 t = scnprintf(next, size,
239 "DCP pullup: %d\n\n",
240 (usb_read(USB_PM) & PM_USB_DCP) != 0);
241 size -= t;
242 next += t;
243
244 local_irq_restore(flags);
245 *eof = 1;
246 return count - size;
247 }
248
249 #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
250 #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
251
252 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
253
254 #define create_proc_files() do {} while (0)
255 #define remove_proc_files() do {} while (0)
256
257 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
258
259 /*
260 * udc_disable - disable USB device controller
261 */
262 static void udc_disable(struct lh7a40x_udc *dev)
263 {
264 DEBUG("%s, %p\n", __FUNCTION__, dev);
265
266 udc_set_address(dev, 0);
267
268 /* Disable interrupts */
269 usb_write(0, USB_IN_INT_EN);
270 usb_write(0, USB_OUT_INT_EN);
271 usb_write(0, USB_INT_EN);
272
273 /* Disable the USB */
274 usb_write(0, USB_PM);
275
276 #ifdef CONFIG_ARCH_LH7A404
277 /* Disable USB power */
278 set_portc_dr(1, 0);
279 #endif
280
281 /* if hardware supports it, disconnect from usb */
282 /* make_usb_disappear(); */
283
284 dev->ep0state = WAIT_FOR_SETUP;
285 dev->gadget.speed = USB_SPEED_UNKNOWN;
286 dev->usb_address = 0;
287 }
288
289 /*
290 * udc_reinit - initialize software state
291 */
292 static void udc_reinit(struct lh7a40x_udc *dev)
293 {
294 u32 i;
295
296 DEBUG("%s, %p\n", __FUNCTION__, dev);
297
298 /* device/ep0 records init */
299 INIT_LIST_HEAD(&dev->gadget.ep_list);
300 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
301 dev->ep0state = WAIT_FOR_SETUP;
302
303 /* basic endpoint records init */
304 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
305 struct lh7a40x_ep *ep = &dev->ep[i];
306
307 if (i != 0)
308 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
309
310 ep->desc = 0;
311 ep->stopped = 0;
312 INIT_LIST_HEAD(&ep->queue);
313 ep->pio_irqs = 0;
314 }
315
316 /* the rest was statically initialized, and is read-only */
317 }
318
319 #define BYTES2MAXP(x) (x / 8)
320 #define MAXP2BYTES(x) (x * 8)
321
322 /* until it's enabled, this UDC should be completely invisible
323 * to any USB host.
324 */
325 static void udc_enable(struct lh7a40x_udc *dev)
326 {
327 int ep;
328
329 DEBUG("%s, %p\n", __FUNCTION__, dev);
330
331 dev->gadget.speed = USB_SPEED_UNKNOWN;
332
333 #ifdef CONFIG_ARCH_LH7A404
334 /* Set Port C bit 1 & 2 as output */
335 set_portc_ddr(1, 1);
336 set_portc_ddr(2, 1);
337
338 /* Enable USB power */
339 set_portc_dr(1, 0);
340 #endif
341
342 /*
343 * C.f Chapter 18.1.3.1 Initializing the USB
344 */
345
346 /* Disable the USB */
347 usb_clear(PM_USB_ENABLE, USB_PM);
348
349 /* Reset APB & I/O sides of the USB */
350 usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
351 mdelay(5);
352 usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
353
354 /* Set MAXP values for each */
355 for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
356 struct lh7a40x_ep *ep_reg = &dev->ep[ep];
357 u32 csr;
358
359 usb_set_index(ep);
360
361 switch (ep_reg->ep_type) {
362 case ep_bulk_in:
363 case ep_interrupt:
364 usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
365 ep_reg->csr2);
366 /* Fall through */
367 case ep_control:
368 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
369 USB_IN_MAXP);
370 break;
371 case ep_bulk_out:
372 usb_clear(USB_OUT_CSR2_USB_DMA_EN |
373 USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
374 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
375 USB_OUT_MAXP);
376 break;
377 }
378
379 /* Read & Write CSR1, just in case */
380 csr = usb_read(ep_reg->csr1);
381 usb_write(csr, ep_reg->csr1);
382
383 flush(ep_reg);
384 }
385
386 /* Disable interrupts */
387 usb_write(0, USB_IN_INT_EN);
388 usb_write(0, USB_OUT_INT_EN);
389 usb_write(0, USB_INT_EN);
390
391 /* Enable interrupts */
392 usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
393 usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
394 /* Dont enable rest of the interrupts */
395 /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
396 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
397
398 /* Enable SUSPEND */
399 usb_set(PM_ENABLE_SUSPEND, USB_PM);
400
401 /* Enable the USB */
402 usb_set(PM_USB_ENABLE, USB_PM);
403
404 #ifdef CONFIG_ARCH_LH7A404
405 /* NOTE: DOES NOT WORK! */
406 /* Let host detect UDC:
407 * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
408 * transistor on and pull the USBDP pin HIGH.
409 */
410 /* usb_clear(PM_USB_DCP, USB_PM);
411 usb_set(PM_USB_DCP, USB_PM); */
412 #endif
413 }
414
415 /*
416 Register entry point for the peripheral controller driver.
417 */
418 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
419 {
420 struct lh7a40x_udc *dev = the_controller;
421 int retval;
422
423 DEBUG("%s: %s\n", __FUNCTION__, driver->driver.name);
424
425 if (!driver
426 || driver->speed != USB_SPEED_FULL
427 || !driver->bind
428 || !driver->unbind || !driver->disconnect || !driver->setup)
429 return -EINVAL;
430 if (!dev)
431 return -ENODEV;
432 if (dev->driver)
433 return -EBUSY;
434
435 /* first hook up the driver ... */
436 dev->driver = driver;
437 dev->gadget.dev.driver = &driver->driver;
438
439 device_add(&dev->gadget.dev);
440 retval = driver->bind(&dev->gadget);
441 if (retval) {
442 printk("%s: bind to driver %s --> error %d\n", dev->gadget.name,
443 driver->driver.name, retval);
444 device_del(&dev->gadget.dev);
445
446 dev->driver = 0;
447 dev->gadget.dev.driver = 0;
448 return retval;
449 }
450
451 /* ... then enable host detection and ep0; and we're ready
452 * for set_configuration as well as eventual disconnect.
453 * NOTE: this shouldn't power up until later.
454 */
455 printk("%s: registered gadget driver '%s'\n", dev->gadget.name,
456 driver->driver.name);
457
458 udc_enable(dev);
459
460 return 0;
461 }
462
463 EXPORT_SYMBOL(usb_gadget_register_driver);
464
465 /*
466 Unregister entry point for the peripheral controller driver.
467 */
468 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
469 {
470 struct lh7a40x_udc *dev = the_controller;
471 unsigned long flags;
472
473 if (!dev)
474 return -ENODEV;
475 if (!driver || driver != dev->driver)
476 return -EINVAL;
477
478 spin_lock_irqsave(&dev->lock, flags);
479 dev->driver = 0;
480 stop_activity(dev, driver);
481 spin_unlock_irqrestore(&dev->lock, flags);
482
483 driver->unbind(&dev->gadget);
484 device_del(&dev->gadget.dev);
485
486 udc_disable(dev);
487
488 DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
489 return 0;
490 }
491
492 EXPORT_SYMBOL(usb_gadget_unregister_driver);
493
494 /*-------------------------------------------------------------------------*/
495
496 /** Write request to FIFO (max write == maxp size)
497 * Return: 0 = still running, 1 = completed, negative = errno
498 * NOTE: INDEX register must be set for EP
499 */
500 static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
501 {
502 u32 max;
503 u32 csr;
504
505 max = le16_to_cpu(ep->desc->wMaxPacketSize);
506
507 csr = usb_read(ep->csr1);
508 DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
509
510 if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
511 unsigned count;
512 int is_last, is_short;
513
514 count = write_packet(ep, req, max);
515 usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
516
517 /* last packet is usually short (or a zlp) */
518 if (unlikely(count != max))
519 is_last = is_short = 1;
520 else {
521 if (likely(req->req.length != req->req.actual)
522 || req->req.zero)
523 is_last = 0;
524 else
525 is_last = 1;
526 /* interrupt/iso maxpacket may not fill the fifo */
527 is_short = unlikely(max < ep_maxpacket(ep));
528 }
529
530 DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __FUNCTION__,
531 ep->ep.name, count,
532 is_last ? "/L" : "", is_short ? "/S" : "",
533 req->req.length - req->req.actual, req);
534
535 /* requests complete when all IN data is in the FIFO */
536 if (is_last) {
537 done(ep, req, 0);
538 if (list_empty(&ep->queue)) {
539 pio_irq_disable(ep_index(ep));
540 }
541 return 1;
542 }
543 } else {
544 DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
545 }
546
547 return 0;
548 }
549
550 /** Read to request from FIFO (max read == bytes in fifo)
551 * Return: 0 = still running, 1 = completed, negative = errno
552 * NOTE: INDEX register must be set for EP
553 */
554 static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
555 {
556 u32 csr;
557 u8 *buf;
558 unsigned bufferspace, count, is_short;
559 volatile u32 *fifo = (volatile u32 *)ep->fifo;
560
561 /* make sure there's a packet in the FIFO. */
562 csr = usb_read(ep->csr1);
563 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
564 DEBUG("%s: Packet NOT ready!\n", __FUNCTION__);
565 return -EINVAL;
566 }
567
568 buf = req->req.buf + req->req.actual;
569 prefetchw(buf);
570 bufferspace = req->req.length - req->req.actual;
571
572 /* read all bytes from this packet */
573 count = usb_read(USB_OUT_FIFO_WC1);
574 req->req.actual += min(count, bufferspace);
575
576 is_short = (count < ep->ep.maxpacket);
577 DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
578 ep->ep.name, csr, count,
579 is_short ? "/S" : "", req, req->req.actual, req->req.length);
580
581 while (likely(count-- != 0)) {
582 u8 byte = (u8) (*fifo & 0xff);
583
584 if (unlikely(bufferspace == 0)) {
585 /* this happens when the driver's buffer
586 * is smaller than what the host sent.
587 * discard the extra data.
588 */
589 if (req->req.status != -EOVERFLOW)
590 printk("%s overflow %d\n", ep->ep.name, count);
591 req->req.status = -EOVERFLOW;
592 } else {
593 *buf++ = byte;
594 bufferspace--;
595 }
596 }
597
598 usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
599
600 /* completion */
601 if (is_short || req->req.actual == req->req.length) {
602 done(ep, req, 0);
603 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
604
605 if (list_empty(&ep->queue))
606 pio_irq_disable(ep_index(ep));
607 return 1;
608 }
609
610 /* finished that packet. the next one may be waiting... */
611 return 0;
612 }
613
614 /*
615 * done - retire a request; caller blocked irqs
616 * INDEX register is preserved to keep same
617 */
618 static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
619 {
620 unsigned int stopped = ep->stopped;
621 u32 index;
622
623 DEBUG("%s, %p\n", __FUNCTION__, ep);
624 list_del_init(&req->queue);
625
626 if (likely(req->req.status == -EINPROGRESS))
627 req->req.status = status;
628 else
629 status = req->req.status;
630
631 if (status && status != -ESHUTDOWN)
632 DEBUG("complete %s req %p stat %d len %u/%u\n",
633 ep->ep.name, &req->req, status,
634 req->req.actual, req->req.length);
635
636 /* don't modify queue heads during completion callback */
637 ep->stopped = 1;
638 /* Read current index (completion may modify it) */
639 index = usb_read(USB_INDEX);
640
641 spin_unlock(&ep->dev->lock);
642 req->req.complete(&ep->ep, &req->req);
643 spin_lock(&ep->dev->lock);
644
645 /* Restore index */
646 usb_set_index(index);
647 ep->stopped = stopped;
648 }
649
650 /** Enable EP interrupt */
651 static void pio_irq_enable(int ep)
652 {
653 DEBUG("%s: %d\n", __FUNCTION__, ep);
654
655 switch (ep) {
656 case 1:
657 usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
658 break;
659 case 2:
660 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
661 break;
662 case 3:
663 usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
664 break;
665 default:
666 DEBUG("Unknown endpoint: %d\n", ep);
667 break;
668 }
669 }
670
671 /** Disable EP interrupt */
672 static void pio_irq_disable(int ep)
673 {
674 DEBUG("%s: %d\n", __FUNCTION__, ep);
675
676 switch (ep) {
677 case 1:
678 usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
679 break;
680 case 2:
681 usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
682 break;
683 case 3:
684 usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
685 break;
686 default:
687 DEBUG("Unknown endpoint: %d\n", ep);
688 break;
689 }
690 }
691
692 /*
693 * nuke - dequeue ALL requests
694 */
695 void nuke(struct lh7a40x_ep *ep, int status)
696 {
697 struct lh7a40x_request *req;
698
699 DEBUG("%s, %p\n", __FUNCTION__, ep);
700
701 /* Flush FIFO */
702 flush(ep);
703
704 /* called with irqs blocked */
705 while (!list_empty(&ep->queue)) {
706 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
707 done(ep, req, status);
708 }
709
710 /* Disable IRQ if EP is enabled (has descriptor) */
711 if (ep->desc)
712 pio_irq_disable(ep_index(ep));
713 }
714
715 /*
716 void nuke_all(struct lh7a40x_udc *dev)
717 {
718 int n;
719 for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
720 struct lh7a40x_ep *ep = &dev->ep[n];
721 usb_set_index(n);
722 nuke(ep, 0);
723 }
724 }*/
725
726 /*
727 static void flush_all(struct lh7a40x_udc *dev)
728 {
729 int n;
730 for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
731 {
732 struct lh7a40x_ep *ep = &dev->ep[n];
733 flush(ep);
734 }
735 }
736 */
737
738 /** Flush EP
739 * NOTE: INDEX register must be set before this call
740 */
741 static void flush(struct lh7a40x_ep *ep)
742 {
743 DEBUG("%s, %p\n", __FUNCTION__, ep);
744
745 switch (ep->ep_type) {
746 case ep_control:
747 /* check, by implication c.f. 15.1.2.11 */
748 break;
749
750 case ep_bulk_in:
751 case ep_interrupt:
752 /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
753 usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
754 break;
755
756 case ep_bulk_out:
757 /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
758 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
759 break;
760 }
761 }
762
763 /**
764 * lh7a40x_in_epn - handle IN interrupt
765 */
766 static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
767 {
768 u32 csr;
769 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
770 struct lh7a40x_request *req;
771
772 usb_set_index(ep_idx);
773
774 csr = usb_read(ep->csr1);
775 DEBUG("%s: %d, csr %x\n", __FUNCTION__, ep_idx, csr);
776
777 if (csr & USB_IN_CSR1_SENT_STALL) {
778 DEBUG("USB_IN_CSR1_SENT_STALL\n");
779 usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
780 ep->csr1);
781 return;
782 }
783
784 if (!ep->desc) {
785 DEBUG("%s: NO EP DESC\n", __FUNCTION__);
786 return;
787 }
788
789 if (list_empty(&ep->queue))
790 req = 0;
791 else
792 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
793
794 DEBUG("req: %p\n", req);
795
796 if (!req)
797 return;
798
799 write_fifo(ep, req);
800 }
801
802 /* ********************************************************************************************* */
803 /* Bulk OUT (recv)
804 */
805
806 static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
807 {
808 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
809 struct lh7a40x_request *req;
810
811 DEBUG("%s: %d\n", __FUNCTION__, ep_idx);
812
813 usb_set_index(ep_idx);
814
815 if (ep->desc) {
816 u32 csr;
817 csr = usb_read(ep->csr1);
818
819 while ((csr =
820 usb_read(ep->
821 csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
822 USB_OUT_CSR1_SENT_STALL)) {
823 DEBUG("%s: %x\n", __FUNCTION__, csr);
824
825 if (csr & USB_OUT_CSR1_SENT_STALL) {
826 DEBUG("%s: stall sent, flush fifo\n",
827 __FUNCTION__);
828 /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
829 flush(ep);
830 } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
831 if (list_empty(&ep->queue))
832 req = 0;
833 else
834 req =
835 list_entry(ep->queue.next,
836 struct lh7a40x_request,
837 queue);
838
839 if (!req) {
840 printk("%s: NULL REQ %d\n",
841 __FUNCTION__, ep_idx);
842 flush(ep);
843 break;
844 } else {
845 read_fifo(ep, req);
846 }
847 }
848
849 }
850
851 } else {
852 /* Throw packet away.. */
853 printk("%s: No descriptor?!?\n", __FUNCTION__);
854 flush(ep);
855 }
856 }
857
858 static void stop_activity(struct lh7a40x_udc *dev,
859 struct usb_gadget_driver *driver)
860 {
861 int i;
862
863 /* don't disconnect drivers more than once */
864 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
865 driver = 0;
866 dev->gadget.speed = USB_SPEED_UNKNOWN;
867
868 /* prevent new request submissions, kill any outstanding requests */
869 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
870 struct lh7a40x_ep *ep = &dev->ep[i];
871 ep->stopped = 1;
872
873 usb_set_index(i);
874 nuke(ep, -ESHUTDOWN);
875 }
876
877 /* report disconnect; the driver is already quiesced */
878 if (driver) {
879 spin_unlock(&dev->lock);
880 driver->disconnect(&dev->gadget);
881 spin_lock(&dev->lock);
882 }
883
884 /* re-init driver-visible data structures */
885 udc_reinit(dev);
886 }
887
888 /** Handle USB RESET interrupt
889 */
890 static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
891 {
892 #if 0 /* def CONFIG_ARCH_LH7A404 */
893 /* Does not work always... */
894
895 DEBUG("%s: %d\n", __FUNCTION__, dev->usb_address);
896
897 if (!dev->usb_address) {
898 /*usb_set(USB_RESET_IO, USB_RESET);
899 mdelay(5);
900 usb_clear(USB_RESET_IO, USB_RESET); */
901 return;
902 }
903 /* Put the USB controller into reset. */
904 usb_set(USB_RESET_IO, USB_RESET);
905
906 /* Set Device ID to 0 */
907 udc_set_address(dev, 0);
908
909 /* Let PLL2 settle down */
910 mdelay(5);
911
912 /* Release the USB controller from reset */
913 usb_clear(USB_RESET_IO, USB_RESET);
914
915 /* Re-enable UDC */
916 udc_enable(dev);
917
918 #endif
919 dev->gadget.speed = USB_SPEED_FULL;
920 }
921
922 /*
923 * lh7a40x usb client interrupt handler.
924 */
925 static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
926 {
927 struct lh7a40x_udc *dev = _dev;
928
929 DEBUG("\n\n");
930
931 spin_lock(&dev->lock);
932
933 for (;;) {
934 u32 intr_in = usb_read(USB_IN_INT);
935 u32 intr_out = usb_read(USB_OUT_INT);
936 u32 intr_int = usb_read(USB_INT);
937
938 /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
939 u32 in_en = usb_read(USB_IN_INT_EN);
940 u32 out_en = usb_read(USB_OUT_INT_EN);
941
942 if (!intr_out && !intr_in && !intr_int)
943 break;
944
945 DEBUG("%s (on state %s)\n", __FUNCTION__,
946 state_names[dev->ep0state]);
947 DEBUG("intr_out = %x\n", intr_out);
948 DEBUG("intr_in = %x\n", intr_in);
949 DEBUG("intr_int = %x\n", intr_int);
950
951 if (intr_in) {
952 usb_write(intr_in, USB_IN_INT);
953
954 if ((intr_in & USB_IN_INT_EP1)
955 && (in_en & USB_IN_INT_EP1)) {
956 DEBUG("USB_IN_INT_EP1\n");
957 lh7a40x_in_epn(dev, 1, intr_in);
958 }
959 if ((intr_in & USB_IN_INT_EP3)
960 && (in_en & USB_IN_INT_EP3)) {
961 DEBUG("USB_IN_INT_EP3\n");
962 lh7a40x_in_epn(dev, 3, intr_in);
963 }
964 if (intr_in & USB_IN_INT_EP0) {
965 DEBUG("USB_IN_INT_EP0 (control)\n");
966 lh7a40x_handle_ep0(dev, intr_in);
967 }
968 }
969
970 if (intr_out) {
971 usb_write(intr_out, USB_OUT_INT);
972
973 if ((intr_out & USB_OUT_INT_EP2)
974 && (out_en & USB_OUT_INT_EP2)) {
975 DEBUG("USB_OUT_INT_EP2\n");
976 lh7a40x_out_epn(dev, 2, intr_out);
977 }
978 }
979
980 if (intr_int) {
981 usb_write(intr_int, USB_INT);
982
983 if (intr_int & USB_INT_RESET_INT) {
984 lh7a40x_reset_intr(dev);
985 }
986
987 if (intr_int & USB_INT_RESUME_INT) {
988 DEBUG("USB resume\n");
989
990 if (dev->gadget.speed != USB_SPEED_UNKNOWN
991 && dev->driver
992 && dev->driver->resume
993 && is_usb_connected()) {
994 dev->driver->resume(&dev->gadget);
995 }
996 }
997
998 if (intr_int & USB_INT_SUSPEND_INT) {
999 DEBUG("USB suspend%s\n",
1000 is_usb_connected()? "" : "+disconnect");
1001 if (!is_usb_connected()) {
1002 stop_activity(dev, dev->driver);
1003 } else if (dev->gadget.speed !=
1004 USB_SPEED_UNKNOWN && dev->driver
1005 && dev->driver->suspend) {
1006 dev->driver->suspend(&dev->gadget);
1007 }
1008 }
1009
1010 }
1011 }
1012
1013 spin_unlock(&dev->lock);
1014
1015 return IRQ_HANDLED;
1016 }
1017
1018 static int lh7a40x_ep_enable(struct usb_ep *_ep,
1019 const struct usb_endpoint_descriptor *desc)
1020 {
1021 struct lh7a40x_ep *ep;
1022 struct lh7a40x_udc *dev;
1023 unsigned long flags;
1024
1025 DEBUG("%s, %p\n", __FUNCTION__, _ep);
1026
1027 ep = container_of(_ep, struct lh7a40x_ep, ep);
1028 if (!_ep || !desc || ep->desc || _ep->name == ep0name
1029 || desc->bDescriptorType != USB_DT_ENDPOINT
1030 || ep->bEndpointAddress != desc->bEndpointAddress
1031 || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
1032 DEBUG("%s, bad ep or descriptor\n", __FUNCTION__);
1033 return -EINVAL;
1034 }
1035
1036 /* xfer types must match, except that interrupt ~= bulk */
1037 if (ep->bmAttributes != desc->bmAttributes
1038 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
1039 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
1040 DEBUG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
1041 return -EINVAL;
1042 }
1043
1044 /* hardware _could_ do smaller, but driver doesn't */
1045 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
1046 && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
1047 || !desc->wMaxPacketSize) {
1048 DEBUG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
1049 return -ERANGE;
1050 }
1051
1052 dev = ep->dev;
1053 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
1054 DEBUG("%s, bogus device state\n", __FUNCTION__);
1055 return -ESHUTDOWN;
1056 }
1057
1058 spin_lock_irqsave(&ep->dev->lock, flags);
1059
1060 ep->stopped = 0;
1061 ep->desc = desc;
1062 ep->pio_irqs = 0;
1063 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
1064
1065 spin_unlock_irqrestore(&ep->dev->lock, flags);
1066
1067 /* Reset halt state (does flush) */
1068 lh7a40x_set_halt(_ep, 0);
1069
1070 DEBUG("%s: enabled %s\n", __FUNCTION__, _ep->name);
1071 return 0;
1072 }
1073
1074 /** Disable EP
1075 * NOTE: Sets INDEX register
1076 */
1077 static int lh7a40x_ep_disable(struct usb_ep *_ep)
1078 {
1079 struct lh7a40x_ep *ep;
1080 unsigned long flags;
1081
1082 DEBUG("%s, %p\n", __FUNCTION__, _ep);
1083
1084 ep = container_of(_ep, struct lh7a40x_ep, ep);
1085 if (!_ep || !ep->desc) {
1086 DEBUG("%s, %s not enabled\n", __FUNCTION__,
1087 _ep ? ep->ep.name : NULL);
1088 return -EINVAL;
1089 }
1090
1091 spin_lock_irqsave(&ep->dev->lock, flags);
1092
1093 usb_set_index(ep_index(ep));
1094
1095 /* Nuke all pending requests (does flush) */
1096 nuke(ep, -ESHUTDOWN);
1097
1098 /* Disable ep IRQ */
1099 pio_irq_disable(ep_index(ep));
1100
1101 ep->desc = 0;
1102 ep->stopped = 1;
1103
1104 spin_unlock_irqrestore(&ep->dev->lock, flags);
1105
1106 DEBUG("%s: disabled %s\n", __FUNCTION__, _ep->name);
1107 return 0;
1108 }
1109
1110 static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
1111 gfp_t gfp_flags)
1112 {
1113 struct lh7a40x_request *req;
1114
1115 DEBUG("%s, %p\n", __FUNCTION__, ep);
1116
1117 req = kzalloc(sizeof(*req), gfp_flags);
1118 if (!req)
1119 return 0;
1120
1121 INIT_LIST_HEAD(&req->queue);
1122
1123 return &req->req;
1124 }
1125
1126 static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
1127 {
1128 struct lh7a40x_request *req;
1129
1130 DEBUG("%s, %p\n", __FUNCTION__, ep);
1131
1132 req = container_of(_req, struct lh7a40x_request, req);
1133 WARN_ON(!list_empty(&req->queue));
1134 kfree(req);
1135 }
1136
1137 static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned bytes,
1138 dma_addr_t * dma, gfp_t gfp_flags)
1139 {
1140 char *retval;
1141
1142 DEBUG("%s (%p, %d, %d)\n", __FUNCTION__, ep, bytes, gfp_flags);
1143
1144 retval = kmalloc(bytes, gfp_flags & ~(__GFP_DMA | __GFP_HIGHMEM));
1145 if (retval)
1146 *dma = virt_to_bus(retval);
1147 return retval;
1148 }
1149
1150 static void lh7a40x_free_buffer(struct usb_ep *ep, void *buf, dma_addr_t dma,
1151 unsigned bytes)
1152 {
1153 DEBUG("%s, %p\n", __FUNCTION__, ep);
1154 kfree(buf);
1155 }
1156
1157 /** Queue one request
1158 * Kickstart transfer if needed
1159 * NOTE: Sets INDEX register
1160 */
1161 static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
1162 gfp_t gfp_flags)
1163 {
1164 struct lh7a40x_request *req;
1165 struct lh7a40x_ep *ep;
1166 struct lh7a40x_udc *dev;
1167 unsigned long flags;
1168
1169 DEBUG("\n\n\n%s, %p\n", __FUNCTION__, _ep);
1170
1171 req = container_of(_req, struct lh7a40x_request, req);
1172 if (unlikely
1173 (!_req || !_req->complete || !_req->buf
1174 || !list_empty(&req->queue))) {
1175 DEBUG("%s, bad params\n", __FUNCTION__);
1176 return -EINVAL;
1177 }
1178
1179 ep = container_of(_ep, struct lh7a40x_ep, ep);
1180 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1181 DEBUG("%s, bad ep\n", __FUNCTION__);
1182 return -EINVAL;
1183 }
1184
1185 dev = ep->dev;
1186 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1187 DEBUG("%s, bogus device state %p\n", __FUNCTION__, dev->driver);
1188 return -ESHUTDOWN;
1189 }
1190
1191 DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
1192 _req->buf);
1193
1194 spin_lock_irqsave(&dev->lock, flags);
1195
1196 _req->status = -EINPROGRESS;
1197 _req->actual = 0;
1198
1199 /* kickstart this i/o queue? */
1200 DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
1201 ep->stopped);
1202 if (list_empty(&ep->queue) && likely(!ep->stopped)) {
1203 u32 csr;
1204
1205 if (unlikely(ep_index(ep) == 0)) {
1206 /* EP0 */
1207 list_add_tail(&req->queue, &ep->queue);
1208 lh7a40x_ep0_kick(dev, ep);
1209 req = 0;
1210 } else if (ep_is_in(ep)) {
1211 /* EP1 & EP3 */
1212 usb_set_index(ep_index(ep));
1213 csr = usb_read(ep->csr1);
1214 pio_irq_enable(ep_index(ep));
1215 if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
1216 if (write_fifo(ep, req) == 1)
1217 req = 0;
1218 }
1219 } else {
1220 /* EP2 */
1221 usb_set_index(ep_index(ep));
1222 csr = usb_read(ep->csr1);
1223 pio_irq_enable(ep_index(ep));
1224 if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
1225 if (read_fifo(ep, req) == 1)
1226 req = 0;
1227 }
1228 }
1229 }
1230
1231 /* pio or dma irq handler advances the queue. */
1232 if (likely(req != 0))
1233 list_add_tail(&req->queue, &ep->queue);
1234
1235 spin_unlock_irqrestore(&dev->lock, flags);
1236
1237 return 0;
1238 }
1239
1240 /* dequeue JUST ONE request */
1241 static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1242 {
1243 struct lh7a40x_ep *ep;
1244 struct lh7a40x_request *req;
1245 unsigned long flags;
1246
1247 DEBUG("%s, %p\n", __FUNCTION__, _ep);
1248
1249 ep = container_of(_ep, struct lh7a40x_ep, ep);
1250 if (!_ep || ep->ep.name == ep0name)
1251 return -EINVAL;
1252
1253 spin_lock_irqsave(&ep->dev->lock, flags);
1254
1255 /* make sure it's actually queued on this endpoint */
1256 list_for_each_entry(req, &ep->queue, queue) {
1257 if (&req->req == _req)
1258 break;
1259 }
1260 if (&req->req != _req) {
1261 spin_unlock_irqrestore(&ep->dev->lock, flags);
1262 return -EINVAL;
1263 }
1264
1265 done(ep, req, -ECONNRESET);
1266
1267 spin_unlock_irqrestore(&ep->dev->lock, flags);
1268 return 0;
1269 }
1270
1271 /** Halt specific EP
1272 * Return 0 if success
1273 * NOTE: Sets INDEX register to EP !
1274 */
1275 static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
1276 {
1277 struct lh7a40x_ep *ep;
1278 unsigned long flags;
1279
1280 ep = container_of(_ep, struct lh7a40x_ep, ep);
1281 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1282 DEBUG("%s, bad ep\n", __FUNCTION__);
1283 return -EINVAL;
1284 }
1285
1286 usb_set_index(ep_index(ep));
1287
1288 DEBUG("%s, ep %d, val %d\n", __FUNCTION__, ep_index(ep), value);
1289
1290 spin_lock_irqsave(&ep->dev->lock, flags);
1291
1292 if (ep_index(ep) == 0) {
1293 /* EP0 */
1294 usb_set(EP0_SEND_STALL, ep->csr1);
1295 } else if (ep_is_in(ep)) {
1296 u32 csr = usb_read(ep->csr1);
1297 if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
1298 || !list_empty(&ep->queue))) {
1299 /*
1300 * Attempts to halt IN endpoints will fail (returning -EAGAIN)
1301 * if any transfer requests are still queued, or if the controller
1302 * FIFO still holds bytes that the host hasn\92t collected.
1303 */
1304 spin_unlock_irqrestore(&ep->dev->lock, flags);
1305 DEBUG
1306 ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
1307 (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
1308 !list_empty(&ep->queue));
1309 return -EAGAIN;
1310 }
1311 flush(ep);
1312 if (value)
1313 usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
1314 else {
1315 usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
1316 usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
1317 }
1318
1319 } else {
1320
1321 flush(ep);
1322 if (value)
1323 usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1324 else {
1325 usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1326 usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
1327 }
1328 }
1329
1330 if (value) {
1331 ep->stopped = 1;
1332 } else {
1333 ep->stopped = 0;
1334 }
1335
1336 spin_unlock_irqrestore(&ep->dev->lock, flags);
1337
1338 DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
1339
1340 return 0;
1341 }
1342
1343 /** Return bytes in EP FIFO
1344 * NOTE: Sets INDEX register to EP
1345 */
1346 static int lh7a40x_fifo_status(struct usb_ep *_ep)
1347 {
1348 u32 csr;
1349 int count = 0;
1350 struct lh7a40x_ep *ep;
1351
1352 ep = container_of(_ep, struct lh7a40x_ep, ep);
1353 if (!_ep) {
1354 DEBUG("%s, bad ep\n", __FUNCTION__);
1355 return -ENODEV;
1356 }
1357
1358 DEBUG("%s, %d\n", __FUNCTION__, ep_index(ep));
1359
1360 /* LPD can't report unclaimed bytes from IN fifos */
1361 if (ep_is_in(ep))
1362 return -EOPNOTSUPP;
1363
1364 usb_set_index(ep_index(ep));
1365
1366 csr = usb_read(ep->csr1);
1367 if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
1368 csr & USB_OUT_CSR1_OUT_PKT_RDY) {
1369 count = usb_read(USB_OUT_FIFO_WC1);
1370 }
1371
1372 return count;
1373 }
1374
1375 /** Flush EP FIFO
1376 * NOTE: Sets INDEX register to EP
1377 */
1378 static void lh7a40x_fifo_flush(struct usb_ep *_ep)
1379 {
1380 struct lh7a40x_ep *ep;
1381
1382 ep = container_of(_ep, struct lh7a40x_ep, ep);
1383 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1384 DEBUG("%s, bad ep\n", __FUNCTION__);
1385 return;
1386 }
1387
1388 usb_set_index(ep_index(ep));
1389 flush(ep);
1390 }
1391
1392 /****************************************************************/
1393 /* End Point 0 related functions */
1394 /****************************************************************/
1395
1396 /* return: 0 = still running, 1 = completed, negative = errno */
1397 static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1398 {
1399 u32 max;
1400 unsigned count;
1401 int is_last;
1402
1403 max = ep_maxpacket(ep);
1404
1405 DEBUG_EP0("%s\n", __FUNCTION__);
1406
1407 count = write_packet(ep, req, max);
1408
1409 /* last packet is usually short (or a zlp) */
1410 if (unlikely(count != max))
1411 is_last = 1;
1412 else {
1413 if (likely(req->req.length != req->req.actual) || req->req.zero)
1414 is_last = 0;
1415 else
1416 is_last = 1;
1417 }
1418
1419 DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __FUNCTION__,
1420 ep->ep.name, count,
1421 is_last ? "/L" : "", req->req.length - req->req.actual, req);
1422
1423 /* requests complete when all IN data is in the FIFO */
1424 if (is_last) {
1425 done(ep, req, 0);
1426 return 1;
1427 }
1428
1429 return 0;
1430 }
1431
1432 static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
1433 unsigned char *cp, int max)
1434 {
1435 int bytes;
1436 int count = usb_read(USB_OUT_FIFO_WC1);
1437 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1438
1439 if (count > max)
1440 count = max;
1441 bytes = count;
1442 while (count--)
1443 *cp++ = *fifo & 0xFF;
1444 return bytes;
1445 }
1446
1447 static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
1448 unsigned char *cp, int count)
1449 {
1450 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1451 DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
1452 while (count--)
1453 *fifo = *cp++;
1454 }
1455
1456 static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1457 {
1458 u32 csr;
1459 u8 *buf;
1460 unsigned bufferspace, count, is_short;
1461 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1462
1463 DEBUG_EP0("%s\n", __FUNCTION__);
1464
1465 csr = usb_read(USB_EP0_CSR);
1466 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
1467 return 0;
1468
1469 buf = req->req.buf + req->req.actual;
1470 prefetchw(buf);
1471 bufferspace = req->req.length - req->req.actual;
1472
1473 /* read all bytes from this packet */
1474 if (likely(csr & EP0_OUT_PKT_RDY)) {
1475 count = usb_read(USB_OUT_FIFO_WC1);
1476 req->req.actual += min(count, bufferspace);
1477 } else /* zlp */
1478 count = 0;
1479
1480 is_short = (count < ep->ep.maxpacket);
1481 DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
1482 ep->ep.name, csr, count,
1483 is_short ? "/S" : "", req, req->req.actual, req->req.length);
1484
1485 while (likely(count-- != 0)) {
1486 u8 byte = (u8) (*fifo & 0xff);
1487
1488 if (unlikely(bufferspace == 0)) {
1489 /* this happens when the driver's buffer
1490 * is smaller than what the host sent.
1491 * discard the extra data.
1492 */
1493 if (req->req.status != -EOVERFLOW)
1494 DEBUG_EP0("%s overflow %d\n", ep->ep.name,
1495 count);
1496 req->req.status = -EOVERFLOW;
1497 } else {
1498 *buf++ = byte;
1499 bufferspace--;
1500 }
1501 }
1502
1503 /* completion */
1504 if (is_short || req->req.actual == req->req.length) {
1505 done(ep, req, 0);
1506 return 1;
1507 }
1508
1509 /* finished that packet. the next one may be waiting... */
1510 return 0;
1511 }
1512
1513 /**
1514 * udc_set_address - set the USB address for this device
1515 * @address:
1516 *
1517 * Called from control endpoint function after it decodes a set address setup packet.
1518 */
1519 static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
1520 {
1521 DEBUG_EP0("%s: %d\n", __FUNCTION__, address);
1522 /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
1523 dev->usb_address = address;
1524 usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
1525 usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
1526 /* usb_read(USB_FA); */
1527 }
1528
1529 /*
1530 * DATA_STATE_RECV (OUT_PKT_RDY)
1531 * - if error
1532 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1533 * - else
1534 * set EP0_CLR_OUT bit
1535 if last set EP0_DATA_END bit
1536 */
1537 static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
1538 {
1539 struct lh7a40x_request *req;
1540 struct lh7a40x_ep *ep = &dev->ep[0];
1541 int ret;
1542
1543 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1544
1545 if (list_empty(&ep->queue))
1546 req = 0;
1547 else
1548 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1549
1550 if (req) {
1551
1552 if (req->req.length == 0) {
1553 DEBUG_EP0("ZERO LENGTH OUT!\n");
1554 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1555 dev->ep0state = WAIT_FOR_SETUP;
1556 return;
1557 }
1558 ret = read_fifo_ep0(ep, req);
1559 if (ret) {
1560 /* Done! */
1561 DEBUG_EP0("%s: finished, waiting for status\n",
1562 __FUNCTION__);
1563
1564 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1565 dev->ep0state = WAIT_FOR_SETUP;
1566 } else {
1567 /* Not done yet.. */
1568 DEBUG_EP0("%s: not finished\n", __FUNCTION__);
1569 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1570 }
1571 } else {
1572 DEBUG_EP0("NO REQ??!\n");
1573 }
1574 }
1575
1576 /*
1577 * DATA_STATE_XMIT
1578 */
1579 static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
1580 {
1581 struct lh7a40x_request *req;
1582 struct lh7a40x_ep *ep = &dev->ep[0];
1583 int ret, need_zlp = 0;
1584
1585 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1586
1587 if (list_empty(&ep->queue))
1588 req = 0;
1589 else
1590 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1591
1592 if (!req) {
1593 DEBUG_EP0("%s: NULL REQ\n", __FUNCTION__);
1594 return 0;
1595 }
1596
1597 if (req->req.length == 0) {
1598
1599 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1600 dev->ep0state = WAIT_FOR_SETUP;
1601 return 1;
1602 }
1603
1604 if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
1605 /* Next write will end with the packet size, */
1606 /* so we need Zero-length-packet */
1607 need_zlp = 1;
1608 }
1609
1610 ret = write_fifo_ep0(ep, req);
1611
1612 if (ret == 1 && !need_zlp) {
1613 /* Last packet */
1614 DEBUG_EP0("%s: finished, waiting for status\n", __FUNCTION__);
1615
1616 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1617 dev->ep0state = WAIT_FOR_SETUP;
1618 } else {
1619 DEBUG_EP0("%s: not finished\n", __FUNCTION__);
1620 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1621 }
1622
1623 if (need_zlp) {
1624 DEBUG_EP0("%s: Need ZLP!\n", __FUNCTION__);
1625 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1626 dev->ep0state = DATA_STATE_NEED_ZLP;
1627 }
1628
1629 return 1;
1630 }
1631
1632 static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
1633 struct usb_ctrlrequest *ctrl)
1634 {
1635 struct lh7a40x_ep *ep0 = &dev->ep[0];
1636 struct lh7a40x_ep *qep;
1637 int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
1638 u16 val = 0;
1639
1640 if (reqtype == USB_RECIP_INTERFACE) {
1641 /* This is not supported.
1642 * And according to the USB spec, this one does nothing..
1643 * Just return 0
1644 */
1645 DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
1646 } else if (reqtype == USB_RECIP_DEVICE) {
1647 DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
1648 val |= (1 << 0); /* Self powered */
1649 /*val |= (1<<1); *//* Remote wakeup */
1650 } else if (reqtype == USB_RECIP_ENDPOINT) {
1651 int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
1652
1653 DEBUG_SETUP
1654 ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
1655 ep_num, ctrl->wLength);
1656
1657 if (ctrl->wLength > 2 || ep_num > 3)
1658 return -EOPNOTSUPP;
1659
1660 qep = &dev->ep[ep_num];
1661 if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
1662 && ep_index(qep) != 0) {
1663 return -EOPNOTSUPP;
1664 }
1665
1666 usb_set_index(ep_index(qep));
1667
1668 /* Return status on next IN token */
1669 switch (qep->ep_type) {
1670 case ep_control:
1671 val =
1672 (usb_read(qep->csr1) & EP0_SEND_STALL) ==
1673 EP0_SEND_STALL;
1674 break;
1675 case ep_bulk_in:
1676 case ep_interrupt:
1677 val =
1678 (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
1679 USB_IN_CSR1_SEND_STALL;
1680 break;
1681 case ep_bulk_out:
1682 val =
1683 (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
1684 USB_OUT_CSR1_SEND_STALL;
1685 break;
1686 }
1687
1688 /* Back to EP0 index */
1689 usb_set_index(0);
1690
1691 DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
1692 ctrl->wIndex, val);
1693 } else {
1694 DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
1695 return -EOPNOTSUPP;
1696 }
1697
1698 /* Clear "out packet ready" */
1699 usb_set((EP0_CLR_OUT), USB_EP0_CSR);
1700 /* Put status to FIFO */
1701 lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
1702 /* Issue "In packet ready" */
1703 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1704
1705 return 0;
1706 }
1707
1708 /*
1709 * WAIT_FOR_SETUP (OUT_PKT_RDY)
1710 * - read data packet from EP0 FIFO
1711 * - decode command
1712 * - if error
1713 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1714 * - else
1715 * set EP0_CLR_OUT | EP0_DATA_END bits
1716 */
1717 static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
1718 {
1719 struct lh7a40x_ep *ep = &dev->ep[0];
1720 struct usb_ctrlrequest ctrl;
1721 int i, bytes, is_in;
1722
1723 DEBUG_SETUP("%s: %x\n", __FUNCTION__, csr);
1724
1725 /* Nuke all previous transfers */
1726 nuke(ep, -EPROTO);
1727
1728 /* read control req from fifo (8 bytes) */
1729 bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
1730
1731 DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
1732 DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
1733 ctrl.bRequestType == USB_DIR_IN);
1734 DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
1735 DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
1736 DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
1737 DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
1738
1739 /* Set direction of EP0 */
1740 if (likely(ctrl.bRequestType & USB_DIR_IN)) {
1741 ep->bEndpointAddress |= USB_DIR_IN;
1742 is_in = 1;
1743 } else {
1744 ep->bEndpointAddress &= ~USB_DIR_IN;
1745 is_in = 0;
1746 }
1747
1748 dev->req_pending = 1;
1749
1750 /* Handle some SETUP packets ourselves */
1751 switch (ctrl.bRequest) {
1752 case USB_REQ_SET_ADDRESS:
1753 if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1754 break;
1755
1756 DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
1757 udc_set_address(dev, ctrl.wValue);
1758 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1759 return;
1760
1761 case USB_REQ_GET_STATUS:{
1762 if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
1763 return;
1764
1765 case USB_REQ_CLEAR_FEATURE:
1766 case USB_REQ_SET_FEATURE:
1767 if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
1768 struct lh7a40x_ep *qep;
1769 int ep_num = (ctrl.wIndex & 0x0f);
1770
1771 /* Support only HALT feature */
1772 if (ctrl.wValue != 0 || ctrl.wLength != 0
1773 || ep_num > 3 || ep_num < 1)
1774 break;
1775
1776 qep = &dev->ep[ep_num];
1777 spin_unlock(&dev->lock);
1778 if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
1779 DEBUG_SETUP("SET_FEATURE (%d)\n",
1780 ep_num);
1781 lh7a40x_set_halt(&qep->ep, 1);
1782 } else {
1783 DEBUG_SETUP("CLR_FEATURE (%d)\n",
1784 ep_num);
1785 lh7a40x_set_halt(&qep->ep, 0);
1786 }
1787 spin_lock(&dev->lock);
1788 usb_set_index(0);
1789
1790 /* Reply with a ZLP on next IN token */
1791 usb_set((EP0_CLR_OUT | EP0_DATA_END),
1792 USB_EP0_CSR);
1793 return;
1794 }
1795 break;
1796 }
1797
1798 default:
1799 break;
1800 }
1801
1802 if (likely(dev->driver)) {
1803 /* device-2-host (IN) or no data setup command, process immediately */
1804 spin_unlock(&dev->lock);
1805 i = dev->driver->setup(&dev->gadget, &ctrl);
1806 spin_lock(&dev->lock);
1807
1808 if (i < 0) {
1809 /* setup processing failed, force stall */
1810 DEBUG_SETUP
1811 (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
1812 i);
1813 usb_set_index(0);
1814 usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
1815 USB_EP0_CSR);
1816
1817 /* ep->stopped = 1; */
1818 dev->ep0state = WAIT_FOR_SETUP;
1819 }
1820 }
1821 }
1822
1823 /*
1824 * DATA_STATE_NEED_ZLP
1825 */
1826 static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
1827 {
1828 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1829
1830 /* c.f. Table 15-14 */
1831 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1832 dev->ep0state = WAIT_FOR_SETUP;
1833 }
1834
1835 /*
1836 * handle ep0 interrupt
1837 */
1838 static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
1839 {
1840 struct lh7a40x_ep *ep = &dev->ep[0];
1841 u32 csr;
1842
1843 /* Set index 0 */
1844 usb_set_index(0);
1845 csr = usb_read(USB_EP0_CSR);
1846
1847 DEBUG_EP0("%s: csr = %x\n", __FUNCTION__, csr);
1848
1849 /*
1850 * For overview of what we should be doing see c.f. Chapter 18.1.2.4
1851 * We will follow that outline here modified by our own global state
1852 * indication which provides hints as to what we think should be
1853 * happening..
1854 */
1855
1856 /*
1857 * if SENT_STALL is set
1858 * - clear the SENT_STALL bit
1859 */
1860 if (csr & EP0_SENT_STALL) {
1861 DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __FUNCTION__, csr);
1862 usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
1863 nuke(ep, -ECONNABORTED);
1864 dev->ep0state = WAIT_FOR_SETUP;
1865 return;
1866 }
1867
1868 /*
1869 * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
1870 * - fill EP0 FIFO
1871 * - if last packet
1872 * - set IN_PKT_RDY | DATA_END
1873 * - else
1874 * set IN_PKT_RDY
1875 */
1876 if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
1877 DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
1878 __FUNCTION__);
1879
1880 switch (dev->ep0state) {
1881 case DATA_STATE_XMIT:
1882 DEBUG_EP0("continue with DATA_STATE_XMIT\n");
1883 lh7a40x_ep0_in(dev, csr);
1884 return;
1885 case DATA_STATE_NEED_ZLP:
1886 DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
1887 lh7a40x_ep0_in_zlp(dev, csr);
1888 return;
1889 default:
1890 /* Stall? */
1891 DEBUG_EP0("Odd state!! state = %s\n",
1892 state_names[dev->ep0state]);
1893 dev->ep0state = WAIT_FOR_SETUP;
1894 /* nuke(ep, 0); */
1895 /* usb_set(EP0_SEND_STALL, ep->csr1); */
1896 break;
1897 }
1898 }
1899
1900 /*
1901 * if SETUP_END is set
1902 * - abort the last transfer
1903 * - set SERVICED_SETUP_END_BIT
1904 */
1905 if (csr & EP0_SETUP_END) {
1906 DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __FUNCTION__, csr);
1907
1908 usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
1909
1910 nuke(ep, 0);
1911 dev->ep0state = WAIT_FOR_SETUP;
1912 }
1913
1914 /*
1915 * if EP0_OUT_PKT_RDY is set
1916 * - read data packet from EP0 FIFO
1917 * - decode command
1918 * - if error
1919 * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
1920 * - else
1921 * set SERVICED_OUT_PKT_RDY | DATA_END bits
1922 */
1923 if (csr & EP0_OUT_PKT_RDY) {
1924
1925 DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __FUNCTION__,
1926 csr);
1927
1928 switch (dev->ep0state) {
1929 case WAIT_FOR_SETUP:
1930 DEBUG_EP0("WAIT_FOR_SETUP\n");
1931 lh7a40x_ep0_setup(dev, csr);
1932 break;
1933
1934 case DATA_STATE_RECV:
1935 DEBUG_EP0("DATA_STATE_RECV\n");
1936 lh7a40x_ep0_out(dev, csr);
1937 break;
1938
1939 default:
1940 /* send stall? */
1941 DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
1942 dev->ep0state);
1943 break;
1944 }
1945 }
1946 }
1947
1948 static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
1949 {
1950 u32 csr;
1951
1952 usb_set_index(0);
1953 csr = usb_read(USB_EP0_CSR);
1954
1955 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1956
1957 /* Clear "out packet ready" */
1958 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1959
1960 if (ep_is_in(ep)) {
1961 dev->ep0state = DATA_STATE_XMIT;
1962 lh7a40x_ep0_in(dev, csr);
1963 } else {
1964 dev->ep0state = DATA_STATE_RECV;
1965 lh7a40x_ep0_out(dev, csr);
1966 }
1967 }
1968
1969 /* ---------------------------------------------------------------------------
1970 * device-scoped parts of the api to the usb controller hardware
1971 * ---------------------------------------------------------------------------
1972 */
1973
1974 static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
1975 {
1976 u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
1977 u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
1978 DEBUG("%s, %p\n", __FUNCTION__, _gadget);
1979 return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
1980 }
1981
1982 static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
1983 {
1984 /* host may not have enabled remote wakeup */
1985 /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
1986 return -EHOSTUNREACH;
1987 udc_set_mask_UDCCR(UDCCR_RSM); */
1988 return -ENOTSUPP;
1989 }
1990
1991 static const struct usb_gadget_ops lh7a40x_udc_ops = {
1992 .get_frame = lh7a40x_udc_get_frame,
1993 .wakeup = lh7a40x_udc_wakeup,
1994 /* current versions must always be self-powered */
1995 };
1996
1997 static void nop_release(struct device *dev)
1998 {
1999 DEBUG("%s %s\n", __FUNCTION__, dev->bus_id);
2000 }
2001
2002 static struct lh7a40x_udc memory = {
2003 .usb_address = 0,
2004
2005 .gadget = {
2006 .ops = &lh7a40x_udc_ops,
2007 .ep0 = &memory.ep[0].ep,
2008 .name = driver_name,
2009 .dev = {
2010 .bus_id = "gadget",
2011 .release = nop_release,
2012 },
2013 },
2014
2015 /* control endpoint */
2016 .ep[0] = {
2017 .ep = {
2018 .name = ep0name,
2019 .ops = &lh7a40x_ep_ops,
2020 .maxpacket = EP0_PACKETSIZE,
2021 },
2022 .dev = &memory,
2023
2024 .bEndpointAddress = 0,
2025 .bmAttributes = 0,
2026
2027 .ep_type = ep_control,
2028 .fifo = io_p2v(USB_EP0_FIFO),
2029 .csr1 = USB_EP0_CSR,
2030 .csr2 = USB_EP0_CSR,
2031 },
2032
2033 /* first group of endpoints */
2034 .ep[1] = {
2035 .ep = {
2036 .name = "ep1in-bulk",
2037 .ops = &lh7a40x_ep_ops,
2038 .maxpacket = 64,
2039 },
2040 .dev = &memory,
2041
2042 .bEndpointAddress = USB_DIR_IN | 1,
2043 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2044
2045 .ep_type = ep_bulk_in,
2046 .fifo = io_p2v(USB_EP1_FIFO),
2047 .csr1 = USB_IN_CSR1,
2048 .csr2 = USB_IN_CSR2,
2049 },
2050
2051 .ep[2] = {
2052 .ep = {
2053 .name = "ep2out-bulk",
2054 .ops = &lh7a40x_ep_ops,
2055 .maxpacket = 64,
2056 },
2057 .dev = &memory,
2058
2059 .bEndpointAddress = 2,
2060 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2061
2062 .ep_type = ep_bulk_out,
2063 .fifo = io_p2v(USB_EP2_FIFO),
2064 .csr1 = USB_OUT_CSR1,
2065 .csr2 = USB_OUT_CSR2,
2066 },
2067
2068 .ep[3] = {
2069 .ep = {
2070 .name = "ep3in-int",
2071 .ops = &lh7a40x_ep_ops,
2072 .maxpacket = 64,
2073 },
2074 .dev = &memory,
2075
2076 .bEndpointAddress = USB_DIR_IN | 3,
2077 .bmAttributes = USB_ENDPOINT_XFER_INT,
2078
2079 .ep_type = ep_interrupt,
2080 .fifo = io_p2v(USB_EP3_FIFO),
2081 .csr1 = USB_IN_CSR1,
2082 .csr2 = USB_IN_CSR2,
2083 },
2084 };
2085
2086 /*
2087 * probe - binds to the platform device
2088 */
2089 static int lh7a40x_udc_probe(struct platform_device *pdev)
2090 {
2091 struct lh7a40x_udc *dev = &memory;
2092 int retval;
2093
2094 DEBUG("%s: %p\n", __FUNCTION__, pdev);
2095
2096 spin_lock_init(&dev->lock);
2097 dev->dev = &pdev->dev;
2098
2099 device_initialize(&dev->gadget.dev);
2100 dev->gadget.dev.parent = &pdev->dev;
2101
2102 the_controller = dev;
2103 platform_set_drvdata(pdev, dev);
2104
2105 udc_disable(dev);
2106 udc_reinit(dev);
2107
2108 /* irq setup after old hardware state is cleaned up */
2109 retval =
2110 request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
2111 dev);
2112 if (retval != 0) {
2113 DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
2114 IRQ_USBINTR, retval);
2115 return -EBUSY;
2116 }
2117
2118 create_proc_files();
2119
2120 return retval;
2121 }
2122
2123 static int lh7a40x_udc_remove(struct platform_device *pdev)
2124 {
2125 struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
2126
2127 DEBUG("%s: %p\n", __FUNCTION__, pdev);
2128
2129 udc_disable(dev);
2130 remove_proc_files();
2131 usb_gadget_unregister_driver(dev->driver);
2132
2133 free_irq(IRQ_USBINTR, dev);
2134
2135 platform_set_drvdata(pdev, 0);
2136
2137 the_controller = 0;
2138
2139 return 0;
2140 }
2141
2142 /*-------------------------------------------------------------------------*/
2143
2144 static struct platform_driver udc_driver = {
2145 .probe = lh7a40x_udc_probe,
2146 .remove = lh7a40x_udc_remove,
2147 /* FIXME power management support */
2148 /* .suspend = ... disable UDC */
2149 /* .resume = ... re-enable UDC */
2150 .driver = {
2151 .name = (char *)driver_name,
2152 .owner = THIS_MODULE,
2153 },
2154 };
2155
2156 static int __init udc_init(void)
2157 {
2158 DEBUG("%s: %s version %s\n", __FUNCTION__, driver_name, DRIVER_VERSION);
2159 return platform_driver_register(&udc_driver);
2160 }
2161
2162 static void __exit udc_exit(void)
2163 {
2164 platform_driver_unregister(&udc_driver);
2165 }
2166
2167 module_init(udc_init);
2168 module_exit(udc_exit);
2169
2170 MODULE_DESCRIPTION(DRIVER_DESC);
2171 MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
2172 MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)