drivers/tty/serial/etraxfs-uart.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <linux/module.h>
   3 #include <linux/init.h>
   4 #include <linux/console.h>
   5 #include <linux/platform_device.h>
   6 #include <linux/serial_core.h>
   7 #include <linux/tty_flip.h>
   8 #include <linux/of.h>
   9 #include <linux/gpio.h>
  10 #include <linux/of_irq.h>
  11 #include <linux/of_address.h>
  12 #include <hwregs/ser_defs.h>
  13
  14 #include "serial_mctrl_gpio.h"
  15
  16 #define DRV_NAME "etraxfs-uart"
  17 #define UART_NR CONFIG_ETRAX_SERIAL_PORTS
  18
  19 #define MODIFY_REG(instance, reg, var)                          \
  20         do {                                                    \
  21                 if (REG_RD_INT(ser, instance, reg) !=           \
  22                     REG_TYPE_CONV(int, reg_ser_##reg, var))     \
  23                         REG_WR(ser, instance, reg, var);        \
  24         } while (0)
  25
  26 struct uart_cris_port {
  27         struct uart_port port;
  28
  29         int initialized;
  30         int irq;
  31
  32         void __iomem *regi_ser;
  33
  34         struct mctrl_gpios *gpios;
  35
  36         int write_ongoing;
  37 };
  38
  39 static struct uart_driver etraxfs_uart_driver;
  40 static struct uart_port *console_port;
  41 static int console_baud = 115200;
  42 static struct uart_cris_port *etraxfs_uart_ports[UART_NR];
  43
  44 static void cris_serial_port_init(struct uart_port *port, int line);
  45 static void etraxfs_uart_stop_rx(struct uart_port *port);
  46 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port);
  47
  48 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
  49 static void
  50 cris_console_write(struct console *co, const char *s, unsigned int count)
  51 {
  52         struct uart_cris_port *up;
  53         int i;
  54         reg_ser_r_stat_din stat;
  55         reg_ser_rw_tr_dma_en tr_dma_en, old;
  56
  57         up = etraxfs_uart_ports[co->index];
  58
  59         if (!up)
  60                 return;
  61
  62         /* Switch to manual mode. */
  63         tr_dma_en = old = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
  64         if (tr_dma_en.en == regk_ser_yes) {
  65                 tr_dma_en.en = regk_ser_no;
  66                 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
  67         }
  68
  69         /* Send data. */
  70         for (i = 0; i < count; i++) {
  71                 /* LF -> CRLF */
  72                 if (s[i] == '\n') {
  73                         do {
  74                                 stat = REG_RD(ser, up->regi_ser, r_stat_din);
  75                         } while (!stat.tr_rdy);
  76                         REG_WR_INT(ser, up->regi_ser, rw_dout, '\r');
  77                 }
  78                 /* Wait until transmitter is ready and send. */
  79                 do {
  80                         stat = REG_RD(ser, up->regi_ser, r_stat_din);
  81                 } while (!stat.tr_rdy);
  82                 REG_WR_INT(ser, up->regi_ser, rw_dout, s[i]);
  83         }
  84
  85         /* Restore mode. */
  86         if (tr_dma_en.en != old.en)
  87                 REG_WR(ser, up->regi_ser, rw_tr_dma_en, old);
  88 }
  89
  90 static int __init
  91 cris_console_setup(struct console *co, char *options)
  92 {
  93         struct uart_port *port;
  94         int baud = 115200;
  95         int bits = 8;
  96         int parity = 'n';
  97         int flow = 'n';
  98
  99         if (co->index < 0 || co->index >= UART_NR)
 100                 co->index = 0;
 101         port = &etraxfs_uart_ports[co->index]->port;
 102         console_port = port;
 103
 104         co->flags |= CON_CONSDEV;
 105
 106         if (options)
 107                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 108         console_baud = baud;
 109         cris_serial_port_init(port, co->index);
 110         uart_set_options(port, co, baud, parity, bits, flow);
 111
 112         return 0;
 113 }
 114
 115 static struct console cris_console = {
 116         .name = "ttyS",
 117         .write = cris_console_write,
 118         .device = uart_console_device,
 119         .setup = cris_console_setup,
 120         .flags = CON_PRINTBUFFER,
 121         .index = -1,
 122         .data = &etraxfs_uart_driver,
 123 };
 124 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
 125
 126 static struct uart_driver etraxfs_uart_driver = {
 127         .owner = THIS_MODULE,
 128         .driver_name = "serial",
 129         .dev_name = "ttyS",
 130         .major = TTY_MAJOR,
 131         .minor = 64,
 132         .nr = UART_NR,
 133 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
 134         .cons = &cris_console,
 135 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
 136 };
 137
 138 static inline int crisv32_serial_get_rts(struct uart_cris_port *up)
 139 {
 140         void __iomem *regi_ser = up->regi_ser;
 141         /*
 142          * Return what the user has controlled rts to or
 143          * what the pin is? (if auto_rts is used it differs during tx)
 144          */
 145         reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
 146
 147         return !(rstat.rts_n == regk_ser_active);
 148 }
 149
 150 /*
 151  * A set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
 152  *                                            0=0V    , 1=3.3V
 153  */
 154 static inline void crisv32_serial_set_rts(struct uart_cris_port *up,
 155                                           int set, int force)
 156 {
 157         void __iomem *regi_ser = up->regi_ser;
 158
 159         unsigned long flags;
 160         reg_ser_rw_rec_ctrl rec_ctrl;
 161
 162         local_irq_save(flags);
 163         rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
 164
 165         if (set)
 166                 rec_ctrl.rts_n = regk_ser_active;
 167         else
 168                 rec_ctrl.rts_n = regk_ser_inactive;
 169         REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
 170         local_irq_restore(flags);
 171 }
 172
 173 static inline int crisv32_serial_get_cts(struct uart_cris_port *up)
 174 {
 175         void __iomem *regi_ser = up->regi_ser;
 176         reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
 177
 178         return (rstat.cts_n == regk_ser_active);
 179 }
 180
 181 /*
 182  * Send a single character for XON/XOFF purposes.  We do it in this separate
 183  * function instead of the alternative support port.x_char, in the ...start_tx
 184  * function, so we don't mix up this case with possibly enabling transmission
 185  * of queued-up data (in case that's disabled after *receiving* an XOFF or
 186  * negative CTS).  This function is used for both DMA and non-DMA case; see HW
 187  * docs specifically blessing sending characters manually when DMA for
 188  * transmission is enabled and running.  We may be asked to transmit despite
 189  * the transmitter being disabled by a ..._stop_tx call so we need to enable
 190  * it temporarily but restore the state afterwards.
 191  */
 192 static void etraxfs_uart_send_xchar(struct uart_port *port, char ch)
 193 {
 194         struct uart_cris_port *up = (struct uart_cris_port *)port;
 195         reg_ser_rw_dout dout = { .data = ch };
 196         reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
 197         reg_ser_r_stat_din rstat;
 198         reg_ser_rw_tr_ctrl prev_tr_ctrl, tr_ctrl;
 199         void __iomem *regi_ser = up->regi_ser;
 200         unsigned long flags;
 201
 202         /*
 203          * Wait for tr_rdy in case a character is already being output.  Make
 204          * sure we have integrity between the register reads and the writes
 205          * below, but don't busy-wait with interrupts off and the port lock
 206          * taken.
 207          */
 208         spin_lock_irqsave(&port->lock, flags);
 209         do {
 210                 spin_unlock_irqrestore(&port->lock, flags);
 211                 spin_lock_irqsave(&port->lock, flags);
 212                 prev_tr_ctrl = tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
 213                 rstat = REG_RD(ser, regi_ser, r_stat_din);
 214         } while (!rstat.tr_rdy);
 215
 216         /*
 217          * Ack an interrupt if one was just issued for the previous character
 218          * that was output.  This is required for non-DMA as the interrupt is
 219          * used as the only indicator that the transmitter is ready and it
 220          * isn't while this x_char is being transmitted.
 221          */
 222         REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
 223
 224         /* Enable the transmitter in case it was disabled. */
 225         tr_ctrl.stop = 0;
 226         REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
 227
 228         /*
 229          * Finally, send the blessed character; nothing should stop it now,
 230          * except for an xoff-detected state, which we'll handle below.
 231          */
 232         REG_WR(ser, regi_ser, rw_dout, dout);
 233         up->port.icount.tx++;
 234
 235         /* There might be an xoff state to clear. */
 236         rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 237
 238         /*
 239          * Clear any xoff state that *may* have been there to
 240          * inhibit transmission of the character.
 241          */
 242         if (rstat.xoff_detect) {
 243                 reg_ser_rw_xoff_clr xoff_clr = { .clr = 1 };
 244                 reg_ser_rw_tr_dma_en tr_dma_en;
 245
 246                 REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
 247                 tr_dma_en = REG_RD(ser, regi_ser, rw_tr_dma_en);
 248
 249                 /*
 250                  * If we had an xoff state but cleared it, instead sneak in a
 251                  * disabled state for the transmitter, after the character we
 252                  * sent.  Thus we keep the port disabled, just as if the xoff
 253                  * state was still in effect (or actually, as if stop_tx had
 254                  * been called, as we stop DMA too).
 255                  */
 256                 prev_tr_ctrl.stop = 1;
 257
 258                 tr_dma_en.en = 0;
 259                 REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
 260         }
 261
 262         /* Restore "previous" enabled/disabled state of the transmitter. */
 263         REG_WR(ser, regi_ser, rw_tr_ctrl, prev_tr_ctrl);
 264
 265         spin_unlock_irqrestore(&port->lock, flags);
 266 }
 267
 268 /*
 269  * Do not spin_lock_irqsave or disable interrupts by other means here; it's
 270  * already done by the caller.
 271  */
 272 static void etraxfs_uart_start_tx(struct uart_port *port)
 273 {
 274         struct uart_cris_port *up = (struct uart_cris_port *)port;
 275
 276         /* we have already done below if a write is ongoing */
 277         if (up->write_ongoing)
 278                 return;
 279
 280         /* Signal that write is ongoing */
 281         up->write_ongoing = 1;
 282
 283         etraxfs_uart_start_tx_bottom(port);
 284 }
 285
 286 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port)
 287 {
 288         struct uart_cris_port *up = (struct uart_cris_port *)port;
 289         void __iomem *regi_ser = up->regi_ser;
 290         reg_ser_rw_tr_ctrl tr_ctrl;
 291         reg_ser_rw_intr_mask intr_mask;
 292
 293         tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
 294         tr_ctrl.stop = regk_ser_no;
 295         REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
 296         intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
 297         intr_mask.tr_rdy = regk_ser_yes;
 298         REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
 299 }
 300
 301 /*
 302  * This function handles both the DMA and non-DMA case by ordering the
 303  * transmitter to stop of after the current character.  We don't need to wait
 304  * for any such character to be completely transmitted; we do that where it
 305  * matters, like in etraxfs_uart_set_termios.  Don't busy-wait here; see
 306  * Documentation/serial/driver: this function is called within
 307  * spin_lock_irq{,save} and thus separate ones would be disastrous (when SMP).
 308  * There's no documented need to set the txd pin to any particular value;
 309  * break setting is controlled solely by etraxfs_uart_break_ctl.
 310  */
 311 static void etraxfs_uart_stop_tx(struct uart_port *port)
 312 {
 313         struct uart_cris_port *up = (struct uart_cris_port *)port;
 314         void __iomem *regi_ser = up->regi_ser;
 315         reg_ser_rw_tr_ctrl tr_ctrl;
 316         reg_ser_rw_intr_mask intr_mask;
 317         reg_ser_rw_tr_dma_en tr_dma_en = {0};
 318         reg_ser_rw_xoff_clr xoff_clr = {0};
 319
 320         /*
 321          * For the non-DMA case, we'd get a tr_rdy interrupt that we're not
 322          * interested in as we're not transmitting any characters.  For the
 323          * DMA case, that interrupt is already turned off, but no reason to
 324          * waste code on conditionals here.
 325          */
 326         intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
 327         intr_mask.tr_rdy = regk_ser_no;
 328         REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
 329
 330         tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
 331         tr_ctrl.stop = 1;
 332         REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
 333
 334         /*
 335          * Always clear possible hardware xoff-detected state here, no need to
 336          * unnecessary consider mctrl settings and when they change.  We clear
 337          * it here rather than in start_tx: both functions are called as the
 338          * effect of XOFF processing, but start_tx is also called when upper
 339          * levels tell the driver that there are more characters to send, so
 340          * avoid adding code there.
 341          */
 342         xoff_clr.clr = 1;
 343         REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
 344
 345         /*
 346          * Disable transmitter DMA, so that if we're in XON/XOFF, we can send
 347          * those single characters without also giving go-ahead for queued up
 348          * DMA data.
 349          */
 350         tr_dma_en.en = 0;
 351         REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
 352
 353         /*
 354          * Make sure that write_ongoing is reset when stopping tx.
 355          */
 356         up->write_ongoing = 0;
 357 }
 358
 359 static void etraxfs_uart_stop_rx(struct uart_port *port)
 360 {
 361         struct uart_cris_port *up = (struct uart_cris_port *)port;
 362         void __iomem *regi_ser = up->regi_ser;
 363         reg_ser_rw_rec_ctrl rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
 364
 365         rec_ctrl.en = regk_ser_no;
 366         REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
 367 }
 368
 369 static unsigned int etraxfs_uart_tx_empty(struct uart_port *port)
 370 {
 371         struct uart_cris_port *up = (struct uart_cris_port *)port;
 372         unsigned long flags;
 373         unsigned int ret;
 374         reg_ser_r_stat_din rstat = {0};
 375
 376         spin_lock_irqsave(&up->port.lock, flags);
 377
 378         rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 379         ret = rstat.tr_empty ? TIOCSER_TEMT : 0;
 380
 381         spin_unlock_irqrestore(&up->port.lock, flags);
 382         return ret;
 383 }
 384 static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port)
 385 {
 386         struct uart_cris_port *up = (struct uart_cris_port *)port;
 387         unsigned int ret;
 388
 389         ret = 0;
 390         if (crisv32_serial_get_rts(up))
 391                 ret |= TIOCM_RTS;
 392         if (crisv32_serial_get_cts(up))
 393                 ret |= TIOCM_CTS;
 394         return mctrl_gpio_get(up->gpios, &ret);
 395 }
 396
 397 static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 398 {
 399         struct uart_cris_port *up = (struct uart_cris_port *)port;
 400
 401         crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
 402         mctrl_gpio_set(up->gpios, mctrl);
 403 }
 404
 405 static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
 406 {
 407         struct uart_cris_port *up = (struct uart_cris_port *)port;
 408         unsigned long flags;
 409         reg_ser_rw_tr_ctrl tr_ctrl;
 410         reg_ser_rw_tr_dma_en tr_dma_en;
 411         reg_ser_rw_intr_mask intr_mask;
 412
 413         spin_lock_irqsave(&up->port.lock, flags);
 414         tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl);
 415         tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
 416         intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask);
 417
 418         if (break_state != 0) { /* Send break */
 419                 /*
 420                  * We need to disable DMA (if used) or tr_rdy interrupts if no
 421                  * DMA.  No need to make this conditional on use of DMA;
 422                  * disabling will be a no-op for the other mode.
 423                  */
 424                 intr_mask.tr_rdy = regk_ser_no;
 425                 tr_dma_en.en = 0;
 426
 427                 /*
 428                  * Stop transmission and set the txd pin to 0 after the
 429                  * current character.  The txd setting will take effect after
 430                  * any current transmission has completed.
 431                  */
 432                 tr_ctrl.stop = 1;
 433                 tr_ctrl.txd = 0;
 434         } else {
 435                 /* Re-enable the serial interrupt. */
 436                 intr_mask.tr_rdy = regk_ser_yes;
 437
 438                 tr_ctrl.stop = 0;
 439                 tr_ctrl.txd = 1;
 440         }
 441         REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl);
 442         REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
 443         REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask);
 444
 445         spin_unlock_irqrestore(&up->port.lock, flags);
 446 }
 447
 448 static void
 449 transmit_chars_no_dma(struct uart_cris_port *up)
 450 {
 451         int max_count;
 452         struct circ_buf *xmit = &up->port.state->xmit;
 453
 454         void __iomem *regi_ser = up->regi_ser;
 455         reg_ser_r_stat_din rstat;
 456         reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
 457
 458         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 459                 /* No more to send, so disable the interrupt. */
 460                 reg_ser_rw_intr_mask intr_mask;
 461
 462                 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
 463                 intr_mask.tr_rdy = 0;
 464                 intr_mask.tr_empty = 0;
 465                 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
 466                 up->write_ongoing = 0;
 467                 return;
 468         }
 469
 470         /* If the serport is fast, we send up to max_count bytes before
 471            exiting the loop.  */
 472         max_count = 64;
 473         do {
 474                 reg_ser_rw_dout dout = { .data = xmit->buf[xmit->tail] };
 475
 476                 REG_WR(ser, regi_ser, rw_dout, dout);
 477                 REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
 478                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 479                 up->port.icount.tx++;
 480                 if (xmit->head == xmit->tail)
 481                         break;
 482                 rstat = REG_RD(ser, regi_ser, r_stat_din);
 483         } while ((--max_count > 0) && rstat.tr_rdy);
 484
 485         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 486                 uart_write_wakeup(&up->port);
 487 }
 488
 489 static void receive_chars_no_dma(struct uart_cris_port *up)
 490 {
 491         reg_ser_rs_stat_din stat_din;
 492         reg_ser_r_stat_din rstat;
 493         struct tty_port *port;
 494         struct uart_icount *icount;
 495         int max_count = 16;
 496         char flag;
 497         reg_ser_rw_ack_intr ack_intr = { 0 };
 498
 499         rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 500         icount = &up->port.icount;
 501         port = &up->port.state->port;
 502
 503         do {
 504                 stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
 505
 506                 flag = TTY_NORMAL;
 507                 ack_intr.dav = 1;
 508                 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
 509                 icount->rx++;
 510
 511                 if (stat_din.framing_err | stat_din.par_err | stat_din.orun) {
 512                         if (stat_din.data == 0x00 &&
 513                             stat_din.framing_err) {
 514                                 /* Most likely a break. */
 515                                 flag = TTY_BREAK;
 516                                 icount->brk++;
 517                         } else if (stat_din.par_err) {
 518                                 flag = TTY_PARITY;
 519                                 icount->parity++;
 520                         } else if (stat_din.orun) {
 521                                 flag = TTY_OVERRUN;
 522                                 icount->overrun++;
 523                         } else if (stat_din.framing_err) {
 524                                 flag = TTY_FRAME;
 525                                 icount->frame++;
 526                         }
 527                 }
 528
 529                 /*
 530                  * If this becomes important, we probably *could* handle this
 531                  * gracefully by keeping track of the unhandled character.
 532                  */
 533                 if (!tty_insert_flip_char(port, stat_din.data, flag))
 534                         panic("%s: No tty buffer space", __func__);
 535                 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 536         } while (rstat.dav && (max_count-- > 0));
 537         spin_unlock(&up->port.lock);
 538         tty_flip_buffer_push(port);
 539         spin_lock(&up->port.lock);
 540 }
 541
 542 static irqreturn_t
 543 ser_interrupt(int irq, void *dev_id)
 544 {
 545         struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
 546         void __iomem *regi_ser;
 547         int handled = 0;
 548
 549         spin_lock(&up->port.lock);
 550
 551         regi_ser = up->regi_ser;
 552
 553         if (regi_ser) {
 554                 reg_ser_r_masked_intr masked_intr;
 555
 556                 masked_intr = REG_RD(ser, regi_ser, r_masked_intr);
 557                 /*
 558                  * Check what interrupts are active before taking
 559                  * actions. If DMA is used the interrupt shouldn't
 560                  * be enabled.
 561                  */
 562                 if (masked_intr.dav) {
 563                         receive_chars_no_dma(up);
 564                         handled = 1;
 565                 }
 566
 567                 if (masked_intr.tr_rdy) {
 568                         transmit_chars_no_dma(up);
 569                         handled = 1;
 570                 }
 571         }
 572         spin_unlock(&up->port.lock);
 573         return IRQ_RETVAL(handled);
 574 }
 575
 576 #ifdef CONFIG_CONSOLE_POLL
 577 static int etraxfs_uart_get_poll_char(struct uart_port *port)
 578 {
 579         reg_ser_rs_stat_din stat;
 580         reg_ser_rw_ack_intr ack_intr = { 0 };
 581         struct uart_cris_port *up = (struct uart_cris_port *)port;
 582
 583         do {
 584                 stat = REG_RD(ser, up->regi_ser, rs_stat_din);
 585         } while (!stat.dav);
 586
 587         /* Ack the data_avail interrupt. */
 588         ack_intr.dav = 1;
 589         REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
 590
 591         return stat.data;
 592 }
 593
 594 static void etraxfs_uart_put_poll_char(struct uart_port *port,
 595                                         unsigned char c)
 596 {
 597         reg_ser_r_stat_din stat;
 598         struct uart_cris_port *up = (struct uart_cris_port *)port;
 599
 600         do {
 601                 stat = REG_RD(ser, up->regi_ser, r_stat_din);
 602         } while (!stat.tr_rdy);
 603         REG_WR_INT(ser, up->regi_ser, rw_dout, c);
 604 }
 605 #endif /* CONFIG_CONSOLE_POLL */
 606
 607 static int etraxfs_uart_startup(struct uart_port *port)
 608 {
 609         struct uart_cris_port *up = (struct uart_cris_port *)port;
 610         unsigned long flags;
 611         reg_ser_rw_intr_mask ser_intr_mask = {0};
 612
 613         ser_intr_mask.dav = regk_ser_yes;
 614
 615         if (request_irq(etraxfs_uart_ports[port->line]->irq, ser_interrupt,
 616                         0, DRV_NAME, etraxfs_uart_ports[port->line]))
 617                 panic("irq ser%d", port->line);
 618
 619         spin_lock_irqsave(&up->port.lock, flags);
 620
 621         REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask);
 622
 623         etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
 624
 625         spin_unlock_irqrestore(&up->port.lock, flags);
 626
 627         return 0;
 628 }
 629
 630 static void etraxfs_uart_shutdown(struct uart_port *port)
 631 {
 632         struct uart_cris_port *up = (struct uart_cris_port *)port;
 633         unsigned long flags;
 634
 635         spin_lock_irqsave(&up->port.lock, flags);
 636
 637         etraxfs_uart_stop_tx(port);
 638         etraxfs_uart_stop_rx(port);
 639
 640         free_irq(etraxfs_uart_ports[port->line]->irq,
 641                  etraxfs_uart_ports[port->line]);
 642
 643         etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
 644
 645         spin_unlock_irqrestore(&up->port.lock, flags);
 646
 647 }
 648
 649 static void
 650 etraxfs_uart_set_termios(struct uart_port *port, struct ktermios *termios,
 651                          struct ktermios *old)
 652 {
 653         struct uart_cris_port *up = (struct uart_cris_port *)port;
 654         unsigned long flags;
 655         reg_ser_rw_xoff xoff;
 656         reg_ser_rw_xoff_clr xoff_clr = {0};
 657         reg_ser_rw_tr_ctrl tx_ctrl = {0};
 658         reg_ser_rw_tr_dma_en tx_dma_en = {0};
 659         reg_ser_rw_rec_ctrl rx_ctrl = {0};
 660         reg_ser_rw_tr_baud_div tx_baud_div = {0};
 661         reg_ser_rw_rec_baud_div rx_baud_div = {0};
 662         int baud;
 663
 664         if (old &&
 665             termios->c_cflag == old->c_cflag &&
 666             termios->c_iflag == old->c_iflag)
 667                 return;
 668
 669         /* Tx: 8 bit, no/even parity, 1 stop bit, no cts. */
 670         tx_ctrl.base_freq = regk_ser_f29_493;
 671         tx_ctrl.en = 0;
 672         tx_ctrl.stop = 0;
 673         tx_ctrl.auto_rts = regk_ser_no;
 674         tx_ctrl.txd = 1;
 675         tx_ctrl.auto_cts = 0;
 676         /* Rx: 8 bit, no/even parity. */
 677         rx_ctrl.dma_err = regk_ser_stop;
 678         rx_ctrl.sampling = regk_ser_majority;
 679         rx_ctrl.timeout = 1;
 680
 681         rx_ctrl.rts_n = regk_ser_inactive;
 682
 683         /* Common for tx and rx: 8N1. */
 684         tx_ctrl.data_bits = regk_ser_bits8;
 685         rx_ctrl.data_bits = regk_ser_bits8;
 686         tx_ctrl.par = regk_ser_even;
 687         rx_ctrl.par = regk_ser_even;
 688         tx_ctrl.par_en = regk_ser_no;
 689         rx_ctrl.par_en = regk_ser_no;
 690
 691         tx_ctrl.stop_bits = regk_ser_bits1;
 692
 693         /*
 694          * Change baud-rate and write it to the hardware.
 695          *
 696          * baud_clock = base_freq / (divisor*8)
 697          * divisor = base_freq / (baud_clock * 8)
 698          * base_freq is either:
 699          * off, ext, 29.493MHz, 32.000 MHz, 32.768 MHz or 100 MHz
 700          * 20.493MHz is used for standard baudrates
 701          */
 702
 703         /*
 704          * For the console port we keep the original baudrate here.  Not very
 705          * beautiful.
 706          */
 707         if ((port != console_port) || old)
 708                 baud = uart_get_baud_rate(port, termios, old, 0,
 709                                           port->uartclk / 8);
 710         else
 711                 baud = console_baud;
 712
 713         tx_baud_div.div = 29493000 / (8 * baud);
 714         /* Rx uses same as tx. */
 715         rx_baud_div.div = tx_baud_div.div;
 716         rx_ctrl.base_freq = tx_ctrl.base_freq;
 717
 718         if ((termios->c_cflag & CSIZE) == CS7) {
 719                 /* Set 7 bit mode. */
 720                 tx_ctrl.data_bits = regk_ser_bits7;
 721                 rx_ctrl.data_bits = regk_ser_bits7;
 722         }
 723
 724         if (termios->c_cflag & CSTOPB) {
 725                 /* Set 2 stop bit mode. */
 726                 tx_ctrl.stop_bits = regk_ser_bits2;
 727         }
 728
 729         if (termios->c_cflag & PARENB) {
 730                 /* Enable parity. */
 731                 tx_ctrl.par_en = regk_ser_yes;
 732                 rx_ctrl.par_en = regk_ser_yes;
 733         }
 734
 735         if (termios->c_cflag & CMSPAR) {
 736                 if (termios->c_cflag & PARODD) {
 737                         /* Set mark parity if PARODD and CMSPAR. */
 738                         tx_ctrl.par = regk_ser_mark;
 739                         rx_ctrl.par = regk_ser_mark;
 740                 } else {
 741                         tx_ctrl.par = regk_ser_space;
 742                         rx_ctrl.par = regk_ser_space;
 743                 }
 744         } else {
 745                 if (termios->c_cflag & PARODD) {
 746                         /* Set odd parity. */
 747                        tx_ctrl.par = regk_ser_odd;
 748                        rx_ctrl.par = regk_ser_odd;
 749                 }
 750         }
 751
 752         if (termios->c_cflag & CRTSCTS) {
 753                 /* Enable automatic CTS handling. */
 754                 tx_ctrl.auto_cts = regk_ser_yes;
 755         }
 756
 757         /* Make sure the tx and rx are enabled. */
 758         tx_ctrl.en = regk_ser_yes;
 759         rx_ctrl.en = regk_ser_yes;
 760
 761         spin_lock_irqsave(&port->lock, flags);
 762
 763         tx_dma_en.en = 0;
 764         REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
 765
 766         /* Actually write the control regs (if modified) to the hardware. */
 767         uart_update_timeout(port, termios->c_cflag, port->uartclk/8);
 768         MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div);
 769         MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl);
 770
 771         MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div);
 772         MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl);
 773
 774         tx_dma_en.en = 0;
 775         REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
 776
 777         xoff = REG_RD(ser, up->regi_ser, rw_xoff);
 778
 779         if (up->port.state && up->port.state->port.tty &&
 780             (up->port.state->port.tty->termios.c_iflag & IXON)) {
 781                 xoff.chr = STOP_CHAR(up->port.state->port.tty);
 782                 xoff.automatic = regk_ser_yes;
 783         } else
 784                 xoff.automatic = regk_ser_no;
 785
 786         MODIFY_REG(up->regi_ser, rw_xoff, xoff);
 787
 788         /*
 789          * Make sure we don't start in an automatically shut-off state due to
 790          * a previous early exit.
 791          */
 792         xoff_clr.clr = 1;
 793         REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr);
 794
 795         etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
 796         spin_unlock_irqrestore(&up->port.lock, flags);
 797 }
 798
 799 static const char *
 800 etraxfs_uart_type(struct uart_port *port)
 801 {
 802         return "CRISv32";
 803 }
 804
 805 static void etraxfs_uart_release_port(struct uart_port *port)
 806 {
 807 }
 808
 809 static int etraxfs_uart_request_port(struct uart_port *port)
 810 {
 811         return 0;
 812 }
 813
 814 static void etraxfs_uart_config_port(struct uart_port *port, int flags)
 815 {
 816         struct uart_cris_port *up = (struct uart_cris_port *)port;
 817
 818         up->port.type = PORT_CRIS;
 819 }
 820
 821 static const struct uart_ops etraxfs_uart_pops = {
 822         .tx_empty = etraxfs_uart_tx_empty,
 823         .set_mctrl = etraxfs_uart_set_mctrl,
 824         .get_mctrl = etraxfs_uart_get_mctrl,
 825         .stop_tx = etraxfs_uart_stop_tx,
 826         .start_tx = etraxfs_uart_start_tx,
 827         .send_xchar = etraxfs_uart_send_xchar,
 828         .stop_rx = etraxfs_uart_stop_rx,
 829         .break_ctl = etraxfs_uart_break_ctl,
 830         .startup = etraxfs_uart_startup,
 831         .shutdown = etraxfs_uart_shutdown,
 832         .set_termios = etraxfs_uart_set_termios,
 833         .type = etraxfs_uart_type,
 834         .release_port = etraxfs_uart_release_port,
 835         .request_port = etraxfs_uart_request_port,
 836         .config_port = etraxfs_uart_config_port,
 837 #ifdef CONFIG_CONSOLE_POLL
 838         .poll_get_char = etraxfs_uart_get_poll_char,
 839         .poll_put_char = etraxfs_uart_put_poll_char,
 840 #endif
 841 };
 842
 843 static void cris_serial_port_init(struct uart_port *port, int line)
 844 {
 845         struct uart_cris_port *up = (struct uart_cris_port *)port;
 846
 847         if (up->initialized)
 848                 return;
 849         up->initialized = 1;
 850         port->line = line;
 851         spin_lock_init(&port->lock);
 852         port->ops = &etraxfs_uart_pops;
 853         port->irq = up->irq;
 854         port->iobase = (unsigned long) up->regi_ser;
 855         port->uartclk = 29493000;
 856
 857         /*
 858          * We can't fit any more than 255 here (unsigned char), though
 859          * actually UART_XMIT_SIZE characters could be pending output.
 860          * At time of this writing, the definition of "fifosize" is here the
 861          * amount of characters that can be pending output after a start_tx call
 862          * until tx_empty returns 1: see serial_core.c:uart_wait_until_sent.
 863          * This matters for timeout calculations unfortunately, but keeping
 864          * larger amounts at the DMA wouldn't win much so let's just play nice.
 865          */
 866         port->fifosize = 255;
 867         port->flags = UPF_BOOT_AUTOCONF;
 868 }
 869
 870 static int etraxfs_uart_probe(struct platform_device *pdev)
 871 {
 872         struct device_node *np = pdev->dev.of_node;
 873         struct uart_cris_port *up;
 874         int dev_id;
 875
 876         if (!np)
 877                 return -ENODEV;
 878
 879         dev_id = of_alias_get_id(np, "serial");
 880         if (dev_id < 0)
 881                 dev_id = 0;
 882
 883         if (dev_id >= UART_NR)
 884                 return -EINVAL;
 885
 886         if (etraxfs_uart_ports[dev_id])
 887                 return -EBUSY;
 888
 889         up = devm_kzalloc(&pdev->dev, sizeof(struct uart_cris_port),
 890                           GFP_KERNEL);
 891         if (!up)
 892                 return -ENOMEM;
 893
 894         up->irq = irq_of_parse_and_map(np, 0);
 895         up->regi_ser = of_iomap(np, 0);
 896         up->port.dev = &pdev->dev;
 897
 898         up->gpios = mctrl_gpio_init_noauto(&pdev->dev, 0);
 899         if (IS_ERR(up->gpios))
 900                 return PTR_ERR(up->gpios);
 901
 902         cris_serial_port_init(&up->port, dev_id);
 903
 904         etraxfs_uart_ports[dev_id] = up;
 905         platform_set_drvdata(pdev, &up->port);
 906         uart_add_one_port(&etraxfs_uart_driver, &up->port);
 907
 908         return 0;
 909 }
 910
 911 static int etraxfs_uart_remove(struct platform_device *pdev)
 912 {
 913         struct uart_port *port;
 914
 915         port = platform_get_drvdata(pdev);
 916         uart_remove_one_port(&etraxfs_uart_driver, port);
 917         etraxfs_uart_ports[port->line] = NULL;
 918
 919         return 0;
 920 }
 921
 922 static const struct of_device_id etraxfs_uart_dt_ids[] = {
 923         { .compatible = "axis,etraxfs-uart" },
 924         { /* sentinel */ }
 925 };
 926
 927 MODULE_DEVICE_TABLE(of, etraxfs_uart_dt_ids);
 928
 929 static struct platform_driver etraxfs_uart_platform_driver = {
 930         .driver = {
 931                 .name   = DRV_NAME,
 932                 .of_match_table = of_match_ptr(etraxfs_uart_dt_ids),
 933         },
 934         .probe          = etraxfs_uart_probe,
 935         .remove         = etraxfs_uart_remove,
 936 };
 937
 938 static int __init etraxfs_uart_init(void)
 939 {
 940         int ret;
 941
 942         ret = uart_register_driver(&etraxfs_uart_driver);
 943         if (ret)
 944                 return ret;
 945
 946         ret = platform_driver_register(&etraxfs_uart_platform_driver);
 947         if (ret)
 948                 uart_unregister_driver(&etraxfs_uart_driver);
 949
 950         return ret;
 951 }
 952
 953 static void __exit etraxfs_uart_exit(void)
 954 {
 955         platform_driver_unregister(&etraxfs_uart_platform_driver);
 956         uart_unregister_driver(&etraxfs_uart_driver);
 957 }
 958
 959 module_init(etraxfs_uart_init);
 960 module_exit(etraxfs_uart_exit);