Merge branch 'topic/usb' into for-linus
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / vt6655 / srom.c
1 /*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: srom.c
20 *
21 * Purpose:Implement functions to access eeprom
22 *
23 * Author: Jerry Chen
24 *
25 * Date: Jan 29, 2003
26 *
27 * Functions:
28 * SROMbyReadEmbedded - Embedded read eeprom via MAC
29 * SROMbWriteEmbedded - Embedded write eeprom via MAC
30 * SROMvRegBitsOn - Set Bits On in eeprom
31 * SROMvRegBitsOff - Clear Bits Off in eeprom
32 * SROMbIsRegBitsOn - Test if Bits On in eeprom
33 * SROMbIsRegBitsOff - Test if Bits Off in eeprom
34 * SROMvReadAllContents - Read all contents in eeprom
35 * SROMvWriteAllContents - Write all contents in eeprom
36 * SROMvReadEtherAddress - Read Ethernet Address in eeprom
37 * SROMvWriteEtherAddress - Write Ethernet Address in eeprom
38 * SROMvReadSubSysVenId - Read Sub_VID and Sub_SysId in eeprom
39 * SROMbAutoLoad - Auto Load eeprom to MAC register
40 *
41 * Revision History:
42 *
43 */
44
45 #include "upc.h"
46 #include "tmacro.h"
47 #include "tether.h"
48 #include "mac.h"
49 #include "srom.h"
50
51 /*--------------------- Static Definitions -------------------------*/
52
53 /*--------------------- Static Classes ----------------------------*/
54
55 /*--------------------- Static Variables --------------------------*/
56
57 /*--------------------- Static Functions --------------------------*/
58
59 /*--------------------- Export Variables --------------------------*/
60
61 /*--------------------- Export Functions --------------------------*/
62
63
64
65
66 /*
67 * Description: Read a byte from EEPROM, by MAC I2C
68 *
69 * Parameters:
70 * In:
71 * dwIoBase - I/O base address
72 * byContntOffset - address of EEPROM
73 * Out:
74 * none
75 *
76 * Return Value: data read
77 *
78 */
79 BYTE SROMbyReadEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset)
80 {
81 WORD wDelay, wNoACK;
82 BYTE byWait;
83 BYTE byData;
84 BYTE byOrg;
85
86 byData = 0xFF;
87 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
88 // turn off hardware retry for getting NACK
89 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
90 for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) {
91 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
92 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
93
94 // issue read command
95 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR);
96 // wait DONE be set
97 for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) {
98 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
99 if (byWait & (I2MCSR_DONE | I2MCSR_NACK))
100 break;
101 PCAvDelayByIO(CB_DELAY_LOOP_WAIT);
102 }
103 if ((wDelay < W_MAX_TIMEOUT) &&
104 ( !(byWait & I2MCSR_NACK))) {
105 break;
106 }
107 }
108 VNSvInPortB(dwIoBase + MAC_REG_I2MDIPT, &byData);
109 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
110 return byData;
111 }
112
113
114 /*
115 * Description: Write a byte to EEPROM, by MAC I2C
116 *
117 * Parameters:
118 * In:
119 * dwIoBase - I/O base address
120 * byContntOffset - address of EEPROM
121 * wData - data to write
122 * Out:
123 * none
124 *
125 * Return Value: TRUE if succeeded; FALSE if failed.
126 *
127 */
128 BOOL SROMbWriteEmbedded (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData)
129 {
130 WORD wDelay, wNoACK;
131 BYTE byWait;
132
133 BYTE byOrg;
134
135 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
136 // turn off hardware retry for getting NACK
137 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
138 for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) {
139 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
140 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
141 VNSvOutPortB(dwIoBase + MAC_REG_I2MDOPT, byData);
142
143 // issue write command
144 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMW);
145 // wait DONE be set
146 for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) {
147 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
148 if (byWait & (I2MCSR_DONE | I2MCSR_NACK))
149 break;
150 PCAvDelayByIO(CB_DELAY_LOOP_WAIT);
151 }
152
153 if ((wDelay < W_MAX_TIMEOUT) &&
154 ( !(byWait & I2MCSR_NACK))) {
155 break;
156 }
157 }
158 if (wNoACK == W_MAX_I2CRETRY) {
159 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
160 return FALSE;
161 }
162 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
163 return TRUE;
164 }
165
166
167 /*
168 * Description: Turn bits on in eeprom
169 *
170 * Parameters:
171 * In:
172 * dwIoBase - I/O base address
173 * byContntOffset - address of EEPROM
174 * byBits - bits to turn on
175 * Out:
176 * none
177 *
178 * Return Value: none
179 *
180 */
181 void SROMvRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits)
182 {
183 BYTE byOrgData;
184
185 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
186 SROMbWriteEmbedded(dwIoBase, byContntOffset,(BYTE)(byOrgData | byBits));
187 }
188
189
190 /*
191 * Description: Turn bits off in eeprom
192 *
193 * Parameters:
194 * In:
195 * dwIoBase - I/O base address
196 * byContntOffset - address of EEPROM
197 * byBits - bits to turn off
198 * Out:
199 * none
200 *
201 */
202 void SROMvRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits)
203 {
204 BYTE byOrgData;
205
206 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
207 SROMbWriteEmbedded(dwIoBase, byContntOffset,(BYTE)(byOrgData & (~byBits)));
208 }
209
210
211 /*
212 * Description: Test if bits on in eeprom
213 *
214 * Parameters:
215 * In:
216 * dwIoBase - I/O base address
217 * byContntOffset - address of EEPROM
218 * byTestBits - bits to test
219 * Out:
220 * none
221 *
222 * Return Value: TRUE if all test bits on; otherwise FALSE
223 *
224 */
225 BOOL SROMbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits)
226 {
227 BYTE byOrgData;
228
229 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
230 return (byOrgData & byTestBits) == byTestBits;
231 }
232
233
234 /*
235 * Description: Test if bits off in eeprom
236 *
237 * Parameters:
238 * In:
239 * dwIoBase - I/O base address
240 * byContntOffset - address of EEPROM
241 * byTestBits - bits to test
242 * Out:
243 * none
244 *
245 * Return Value: TRUE if all test bits off; otherwise FALSE
246 *
247 */
248 BOOL SROMbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits)
249 {
250 BYTE byOrgData;
251
252 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
253 return !(byOrgData & byTestBits);
254 }
255
256
257 /*
258 * Description: Read all contents of eeprom to buffer
259 *
260 * Parameters:
261 * In:
262 * dwIoBase - I/O base address
263 * Out:
264 * pbyEepromRegs - EEPROM content Buffer
265 *
266 * Return Value: none
267 *
268 */
269 void SROMvReadAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
270 {
271 int ii;
272
273 // ii = Rom Address
274 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
275 *pbyEepromRegs = SROMbyReadEmbedded(dwIoBase,(BYTE) ii);
276 pbyEepromRegs++;
277 }
278 }
279
280
281 /*
282 * Description: Write all contents of buffer to eeprom
283 *
284 * Parameters:
285 * In:
286 * dwIoBase - I/O base address
287 * pbyEepromRegs - EEPROM content Buffer
288 * Out:
289 * none
290 *
291 * Return Value: none
292 *
293 */
294 void SROMvWriteAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
295 {
296 int ii;
297
298 // ii = Rom Address
299 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
300 SROMbWriteEmbedded(dwIoBase,(BYTE) ii, *pbyEepromRegs);
301 pbyEepromRegs++;
302 }
303 }
304
305
306 /*
307 * Description: Read Ethernet Address from eeprom to buffer
308 *
309 * Parameters:
310 * In:
311 * dwIoBase - I/O base address
312 * Out:
313 * pbyEtherAddress - Ethernet Address buffer
314 *
315 * Return Value: none
316 *
317 */
318 void SROMvReadEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
319 {
320 BYTE ii;
321
322 // ii = Rom Address
323 for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) {
324 *pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii);
325 pbyEtherAddress++;
326 }
327 }
328
329
330 /*
331 * Description: Write Ethernet Address from buffer to eeprom
332 *
333 * Parameters:
334 * In:
335 * dwIoBase - I/O base address
336 * pbyEtherAddress - Ethernet Address buffer
337 * Out:
338 * none
339 *
340 * Return Value: none
341 *
342 */
343 void SROMvWriteEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
344 {
345 BYTE ii;
346
347 // ii = Rom Address
348 for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) {
349 SROMbWriteEmbedded(dwIoBase, ii, *pbyEtherAddress);
350 pbyEtherAddress++;
351 }
352 }
353
354
355 /*
356 * Description: Read Sub_VID and Sub_SysId from eeprom to buffer
357 *
358 * Parameters:
359 * In:
360 * dwIoBase - I/O base address
361 * Out:
362 * pdwSubSysVenId - Sub_VID and Sub_SysId read
363 *
364 * Return Value: none
365 *
366 */
367 void SROMvReadSubSysVenId (DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId)
368 {
369 PBYTE pbyData;
370
371 pbyData = (PBYTE)pdwSubSysVenId;
372 // sub vendor
373 *pbyData = SROMbyReadEmbedded(dwIoBase, 6);
374 *(pbyData+1) = SROMbyReadEmbedded(dwIoBase, 7);
375 // sub system
376 *(pbyData+2) = SROMbyReadEmbedded(dwIoBase, 8);
377 *(pbyData+3) = SROMbyReadEmbedded(dwIoBase, 9);
378 }
379
380 /*
381 * Description: Auto Load EEPROM to MAC register
382 *
383 * Parameters:
384 * In:
385 * dwIoBase - I/O base address
386 * Out:
387 * none
388 *
389 * Return Value: TRUE if success; otherwise FALSE
390 *
391 */
392 BOOL SROMbAutoLoad (DWORD_PTR dwIoBase)
393 {
394 BYTE byWait;
395 int ii;
396
397 BYTE byOrg;
398
399 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
400 // turn on hardware retry
401 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY));
402
403 MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
404
405 // ii = Rom Address
406 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
407 MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT);
408 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
409 if ( !(byWait & I2MCSR_AUTOLD))
410 break;
411 }
412
413 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
414
415 if (ii == EEP_MAX_CONTEXT_SIZE)
416 return FALSE;
417 return TRUE;
418 }
419
420