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Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / rtl8192su / r8192U_core.c
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192U
4 *
5 * Based on the r8187 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
27 #include <linux/vmalloc.h>
28
29 #undef LOOP_TEST
30 #undef DUMP_RX
31 #undef DUMP_TX
32 #undef DEBUG_TX_DESC2
33 #undef RX_DONT_PASS_UL
34 #undef DEBUG_EPROM
35 #undef DEBUG_RX_VERBOSE
36 #undef DUMMY_RX
37 #undef DEBUG_ZERO_RX
38 #undef DEBUG_RX_SKB
39 #undef DEBUG_TX_FRAG
40 #undef DEBUG_RX_FRAG
41 #undef DEBUG_TX_FILLDESC
42 #undef DEBUG_TX
43 #undef DEBUG_IRQ
44 #undef DEBUG_RX
45 #undef DEBUG_RXALLOC
46 #undef DEBUG_REGISTERS
47 #undef DEBUG_RING
48 #undef DEBUG_IRQ_TASKLET
49 #undef DEBUG_TX_ALLOC
50 #undef DEBUG_TX_DESC
51
52 #define CONFIG_RTL8192_IO_MAP
53
54 #include <asm/uaccess.h>
55 #include "r8192U.h"
56 #include "r8180_93cx6.h" /* Card EEPROM */
57 #include "r8192U_wx.h"
58
59 #include "r8192S_rtl8225.h"
60 #include "r8192S_hw.h"
61 #include "r8192S_phy.h"
62 #include "r8192S_phyreg.h"
63 #include "r8192S_Efuse.h"
64
65 #include "r819xU_cmdpkt.h"
66 #include "r8192U_dm.h"
67 //#include "r8192xU_phyreg.h"
68 #include <linux/usb.h>
69
70 #include "r8192U_pm.h"
71
72 #include "ieee80211/dot11d.h"
73
74
75
76 u32 rt_global_debug_component = \
77 // COMP_TRACE |
78 // COMP_DBG |
79 // COMP_INIT |
80 // COMP_RECV |
81 // COMP_SEND |
82 // COMP_IO |
83 COMP_POWER |
84 // COMP_EPROM |
85 COMP_SWBW |
86 COMP_POWER_TRACKING |
87 COMP_TURBO |
88 COMP_QOS |
89 // COMP_RATE |
90 // COMP_RM |
91 COMP_DIG |
92 // COMP_EFUSE |
93 // COMP_CH |
94 // COMP_TXAGC |
95 COMP_HIPWR |
96 // COMP_HALDM |
97 COMP_SEC |
98 COMP_LED |
99 // COMP_RF |
100 // COMP_RXDESC |
101 COMP_FIRMWARE |
102 COMP_HT |
103 COMP_AMSDU |
104 COMP_SCAN |
105 // COMP_CMD |
106 COMP_DOWN |
107 COMP_RESET |
108 COMP_ERR; //always open err flags on
109
110 #define TOTAL_CAM_ENTRY 32
111 #define CAM_CONTENT_COUNT 8
112
113 static struct usb_device_id rtl8192_usb_id_tbl[] = {
114 /* Realtek */
115 {USB_DEVICE(0x0bda, 0x8192)},
116 {USB_DEVICE(0x0bda, 0x8709)},
117 /* Corega */
118 {USB_DEVICE(0x07aa, 0x0043)},
119 /* Belkin */
120 {USB_DEVICE(0x050d, 0x805E)},
121 /* Sitecom */
122 {USB_DEVICE(0x0df6, 0x0031)},
123 /* EnGenius */
124 {USB_DEVICE(0x1740, 0x9201)},
125 /* Dlink */
126 {USB_DEVICE(0x2001, 0x3301)},
127 /* Zinwell */
128 {USB_DEVICE(0x5a57, 0x0290)},
129 /* Guillemot */
130 {USB_DEVICE(0x06f8, 0xe031)},
131 //92SU
132 {USB_DEVICE(0x0bda, 0x8172)},
133 {}
134 };
135
136 MODULE_LICENSE("GPL");
137 MODULE_VERSION("V 1.1");
138 MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
139 MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
140
141 static char* ifname = "wlan%d";
142 static int hwwep = 1; //default use hw. set 0 to use software security
143 static int channels = 0x3fff;
144
145
146
147 module_param(ifname, charp, S_IRUGO|S_IWUSR );
148 //module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
149 module_param(hwwep,int, S_IRUGO|S_IWUSR);
150 module_param(channels,int, S_IRUGO|S_IWUSR);
151
152 MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
153 //MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
154 MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
155 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
156
157 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
158 const struct usb_device_id *id);
159 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
160
161 static struct usb_driver rtl8192_usb_driver = {
162 .name = RTL819xU_MODULE_NAME, /* Driver name */
163 .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */
164 .probe = rtl8192_usb_probe, /* probe fn */
165 .disconnect = rtl8192_usb_disconnect, /* remove fn */
166 .suspend = rtl8192U_suspend, /* PM suspend fn */
167 .resume = rtl8192U_resume, /* PM resume fn */
168 .reset_resume = rtl8192U_resume, /* PM reset resume fn */
169 };
170
171
172 static void rtl8192SU_read_eeprom_info(struct net_device *dev);
173 short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
174 void rtl8192SU_rx_nomal(struct sk_buff* skb);
175 void rtl8192SU_rx_cmd(struct sk_buff *skb);
176 bool rtl8192SU_adapter_start(struct net_device *dev);
177 short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
178 void rtl8192SU_link_change(struct net_device *dev);
179 void InitialGain8192S(struct net_device *dev,u8 Operation);
180 void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
181
182 struct rtl819x_ops rtl8192su_ops = {
183 .nic_type = NIC_8192SU,
184 .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
185 .rtl819x_tx = rtl8192SU_tx,
186 .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
187 .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
188 .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
189 .rtl819x_adapter_start = rtl8192SU_adapter_start,
190 .rtl819x_link_change = rtl8192SU_link_change,
191 .rtl819x_initial_gain = InitialGain8192S,
192 .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
193 };
194
195
196 typedef struct _CHANNEL_LIST
197 {
198 u8 Channel[32];
199 u8 Len;
200 }CHANNEL_LIST, *PCHANNEL_LIST;
201
202 static CHANNEL_LIST ChannelPlan[] = {
203 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
204 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
205 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
206 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
207 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
208 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
209 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
210 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
211 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
212 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
213 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
214 };
215
216 static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
217 {
218 int i, max_chan=-1, min_chan=-1;
219 struct ieee80211_device* ieee = priv->ieee80211;
220 switch (channel_plan)
221 {
222 case COUNTRY_CODE_FCC:
223 case COUNTRY_CODE_IC:
224 case COUNTRY_CODE_ETSI:
225 case COUNTRY_CODE_SPAIN:
226 case COUNTRY_CODE_FRANCE:
227 case COUNTRY_CODE_MKK:
228 case COUNTRY_CODE_MKK1:
229 case COUNTRY_CODE_ISRAEL:
230 case COUNTRY_CODE_TELEC:
231 case COUNTRY_CODE_MIC:
232 {
233 Dot11d_Init(ieee);
234 ieee->bGlobalDomain = false;
235 //acturally 8225 & 8256 rf chip only support B,G,24N mode
236 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
237 {
238 min_chan = 1;
239 max_chan = 14;
240 }
241 else
242 {
243 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
244 }
245 if (ChannelPlan[channel_plan].Len != 0){
246 // Clear old channel map
247 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
248 // Set new channel map
249 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
250 {
251 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
252 break;
253 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
254 }
255 }
256 break;
257 }
258 case COUNTRY_CODE_GLOBAL_DOMAIN:
259 {
260 GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
261 Dot11d_Reset(ieee);
262 ieee->bGlobalDomain = true;
263 break;
264 }
265 default:
266 break;
267 }
268 return;
269 }
270
271 #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
272
273 #define rx_hal_is_cck_rate(_pDesc)\
274 ((_pDesc->RxMCS == DESC92S_RATE1M ||\
275 _pDesc->RxMCS == DESC92S_RATE2M ||\
276 _pDesc->RxMCS == DESC92S_RATE5_5M ||\
277 _pDesc->RxMCS == DESC92S_RATE11M) &&\
278 !_pDesc->RxHT)
279
280 #define tx_hal_is_cck_rate(_DataRate)\
281 ( _DataRate == MGN_1M ||\
282 _DataRate == MGN_2M ||\
283 _DataRate == MGN_5_5M ||\
284 _DataRate == MGN_11M )
285
286
287
288
289 void CamResetAllEntry(struct net_device *dev)
290 {
291 #if 1
292 u32 ulcommand = 0;
293 //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
294 // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
295 // In this condition, Cam can not be reset because upper layer will not set this static key again.
296 //if(Adapter->EncAlgorithm == WEP_Encryption)
297 // return;
298 //debug
299 //DbgPrint("========================================\n");
300 //DbgPrint(" Call ResetAllEntry \n");
301 //DbgPrint("========================================\n\n");
302 ulcommand |= BIT31|BIT30;
303 write_nic_dword(dev, RWCAM, ulcommand);
304 #else
305 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
306 CAM_mark_invalid(dev, ucIndex);
307 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
308 CAM_empty_entry(dev, ucIndex);
309 #endif
310
311 }
312
313
314 void write_cam(struct net_device *dev, u8 addr, u32 data)
315 {
316 write_nic_dword(dev, WCAMI, data);
317 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
318 }
319
320 u32 read_cam(struct net_device *dev, u8 addr)
321 {
322 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
323 return read_nic_dword(dev, 0xa8);
324 }
325
326 void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
327 {
328 int status;
329 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
330 struct usb_device *udev = priv->udev;
331
332 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
333 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
334 indx|0xfe00, 0, &data, 1, HZ / 2);
335
336 if (status < 0)
337 {
338 printk("write_nic_byte_E TimeOut! status:%d\n", status);
339 }
340 }
341
342 u8 read_nic_byte_E(struct net_device *dev, int indx)
343 {
344 int status;
345 u8 data;
346 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
347 struct usb_device *udev = priv->udev;
348
349 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
350 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
351 indx|0xfe00, 0, &data, 1, HZ / 2);
352
353 if (status < 0)
354 {
355 printk("read_nic_byte_E TimeOut! status:%d\n", status);
356 }
357
358 return data;
359 }
360 //as 92U has extend page from 4 to 16, so modify functions below.
361 void write_nic_byte(struct net_device *dev, int indx, u8 data)
362 {
363 int status;
364
365 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
366 struct usb_device *udev = priv->udev;
367
368 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
369 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
370 indx, 0, &data, 1, HZ / 2);
371
372 if (status < 0)
373 {
374 printk("write_nic_byte TimeOut! status:%d\n", status);
375 }
376
377
378 }
379
380
381 void write_nic_word(struct net_device *dev, int indx, u16 data)
382 {
383
384 int status;
385
386 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
387 struct usb_device *udev = priv->udev;
388
389 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
390 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
391 indx, 0, &data, 2, HZ / 2);
392
393 if (status < 0)
394 {
395 printk("write_nic_word TimeOut! status:%d\n", status);
396 }
397
398 }
399
400
401 void write_nic_dword(struct net_device *dev, int indx, u32 data)
402 {
403
404 int status;
405
406 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
407 struct usb_device *udev = priv->udev;
408
409 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
410 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
411 indx, 0, &data, 4, HZ / 2);
412
413
414 if (status < 0)
415 {
416 printk("write_nic_dword TimeOut! status:%d\n", status);
417 }
418
419 }
420
421
422
423 u8 read_nic_byte(struct net_device *dev, int indx)
424 {
425 u8 data;
426 int status;
427 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
428 struct usb_device *udev = priv->udev;
429
430 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
431 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
432 indx, 0, &data, 1, HZ / 2);
433
434 if (status < 0)
435 {
436 printk("read_nic_byte TimeOut! status:%d\n", status);
437 }
438
439 return data;
440 }
441
442
443
444 u16 read_nic_word(struct net_device *dev, int indx)
445 {
446 u16 data;
447 int status;
448 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
449 struct usb_device *udev = priv->udev;
450
451 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
452 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
453 indx, 0, &data, 2, HZ / 2);
454
455 if (status < 0)
456 {
457 printk("read_nic_word TimeOut! status:%d\n", status);
458 }
459
460
461 return data;
462 }
463
464 u16 read_nic_word_E(struct net_device *dev, int indx)
465 {
466 u16 data;
467 int status;
468 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
469 struct usb_device *udev = priv->udev;
470
471 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
472 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
473 indx|0xfe00, 0, &data, 2, HZ / 2);
474
475 if (status < 0)
476 {
477 printk("read_nic_word TimeOut! status:%d\n", status);
478 }
479
480
481 return data;
482 }
483
484 u32 read_nic_dword(struct net_device *dev, int indx)
485 {
486 u32 data;
487 int status;
488 // int result;
489
490 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
491 struct usb_device *udev = priv->udev;
492
493 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
494 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
495 indx, 0, &data, 4, HZ / 2);
496 // if(0 != result) {
497 // printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
498 // }
499
500 if (status < 0)
501 {
502 printk("read_nic_dword TimeOut! status:%d\n", status);
503 if(status == -ENODEV) {
504 priv->usb_error = true;
505 }
506 }
507
508
509
510 return data;
511 }
512
513
514 //u8 read_phy_cck(struct net_device *dev, u8 adr);
515 //u8 read_phy_ofdm(struct net_device *dev, u8 adr);
516 /* this might still called in what was the PHY rtl8185/rtl8192 common code
517 * plans are to possibilty turn it again in one common code...
518 */
519 inline void force_pci_posting(struct net_device *dev)
520 {
521 }
522
523
524 static struct net_device_stats *rtl8192_stats(struct net_device *dev);
525 void rtl8192_commit(struct net_device *dev);
526 //void rtl8192_restart(struct net_device *dev);
527 void rtl8192_restart(struct work_struct *work);
528 //void rtl8192_rq_tx_ack(struct work_struct *work);
529
530 void watch_dog_timer_callback(unsigned long data);
531
532 /****************************************************************************
533 -----------------------------PROCFS STUFF-------------------------
534 *****************************************************************************/
535
536 static struct proc_dir_entry *rtl8192_proc = NULL;
537
538
539
540 static int proc_get_stats_ap(char *page, char **start,
541 off_t offset, int count,
542 int *eof, void *data)
543 {
544 struct net_device *dev = data;
545 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
546 struct ieee80211_device *ieee = priv->ieee80211;
547 struct ieee80211_network *target;
548
549 int len = 0;
550
551 list_for_each_entry(target, &ieee->network_list, list) {
552
553 len += snprintf(page + len, count - len,
554 "%s ", target->ssid);
555
556 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
557 len += snprintf(page + len, count - len,
558 "WPA\n");
559 }
560 else{
561 len += snprintf(page + len, count - len,
562 "non_WPA\n");
563 }
564
565 }
566
567 *eof = 1;
568 return len;
569 }
570
571 static int proc_get_registers(char *page, char **start,
572 off_t offset, int count,
573 int *eof, void *data)
574 {
575 struct net_device *dev = data;
576 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
577
578 int len = 0;
579 int i,n,page0,page1,page2;
580
581 int max=0xff;
582 page0 = 0x000;
583 page1 = 0x100;
584 page2 = 0x800;
585
586 /* This dump the current register page */
587 if(!IS_BB_REG_OFFSET_92S(page0)){
588 len += snprintf(page + len, count - len,
589 "\n####################page %x##################\n ", (page0>>8));
590 for(n=0;n<=max;)
591 {
592 len += snprintf(page + len, count - len,
593 "\nD: %2x > ",n);
594 for(i=0;i<16 && n<=max;i++,n++)
595 len += snprintf(page + len, count - len,
596 "%2.2x ",read_nic_byte(dev,(page0|n)));
597 }
598 }else{
599 len += snprintf(page + len, count - len,
600 "\n####################page %x##################\n ", (page0>>8));
601 for(n=0;n<=max;)
602 {
603 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
604 for(i=0;i<4 && n<=max;n+=4,i++)
605 len += snprintf(page + len, count - len,
606 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
607 }
608 }
609 len += snprintf(page + len, count - len,"\n");
610 *eof = 1;
611 return len;
612
613 }
614 static int proc_get_registers_1(char *page, char **start,
615 off_t offset, int count,
616 int *eof, void *data)
617 {
618 struct net_device *dev = data;
619 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
620
621 int len = 0;
622 int i,n,page0;
623
624 int max=0xff;
625 page0 = 0x100;
626
627 /* This dump the current register page */
628 len += snprintf(page + len, count - len,
629 "\n####################page %x##################\n ", (page0>>8));
630 for(n=0;n<=max;)
631 {
632 len += snprintf(page + len, count - len,
633 "\nD: %2x > ",n);
634 for(i=0;i<16 && n<=max;i++,n++)
635 len += snprintf(page + len, count - len,
636 "%2.2x ",read_nic_byte(dev,(page0|n)));
637 }
638 len += snprintf(page + len, count - len,"\n");
639 *eof = 1;
640 return len;
641
642 }
643 static int proc_get_registers_2(char *page, char **start,
644 off_t offset, int count,
645 int *eof, void *data)
646 {
647 struct net_device *dev = data;
648 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
649
650 int len = 0;
651 int i,n,page0;
652
653 int max=0xff;
654 page0 = 0x200;
655
656 /* This dump the current register page */
657 len += snprintf(page + len, count - len,
658 "\n####################page %x##################\n ", (page0>>8));
659 for(n=0;n<=max;)
660 {
661 len += snprintf(page + len, count - len,
662 "\nD: %2x > ",n);
663 for(i=0;i<16 && n<=max;i++,n++)
664 len += snprintf(page + len, count - len,
665 "%2.2x ",read_nic_byte(dev,(page0|n)));
666 }
667 len += snprintf(page + len, count - len,"\n");
668 *eof = 1;
669 return len;
670
671 }
672 static int proc_get_registers_8(char *page, char **start,
673 off_t offset, int count,
674 int *eof, void *data)
675 {
676 struct net_device *dev = data;
677
678 int len = 0;
679 int i,n,page0;
680
681 int max=0xff;
682 page0 = 0x800;
683
684 /* This dump the current register page */
685 len += snprintf(page + len, count - len,
686 "\n####################page %x##################\n ", (page0>>8));
687 for(n=0;n<=max;)
688 {
689 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
690 for(i=0;i<4 && n<=max;n+=4,i++)
691 len += snprintf(page + len, count - len,
692 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
693 }
694 len += snprintf(page + len, count - len,"\n");
695 *eof = 1;
696 return len;
697
698 }
699 static int proc_get_registers_9(char *page, char **start,
700 off_t offset, int count,
701 int *eof, void *data)
702 {
703 struct net_device *dev = data;
704 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
705
706 int len = 0;
707 int i,n,page0;
708
709 int max=0xff;
710 page0 = 0x900;
711
712 /* This dump the current register page */
713 len += snprintf(page + len, count - len,
714 "\n####################page %x##################\n ", (page0>>8));
715 for(n=0;n<=max;)
716 {
717 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
718 for(i=0;i<4 && n<=max;n+=4,i++)
719 len += snprintf(page + len, count - len,
720 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
721 }
722 len += snprintf(page + len, count - len,"\n");
723 *eof = 1;
724 return len;
725 }
726 static int proc_get_registers_a(char *page, char **start,
727 off_t offset, int count,
728 int *eof, void *data)
729 {
730 struct net_device *dev = data;
731 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
732
733 int len = 0;
734 int i,n,page0;
735
736 int max=0xff;
737 page0 = 0xa00;
738
739 /* This dump the current register page */
740 len += snprintf(page + len, count - len,
741 "\n####################page %x##################\n ", (page0>>8));
742 for(n=0;n<=max;)
743 {
744 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
745 for(i=0;i<4 && n<=max;n+=4,i++)
746 len += snprintf(page + len, count - len,
747 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
748 }
749 len += snprintf(page + len, count - len,"\n");
750 *eof = 1;
751 return len;
752 }
753 static int proc_get_registers_b(char *page, char **start,
754 off_t offset, int count,
755 int *eof, void *data)
756 {
757 struct net_device *dev = data;
758 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
759
760 int len = 0;
761 int i,n,page0;
762
763 int max=0xff;
764 page0 = 0xb00;
765
766 /* This dump the current register page */
767 len += snprintf(page + len, count - len,
768 "\n####################page %x##################\n ", (page0>>8));
769 for(n=0;n<=max;)
770 {
771 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
772 for(i=0;i<4 && n<=max;n+=4,i++)
773 len += snprintf(page + len, count - len,
774 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
775 }
776 len += snprintf(page + len, count - len,"\n");
777 *eof = 1;
778 return len;
779 }
780 static int proc_get_registers_c(char *page, char **start,
781 off_t offset, int count,
782 int *eof, void *data)
783 {
784 struct net_device *dev = data;
785 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
786
787 int len = 0;
788 int i,n,page0;
789
790 int max=0xff;
791 page0 = 0xc00;
792
793 /* This dump the current register page */
794 len += snprintf(page + len, count - len,
795 "\n####################page %x##################\n ", (page0>>8));
796 for(n=0;n<=max;)
797 {
798 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
799 for(i=0;i<4 && n<=max;n+=4,i++)
800 len += snprintf(page + len, count - len,
801 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
802 }
803 len += snprintf(page + len, count - len,"\n");
804 *eof = 1;
805 return len;
806 }
807 static int proc_get_registers_d(char *page, char **start,
808 off_t offset, int count,
809 int *eof, void *data)
810 {
811 struct net_device *dev = data;
812 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
813
814 int len = 0;
815 int i,n,page0;
816
817 int max=0xff;
818 page0 = 0xd00;
819
820 /* This dump the current register page */
821 len += snprintf(page + len, count - len,
822 "\n####################page %x##################\n ", (page0>>8));
823 for(n=0;n<=max;)
824 {
825 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
826 for(i=0;i<4 && n<=max;n+=4,i++)
827 len += snprintf(page + len, count - len,
828 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
829 }
830 len += snprintf(page + len, count - len,"\n");
831 *eof = 1;
832 return len;
833 }
834 static int proc_get_registers_e(char *page, char **start,
835 off_t offset, int count,
836 int *eof, void *data)
837 {
838 struct net_device *dev = data;
839 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
840
841 int len = 0;
842 int i,n,page0;
843
844 int max=0xff;
845 page0 = 0xe00;
846
847 /* This dump the current register page */
848 len += snprintf(page + len, count - len,
849 "\n####################page %x##################\n ", (page0>>8));
850 for(n=0;n<=max;)
851 {
852 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
853 for(i=0;i<4 && n<=max;n+=4,i++)
854 len += snprintf(page + len, count - len,
855 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
856 }
857 len += snprintf(page + len, count - len,"\n");
858 *eof = 1;
859 return len;
860 }
861
862 static int proc_get_stats_tx(char *page, char **start,
863 off_t offset, int count,
864 int *eof, void *data)
865 {
866 struct net_device *dev = data;
867 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
868
869 int len = 0;
870
871 len += snprintf(page + len, count - len,
872 "TX VI priority ok int: %lu\n"
873 "TX VI priority error int: %lu\n"
874 "TX VO priority ok int: %lu\n"
875 "TX VO priority error int: %lu\n"
876 "TX BE priority ok int: %lu\n"
877 "TX BE priority error int: %lu\n"
878 "TX BK priority ok int: %lu\n"
879 "TX BK priority error int: %lu\n"
880 "TX MANAGE priority ok int: %lu\n"
881 "TX MANAGE priority error int: %lu\n"
882 "TX BEACON priority ok int: %lu\n"
883 "TX BEACON priority error int: %lu\n"
884 // "TX high priority ok int: %lu\n"
885 // "TX high priority failed error int: %lu\n"
886 "TX queue resume: %lu\n"
887 "TX queue stopped?: %d\n"
888 "TX fifo overflow: %lu\n"
889 // "TX beacon: %lu\n"
890 "TX VI queue: %d\n"
891 "TX VO queue: %d\n"
892 "TX BE queue: %d\n"
893 "TX BK queue: %d\n"
894 // "TX HW queue: %d\n"
895 "TX VI dropped: %lu\n"
896 "TX VO dropped: %lu\n"
897 "TX BE dropped: %lu\n"
898 "TX BK dropped: %lu\n"
899 "TX total data packets %lu\n",
900 // "TX beacon aborted: %lu\n",
901 priv->stats.txviokint,
902 priv->stats.txvierr,
903 priv->stats.txvookint,
904 priv->stats.txvoerr,
905 priv->stats.txbeokint,
906 priv->stats.txbeerr,
907 priv->stats.txbkokint,
908 priv->stats.txbkerr,
909 priv->stats.txmanageokint,
910 priv->stats.txmanageerr,
911 priv->stats.txbeaconokint,
912 priv->stats.txbeaconerr,
913 // priv->stats.txhpokint,
914 // priv->stats.txhperr,
915 priv->stats.txresumed,
916 netif_queue_stopped(dev),
917 priv->stats.txoverflow,
918 // priv->stats.txbeacon,
919 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
920 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
921 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
922 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
923 // read_nic_byte(dev, TXFIFOCOUNT),
924 priv->stats.txvidrop,
925 priv->stats.txvodrop,
926 priv->stats.txbedrop,
927 priv->stats.txbkdrop,
928 priv->stats.txdatapkt
929 // priv->stats.txbeaconerr
930 );
931
932 *eof = 1;
933 return len;
934 }
935
936
937
938 static int proc_get_stats_rx(char *page, char **start,
939 off_t offset, int count,
940 int *eof, void *data)
941 {
942 struct net_device *dev = data;
943 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
944
945 int len = 0;
946
947 len += snprintf(page + len, count - len,
948 "RX packets: %lu\n"
949 "RX urb status error: %lu\n"
950 "RX invalid urb error: %lu\n",
951 priv->stats.rxoktotal,
952 priv->stats.rxstaterr,
953 priv->stats.rxurberr);
954
955 *eof = 1;
956 return len;
957 }
958
959 void rtl8192_proc_module_init(void)
960 {
961 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
962 rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
963 }
964
965
966 void rtl8192_proc_module_remove(void)
967 {
968 remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
969 }
970
971
972 void rtl8192_proc_remove_one(struct net_device *dev)
973 {
974 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
975
976
977 if (priv->dir_dev) {
978 // remove_proc_entry("stats-hw", priv->dir_dev);
979 remove_proc_entry("stats-tx", priv->dir_dev);
980 remove_proc_entry("stats-rx", priv->dir_dev);
981 // remove_proc_entry("stats-ieee", priv->dir_dev);
982 remove_proc_entry("stats-ap", priv->dir_dev);
983 remove_proc_entry("registers", priv->dir_dev);
984 remove_proc_entry("registers-1", priv->dir_dev);
985 remove_proc_entry("registers-2", priv->dir_dev);
986 remove_proc_entry("registers-8", priv->dir_dev);
987 remove_proc_entry("registers-9", priv->dir_dev);
988 remove_proc_entry("registers-a", priv->dir_dev);
989 remove_proc_entry("registers-b", priv->dir_dev);
990 remove_proc_entry("registers-c", priv->dir_dev);
991 remove_proc_entry("registers-d", priv->dir_dev);
992 remove_proc_entry("registers-e", priv->dir_dev);
993 // remove_proc_entry("cck-registers",priv->dir_dev);
994 // remove_proc_entry("ofdm-registers",priv->dir_dev);
995 //remove_proc_entry(dev->name, rtl8192_proc);
996 remove_proc_entry("wlan0", rtl8192_proc);
997 priv->dir_dev = NULL;
998 }
999 }
1000
1001
1002 void rtl8192_proc_init_one(struct net_device *dev)
1003 {
1004 struct proc_dir_entry *e;
1005 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1006 priv->dir_dev = create_proc_entry(dev->name,
1007 S_IFDIR | S_IRUGO | S_IXUGO,
1008 rtl8192_proc);
1009 if (!priv->dir_dev) {
1010 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1011 dev->name);
1012 return;
1013 }
1014 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1015 priv->dir_dev, proc_get_stats_rx, dev);
1016
1017 if (!e) {
1018 RT_TRACE(COMP_ERR,"Unable to initialize "
1019 "/proc/net/rtl8192/%s/stats-rx\n",
1020 dev->name);
1021 }
1022
1023
1024 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1025 priv->dir_dev, proc_get_stats_tx, dev);
1026
1027 if (!e) {
1028 RT_TRACE(COMP_ERR, "Unable to initialize "
1029 "/proc/net/rtl8192/%s/stats-tx\n",
1030 dev->name);
1031 }
1032
1033 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1034 priv->dir_dev, proc_get_stats_ap, dev);
1035
1036 if (!e) {
1037 RT_TRACE(COMP_ERR, "Unable to initialize "
1038 "/proc/net/rtl8192/%s/stats-ap\n",
1039 dev->name);
1040 }
1041
1042 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1043 priv->dir_dev, proc_get_registers, dev);
1044 if (!e) {
1045 RT_TRACE(COMP_ERR, "Unable to initialize "
1046 "/proc/net/rtl8192/%s/registers\n",
1047 dev->name);
1048 }
1049 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1050 priv->dir_dev, proc_get_registers_1, dev);
1051 if (!e) {
1052 RT_TRACE(COMP_ERR, "Unable to initialize "
1053 "/proc/net/rtl8192/%s/registers-1\n",
1054 dev->name);
1055 }
1056 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1057 priv->dir_dev, proc_get_registers_2, dev);
1058 if (!e) {
1059 RT_TRACE(COMP_ERR, "Unable to initialize "
1060 "/proc/net/rtl8192/%s/registers-2\n",
1061 dev->name);
1062 }
1063 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1064 priv->dir_dev, proc_get_registers_8, dev);
1065 if (!e) {
1066 RT_TRACE(COMP_ERR, "Unable to initialize "
1067 "/proc/net/rtl8192/%s/registers-8\n",
1068 dev->name);
1069 }
1070 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1071 priv->dir_dev, proc_get_registers_9, dev);
1072 if (!e) {
1073 RT_TRACE(COMP_ERR, "Unable to initialize "
1074 "/proc/net/rtl8192/%s/registers-9\n",
1075 dev->name);
1076 }
1077 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1078 priv->dir_dev, proc_get_registers_a, dev);
1079 if (!e) {
1080 RT_TRACE(COMP_ERR, "Unable to initialize "
1081 "/proc/net/rtl8192/%s/registers-a\n",
1082 dev->name);
1083 }
1084 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1085 priv->dir_dev, proc_get_registers_b, dev);
1086 if (!e) {
1087 RT_TRACE(COMP_ERR, "Unable to initialize "
1088 "/proc/net/rtl8192/%s/registers-b\n",
1089 dev->name);
1090 }
1091 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1092 priv->dir_dev, proc_get_registers_c, dev);
1093 if (!e) {
1094 RT_TRACE(COMP_ERR, "Unable to initialize "
1095 "/proc/net/rtl8192/%s/registers-c\n",
1096 dev->name);
1097 }
1098 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1099 priv->dir_dev, proc_get_registers_d, dev);
1100 if (!e) {
1101 RT_TRACE(COMP_ERR, "Unable to initialize "
1102 "/proc/net/rtl8192/%s/registers-d\n",
1103 dev->name);
1104 }
1105 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1106 priv->dir_dev, proc_get_registers_e, dev);
1107 if (!e) {
1108 RT_TRACE(COMP_ERR, "Unable to initialize "
1109 "/proc/net/rtl8192/%s/registers-e\n",
1110 dev->name);
1111 }
1112 }
1113 /****************************************************************************
1114 -----------------------------MISC STUFF-------------------------
1115 *****************************************************************************/
1116
1117 /* this is only for debugging */
1118 void print_buffer(u32 *buffer, int len)
1119 {
1120 int i;
1121 u8 *buf =(u8*)buffer;
1122
1123 printk("ASCII BUFFER DUMP (len: %x):\n",len);
1124
1125 for(i=0;i<len;i++)
1126 printk("%c",buf[i]);
1127
1128 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1129
1130 for(i=0;i<len;i++)
1131 printk("%x",buf[i]);
1132
1133 printk("\n");
1134 }
1135
1136 //short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1137 short check_nic_enough_desc(struct net_device *dev,int queue_index)
1138 {
1139 struct r8192_priv *priv = ieee80211_priv(dev);
1140 int used = atomic_read(&priv->tx_pending[queue_index]);
1141
1142 return (used < MAX_TX_URB);
1143 }
1144
1145 void tx_timeout(struct net_device *dev)
1146 {
1147 struct r8192_priv *priv = ieee80211_priv(dev);
1148 //rtl8192_commit(dev);
1149
1150 schedule_work(&priv->reset_wq);
1151 //DMESG("TXTIMEOUT");
1152 }
1153
1154
1155 /* this is only for debug */
1156 void dump_eprom(struct net_device *dev)
1157 {
1158 int i;
1159 for(i=0; i<63; i++)
1160 RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
1161 }
1162
1163 /* this is only for debug */
1164 void rtl8192_dump_reg(struct net_device *dev)
1165 {
1166 int i;
1167 int n;
1168 int max=0x1ff;
1169
1170 RT_TRACE(COMP_PHY, "Dumping NIC register map");
1171
1172 for(n=0;n<=max;)
1173 {
1174 printk( "\nD: %2x> ", n);
1175 for(i=0;i<16 && n<=max;i++,n++)
1176 printk("%2x ",read_nic_byte(dev,n));
1177 }
1178 printk("\n");
1179 }
1180
1181 /****************************************************************************
1182 ------------------------------HW STUFF---------------------------
1183 *****************************************************************************/
1184
1185 void rtl8192_set_mode(struct net_device *dev,int mode)
1186 {
1187 u8 ecmd;
1188 ecmd=read_nic_byte(dev, EPROM_CMD);
1189 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1190 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1191 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1192 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1193 write_nic_byte(dev, EPROM_CMD, ecmd);
1194 }
1195
1196
1197 void rtl8192_update_msr(struct net_device *dev)
1198 {
1199 struct r8192_priv *priv = ieee80211_priv(dev);
1200 u8 msr;
1201
1202 msr = read_nic_byte(dev, MSR);
1203 msr &= ~ MSR_LINK_MASK;
1204
1205 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1206 * msr must be updated if the state is ASSOCIATING.
1207 * this is intentional and make sense for ad-hoc and
1208 * master (see the create BSS/IBSS func)
1209 */
1210 if (priv->ieee80211->state == IEEE80211_LINKED){
1211
1212 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1213 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1214 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1215 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1216 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1217 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1218
1219 }else
1220 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1221
1222 write_nic_byte(dev, MSR, msr);
1223 }
1224
1225 void rtl8192_set_chan(struct net_device *dev,short ch)
1226 {
1227 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1228 // u32 tx;
1229 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1230 //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1231 priv->chan=ch;
1232
1233 /* this hack should avoid frame TX during channel setting*/
1234
1235
1236 // tx = read_nic_dword(dev,TX_CONF);
1237 // tx &= ~TX_LOOPBACK_MASK;
1238
1239 #ifndef LOOP_TEST
1240 // write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1241
1242 //need to implement rf set channel here WB
1243
1244 if (priv->rf_set_chan)
1245 priv->rf_set_chan(dev,priv->chan);
1246 mdelay(10);
1247 // write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1248 #endif
1249 }
1250
1251 static void rtl8192_rx_isr(struct urb *urb);
1252
1253 u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1254 {
1255
1256 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1257 + pstats->RxBufShift);
1258
1259 }
1260 static int rtl8192_rx_initiate(struct net_device*dev)
1261 {
1262 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1263 struct urb *entry;
1264 struct sk_buff *skb;
1265 struct rtl8192_rx_info *info;
1266
1267 /* nomal packet rx procedure */
1268 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1269 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1270 if (!skb)
1271 break;
1272 entry = usb_alloc_urb(0, GFP_KERNEL);
1273 if (!entry) {
1274 kfree_skb(skb);
1275 break;
1276 }
1277 // printk("nomal packet IN request!\n");
1278 usb_fill_bulk_urb(entry, priv->udev,
1279 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb),
1280 RX_URB_SIZE, rtl8192_rx_isr, skb);
1281 info = (struct rtl8192_rx_info *) skb->cb;
1282 info->urb = entry;
1283 info->dev = dev;
1284 info->out_pipe = 3; //denote rx normal packet queue
1285 skb_queue_tail(&priv->rx_queue, skb);
1286 usb_submit_urb(entry, GFP_KERNEL);
1287 }
1288
1289 /* command packet rx procedure */
1290 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1291 // printk("command packet IN request!\n");
1292 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1293 if (!skb)
1294 break;
1295 entry = usb_alloc_urb(0, GFP_KERNEL);
1296 if (!entry) {
1297 kfree_skb(skb);
1298 break;
1299 }
1300 usb_fill_bulk_urb(entry, priv->udev,
1301 usb_rcvbulkpipe(priv->udev, 9), skb_tail_pointer(skb),
1302 RX_URB_SIZE, rtl8192_rx_isr, skb);
1303 info = (struct rtl8192_rx_info *) skb->cb;
1304 info->urb = entry;
1305 info->dev = dev;
1306 info->out_pipe = 9; //denote rx cmd packet queue
1307 skb_queue_tail(&priv->rx_queue, skb);
1308 usb_submit_urb(entry, GFP_KERNEL);
1309 }
1310
1311 return 0;
1312 }
1313
1314 void rtl8192_set_rxconf(struct net_device *dev)
1315 {
1316 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1317 u32 rxconf;
1318
1319 rxconf=read_nic_dword(dev,RCR);
1320 rxconf = rxconf &~ MAC_FILTER_MASK;
1321 rxconf = rxconf | RCR_AMF;
1322 rxconf = rxconf | RCR_ADF;
1323 rxconf = rxconf | RCR_AB;
1324 rxconf = rxconf | RCR_AM;
1325 //rxconf = rxconf | RCR_ACF;
1326
1327 if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1328
1329 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1330 dev->flags & IFF_PROMISC){
1331 rxconf = rxconf | RCR_AAP;
1332 } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1333 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1334 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1335 }*/else{
1336 rxconf = rxconf | RCR_APM;
1337 rxconf = rxconf | RCR_CBSSID;
1338 }
1339
1340
1341 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1342 rxconf = rxconf | RCR_AICV;
1343 rxconf = rxconf | RCR_APWRMGT;
1344 }
1345
1346 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1347 rxconf = rxconf | RCR_ACRC32;
1348
1349
1350 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1351 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1352 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1353 rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1354
1355 // rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1356 rxconf = rxconf | RCR_ONLYERLPKT;
1357
1358 // rxconf = rxconf &~ RCR_CS_MASK;
1359 // rxconf = rxconf | (1<<RCR_CS_SHIFT);
1360
1361 write_nic_dword(dev, RCR, rxconf);
1362
1363 #ifdef DEBUG_RX
1364 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1365 #endif
1366 }
1367 //wait to be removed
1368 void rtl8192_rx_enable(struct net_device *dev)
1369 {
1370 //u8 cmd;
1371
1372 //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1373
1374 rtl8192_rx_initiate(dev);
1375
1376 // rtl8192_set_rxconf(dev);
1377 }
1378
1379
1380 void rtl8192_tx_enable(struct net_device *dev)
1381 {
1382 }
1383
1384 void rtl8192_rtx_disable(struct net_device *dev)
1385 {
1386 u8 cmd;
1387 struct r8192_priv *priv = ieee80211_priv(dev);
1388 struct sk_buff *skb;
1389 struct rtl8192_rx_info *info;
1390
1391 cmd=read_nic_byte(dev,CMDR);
1392 write_nic_byte(dev, CMDR, cmd &~ \
1393 (CR_TE|CR_RE));
1394 force_pci_posting(dev);
1395 mdelay(10);
1396
1397 while ((skb = __skb_dequeue(&priv->rx_queue))) {
1398 info = (struct rtl8192_rx_info *) skb->cb;
1399 if (!info->urb)
1400 continue;
1401
1402 usb_kill_urb(info->urb);
1403 kfree_skb(skb);
1404 }
1405
1406 if (skb_queue_len(&priv->skb_queue)) {
1407 printk(KERN_WARNING "skb_queue not empty\n");
1408 }
1409
1410 skb_queue_purge(&priv->skb_queue);
1411 return;
1412 }
1413
1414
1415 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1416 {
1417 return 0;
1418 }
1419
1420 inline u16 ieeerate2rtlrate(int rate)
1421 {
1422 switch(rate){
1423 case 10:
1424 return 0;
1425 case 20:
1426 return 1;
1427 case 55:
1428 return 2;
1429 case 110:
1430 return 3;
1431 case 60:
1432 return 4;
1433 case 90:
1434 return 5;
1435 case 120:
1436 return 6;
1437 case 180:
1438 return 7;
1439 case 240:
1440 return 8;
1441 case 360:
1442 return 9;
1443 case 480:
1444 return 10;
1445 case 540:
1446 return 11;
1447 default:
1448 return 3;
1449
1450 }
1451 }
1452 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1453 inline u16 rtl8192_rate2rate(short rate)
1454 {
1455 if (rate >11) return 0;
1456 return rtl_rate[rate];
1457 }
1458
1459 static void rtl8192_rx_isr(struct urb *urb)
1460 {
1461 struct sk_buff *skb = (struct sk_buff *) urb->context;
1462 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1463 struct net_device *dev = info->dev;
1464 struct r8192_priv *priv = ieee80211_priv(dev);
1465 int out_pipe = info->out_pipe;
1466 int err;
1467 if(!priv->up)
1468 return;
1469 if (unlikely(urb->status)) {
1470 info->urb = NULL;
1471 priv->stats.rxstaterr++;
1472 priv->ieee80211->stats.rx_errors++;
1473 usb_free_urb(urb);
1474 // printk("%s():rx status err\n",__FUNCTION__);
1475 return;
1476 }
1477
1478 skb_unlink(skb, &priv->rx_queue);
1479 skb_put(skb, urb->actual_length);
1480
1481 skb_queue_tail(&priv->skb_queue, skb);
1482 tasklet_schedule(&priv->irq_rx_tasklet);
1483
1484 skb = dev_alloc_skb(RX_URB_SIZE);
1485 if (unlikely(!skb)) {
1486 usb_free_urb(urb);
1487 printk("%s():can,t alloc skb\n",__FUNCTION__);
1488 /* TODO check rx queue length and refill *somewhere* */
1489 return;
1490 }
1491
1492 usb_fill_bulk_urb(urb, priv->udev,
1493 usb_rcvbulkpipe(priv->udev, out_pipe),
1494 skb_tail_pointer(skb),
1495 RX_URB_SIZE, rtl8192_rx_isr, skb);
1496
1497 info = (struct rtl8192_rx_info *) skb->cb;
1498 info->urb = urb;
1499 info->dev = dev;
1500 info->out_pipe = out_pipe;
1501
1502 urb->transfer_buffer = skb_tail_pointer(skb);
1503 urb->context = skb;
1504 skb_queue_tail(&priv->rx_queue, skb);
1505 err = usb_submit_urb(urb, GFP_ATOMIC);
1506 if(err && err != -EPERM)
1507 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1508 }
1509
1510 u32
1511 rtl819xusb_rx_command_packet(
1512 struct net_device *dev,
1513 struct ieee80211_rx_stats *pstats
1514 )
1515 {
1516 u32 status;
1517
1518 //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
1519
1520 status = cmpk_message_handle_rx(dev, pstats);
1521 if (status)
1522 {
1523 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
1524 }
1525 else
1526 {
1527 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
1528 }
1529
1530 //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
1531 return status;
1532 }
1533
1534 void rtl8192_data_hard_stop(struct net_device *dev)
1535 {
1536 //FIXME !!
1537 }
1538
1539
1540 void rtl8192_data_hard_resume(struct net_device *dev)
1541 {
1542 // FIXME !!
1543 }
1544
1545 /* this function TX data frames when the ieee80211 stack requires this.
1546 * It checks also if we need to stop the ieee tx queue, eventually do it
1547 */
1548 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
1549 {
1550 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1551 int ret;
1552 unsigned long flags;
1553 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1554 u8 queue_index = tcb_desc->queue_index;
1555
1556 /* shall not be referred by command packet */
1557 assert(queue_index != TXCMD_QUEUE);
1558
1559 spin_lock_irqsave(&priv->tx_lock,flags);
1560
1561 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1562 // tcb_desc->RATRIndex = 7;
1563 // tcb_desc->bTxDisableRateFallBack = 1;
1564 // tcb_desc->bTxUseDriverAssingedRate = 1;
1565 tcb_desc->bTxEnableFwCalcDur = 1;
1566 skb_push(skb, priv->ieee80211->tx_headroom);
1567 ret = priv->ops->rtl819x_tx(dev, skb);
1568
1569 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1570 //priv->ieee80211->stats.tx_packets++;
1571
1572 spin_unlock_irqrestore(&priv->tx_lock,flags);
1573
1574 // return ret;
1575 return;
1576 }
1577
1578 /* This is a rough attempt to TX a frame
1579 * This is called by the ieee 80211 stack to TX management frames.
1580 * If the ring is full packet are dropped (for data frame the queue
1581 * is stopped before this can happen).
1582 */
1583 int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1584 {
1585 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1586 int ret;
1587 unsigned long flags;
1588 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1589 u8 queue_index = tcb_desc->queue_index;
1590
1591
1592 spin_lock_irqsave(&priv->tx_lock,flags);
1593
1594 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1595 if(queue_index == TXCMD_QUEUE) {
1596 skb_push(skb, USB_HWDESC_HEADER_LEN);
1597 priv->ops->rtl819x_tx_cmd(dev, skb);
1598 ret = 1;
1599 spin_unlock_irqrestore(&priv->tx_lock,flags);
1600 return ret;
1601 } else {
1602 skb_push(skb, priv->ieee80211->tx_headroom);
1603 ret = priv->ops->rtl819x_tx(dev, skb);
1604 }
1605
1606 spin_unlock_irqrestore(&priv->tx_lock,flags);
1607
1608 return ret;
1609 }
1610
1611
1612 void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1613
1614
1615 static void rtl8192_tx_isr(struct urb *tx_urb)
1616 {
1617 struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
1618 struct net_device *dev = NULL;
1619 struct r8192_priv *priv = NULL;
1620 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1621 u8 queue_index = tcb_desc->queue_index;
1622 // bool bToSend0Byte;
1623 // u16 BufLen = skb->len;
1624
1625 memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
1626 priv = ieee80211_priv(dev);
1627
1628 if(tcb_desc->queue_index != TXCMD_QUEUE) {
1629 if(tx_urb->status == 0) {
1630 // dev->trans_start = jiffies;
1631 // As act as station mode, destion shall be unicast address.
1632 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1633 //priv->ieee80211->stats.tx_packets++;
1634 priv->stats.txoktotal++;
1635 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
1636 priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
1637 } else {
1638 priv->ieee80211->stats.tx_errors++;
1639 //priv->stats.txmanageerr++;
1640 /* TODO */
1641 }
1642 }
1643
1644 /* free skb and tx_urb */
1645 if(skb != NULL) {
1646 dev_kfree_skb_any(skb);
1647 usb_free_urb(tx_urb);
1648 atomic_dec(&priv->tx_pending[queue_index]);
1649 }
1650
1651 {
1652 //
1653 // Handle HW Beacon:
1654 // We had transfer our beacon frame to host controler at this moment.
1655 //
1656 //
1657 // Caution:
1658 // Handling the wait queue of command packets.
1659 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
1660 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
1661 //
1662 if (queue_index == MGNT_QUEUE){
1663 if (priv->ieee80211->ack_tx_to_ieee){
1664 if (rtl8192_is_tx_queue_empty(dev)){
1665 priv->ieee80211->ack_tx_to_ieee = 0;
1666 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1667 }
1668 }
1669 }
1670 /* Handle MPDU in wait queue. */
1671 if(queue_index != BEACON_QUEUE) {
1672 /* Don't send data frame during scanning.*/
1673 if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
1674 (!(priv->ieee80211->queue_stop))) {
1675 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
1676 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
1677
1678 return; //modified by david to avoid further processing AMSDU
1679 }
1680 }
1681 }
1682 }
1683
1684 void rtl8192_beacon_stop(struct net_device *dev)
1685 {
1686 u8 msr, msrm, msr2;
1687 struct r8192_priv *priv = ieee80211_priv(dev);
1688
1689 msr = read_nic_byte(dev, MSR);
1690 msrm = msr & MSR_LINK_MASK;
1691 msr2 = msr & ~MSR_LINK_MASK;
1692
1693 if(NIC_8192U == priv->card_8192) {
1694 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
1695 }
1696 if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
1697 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
1698 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
1699 write_nic_byte(dev, MSR, msr);
1700 }
1701 }
1702
1703 void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
1704 {
1705 struct r8192_priv *priv = ieee80211_priv(dev);
1706 struct ieee80211_network *net;
1707 u8 i=0, basic_rate = 0;
1708 net = & priv->ieee80211->current_network;
1709
1710 for (i=0; i<net->rates_len; i++)
1711 {
1712 basic_rate = net->rates[i]&0x7f;
1713 switch(basic_rate)
1714 {
1715 case MGN_1M: *rate_config |= RRSR_1M; break;
1716 case MGN_2M: *rate_config |= RRSR_2M; break;
1717 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1718 case MGN_11M: *rate_config |= RRSR_11M; break;
1719 case MGN_6M: *rate_config |= RRSR_6M; break;
1720 case MGN_9M: *rate_config |= RRSR_9M; break;
1721 case MGN_12M: *rate_config |= RRSR_12M; break;
1722 case MGN_18M: *rate_config |= RRSR_18M; break;
1723 case MGN_24M: *rate_config |= RRSR_24M; break;
1724 case MGN_36M: *rate_config |= RRSR_36M; break;
1725 case MGN_48M: *rate_config |= RRSR_48M; break;
1726 case MGN_54M: *rate_config |= RRSR_54M; break;
1727 }
1728 }
1729 for (i=0; i<net->rates_ex_len; i++)
1730 {
1731 basic_rate = net->rates_ex[i]&0x7f;
1732 switch(basic_rate)
1733 {
1734 case MGN_1M: *rate_config |= RRSR_1M; break;
1735 case MGN_2M: *rate_config |= RRSR_2M; break;
1736 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1737 case MGN_11M: *rate_config |= RRSR_11M; break;
1738 case MGN_6M: *rate_config |= RRSR_6M; break;
1739 case MGN_9M: *rate_config |= RRSR_9M; break;
1740 case MGN_12M: *rate_config |= RRSR_12M; break;
1741 case MGN_18M: *rate_config |= RRSR_18M; break;
1742 case MGN_24M: *rate_config |= RRSR_24M; break;
1743 case MGN_36M: *rate_config |= RRSR_36M; break;
1744 case MGN_48M: *rate_config |= RRSR_48M; break;
1745 case MGN_54M: *rate_config |= RRSR_54M; break;
1746 }
1747 }
1748 }
1749
1750
1751 #define SHORT_SLOT_TIME 9
1752 #define NON_SHORT_SLOT_TIME 20
1753
1754 void rtl8192_update_cap(struct net_device* dev, u16 cap)
1755 {
1756 //u32 tmp = 0;
1757 struct r8192_priv *priv = ieee80211_priv(dev);
1758 struct ieee80211_network *net = &priv->ieee80211->current_network;
1759 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1760
1761 //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
1762 if(0)
1763 {
1764 u8 tmp = 0;
1765 tmp = ((priv->nCur40MhzPrimeSC) << 5);
1766 if (priv->short_preamble)
1767 tmp |= 0x80;
1768 write_nic_byte(dev, RRSR+2, tmp);
1769 }
1770
1771 if (net->mode & (IEEE_G|IEEE_N_24G))
1772 {
1773 u8 slot_time = 0;
1774 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1775 {//short slot time
1776 slot_time = SHORT_SLOT_TIME;
1777 }
1778 else //long slot time
1779 slot_time = NON_SHORT_SLOT_TIME;
1780 priv->slot_time = slot_time;
1781 write_nic_byte(dev, SLOT_TIME, slot_time);
1782 }
1783
1784 }
1785 void rtl8192_net_update(struct net_device *dev)
1786 {
1787
1788 struct r8192_priv *priv = ieee80211_priv(dev);
1789 struct ieee80211_network *net;
1790 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1791 u16 rate_config = 0;
1792 net = & priv->ieee80211->current_network;
1793
1794 rtl8192_config_rate(dev, &rate_config);
1795 priv->basic_rate = rate_config &= 0x15f;
1796
1797 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1798 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1799 //for(i=0;i<ETH_ALEN;i++)
1800 // write_nic_byte(dev,BSSID+i,net->bssid[i]);
1801
1802 rtl8192_update_msr(dev);
1803 // rtl8192_update_cap(dev, net->capability);
1804 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1805 {
1806 write_nic_word(dev, ATIMWND, 2);
1807 write_nic_word(dev, BCN_DMATIME, 1023);
1808 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1809 // write_nic_word(dev, BcnIntTime, 100);
1810 write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
1811 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1812 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1813 // TODO: BcnIFS may required to be changed on ASIC
1814 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1815
1816 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1817 }
1818
1819
1820
1821 }
1822
1823 //temporary hw beacon is not used any more.
1824 //open it when necessary
1825 #if 1
1826 void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
1827 {
1828 }
1829 #endif
1830 inline u8 rtl8192_IsWirelessBMode(u16 rate)
1831 {
1832 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1833 return 1;
1834 else return 0;
1835 }
1836
1837 u16 N_DBPSOfRate(u16 DataRate);
1838
1839 u16 ComputeTxTime(
1840 u16 FrameLength,
1841 u16 DataRate,
1842 u8 bManagementFrame,
1843 u8 bShortPreamble
1844 )
1845 {
1846 u16 FrameTime;
1847 u16 N_DBPS;
1848 u16 Ceiling;
1849
1850 if( rtl8192_IsWirelessBMode(DataRate) )
1851 {
1852 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1853 { // long preamble
1854 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1855 }
1856 else
1857 { // Short preamble
1858 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1859 }
1860 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1861 FrameTime ++;
1862 } else { //802.11g DSSS-OFDM PLCP length field calculation.
1863 N_DBPS = N_DBPSOfRate(DataRate);
1864 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1865 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1866 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1867 }
1868 return FrameTime;
1869 }
1870
1871 u16 N_DBPSOfRate(u16 DataRate)
1872 {
1873 u16 N_DBPS = 24;
1874
1875 switch(DataRate)
1876 {
1877 case 60:
1878 N_DBPS = 24;
1879 break;
1880
1881 case 90:
1882 N_DBPS = 36;
1883 break;
1884
1885 case 120:
1886 N_DBPS = 48;
1887 break;
1888
1889 case 180:
1890 N_DBPS = 72;
1891 break;
1892
1893 case 240:
1894 N_DBPS = 96;
1895 break;
1896
1897 case 360:
1898 N_DBPS = 144;
1899 break;
1900
1901 case 480:
1902 N_DBPS = 192;
1903 break;
1904
1905 case 540:
1906 N_DBPS = 216;
1907 break;
1908
1909 default:
1910 break;
1911 }
1912
1913 return N_DBPS;
1914 }
1915
1916 void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
1917 {
1918 usb_free_urb(tx_cmd_urb);
1919 }
1920
1921 unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
1922
1923 if(tx_queue >= 9)
1924 {
1925 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
1926 return 0x04;
1927 }
1928 return priv->txqueue_to_outpipemap[tx_queue];
1929 }
1930
1931 short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1932 {
1933 struct r8192_priv *priv = ieee80211_priv(dev);
1934 int status;
1935 struct urb *tx_urb;
1936 unsigned int idx_pipe;
1937 tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
1938 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1939 u8 queue_index = tcb_desc->queue_index;
1940 u32 PktSize = 0;
1941
1942 //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
1943 atomic_inc(&priv->tx_pending[queue_index]);
1944
1945 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
1946 if(!tx_urb){
1947 dev_kfree_skb(skb);
1948 return -ENOMEM;
1949 }
1950
1951 memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
1952
1953 /* Tx descriptor ought to be set according to the skb->cb */
1954 pdesc->LINIP = tcb_desc->bLastIniPkt;
1955 PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
1956 pdesc->PktSize = PktSize;
1957 //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
1958 //----------------------------------------------------------------------------
1959 // Fill up USB_OUT_CONTEXT.
1960 //----------------------------------------------------------------------------
1961 // Get index to out pipe from specified QueueID.
1962 idx_pipe = txqueue2outpipe(priv,queue_index);
1963 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
1964
1965 usb_fill_bulk_urb(tx_urb,
1966 priv->udev,
1967 usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
1968 skb->data,
1969 skb->len,
1970 rtl8192_tx_isr,
1971 skb);
1972
1973 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
1974 if (!status){
1975 return 0;
1976 }else{
1977 printk("Error TX CMD URB, error %d",
1978 status);
1979 return -1;
1980 }
1981 }
1982
1983 /*
1984 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1985 * in TxFwInfo data structure
1986 * 2006.10.30 by Emily
1987 *
1988 * \param QUEUEID Software Queue
1989 */
1990 u8 MapHwQueueToFirmwareQueue(u8 QueueID)
1991 {
1992 u8 QueueSelect = 0x0; //defualt set to
1993
1994 switch(QueueID) {
1995 case BE_QUEUE:
1996 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
1997 break;
1998
1999 case BK_QUEUE:
2000 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
2001 break;
2002
2003 case VO_QUEUE:
2004 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
2005 break;
2006
2007 case VI_QUEUE:
2008 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
2009 break;
2010 case MGNT_QUEUE:
2011 QueueSelect = QSLT_MGNT;
2012 break;
2013
2014 case BEACON_QUEUE:
2015 QueueSelect = QSLT_BEACON;
2016 break;
2017
2018 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2019 // TODO: Remove Assertions
2020 //#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2021 case TXCMD_QUEUE:
2022 QueueSelect = QSLT_CMD;
2023 break;
2024 //#endif
2025 case HIGH_QUEUE:
2026 QueueSelect = QSLT_HIGH;
2027 break;
2028
2029 default:
2030 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2031 break;
2032 }
2033 return QueueSelect;
2034 }
2035
2036 u8 MRateToHwRate8190Pci(u8 rate)
2037 {
2038 u8 ret = DESC92S_RATE1M;
2039
2040 switch(rate)
2041 {
2042 // CCK and OFDM non-HT rates
2043 case MGN_1M: ret = DESC92S_RATE1M; break;
2044 case MGN_2M: ret = DESC92S_RATE2M; break;
2045 case MGN_5_5M: ret = DESC92S_RATE5_5M; break;
2046 case MGN_11M: ret = DESC92S_RATE11M; break;
2047 case MGN_6M: ret = DESC92S_RATE6M; break;
2048 case MGN_9M: ret = DESC92S_RATE9M; break;
2049 case MGN_12M: ret = DESC92S_RATE12M; break;
2050 case MGN_18M: ret = DESC92S_RATE18M; break;
2051 case MGN_24M: ret = DESC92S_RATE24M; break;
2052 case MGN_36M: ret = DESC92S_RATE36M; break;
2053 case MGN_48M: ret = DESC92S_RATE48M; break;
2054 case MGN_54M: ret = DESC92S_RATE54M; break;
2055
2056 // HT rates since here
2057 case MGN_MCS0: ret = DESC92S_RATEMCS0; break;
2058 case MGN_MCS1: ret = DESC92S_RATEMCS1; break;
2059 case MGN_MCS2: ret = DESC92S_RATEMCS2; break;
2060 case MGN_MCS3: ret = DESC92S_RATEMCS3; break;
2061 case MGN_MCS4: ret = DESC92S_RATEMCS4; break;
2062 case MGN_MCS5: ret = DESC92S_RATEMCS5; break;
2063 case MGN_MCS6: ret = DESC92S_RATEMCS6; break;
2064 case MGN_MCS7: ret = DESC92S_RATEMCS7; break;
2065 case MGN_MCS8: ret = DESC92S_RATEMCS8; break;
2066 case MGN_MCS9: ret = DESC92S_RATEMCS9; break;
2067 case MGN_MCS10: ret = DESC92S_RATEMCS10; break;
2068 case MGN_MCS11: ret = DESC92S_RATEMCS11; break;
2069 case MGN_MCS12: ret = DESC92S_RATEMCS12; break;
2070 case MGN_MCS13: ret = DESC92S_RATEMCS13; break;
2071 case MGN_MCS14: ret = DESC92S_RATEMCS14; break;
2072 case MGN_MCS15: ret = DESC92S_RATEMCS15; break;
2073
2074 // Set the highest SG rate
2075 case MGN_MCS0_SG:
2076 case MGN_MCS1_SG:
2077 case MGN_MCS2_SG:
2078 case MGN_MCS3_SG:
2079 case MGN_MCS4_SG:
2080 case MGN_MCS5_SG:
2081 case MGN_MCS6_SG:
2082 case MGN_MCS7_SG:
2083 case MGN_MCS8_SG:
2084 case MGN_MCS9_SG:
2085 case MGN_MCS10_SG:
2086 case MGN_MCS11_SG:
2087 case MGN_MCS12_SG:
2088 case MGN_MCS13_SG:
2089 case MGN_MCS14_SG:
2090 case MGN_MCS15_SG:
2091 {
2092 ret = DESC92S_RATEMCS15_SG;
2093 break;
2094 }
2095
2096 default: break;
2097 }
2098 return ret;
2099 }
2100
2101 u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2102 {
2103 u8 tmp_Short;
2104
2105 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2106
2107 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2108 tmp_Short = 0;
2109
2110 return tmp_Short;
2111 }
2112
2113 static void tx_zero_isr(struct urb *tx_urb)
2114 {
2115 return;
2116 }
2117
2118
2119 /*
2120 * The tx procedure is just as following, skb->cb will contain all the following
2121 *information: * priority, morefrag, rate, &dev.
2122 * */
2123 // <Note> Buffer format for 8192S Usb bulk out:
2124 //
2125 // --------------------------------------------------
2126 // | 8192S Usb Tx Desc | 802_11_MAC_header | data |
2127 // --------------------------------------------------
2128 // | 32 bytes | 24 bytes |0-2318 bytes|
2129 // --------------------------------------------------
2130 // |<------------ BufferLen ------------------------->|
2131
2132 short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2133 {
2134 struct r8192_priv *priv = ieee80211_priv(dev);
2135 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2136 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2137 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2138 struct usb_device *udev = priv->udev;
2139 int pend;
2140 int status;
2141 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2142 //int urb_len;
2143 unsigned int idx_pipe;
2144 u16 MPDUOverhead = 0;
2145 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2146
2147 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2148 /* we are locked here so the two atomic_read and inc are executed
2149 * without interleaves * !!! For debug purpose */
2150 if( pend > MAX_TX_URB){
2151 switch (tcb_desc->queue_index) {
2152 case VO_PRIORITY:
2153 priv->stats.txvodrop++;
2154 break;
2155 case VI_PRIORITY:
2156 priv->stats.txvidrop++;
2157 break;
2158 case BE_PRIORITY:
2159 priv->stats.txbedrop++;
2160 break;
2161 default://BK_PRIORITY
2162 priv->stats.txbkdrop++;
2163 break;
2164 }
2165 printk("To discard skb packet!\n");
2166 dev_kfree_skb_any(skb);
2167 return -1;
2168 }
2169
2170 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
2171 if(!tx_urb){
2172 dev_kfree_skb_any(skb);
2173 return -ENOMEM;
2174 }
2175
2176 memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2177
2178
2179 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
2180
2181 /* Fill Tx descriptor */
2182 //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2183
2184 // This part can just fill to the first descriptor of the frame.
2185 /* DWORD 0 */
2186 tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2187
2188
2189 tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2190 //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2191 tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2192
2193
2194 // Aggregation related
2195 if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2196 tx_desc->AllowAggregation = 1;
2197 /* DWORD 1 */
2198 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2199 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2200 } else {
2201 tx_desc->AllowAggregation = 0;
2202 /* DWORD 1 */
2203 //tx_fwinfo->RxMF = 0;
2204 //tx_fwinfo->RxAMD = 0;
2205 }
2206
2207 //
2208 // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
2209 // FW according as this SSN to do necessary packet retry.
2210 // 2008.06.06.
2211 //
2212 {
2213 u8 *pSeq;
2214 u16 Temp;
2215 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
2216 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
2217 Temp = pSeq[0];
2218 Temp <<= 12;
2219 Temp |= (*(u16 *)pSeq)>>4;
2220 tx_desc->Seq = Temp;
2221 }
2222
2223 /* Protection mode related */
2224 tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
2225 tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
2226 tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
2227 tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
2228 tx_desc->RTSRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
2229 tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
2230 tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
2231 tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
2232 (tcb_desc->bRTSUseShortGI?1:0);
2233 //LZM 090219
2234 tx_desc->DisRTSFB = 0;
2235 tx_desc->RTSRateFBLmt = 0xf;
2236
2237 // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
2238 //tx_desc->DisRTSFB = 0x01;
2239
2240 /* Set Bandwidth and sub-channel settings. */
2241 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
2242 {
2243 if(tcb_desc->bPacketBW) {
2244 tx_desc->TxBandwidth = 1;
2245 tx_desc->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
2246 } else {
2247 tx_desc->TxBandwidth = 0;
2248 tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
2249 }
2250 } else {
2251 tx_desc->TxBandwidth = 0;
2252 tx_desc->TxSubCarrier = 0;
2253 }
2254
2255
2256 //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2257 /* DWORD 0 */
2258 tx_desc->LINIP = 0;
2259 //tx_desc->CmdInit = 1; //92su del
2260 tx_desc->Offset = USB_HWDESC_HEADER_LEN;
2261
2262 {
2263 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
2264 }
2265
2266 /*DWORD 1*/
2267 //tx_desc->SecCAMID= 0;//92su del
2268 tx_desc->RaBRSRID= tcb_desc->RATRIndex;
2269 //#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
2270
2271 {
2272 MPDUOverhead = 0;
2273 //tx_desc->NoEnc = 1;//92su del
2274 }
2275
2276 tx_desc->SecType = 0x0;
2277
2278 if (tcb_desc->bHwSec)
2279 {
2280 switch (priv->ieee80211->pairwise_key_type)
2281 {
2282 case KEY_TYPE_WEP40:
2283 case KEY_TYPE_WEP104:
2284 tx_desc->SecType = 0x1;
2285 //tx_desc->NoEnc = 0;//92su del
2286 break;
2287 case KEY_TYPE_TKIP:
2288 tx_desc->SecType = 0x2;
2289 //tx_desc->NoEnc = 0;//92su del
2290 break;
2291 case KEY_TYPE_CCMP:
2292 tx_desc->SecType = 0x3;
2293 //tx_desc->NoEnc = 0;//92su del
2294 break;
2295 case KEY_TYPE_NA:
2296 tx_desc->SecType = 0x0;
2297 //tx_desc->NoEnc = 1;//92su del
2298 break;
2299 default:
2300 tx_desc->SecType = 0x0;
2301 //tx_desc->NoEnc = 1;//92su del
2302 break;
2303 }
2304 }
2305
2306 //tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);//92su del
2307
2308
2309 tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
2310 tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
2311 tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
2312
2313 tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
2314
2315
2316 /* Fill fields that are required to be initialized in all of the descriptors */
2317 //DWORD 0
2318 tx_desc->FirstSeg = 1;
2319 tx_desc->LastSeg = 1;
2320 tx_desc->OWN = 1;
2321
2322 {
2323 //DWORD 2
2324 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
2325 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
2326 }
2327
2328 /* Get index to out pipe from specified QueueID */
2329 idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
2330 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
2331
2332 //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
2333 //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
2334
2335 /* To submit bulk urb */
2336 usb_fill_bulk_urb(tx_urb,
2337 udev,
2338 usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
2339 skb->data,
2340 skb->len, rtl8192_tx_isr, skb);
2341
2342 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
2343 if (!status){
2344 //we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
2345 bool bSend0Byte = false;
2346 u8 zero = 0;
2347 if(udev->speed == USB_SPEED_HIGH)
2348 {
2349 if (skb->len > 0 && skb->len % 512 == 0)
2350 bSend0Byte = true;
2351 }
2352 else
2353 {
2354 if (skb->len > 0 && skb->len % 64 == 0)
2355 bSend0Byte = true;
2356 }
2357 if (bSend0Byte)
2358 {
2359 #if 1
2360 tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
2361 if(!tx_urb_zero){
2362 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
2363 return -ENOMEM;
2364 }
2365 usb_fill_bulk_urb(tx_urb_zero,udev,
2366 usb_sndbulkpipe(udev,idx_pipe), &zero,
2367 0, tx_zero_isr, dev);
2368 status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
2369 if (status){
2370 RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
2371 return -1;
2372 }
2373 #endif
2374 }
2375 dev->trans_start = jiffies;
2376 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
2377 return 0;
2378 }else{
2379 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
2380 status);
2381 return -1;
2382 }
2383 }
2384
2385 void rtl8192SU_net_update(struct net_device *dev)
2386 {
2387
2388 struct r8192_priv *priv = ieee80211_priv(dev);
2389 struct ieee80211_device* ieee = priv->ieee80211;
2390 struct ieee80211_network *net = &priv->ieee80211->current_network;
2391 //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2392 u16 rate_config = 0;
2393 u32 regTmp = 0;
2394 u8 rateIndex = 0;
2395 u8 retrylimit = 0x30;
2396 u16 cap = net->capability;
2397
2398 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2399
2400 //HW_VAR_BASIC_RATE
2401 //update Basic rate: RR, BRSR
2402 rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
2403
2404 priv->basic_rate = rate_config = rate_config & 0x15f;
2405
2406 // Set RRSR rate table.
2407 write_nic_byte(dev, RRSR, rate_config&0xff);
2408 write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
2409
2410 // Set RTS initial rate
2411 while(rate_config > 0x1)
2412 {
2413 rate_config = (rate_config>> 1);
2414 rateIndex++;
2415 }
2416 write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
2417 //HW_VAR_BASIC_RATE
2418
2419 //set ack preample
2420 regTmp = (priv->nCur40MhzPrimeSC) << 5;
2421 if (priv->short_preamble)
2422 regTmp |= 0x80;
2423 write_nic_byte(dev, RRSR+2, regTmp);
2424
2425 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2426 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2427
2428 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2429 //2008.10.24 added by tynli for beacon changed.
2430 PHY_SetBeaconHwReg( dev, net->beacon_interval);
2431
2432 rtl8192_update_cap(dev, cap);
2433
2434 if (ieee->iw_mode == IW_MODE_ADHOC){
2435 retrylimit = 7;
2436 //we should enable ibss interrupt here, but disable it temporarily
2437 if (0){
2438 priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2439 //rtl8192_irq_disable(dev);
2440 //rtl8192_irq_enable(dev);
2441 }
2442 }
2443 else{
2444 if (0){
2445 priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2446 //rtl8192_irq_disable(dev);
2447 //rtl8192_irq_enable(dev);
2448 }
2449 }
2450
2451 priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
2452
2453 write_nic_word(dev, RETRY_LIMIT,
2454 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
2455 retrylimit << RETRY_LIMIT_LONG_SHIFT);
2456 }
2457
2458 void rtl8192SU_update_ratr_table(struct net_device* dev)
2459 {
2460 struct r8192_priv* priv = ieee80211_priv(dev);
2461 struct ieee80211_device* ieee = priv->ieee80211;
2462 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2463 //struct ieee80211_network *net = &ieee->current_network;
2464 u32 ratr_value = 0;
2465
2466 u8 rate_index = 0;
2467 int WirelessMode = ieee->mode;
2468 u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
2469
2470 u8 bNMode = 0;
2471
2472 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2473 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2474
2475 //switch (ieee->mode)
2476 switch (WirelessMode)
2477 {
2478 case IEEE_A:
2479 ratr_value &= 0x00000FF0;
2480 break;
2481 case IEEE_B:
2482 ratr_value &= 0x0000000D;
2483 break;
2484 case IEEE_G:
2485 ratr_value &= 0x00000FF5;
2486 break;
2487 case IEEE_N_24G:
2488 case IEEE_N_5G:
2489 {
2490 bNMode = 1;
2491
2492 if (MimoPs == 0) //MIMO_PS_STATIC
2493 {
2494 ratr_value &= 0x0007F005;
2495 }
2496 else
2497 { // MCS rate only => for 11N mode.
2498 u32 ratr_mask;
2499
2500 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
2501 if ( priv->rf_type == RF_1T2R ||
2502 priv->rf_type == RF_1T1R ||
2503 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
2504 ratr_mask = 0x000ff005;
2505 else
2506 ratr_mask = 0x0f0ff005;
2507
2508 if((ieee->pHTInfo->bCurTxBW40MHz) &&
2509 !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
2510 ratr_mask |= 0x00000010; // Set 6MBps
2511
2512 // Select rates for rate adaptive mechanism.
2513 ratr_value &= ratr_mask;
2514 }
2515 }
2516 break;
2517 default:
2518 if(0)
2519 {
2520 if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
2521 {
2522 ratr_value &= 0x000ff0f5;
2523 }
2524 else
2525 {
2526 ratr_value &= 0x0f0ff0f5;
2527 }
2528 }
2529 //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
2530 break;
2531 }
2532
2533 ratr_value &= 0x0FFFFFFF;
2534
2535 // Get MAX MCS available.
2536 if ( (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
2537 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
2538 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
2539 {
2540 u8 shortGI_rate = 0;
2541 u32 tmp_ratr_value = 0;
2542 ratr_value |= 0x10000000;//???
2543 tmp_ratr_value = (ratr_value>>12);
2544 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
2545 {
2546 if((1<<shortGI_rate) & tmp_ratr_value)
2547 break;
2548 }
2549 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
2550 write_nic_byte(dev, SG_RATE, shortGI_rate);
2551 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
2552 }
2553 write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
2554 printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
2555
2556 //2 UFWP
2557 if (ratr_value & 0xfffff000){
2558 //printk("===>set to N mode\n");
2559 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
2560 }
2561 else {
2562 //printk("===>set to B/G mode\n");
2563 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
2564 }
2565 }
2566
2567 void rtl8192SU_link_change(struct net_device *dev)
2568 {
2569 struct r8192_priv *priv = ieee80211_priv(dev);
2570 struct ieee80211_device* ieee = priv->ieee80211;
2571 //unsigned long flags;
2572 u32 reg = 0;
2573
2574 printk("=====>%s 1\n", __func__);
2575 reg = read_nic_dword(dev, RCR);
2576
2577 if (ieee->state == IEEE80211_LINKED)
2578 {
2579
2580 rtl8192SU_net_update(dev);
2581 rtl8192SU_update_ratr_table(dev);
2582 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2583 priv->ReceiveConfig = reg |= RCR_CBSSID;
2584
2585 }else{
2586 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
2587
2588 }
2589
2590 write_nic_dword(dev, RCR, reg);
2591 rtl8192_update_msr(dev);
2592
2593 printk("<=====%s 2\n", __func__);
2594 }
2595
2596 static struct ieee80211_qos_parameters def_qos_parameters = {
2597 {3,3,3,3},/* cw_min */
2598 {7,7,7,7},/* cw_max */
2599 {2,2,2,2},/* aifs */
2600 {0,0,0,0},/* flags */
2601 {0,0,0,0} /* tx_op_limit */
2602 };
2603
2604
2605 void rtl8192_update_beacon(struct work_struct * work)
2606 {
2607 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
2608 struct net_device *dev = priv->ieee80211->dev;
2609 struct ieee80211_device* ieee = priv->ieee80211;
2610 struct ieee80211_network* net = &ieee->current_network;
2611
2612 if (ieee->pHTInfo->bCurrentHTSupport)
2613 HTUpdateSelfAndPeerSetting(ieee, net);
2614 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
2615 // Joseph test for turbo mode with AP
2616 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
2617 rtl8192_update_cap(dev, net->capability);
2618 }
2619 /*
2620 * background support to run QoS activate functionality
2621 */
2622 int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
2623
2624 void rtl8192_qos_activate(struct work_struct * work)
2625 {
2626 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
2627 struct net_device *dev = priv->ieee80211->dev;
2628 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2629 u8 mode = priv->ieee80211->current_network.mode;
2630 //u32 size = sizeof(struct ieee80211_qos_parameters);
2631 u8 u1bAIFS;
2632 u32 u4bAcParam;
2633 int i;
2634
2635 if (priv == NULL)
2636 return;
2637
2638 mutex_lock(&priv->mutex);
2639
2640 if(priv->ieee80211->state != IEEE80211_LINKED)
2641 goto success;
2642 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
2643 /* It better set slot time at first */
2644 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2645 /* update the ac parameter to related registers */
2646 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2647 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2648 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2649 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2650 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2651 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2652 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2653
2654 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2655 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
2656 }
2657
2658 success:
2659 mutex_unlock(&priv->mutex);
2660 }
2661
2662 static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2663 int active_network,
2664 struct ieee80211_network *network)
2665 {
2666 int ret = 0;
2667 u32 size = sizeof(struct ieee80211_qos_parameters);
2668
2669 if(priv->ieee80211->state !=IEEE80211_LINKED)
2670 return ret;
2671
2672 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2673 return ret;
2674
2675 if (network->flags & NETWORK_HAS_QOS_MASK) {
2676 if (active_network &&
2677 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2678 network->qos_data.active = network->qos_data.supported;
2679
2680 if ((network->qos_data.active == 1) && (active_network == 1) &&
2681 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2682 (network->qos_data.old_param_count !=
2683 network->qos_data.param_count)) {
2684 network->qos_data.old_param_count =
2685 network->qos_data.param_count;
2686 queue_work(priv->priv_wq, &priv->qos_activate);
2687 RT_TRACE (COMP_QOS, "QoS parameters change call "
2688 "qos_activate\n");
2689 }
2690 } else {
2691 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2692 &def_qos_parameters, size);
2693
2694 if ((network->qos_data.active == 1) && (active_network == 1)) {
2695 queue_work(priv->priv_wq, &priv->qos_activate);
2696 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2697 }
2698 network->qos_data.active = 0;
2699 network->qos_data.supported = 0;
2700 }
2701
2702 return 0;
2703 }
2704
2705 /* handle manage frame frame beacon and probe response */
2706 static int rtl8192_handle_beacon(struct net_device * dev,
2707 struct ieee80211_probe_response *beacon,
2708 struct ieee80211_network *network)
2709 {
2710 struct r8192_priv *priv = ieee80211_priv(dev);
2711
2712 rtl8192_qos_handle_probe_response(priv,1,network);
2713 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
2714
2715 return 0;
2716
2717 }
2718
2719 /*
2720 * handling the beaconing responses. if we get different QoS setting
2721 * off the network from the associated setting, adjust the QoS
2722 * setting
2723 */
2724 static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2725 struct ieee80211_network *network)
2726 {
2727 int ret = 0;
2728 unsigned long flags;
2729 u32 size = sizeof(struct ieee80211_qos_parameters);
2730 int set_qos_param = 0;
2731
2732 if ((priv == NULL) || (network == NULL))
2733 return ret;
2734
2735 if(priv->ieee80211->state !=IEEE80211_LINKED)
2736 return ret;
2737
2738 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2739 return ret;
2740
2741 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2742 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
2743 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2744 &network->qos_data.parameters,\
2745 sizeof(struct ieee80211_qos_parameters));
2746 priv->ieee80211->current_network.qos_data.active = 1;
2747 {
2748 set_qos_param = 1;
2749 /* update qos parameter for current network */
2750 priv->ieee80211->current_network.qos_data.old_param_count = \
2751 priv->ieee80211->current_network.qos_data.param_count;
2752 priv->ieee80211->current_network.qos_data.param_count = \
2753 network->qos_data.param_count;
2754 }
2755 } else {
2756 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2757 &def_qos_parameters, size);
2758 priv->ieee80211->current_network.qos_data.active = 0;
2759 priv->ieee80211->current_network.qos_data.supported = 0;
2760 set_qos_param = 1;
2761 }
2762
2763 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2764
2765 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2766 if (set_qos_param == 1)
2767 queue_work(priv->priv_wq, &priv->qos_activate);
2768
2769 return ret;
2770 }
2771
2772
2773 static int rtl8192_handle_assoc_response(struct net_device *dev,
2774 struct ieee80211_assoc_response_frame *resp,
2775 struct ieee80211_network *network)
2776 {
2777 struct r8192_priv *priv = ieee80211_priv(dev);
2778 rtl8192_qos_association_resp(priv, network);
2779 return 0;
2780 }
2781
2782
2783 void rtl8192_update_ratr_table(struct net_device* dev)
2784 // POCTET_STRING posLegacyRate,
2785 // u8* pMcsRate)
2786 // PRT_WLAN_STA pEntry)
2787 {
2788 struct r8192_priv* priv = ieee80211_priv(dev);
2789 struct ieee80211_device* ieee = priv->ieee80211;
2790 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2791 //struct ieee80211_network *net = &ieee->current_network;
2792 u32 ratr_value = 0;
2793 u8 rate_index = 0;
2794 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2795 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2796 // switch (net->mode)
2797 switch (ieee->mode)
2798 {
2799 case IEEE_A:
2800 ratr_value &= 0x00000FF0;
2801 break;
2802 case IEEE_B:
2803 ratr_value &= 0x0000000F;
2804 break;
2805 case IEEE_G:
2806 ratr_value &= 0x00000FF7;
2807 break;
2808 case IEEE_N_24G:
2809 case IEEE_N_5G:
2810 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2811 ratr_value &= 0x0007F007;
2812 else{
2813 if (priv->rf_type == RF_1T2R)
2814 ratr_value &= 0x000FF007;
2815 else
2816 ratr_value &= 0x0F81F007;
2817 }
2818 break;
2819 default:
2820 break;
2821 }
2822 ratr_value &= 0x0FFFFFFF;
2823 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2824 ratr_value |= 0x80000000;
2825 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2826 ratr_value |= 0x80000000;
2827 }
2828 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2829 write_nic_byte(dev, UFWP, 1);
2830 }
2831
2832 static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2833 static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
2834 bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
2835 {
2836 #if 1
2837 struct r8192_priv* priv = ieee80211_priv(dev);
2838 struct ieee80211_device* ieee = priv->ieee80211;
2839 struct ieee80211_network * network = &ieee->current_network;
2840 int wpa_ie_len= ieee->wpa_ie_len;
2841 struct ieee80211_crypt_data* crypt;
2842 int encrypt;
2843 return TRUE;
2844
2845 crypt = ieee->crypt[ieee->tx_keyidx];
2846 //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
2847 encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2848
2849 /* simply judge */
2850 if(encrypt && (wpa_ie_len == 0)) {
2851 /* wep encryption, no N mode setting */
2852 return false;
2853 // } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2854 } else if((wpa_ie_len != 0)) {
2855 /* parse pairwise key type */
2856 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2857 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2858 return true;
2859 else
2860 return false;
2861 } else {
2862 return true;
2863 }
2864
2865 return true;
2866 #endif
2867 }
2868
2869 bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
2870 {
2871 bool Reval;
2872 struct r8192_priv* priv = ieee80211_priv(dev);
2873 struct ieee80211_device* ieee = priv->ieee80211;
2874
2875 // Added by Roger, 2008.08.29.
2876 return false;
2877
2878 if(ieee->bHalfWirelessN24GMode == true)
2879 Reval = true;
2880 else
2881 Reval = false;
2882
2883 return Reval;
2884 }
2885
2886 void rtl8192_refresh_supportrate(struct r8192_priv* priv)
2887 {
2888 struct ieee80211_device* ieee = priv->ieee80211;
2889 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2890 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2891 {
2892 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2893 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2894 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2895 }
2896 else
2897 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2898 return;
2899 }
2900
2901 u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
2902 {
2903 struct r8192_priv *priv = ieee80211_priv(dev);
2904 u8 ret = 0;
2905 switch(priv->rf_chip)
2906 {
2907 case RF_8225:
2908 case RF_8256:
2909 case RF_PSEUDO_11N:
2910 case RF_6052:
2911 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2912 break;
2913 case RF_8258:
2914 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2915 break;
2916 default:
2917 ret = WIRELESS_MODE_B;
2918 break;
2919 }
2920 return ret;
2921 }
2922 void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
2923 {
2924 struct r8192_priv *priv = ieee80211_priv(dev);
2925 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2926
2927 #if 1
2928 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2929 {
2930 if(bSupportMode & WIRELESS_MODE_N_24G)
2931 {
2932 wireless_mode = WIRELESS_MODE_N_24G;
2933 }
2934 else if(bSupportMode & WIRELESS_MODE_N_5G)
2935 {
2936 wireless_mode = WIRELESS_MODE_N_5G;
2937 }
2938 else if((bSupportMode & WIRELESS_MODE_A))
2939 {
2940 wireless_mode = WIRELESS_MODE_A;
2941 }
2942 else if((bSupportMode & WIRELESS_MODE_G))
2943 {
2944 wireless_mode = WIRELESS_MODE_G;
2945 }
2946 else if((bSupportMode & WIRELESS_MODE_B))
2947 {
2948 wireless_mode = WIRELESS_MODE_B;
2949 }
2950 else{
2951 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2952 wireless_mode = WIRELESS_MODE_B;
2953 }
2954 }
2955 #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA
2956 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2957 #endif
2958 //LZM 090306 usb crash here, mark it temp
2959 //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
2960 priv->ieee80211->mode = wireless_mode;
2961
2962 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2963 priv->ieee80211->pHTInfo->bEnableHT = 1;
2964 else
2965 priv->ieee80211->pHTInfo->bEnableHT = 0;
2966 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2967 rtl8192_refresh_supportrate(priv);
2968 #endif
2969
2970 }
2971
2972
2973 short rtl8192_is_tx_queue_empty(struct net_device *dev)
2974 {
2975 int i=0;
2976 struct r8192_priv *priv = ieee80211_priv(dev);
2977 //struct ieee80211_device* ieee = priv->ieee80211;
2978 for (i=0; i<=MGNT_QUEUE; i++)
2979 {
2980 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2981 continue;
2982 if (atomic_read(&priv->tx_pending[i]))
2983 {
2984 printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
2985 return 0;
2986 }
2987 }
2988 return 1;
2989 }
2990
2991 void rtl8192_hw_sleep_down(struct net_device *dev)
2992 {
2993 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
2994 #ifdef TODO
2995 // MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
2996 #endif
2997 }
2998
2999 void rtl8192_hw_sleep_wq (struct work_struct *work)
3000 {
3001 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3002 // struct ieee80211_device * ieee = (struct ieee80211_device*)
3003 // container_of(work, struct ieee80211_device, watch_dog_wq);
3004 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3005 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3006 struct net_device *dev = ieee->dev;
3007
3008 //printk("=========>%s()\n", __FUNCTION__);
3009 rtl8192_hw_sleep_down(dev);
3010 }
3011 // printk("dev is %d\n",dev);
3012 // printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
3013 void rtl8192_hw_wakeup(struct net_device* dev)
3014 {
3015 // u32 flags = 0;
3016
3017 // spin_lock_irqsave(&priv->ps_lock,flags);
3018 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
3019 #ifdef TODO
3020 // MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3021 #endif
3022 //FIXME: will we send package stored while nic is sleep?
3023 // spin_unlock_irqrestore(&priv->ps_lock,flags);
3024 }
3025
3026 void rtl8192_hw_wakeup_wq (struct work_struct *work)
3027 {
3028 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3029 // struct ieee80211_device * ieee = (struct ieee80211_device*)
3030 // container_of(work, struct ieee80211_device, watch_dog_wq);
3031 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3032 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3033 struct net_device *dev = ieee->dev;
3034
3035 rtl8192_hw_wakeup(dev);
3036 }
3037
3038 #define MIN_SLEEP_TIME 50
3039 #define MAX_SLEEP_TIME 10000
3040 void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
3041 {
3042
3043 struct r8192_priv *priv = ieee80211_priv(dev);
3044
3045 u32 rb = jiffies;
3046 unsigned long flags;
3047
3048 spin_lock_irqsave(&priv->ps_lock,flags);
3049
3050 /* Writing HW register with 0 equals to disable
3051 * the timer, that is not really what we want
3052 */
3053 tl -= MSECS(4+16+7);
3054
3055 //if(tl == 0) tl = 1;
3056
3057 /* FIXME HACK FIXME HACK */
3058 // force_pci_posting(dev);
3059 //mdelay(1);
3060
3061 // rb = read_nic_dword(dev, TSFTR);
3062
3063 /* If the interval in witch we are requested to sleep is too
3064 * short then give up and remain awake
3065 */
3066 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3067 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3068 spin_unlock_irqrestore(&priv->ps_lock,flags);
3069 printk("too short to sleep\n");
3070 return;
3071 }
3072
3073 // write_nic_dword(dev, TimerInt, tl);
3074 // rb = read_nic_dword(dev, TSFTR);
3075 {
3076 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3077 // if (tl<rb)
3078
3079 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3080 }
3081 /* if we suspect the TimerInt is gone beyond tl
3082 * while setting it, then give up
3083 */
3084 #if 1
3085 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3086 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3087 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
3088 spin_unlock_irqrestore(&priv->ps_lock,flags);
3089 return;
3090 }
3091 #endif
3092 // if(priv->rf_sleep)
3093 // priv->rf_sleep(dev);
3094
3095 //printk("<=========%s()\n", __FUNCTION__);
3096 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
3097
3098 spin_unlock_irqrestore(&priv->ps_lock,flags);
3099 }
3100 //init priv variables here. only non_zero value should be initialized here.
3101 static void rtl8192_init_priv_variable(struct net_device* dev)
3102 {
3103 struct r8192_priv *priv = ieee80211_priv(dev);
3104 u8 i;
3105 priv->card_8192 = NIC_8192U;
3106 priv->chan = 1; //set to channel 1
3107 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
3108 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3109 priv->ieee80211->ieee_up=0;
3110 priv->retry_rts = DEFAULT_RETRY_RTS;
3111 priv->retry_data = DEFAULT_RETRY_DATA;
3112 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
3113 priv->ieee80211->rate = 110; //11 mbps
3114 priv->ieee80211->short_slot = 1;
3115 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3116 priv->CckPwEnl = 6;
3117 //for silent reset
3118 priv->IrpPendingCount = 1;
3119 priv->ResetProgress = RESET_TYPE_NORESET;
3120 priv->bForcedSilentReset = 0;
3121 priv->bDisableNormalResetCheck = false;
3122 priv->force_reset = false;
3123
3124 priv->ieee80211->FwRWRF = 0; //we don't use FW read/write RF until stable firmware is available.
3125 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3126 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3127 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
3128 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3129 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
3130 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
3131
3132 priv->ieee80211->active_scan = 1;
3133 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
3134 priv->ieee80211->host_encrypt = 1;
3135 priv->ieee80211->host_decrypt = 1;
3136 priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
3137 priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
3138 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
3139 priv->ieee80211->set_chan = rtl8192_set_chan;
3140 priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
3141 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
3142 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
3143 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
3144 priv->ieee80211->init_wmmparam_flag = 0;
3145 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3146 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
3147 priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
3148 priv->ieee80211->qos_support = 1;
3149
3150 //added by WB
3151 // priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
3152 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
3153 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
3154 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
3155 //for LPS
3156 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
3157 // priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
3158 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
3159 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
3160 //added by david
3161 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
3162 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
3163 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
3164 //added by amy
3165 priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
3166 priv->card_type = USB;
3167
3168 //1 RTL8192SU/
3169 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3170 priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
3171 priv->bRFSiOrPi = 0;//o=si,1=pi;
3172 //lzm add
3173 priv->bInHctTest = false;
3174
3175 priv->MidHighPwrTHR_L1 = 0x3B;
3176 priv->MidHighPwrTHR_L2 = 0x40;
3177
3178 if(priv->bInHctTest)
3179 {
3180 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3181 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3182 }
3183 else
3184 {
3185 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
3186 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
3187 }
3188
3189 priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
3190 priv->CurrentFwCmdIO = 0;
3191
3192 priv->MinSpaceCfg = 0;
3193
3194 priv->EarlyRxThreshold = 7;
3195 priv->enable_gpio0 = 0;
3196 priv->TransmitConfig =
3197 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3198 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
3199 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
3200 (false ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3201 if(priv->bInHctTest)
3202 priv->ReceiveConfig = //priv->CSMethod |
3203 RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
3204 RCR_ACF |RCR_APPFCS| //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3205 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
3206 RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
3207 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3208 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3209 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3210 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
3211 else
3212 priv->ReceiveConfig = //priv->CSMethod |
3213 RCR_AMF | RCR_ADF | RCR_AB |
3214 RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
3215 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3216 RCR_APP_MIC | RCR_APPFCS;
3217
3218 // <Roger_EXP> 2008.06.16.
3219 priv->IntrMask = (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | \
3220 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | \
3221 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW | \
3222 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3223
3224 //1 End
3225
3226
3227 priv->AcmControl = 0;
3228 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
3229 if (priv->pFirmware)
3230 memset(priv->pFirmware, 0, sizeof(rt_firmware));
3231
3232 /* rx related queue */
3233 skb_queue_head_init(&priv->rx_queue);
3234 skb_queue_head_init(&priv->skb_queue);
3235
3236 /* Tx related queue */
3237 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3238 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
3239 }
3240 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3241 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
3242 }
3243 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3244 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
3245 }
3246 priv->rf_set_chan = rtl8192_phy_SwChnl;
3247 }
3248
3249 //init lock here
3250 static void rtl8192_init_priv_lock(struct r8192_priv* priv)
3251 {
3252 spin_lock_init(&priv->tx_lock);
3253 spin_lock_init(&priv->irq_lock);//added by thomas
3254 //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
3255 sema_init(&priv->wx_sem,1);
3256 sema_init(&priv->rf_sem,1);
3257 spin_lock_init(&priv->ps_lock);
3258 mutex_init(&priv->mutex);
3259 }
3260
3261 extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
3262
3263 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
3264 //init tasklet and wait_queue here. only 2.6 above kernel is considered
3265 #define DRV_NAME "wlan0"
3266 static void rtl8192_init_priv_task(struct net_device* dev)
3267 {
3268 struct r8192_priv *priv = ieee80211_priv(dev);
3269
3270 #ifdef PF_SYNCTHREAD
3271 priv->priv_wq = create_workqueue(DRV_NAME,0);
3272 #else
3273 priv->priv_wq = create_workqueue(DRV_NAME);
3274 #endif
3275
3276 INIT_WORK(&priv->reset_wq, rtl8192_restart);
3277
3278 //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
3279 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
3280 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
3281 // INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
3282 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
3283 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
3284 INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
3285 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
3286 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
3287 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
3288 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
3289 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
3290
3291 tasklet_init(&priv->irq_rx_tasklet,
3292 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
3293 (unsigned long)priv);
3294 }
3295
3296 static void rtl8192_get_eeprom_size(struct net_device* dev)
3297 {
3298 u16 curCR = 0;
3299 struct r8192_priv *priv = ieee80211_priv(dev);
3300 RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
3301 curCR = read_nic_word_E(dev,EPROM_CMD);
3302 RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
3303 //whether need I consider BIT5?
3304 priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
3305 RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
3306 }
3307
3308 //used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3309 static inline u16 endian_swap(u16* data)
3310 {
3311 u16 tmp = *data;
3312 *data = (tmp >> 8) | (tmp << 8);
3313 return *data;
3314 }
3315
3316 u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
3317 {
3318 u8 nEndPoint = 0;
3319 switch(UsbOption)
3320 {
3321 case 0:
3322 nEndPoint = 6;
3323 break;
3324 case 1:
3325 nEndPoint = 11;
3326 break;
3327 case 2:
3328 nEndPoint = 4;
3329 break;
3330 default:
3331 RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
3332 break;
3333 }
3334 return nEndPoint;
3335 }
3336
3337 u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype)
3338 {
3339 u8 RFtype = RF_1T2R;
3340
3341 switch(Boardtype)
3342 {
3343 case 0:
3344 RFtype = RF_1T1R;
3345 break;
3346 case 1:
3347 RFtype = RF_1T2R;
3348 break;
3349 case 2:
3350 RFtype = RF_2T2R;
3351 break;
3352 case 3:
3353 RFtype = RF_2T2R_GREEN;
3354 break;
3355 default:
3356 break;
3357 }
3358
3359 return RFtype;
3360 }
3361
3362 //
3363 // Description:
3364 // Config HW adapter information into initial value.
3365 //
3366 // Assumption:
3367 // 1. After Auto load fail(i.e, check CR9346 fail)
3368 //
3369 // Created by Roger, 2008.10.21.
3370 //
3371 void
3372 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3373 {
3374 struct r8192_priv *priv = ieee80211_priv(dev);
3375 //u16 i,usValue;
3376 //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3377 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3378 int i;
3379
3380 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3381
3382 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3383 //PlatformStallExecution(10000);
3384 mdelay(10);
3385 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3386
3387 //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
3388
3389 // Initialize IC Version && Channel Plan
3390 priv->eeprom_vid = 0;
3391 priv->eeprom_pid = 0;
3392 priv->card_8192_version = 0;
3393 priv->eeprom_ChannelPlan = 0;
3394 priv->eeprom_CustomerID = 0;
3395 priv->eeprom_SubCustomerID = 0;
3396 priv->bIgnoreDiffRateTxPowerOffset = false;
3397
3398 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3399 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3400 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3401 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3402 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3403 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3404
3405
3406
3407 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3408 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3409
3410 for(i=0; i<5; i++)
3411 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
3412
3413 //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
3414
3415 {
3416 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
3417 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3418 u8 i;
3419
3420 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
3421
3422 for(i = 0; i < 6; i++)
3423 dev->dev_addr[i] = sMacAddr[i];
3424 }
3425 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3426 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3427 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3428
3429 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
3430 dev->dev_addr[0], dev->dev_addr[1],
3431 dev->dev_addr[2], dev->dev_addr[3],
3432 dev->dev_addr[4], dev->dev_addr[5]);
3433
3434 priv->EEPROMBoardType = EEPROM_Default_BoardType;
3435 priv->rf_type = RF_1T2R; //RF_2T2R
3436 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3437 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3438 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3439 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3440 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3441 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3442 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
3443
3444
3445
3446 for (rf_path = 0; rf_path < 2; rf_path++)
3447 {
3448 for (i = 0; i < 3; i++)
3449 {
3450 // Read CCK RF A & B Tx power
3451 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3452 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3453 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3454 (u8)(EEPROM_Default_TxPower & 0xff);
3455 }
3456 }
3457
3458 for (i = 0; i < 3; i++)
3459 {
3460 //RT_TRACE((COMP_EFUSE), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3461 //priv->RfCckChnlAreaTxPwr[rf_path][i]);
3462 //RT_TRACE((COMP_EFUSE), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3463 //priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3464 //RT_TRACE((COMP_EFUSE), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3465 //priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3466 }
3467
3468 // Assign dedicated channel tx power
3469 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3470 {
3471 if (i < 3) // Cjanel 1-3
3472 index = 0;
3473 else if (i < 9) // Channel 4-9
3474 index = 1;
3475 else // Channel 10-14
3476 index = 2;
3477
3478 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3479 priv->RfTxPwrLevelCck[rf_path][i] =
3480 priv->RfCckChnlAreaTxPwr[rf_path][index];
3481 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3482 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3483 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3484 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3485 }
3486
3487 for(i=0; i<14; i++)
3488 {
3489 //RT_TRACE((COMP_EFUSE), "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3490 //rf_path, i, priv->RfTxPwrLevelCck[0][i],
3491 //priv->RfTxPwrLevelOfdm1T[0][i] ,
3492 //priv->RfTxPwrLevelOfdm2T[0][i] );
3493 }
3494
3495 //
3496 // Update remained HAL variables.
3497 //
3498 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3499 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new
3500 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3501 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3
3502 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7
3503 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15
3504 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
3505 priv->LedStrategy = SW_LED_MODE0;
3506
3507 init_rate_adaptive(dev);
3508
3509 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
3510
3511 }
3512
3513 //
3514 // Description:
3515 // Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
3516 //
3517 // Assumption:
3518 // 1. CR9346 regiser has verified.
3519 // 2. PASSIVE_LEVEL (USB interface)
3520 //
3521 // Created by Roger, 2008.10.21.
3522 //
3523 void
3524 rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
3525 {
3526 struct r8192_priv *priv = ieee80211_priv(dev);
3527 u16 i,usValue;
3528 u8 tmpU1b, tempval;
3529 u16 EEPROMId;
3530 u8 hwinfo[HWSET_MAX_SIZE_92S];
3531 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3532
3533
3534 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
3535
3536 //
3537 // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
3538 // 2008.11.25.
3539 //
3540 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3541 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
3542 //PlatformStallExecution(1000);
3543 mdelay(10);
3544 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3545
3546 // Retrieve Chip version.
3547 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3548 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3549
3550 switch(priv->card_8192_version)
3551 {
3552 case 0:
3553 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3554 break;
3555 case 1:
3556 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3557 break;
3558 case 2:
3559 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3560 break;
3561 default:
3562 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3563 priv->card_8192_version = VERSION_8192S_BCUT;
3564 break;
3565 }
3566
3567 //if (IS_BOOT_FROM_EEPROM(Adapter))
3568 if(priv->EepromOrEfuse)
3569 { // Read frin EEPROM
3570 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3571 //PlatformStallExecution(10000);
3572 mdelay(10);
3573 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3574 // Read all Content from EEPROM or EFUSE.
3575 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
3576 {
3577 usValue = eprom_read(dev, (u16) (i>>1));
3578 *((u16*)(&hwinfo[i])) = usValue;
3579 }
3580 }
3581 else if (!(priv->EepromOrEfuse))
3582 { // Read from EFUSE
3583
3584 //
3585 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
3586 // from suspend mode.
3587 // 2008.10.21.
3588 //
3589 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3590 //PlatformStallExecution(10000);
3591 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
3592 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
3593
3594 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
3595 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
3596 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
3597 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
3598
3599 // Read EFUSE real map to shadow.
3600 EFUSE_ShadowMapUpdate(dev);
3601 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
3602 }
3603 else
3604 {
3605 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
3606 }
3607
3608 //YJ,test,090106
3609 //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
3610 //
3611 // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
3612 //
3613 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
3614
3615 //
3616 // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
3617 // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
3618 // 2008.10.21.
3619 //
3620 EEPROMId = *((u16 *)&hwinfo[0]);
3621
3622 if( EEPROMId != RTL8190_EEPROM_ID )
3623 {
3624 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3625 priv->bTXPowerDataReadFromEEPORM = FALSE;
3626 priv->AutoloadFailFlag=TRUE;
3627 }
3628 else
3629 {
3630 priv->AutoloadFailFlag=FALSE;
3631 priv->bTXPowerDataReadFromEEPORM = TRUE;
3632 }
3633 // Read IC Version && Channel Plan
3634 if(!priv->AutoloadFailFlag)
3635 {
3636 // VID, PID
3637 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3638 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3639 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3640
3641
3642 // EEPROM Version ID, Channel plan
3643 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3644 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3645
3646 // Customer ID, 0x00 and 0xff are reserved for Realtek.
3647 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3648 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
3649 }
3650 else
3651 {
3652 //priv->eeprom_vid = 0;
3653 //priv->eeprom_pid = 0;
3654 //priv->EEPROMVersion = 0;
3655 //priv->eeprom_ChannelPlan = 0;
3656 //priv->eeprom_CustomerID = 0;
3657 //priv->eeprom_SubCustomerID = 0;
3658
3659 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3660 return;
3661 }
3662
3663
3664 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3665 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3666 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3667 RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
3668 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3669 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3670 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3671 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3672
3673
3674 // Read USB optional function.
3675 if(!priv->AutoloadFailFlag)
3676 {
3677 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
3678 }
3679 else
3680 {
3681 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3682 }
3683
3684
3685 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3686
3687 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3688 RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
3689
3690 #ifdef TO_DO_LIST
3691 //
3692 // Decide CustomerID according to VID/DID or EEPROM
3693 //
3694 switch(pHalData->EEPROMCustomerID)
3695 {
3696 case EEPROM_CID_ALPHA:
3697 pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
3698 break;
3699
3700 case EEPROM_CID_CAMEO:
3701 pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
3702 break;
3703
3704 case EEPROM_CID_SITECOM:
3705 pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
3706 RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
3707
3708 break;
3709
3710 case EEPROM_CID_WHQL:
3711 Adapter->bInHctTest = TRUE;
3712
3713 pMgntInfo->bSupportTurboMode = FALSE;
3714 pMgntInfo->bAutoTurboBy8186 = FALSE;
3715
3716 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3717 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3718 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3719 pMgntInfo->keepAliveLevel = 0;
3720 break;
3721
3722 default:
3723 pMgntInfo->CustomerID = RT_CID_DEFAULT;
3724 break;
3725
3726 }
3727
3728 //
3729 // Led mode
3730 //
3731 switch(pMgntInfo->CustomerID)
3732 {
3733 case RT_CID_DEFAULT:
3734 case RT_CID_819x_ALPHA:
3735 pHalData->LedStrategy = SW_LED_MODE1;
3736 pHalData->bRegUseLed = TRUE;
3737 pHalData->SwLed1.bLedOn = TRUE;
3738 break;
3739 case RT_CID_819x_CAMEO:
3740 pHalData->LedStrategy = SW_LED_MODE1;
3741 pHalData->bRegUseLed = TRUE;
3742 break;
3743
3744 case RT_CID_819x_Sitecom:
3745 pHalData->LedStrategy = SW_LED_MODE2;
3746 pHalData->bRegUseLed = TRUE;
3747 break;
3748
3749 default:
3750 pHalData->LedStrategy = SW_LED_MODE0;
3751 break;
3752 }
3753 #endif
3754
3755 // Read USB PHY parameters.
3756 for(i=0; i<5; i++)
3757 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
3758
3759 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
3760
3761
3762 //Read Permanent MAC address
3763 for(i=0; i<6; i++)
3764 dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
3765
3766 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3767 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3768 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3769
3770 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
3771 dev->dev_addr[0], dev->dev_addr[1],
3772 dev->dev_addr[2], dev->dev_addr[3],
3773 dev->dev_addr[4], dev->dev_addr[5]);
3774
3775 //
3776 // Get CustomerID(Boad Type)
3777 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
3778 // Others: Reserved. Default is 0x2: RTL8192SU.
3779 //
3780 //if(!priv->AutoloadFailFlag)
3781 //{
3782 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
3783 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
3784 //}
3785 //else
3786 //{
3787 // priv->EEPROMBoardType = EEPROM_Default_BoardType;
3788 // priv->rf_type = RF_1T2R;
3789 //}
3790
3791 priv->rf_chip = RF_6052;
3792
3793 priv->rf_chip = RF_6052;//lzm test
3794 RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
3795 RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
3796
3797 //
3798 // Read antenna tx power offset of B/C/D to A from EEPROM
3799 // and read ThermalMeter from EEPROM
3800 //
3801 //if(!priv->AutoloadFailFlag)
3802 {
3803 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
3804 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
3805 }
3806 //else
3807 //{
3808 // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3809 // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3810 //}
3811
3812 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
3813 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
3814
3815 //
3816 // Read Tx Power gain offset of legacy OFDM to HT rate.
3817 // Read CrystalCap from EEPROM
3818 //
3819 //if(!priv->AutoloadFailFlag)
3820 {
3821 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
3822 }
3823 //else
3824 //{
3825 // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3826 //}
3827
3828 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
3829
3830 //
3831 // Get Tx Power Base.
3832 //
3833 //if(!priv->AutoloadFailFlag)
3834 {
3835 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
3836 }
3837 //else
3838 //{
3839 // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3840 //}
3841
3842 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
3843
3844
3845 //
3846 // Get TSSI value for each path.
3847 //
3848 //if(!priv->AutoloadFailFlag)
3849 {
3850 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
3851 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
3852 }
3853 //else
3854 //{ // Default setting for Empty EEPROM
3855 // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3856 // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3857 //}
3858
3859 RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
3860
3861 //
3862 // Get Tx Power tracking mode.
3863 //
3864 //if(!priv->AutoloadFailFlag)
3865 {
3866 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
3867 }
3868
3869 RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
3870
3871
3872 {
3873 //
3874 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
3875 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
3876 //
3877
3878 //
3879 // Get Tx Power Level by Channel
3880 //
3881 //if(!priv->AutoloadFailFlag)
3882 {
3883 // Read Tx power of Channel 1 ~ 14 from EFUSE.
3884 // 92S suupport RF A & B
3885 for (rf_path = 0; rf_path < 2; rf_path++)
3886 {
3887 for (i = 0; i < 3; i++)
3888 {
3889 // Read CCK RF A & B Tx power
3890 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3891 hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
3892
3893 // Read OFDM RF A & B Tx power for 1T
3894 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3895 hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
3896
3897 // Read OFDM RF A & B Tx power for 2T
3898 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3899 hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
3900 }
3901 }
3902
3903 }
3904 //
3905 // Update Tx Power HAL variables.
3906 //
3907 for (rf_path = 0; rf_path < 2; rf_path++)
3908 {
3909 for (i = 0; i < 3; i++)
3910 {
3911 RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3912 priv->RfCckChnlAreaTxPwr[rf_path][i]);
3913 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3914 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3915 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3916 }
3917
3918 // Assign dedicated channel tx power
3919 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3920 {
3921 if (i < 3) // Cjanel 1-3
3922 index = 0;
3923 else if (i < 9) // Channel 4-9
3924 index = 1;
3925 else // Channel 10-14
3926 index = 2;
3927
3928 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3929 priv->RfTxPwrLevelCck[rf_path][i] =
3930 priv->RfCckChnlAreaTxPwr[rf_path][index];
3931 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3932 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3933 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3934 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3935 if (rf_path == 0)
3936 {
3937 priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
3938 priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
3939 }
3940 }
3941
3942 for(i=0; i<14; i++)
3943 {
3944 RT_TRACE((COMP_INIT),
3945 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3946 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
3947 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
3948 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
3949 }
3950 }
3951 }
3952
3953 //
3954 // 2009/02/09 Cosa add for new EEPROM format
3955 //
3956 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3957 {
3958 // Read tx power difference between HT OFDM 20/40 MHZ
3959 if (i < 3) // Cjanel 1-3
3960 index = 0;
3961 else if (i < 9) // Channel 4-9
3962 index = 1;
3963 else // Channel 10-14
3964 index = 2;
3965
3966 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
3967 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
3968 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3969
3970 // Read OFDM<->HT tx power diff
3971 if (i < 3) // Cjanel 1-3
3972 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
3973 else if (i < 9) // Channel 4-9
3974 tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
3975 else // Channel 10-14
3976 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
3977
3978 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
3979 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
3980 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3981
3982 //
3983 // Read Band Edge tx power offset and check if user enable the ability
3984 //
3985 // HT 40 band edge channel
3986 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
3987 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3988 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3989 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
3990 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3991 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3992 // HT 20 band edge channel
3993 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
3994 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3995 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3996 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
3997 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3998 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3999 // OFDM band edge channel
4000 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
4001 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
4002 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
4003 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
4004 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
4005 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
4006
4007 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
4008 }
4009
4010 for(i=0; i<14; i++)
4011 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
4012 for(i=0; i<14; i++)
4013 RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
4014 for(i=0; i<14; i++)
4015 RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
4016 for(i=0; i<14; i++)
4017 RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
4018 RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4019 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
4020 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
4021 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4022 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
4023 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
4024
4025 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4026 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
4027 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
4028 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4029 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
4030 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
4031
4032 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4033 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
4034 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
4035 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4036 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
4037 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
4038 RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
4039
4040 //
4041 // Update remained HAL variables.
4042 //
4043 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4044 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
4045 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4046 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
4047 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
4048 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
4049 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
4050 priv->LedStrategy = SW_LED_MODE0;
4051
4052 init_rate_adaptive(dev);
4053
4054 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4055
4056 //return RT_STATUS_SUCCESS;
4057 }
4058
4059
4060 //
4061 // Description:
4062 // Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
4063 //
4064 // Assumption:
4065 // 1. CR9346 regiser has verified.
4066 // 2. PASSIVE_LEVEL (USB interface)
4067 //
4068 // Created by Roger, 2008.10.21.
4069 //
4070 static void rtl8192SU_read_eeprom_info(struct net_device *dev)
4071 {
4072 struct r8192_priv *priv = ieee80211_priv(dev);
4073 u8 tmpU1b;
4074
4075 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
4076
4077 // Retrieve Chip version.
4078 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
4079 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
4080
4081 tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
4082
4083 // To check system boot selection.
4084 if (tmpU1b & CmdEERPOMSEL)
4085 {
4086 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
4087 priv->EepromOrEfuse = TRUE;
4088 }
4089 else
4090 {
4091 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
4092 priv->EepromOrEfuse = FALSE;
4093 }
4094
4095 // To check autoload success or not.
4096 if (tmpU1b & CmdEEPROM_En)
4097 {
4098 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
4099 priv->AutoloadFailFlag=FALSE;
4100 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
4101 }
4102 else
4103 { // Auto load fail.
4104 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
4105 priv->AutoloadFailFlag=TRUE;
4106 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
4107
4108 //if (IS_BOOT_FROM_EFUSE(Adapter))
4109 if(!priv->EepromOrEfuse)
4110 {
4111 RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
4112 EFUSE_ShadowMapUpdate(dev);
4113 }
4114 }
4115 #ifdef TO_DO_LIST
4116 if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
4117 {
4118 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
4119 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
4120 }
4121 else
4122 {
4123 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
4124 }
4125
4126 switch(pMgntInfo->ChannelPlan)
4127 {
4128 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
4129 {
4130 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
4131
4132 pDot11dInfo->bEnabled = TRUE;
4133 }
4134 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
4135 break;
4136 }
4137
4138 RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
4139 RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
4140
4141 RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
4142 #endif
4143
4144 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4145
4146 //return RT_STATUS_SUCCESS;
4147 }
4148
4149 short rtl8192_get_channel_map(struct net_device * dev)
4150 {
4151 struct r8192_priv *priv = ieee80211_priv(dev);
4152 if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
4153 printk("rtl8180_init:Error channel plan! Set to default.\n");
4154 priv->ChannelPlan= 0;
4155 }
4156 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
4157
4158 rtl819x_set_channel_map(priv->ChannelPlan, priv);
4159 return 0;
4160 }
4161
4162 short rtl8192_init(struct net_device *dev)
4163 {
4164
4165 struct r8192_priv *priv = ieee80211_priv(dev);
4166
4167 rtl8192_init_priv_variable(dev);
4168 rtl8192_init_priv_lock(priv);
4169 rtl8192_init_priv_task(dev);
4170 rtl8192_get_eeprom_size(dev);
4171 priv->ops->rtl819x_read_eeprom_info(dev);
4172 rtl8192_get_channel_map(dev);
4173 init_hal_dm(dev);
4174 init_timer(&priv->watch_dog_timer);
4175 priv->watch_dog_timer.data = (unsigned long)dev;
4176 priv->watch_dog_timer.function = watch_dog_timer_callback;
4177
4178 //rtl8192_adapter_start(dev);
4179 #ifdef DEBUG_EPROM
4180 dump_eprom(dev);
4181 #endif
4182 return 0;
4183 }
4184
4185 /******************************************************************************
4186 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
4187 * not to do all the hw config as its name says
4188 * input: net_device dev
4189 * output: none
4190 * return: none
4191 * notice: This part need to modified according to the rate set we filtered
4192 * ****************************************************************************/
4193 void rtl8192_hwconfig(struct net_device* dev)
4194 {
4195 u32 regRATR = 0, regRRSR = 0;
4196 u8 regBwOpMode = 0, regTmp = 0;
4197 struct r8192_priv *priv = ieee80211_priv(dev);
4198
4199 // Set RRSR, RATR, and BW_OPMODE registers
4200 //
4201 switch(priv->ieee80211->mode)
4202 {
4203 case WIRELESS_MODE_B:
4204 regBwOpMode = BW_OPMODE_20MHZ;
4205 regRATR = RATE_ALL_CCK;
4206 regRRSR = RATE_ALL_CCK;
4207 break;
4208 case WIRELESS_MODE_A:
4209 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4210 regRATR = RATE_ALL_OFDM_AG;
4211 regRRSR = RATE_ALL_OFDM_AG;
4212 break;
4213 case WIRELESS_MODE_G:
4214 regBwOpMode = BW_OPMODE_20MHZ;
4215 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4216 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4217 break;
4218 case WIRELESS_MODE_AUTO:
4219 #ifdef TO_DO_LIST
4220 if (Adapter->bInHctTest)
4221 {
4222 regBwOpMode = BW_OPMODE_20MHZ;
4223 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4224 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4225 }
4226 else
4227 #endif
4228 {
4229 regBwOpMode = BW_OPMODE_20MHZ;
4230 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4231 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4232 }
4233 break;
4234 case WIRELESS_MODE_N_24G:
4235 // It support CCK rate by default.
4236 // CCK rate will be filtered out only when associated AP does not support it.
4237 regBwOpMode = BW_OPMODE_20MHZ;
4238 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4239 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4240 break;
4241 case WIRELESS_MODE_N_5G:
4242 regBwOpMode = BW_OPMODE_5G;
4243 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4244 regRRSR = RATE_ALL_OFDM_AG;
4245 break;
4246 }
4247
4248 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4249 {
4250 u32 ratr_value = 0;
4251 ratr_value = regRATR;
4252 if (priv->rf_type == RF_1T2R)
4253 {
4254 ratr_value &= ~(RATE_ALL_OFDM_2SS);
4255 }
4256 write_nic_dword(dev, RATR0, ratr_value);
4257 write_nic_byte(dev, UFWP, 1);
4258 }
4259 regTmp = read_nic_byte(dev, 0x313);
4260 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
4261 write_nic_dword(dev, RRSR, regRRSR);
4262
4263 //
4264 // Set Retry Limit here
4265 //
4266 write_nic_word(dev, RETRY_LIMIT,
4267 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
4268 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
4269 // Set Contention Window here
4270
4271 // Set Tx AGC
4272
4273 // Set Tx Antenna including Feedback control
4274
4275 // Set Auto Rate fallback control
4276
4277
4278 }
4279
4280
4281 //
4282 // Description:
4283 // Initial HW relted registers.
4284 //
4285 // Assumption:
4286 // Config RTL8192S USB MAC, we should config MAC before download FW.
4287 //
4288 // 2008.09.03, Added by Roger.
4289 //
4290 static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
4291 {
4292 u8 tmpU1b;// i;
4293 // u16 tmpU2b;
4294 // u32 tmpU4b;
4295 u8 PollingCnt = 20;
4296
4297 RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
4298
4299 //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
4300
4301 //
4302 //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
4303 // MAC I/O to solve FW download fail when system from resume sate.
4304 // 2008.11.04.
4305 //
4306 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4307 if(tmpU1b & 0x80)
4308 {
4309 tmpU1b &= 0x3f;
4310 write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
4311 }
4312 // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
4313 write_nic_byte(dev, RPWM, 0x0);
4314
4315 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4316 tmpU1b &= 0x73;
4317 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
4318 udelay(1000);
4319
4320 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4321 write_nic_byte(dev, SPS0_CTRL+1, 0x53);
4322 write_nic_byte(dev, SPS0_CTRL, 0x57);
4323
4324 //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
4325 tmpU1b = read_nic_byte(dev, AFE_MISC);
4326 write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
4327
4328 //Enable PLL Power (LDOA15V)
4329 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
4330 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
4331
4332 //Enable LDOV12D block
4333 tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
4334 write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
4335
4336 //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4337 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
4338
4339 //PlatformSleepUs(2000);
4340
4341 //Enable Switch Regulator Block
4342 //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4343 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
4344
4345 //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
4346
4347 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4348 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
4349
4350 //Engineer Packet CP test Enable
4351 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4352 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
4353
4354 //Support 64k IMEM, suggested by SD1 Alex.
4355 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4356 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
4357
4358 //Enable AFE clock
4359 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
4360 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
4361
4362 //Enable AFE PLL Macro Block
4363 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
4364 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
4365
4366 //Attatch AFE PLL to MACTOP/BB/PCIe Digital
4367 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
4368 write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
4369
4370 // Switch to 40M clock
4371 write_nic_byte(dev, SYS_CLKR, 0x00);
4372
4373 //SSC Disable
4374 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4375 //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
4376 write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
4377
4378 //Enable MAC clock
4379 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4380 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
4381
4382 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4383 write_nic_byte(dev, PMC_FSM, 0x02);
4384
4385 //Enable Core digital and enable IOREG R/W
4386 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4387 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
4388
4389 //Enable REG_EN
4390 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4391 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
4392
4393 //Switch the control path to FW
4394 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4395 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
4396
4397 write_nic_byte(dev, CMDR, 0xFC);
4398 write_nic_byte(dev, CMDR+1, 0x37);
4399
4400 //Fix the RX FIFO issue(usb error), 970410
4401 tmpU1b = read_nic_byte_E(dev, 0x5c);
4402 write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
4403
4404 //For power save, used this in the bit file after 970621
4405 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4406 write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
4407
4408 // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
4409 write_nic_byte_E(dev, 0x1c, 0x80);
4410
4411 //
4412 // <Roger_EXP> To make sure that TxDMA can ready to download FW.
4413 // We should reset TxDMA if IMEM RPT was not ready.
4414 // Suggested by SD1 Alex. 2008.10.23.
4415 //
4416 do
4417 {
4418 tmpU1b = read_nic_byte(dev, TCR);
4419 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
4420 break;
4421 //PlatformStallExecution(5);
4422 udelay(5);
4423 }while(PollingCnt--); // Delay 1ms
4424
4425 if(PollingCnt <= 0 )
4426 {
4427 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
4428 tmpU1b = read_nic_byte(dev, CMDR);
4429 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
4430 udelay(2);
4431 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
4432 }
4433
4434
4435 RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
4436 }
4437
4438 //
4439 // Description:
4440 // Initial HW relted registers.
4441 //
4442 // Assumption:
4443 // 1. This function is only invoked at driver intialization once.
4444 // 2. PASSIVE LEVEL.
4445 //
4446 // 2008.06.10, Added by Roger.
4447 //
4448 static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
4449 {
4450 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
4451 //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
4452 //u8 tmpU1b, RxPageCfg, i;
4453 u16 tmpU2b;
4454 u8 tmpU1b;//, i;
4455
4456
4457 RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
4458
4459 // Enable Tx/Rx
4460 tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
4461 FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
4462 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
4463 write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
4464
4465 // Loopback mode or not
4466 priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
4467 if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
4468 tmpU1b = LBK_NORMAL;
4469 else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
4470 tmpU1b = LBK_MAC_DLB;
4471 else
4472 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
4473
4474 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
4475 write_nic_byte(dev, LBKMD_SEL, tmpU1b);
4476
4477 // Set RCR
4478 write_nic_dword(dev, RCR, priv->ReceiveConfig);
4479 RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
4480
4481
4482 // Set RQPN
4483 //
4484 // <Roger_Notes> 2008.08.18.
4485 // 6 endpoints:
4486 // (1) Page number on CMDQ is 0x03.
4487 // (2) Page number on BCNQ, HQ and MGTQ is 0.
4488 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4489 // (4) Page number on PUBQ is 0xdd
4490 //
4491 // 11 endpoints:
4492 // (1) Page number on CMDQ is 0x00.
4493 // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
4494 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4495 // (4) Page number on PUBQ is 0xd8
4496 //
4497 //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
4498 //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
4499
4500 // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
4501 tmpU1b = read_nic_byte_E(dev, 0x5C);
4502 write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
4503
4504 // For EFUSE init configuration.
4505 //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
4506 if (priv->bBootFromEfuse)
4507 {
4508 u8 tempval;
4509
4510 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
4511 tempval &= 0xFE;
4512 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
4513
4514 // Enable LDO 2.5V for write action
4515 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
4516 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
4517
4518 // Change Efuse Clock for write action
4519 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
4520
4521 // Change Program timing
4522 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
4523 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
4524 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
4525 }
4526
4527
4528 RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
4529 }
4530
4531 void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
4532 {
4533
4534 struct r8192_priv *priv = ieee80211_priv(dev);
4535 u8 regBwOpMode = 0;
4536 u32 regRATR = 0, regRRSR = 0;
4537 u8 regTmp = 0;
4538 u32 i = 0;
4539
4540 //1 This part need to modified according to the rate set we filtered!!
4541 //
4542 // Set RRSR, RATR, and BW_OPMODE registers
4543 //
4544 switch(priv->ieee80211->mode)
4545 {
4546 case WIRELESS_MODE_B:
4547 regBwOpMode = BW_OPMODE_20MHZ;
4548 regRATR = RATE_ALL_CCK;
4549 regRRSR = RATE_ALL_CCK;
4550 break;
4551 case WIRELESS_MODE_A:
4552 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4553 regRATR = RATE_ALL_OFDM_AG;
4554 regRRSR = RATE_ALL_OFDM_AG;
4555 break;
4556 case WIRELESS_MODE_G:
4557 regBwOpMode = BW_OPMODE_20MHZ;
4558 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4559 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4560 break;
4561 case WIRELESS_MODE_AUTO:
4562 if (priv->bInHctTest)
4563 {
4564 regBwOpMode = BW_OPMODE_20MHZ;
4565 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4566 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4567 }
4568 else
4569 {
4570 regBwOpMode = BW_OPMODE_20MHZ;
4571 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4572 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4573 }
4574 break;
4575 case WIRELESS_MODE_N_24G:
4576 // It support CCK rate by default.
4577 // CCK rate will be filtered out only when associated AP does not support it.
4578 regBwOpMode = BW_OPMODE_20MHZ;
4579 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4580 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4581 break;
4582 case WIRELESS_MODE_N_5G:
4583 regBwOpMode = BW_OPMODE_5G;
4584 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4585 regRRSR = RATE_ALL_OFDM_AG;
4586 break;
4587 }
4588
4589 //
4590 // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
4591 // 2008.09.23.
4592 //
4593 regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
4594 regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
4595
4596 //
4597 // Update SIFS timing.
4598 //
4599 //priv->SifsTime = 0x0e0e0a0a;
4600 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
4601 { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
4602 // SIFS for CCK Data ACK
4603 write_nic_byte(dev, SIFS_CCK, val[0]);
4604 // SIFS for CCK consecutive tx like CTS data!
4605 write_nic_byte(dev, SIFS_CCK+1, val[1]);
4606
4607 // SIFS for OFDM Data ACK
4608 write_nic_byte(dev, SIFS_OFDM, val[2]);
4609 // SIFS for OFDM consecutive tx like CTS data!
4610 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
4611 }
4612
4613 write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
4614 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4615
4616 //
4617 // Suggested by SD1 Alex, 2008-06-14.
4618 //
4619 //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
4620
4621 //
4622 // Set Data Auto Rate Fallback Retry Count register.
4623 //
4624 write_nic_dword(dev, DARFRC, 0x02010000);
4625 write_nic_dword(dev, DARFRC+4, 0x06050403);
4626 write_nic_dword(dev, RARFRC, 0x02010000);
4627 write_nic_dword(dev, RARFRC+4, 0x06050403);
4628
4629 // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
4630 for (i = 0; i < 8; i++)
4631 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
4632
4633 //
4634 // Aggregation length limit. Revised by Roger. 2008.09.22.
4635 //
4636 write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
4637 write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
4638 write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
4639
4640 // Set NAV protection length
4641 write_nic_word(dev, NAV_PROT_LEN, 0x0080);
4642
4643 // Set TXOP stall control for several queue/HI/BCN/MGT/
4644 write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
4645
4646 // Set MSDU lifetime.
4647 write_nic_byte(dev, MLT, 0x8f);
4648
4649 // Set CCK/OFDM SIFS
4650 write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
4651 write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4652
4653 write_nic_byte(dev, ACK_TIMEOUT, 0x40);
4654
4655 // CF-END Threshold
4656 write_nic_byte(dev, CFEND_TH, 0xFF);
4657
4658 //
4659 // For Min Spacing configuration.
4660 //
4661 switch(priv->rf_type)
4662 {
4663 case RF_1T2R:
4664 case RF_1T1R:
4665 RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
4666 priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
4667 break;
4668 case RF_2T2R:
4669 case RF_2T2R_GREEN:
4670 RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
4671 priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
4672 break;
4673 }
4674 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
4675
4676 //LZM 090219
4677 //
4678 // For Min Spacing configuration.
4679 //
4680 //priv->MinSpaceCfg = 0x00;
4681 //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
4682 }
4683
4684
4685 // Description: Initial HW relted registers.
4686 //
4687 // Assumption: This function is only invoked at driver intialization once.
4688 //
4689 // 2008.06.10, Added by Roger.
4690 bool rtl8192SU_adapter_start(struct net_device *dev)
4691 {
4692 struct r8192_priv *priv = ieee80211_priv(dev);
4693 //u32 dwRegRead = 0;
4694 //bool init_status = true;
4695 //u32 ulRegRead;
4696 bool rtStatus = true;
4697 //u8 PipeIndex;
4698 //u8 eRFPath, tmpU1b;
4699 u8 fw_download_times = 1;
4700
4701
4702 RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
4703
4704 //pHalData->bGPIOChangeRF = FALSE;
4705
4706
4707 //
4708 // <Roger_Notes> 2008.06.15.
4709 //
4710 // Initialization Steps on RTL8192SU:
4711 // a. MAC initialization prior to sending down firmware code.
4712 // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4713 // c. MAC configuration after firmware has been download successfully.
4714 // d. Initialize BB related configurations.
4715 // e. Initialize RF related configurations.
4716 // f. Start to BulkIn transfer.
4717 //
4718
4719 //
4720 //a. MAC initialization prior to send down firmware code.
4721 //
4722 start:
4723 rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
4724
4725 //
4726 //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4727 //
4728 rtStatus = FirmwareDownload92S(dev);
4729 if(rtStatus != true)
4730 {
4731 if(fw_download_times == 1){
4732 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
4733 fw_download_times = fw_download_times + 1;
4734 goto start;
4735 }else{
4736 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
4737 goto end;
4738 }
4739 }
4740 //
4741 //c. MAC configuration after firmware has been download successfully.
4742 //
4743 rtl8192SU_MacConfigAfterFwDownload(dev);
4744
4745 //priv->bLbusEnable = TRUE;
4746 //if(priv->RegRfOff == TRUE)
4747 // priv->eRFPowerState = eRfOff;
4748
4749 // Save target channel
4750 // <Roger_Notes> Current Channel will be updated again later.
4751 //priv->CurrentChannel = Channel;
4752 rtStatus = PHY_MACConfig8192S(dev);//===>ok
4753 if(rtStatus != true)
4754 {
4755 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
4756 goto end;
4757 }
4758 if (1){
4759 int i;
4760 for (i=0; i<4; i++)
4761 write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
4762 write_nic_byte(dev,AcmHwCtrl, 0x01);
4763 }
4764
4765
4766 //
4767 //d. Initialize BB related configurations.
4768 //
4769
4770 rtStatus = PHY_BBConfig8192S(dev);//===>ok
4771 if(rtStatus != true)
4772 {
4773 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
4774 goto end;
4775 }
4776
4777 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
4778
4779 //
4780 // e. Initialize RF related configurations.
4781 //
4782 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
4783 priv->Rf_Mode = RF_OP_By_SW_3wire;
4784
4785 // For RF test only from Scott's suggestion
4786 //write_nic_byte(dev, 0x27, 0xDB);
4787 //write_nic_byte(dev, 0x1B, 0x07);
4788
4789
4790 write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
4791
4792 // <Roger_Notes> The following IOs are configured for each RF modules.
4793 // Enable RF module and reset RF and SDM module. 2008.11.17.
4794 if(priv->card_8192_version == VERSION_8192S_ACUT)
4795 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
4796 else
4797 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
4798
4799 rtStatus = PHY_RFConfig8192S(dev);//===>ok
4800 if(rtStatus != true)
4801 {
4802 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
4803 goto end;
4804 }
4805
4806
4807 // Set CCK and OFDM Block "ON"
4808 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4809 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4810
4811 //
4812 // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
4813 // Revised by Roger, 2008.12.18.
4814 //
4815 if(priv->rf_type == RF_1T1R)
4816 {
4817 // This is needed for PHY_REG after 20081219
4818 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
4819 // This is needed for PHY_REG before 20081219
4820 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
4821 }
4822
4823
4824 //LZM 090219
4825 // Set CCK and OFDM Block "ON"
4826 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4827 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4828
4829
4830 //3//Get hardware version, do it in read eeprom?
4831 //GetHardwareVersion819xUsb(Adapter);
4832
4833 //3//
4834 //3 //Set Hardware
4835 //3//
4836 rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
4837
4838 //
4839 // <Roger_Notes> We set MAC address here if autoload was failed before,
4840 // otherwise IDR0 will NOT contain any value.
4841 //
4842 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4843 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4844 if(!priv->bInHctTest)
4845 {
4846 if(priv->ResetProgress == RESET_TYPE_NORESET)
4847 {
4848 //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
4849 //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
4850 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
4851 }
4852 }
4853 else
4854 {
4855 priv->ieee80211->mode = WIRELESS_MODE_G;
4856 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
4857 }
4858
4859 //Security related.
4860 //-----------------------------------------------------------------------------
4861 // Set up security related. 070106, by rcnjko:
4862 // 1. Clear all H/W keys.
4863 // 2. Enable H/W encryption/decryption.
4864 //-----------------------------------------------------------------------------
4865 //CamResetAllEntry(Adapter);
4866 //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
4867
4868 //SecClearAllKeys(Adapter);
4869 CamResetAllEntry(dev);
4870 //SecInit(Adapter);
4871 {
4872 u8 SECR_value = 0x0;
4873 SECR_value |= SCR_TxEncEnable;
4874 SECR_value |= SCR_RxDecEnable;
4875 SECR_value |= SCR_NoSKMC;
4876 write_nic_byte(dev, SECR, SECR_value);
4877 }
4878
4879 #ifdef TO_DO_LIST
4880
4881 //PHY_UpdateInitialGain(dev);
4882
4883 if(priv->RegRfOff == true)
4884 { // User disable RF via registry.
4885 u8 eRFPath = 0;
4886
4887 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
4888 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
4889 // Those action will be discard in MgntActSet_RF_State because off the same state
4890 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
4891 rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
4892 }
4893 else if(priv->RfOffReason > RF_CHANGE_BY_PS)
4894 { // H/W or S/W RF OFF before sleep.
4895 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
4896 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
4897 }
4898 else
4899 {
4900 priv->eRFPowerState = eRfOn;
4901 priv->RfOffReason = 0;
4902 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
4903 }
4904
4905 #endif
4906
4907
4908 //
4909 // f. Start to BulkIn transfer.
4910 //
4911 #ifdef TO_DO_LIST
4912
4913 #ifndef UNDER_VISTA
4914 {
4915 u8 i;
4916 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
4917
4918 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
4919 {
4920 if (PipeIndex == 0)
4921 {
4922 for(i=0; i<32; i++)
4923 HalUsbInMpdu(Adapter, PipeIndex);
4924 }
4925 else
4926 {
4927 //HalUsbInMpdu(Adapter, PipeIndex);
4928 //HalUsbInMpdu(Adapter, PipeIndex);
4929 //HalUsbInMpdu(Adapter, PipeIndex);
4930 }
4931 }
4932 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
4933 }
4934 #else
4935 // Joseph add to 819X code base for Vista USB platform.
4936 // This part may need to be add to Hal819xU code base. too.
4937 PlatformUsbEnableInPipes(Adapter);
4938 #endif
4939
4940 RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
4941
4942 PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
4943
4944 //
4945 // <Roger_EXP> The following configurations are for ASIC verification temporally.
4946 // 2008.07.10.
4947 //
4948
4949 #endif
4950
4951 //
4952 // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
4953 // TX power index for different rate set.
4954 //
4955 //if(priv->card_8192_version >= VERSION_8192S_ACUT)
4956 {
4957 // Get original hw reg values
4958 PHY_GetHWRegOriginalValue(dev);
4959
4960 // Write correct tx power index//FIXLZM
4961 PHY_SetTxPowerLevel8192S(dev, priv->chan);
4962 }
4963
4964 {
4965 u8 tmpU1b = 0;
4966 // EEPROM R/W workaround
4967 tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
4968 write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
4969 }
4970
4971 //
4972 //<Roger_Notes> 2008.08.19.
4973 // We return status here for temporal FPGA verification, 2008.08.19.
4974
4975 #ifdef RTL8192SU_FW_IQK
4976 write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
4977 ChkFwCmdIoDone(dev);
4978 #endif
4979
4980 //
4981 // <Roger_Notes> We enable high power mechanism after NIC initialized.
4982 // 2008.11.27.
4983 //
4984 write_nic_dword(dev, WFM5, FW_RA_RESET);
4985 ChkFwCmdIoDone(dev);
4986 write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
4987 ChkFwCmdIoDone(dev);
4988 write_nic_dword(dev, WFM5, FW_RA_REFRESH);
4989 ChkFwCmdIoDone(dev);
4990 write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
4991
4992 // <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
4993 //
4994
4995 end:
4996 return rtStatus;
4997 }
4998
4999 /***************************************************************************
5000 -------------------------------NET STUFF---------------------------
5001 ***************************************************************************/
5002
5003 static struct net_device_stats *rtl8192_stats(struct net_device *dev)
5004 {
5005 struct r8192_priv *priv = ieee80211_priv(dev);
5006
5007 return &priv->ieee80211->stats;
5008 }
5009
5010 bool
5011 HalTxCheckStuck819xUsb(
5012 struct net_device *dev
5013 )
5014 {
5015 struct r8192_priv *priv = ieee80211_priv(dev);
5016 u16 RegTxCounter = read_nic_word(dev, 0x128);
5017 bool bStuck = FALSE;
5018 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
5019 if(priv->TxCounter==RegTxCounter)
5020 bStuck = TRUE;
5021
5022 priv->TxCounter = RegTxCounter;
5023
5024 return bStuck;
5025 }
5026
5027 /*
5028 * <Assumption: RT_TX_SPINLOCK is acquired.>
5029 * First added: 2006.11.19 by emily
5030 */
5031 RESET_TYPE
5032 TxCheckStuck(struct net_device *dev)
5033 {
5034 struct r8192_priv *priv = ieee80211_priv(dev);
5035 u8 QueueID;
5036 // PRT_TCB pTcb;
5037 // u8 ResetThreshold;
5038 bool bCheckFwTxCnt = false;
5039 //unsigned long flags;
5040
5041 //
5042 // Decide Stuch threshold according to current power save mode
5043 //
5044
5045 // RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
5046 // PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
5047 // spin_lock_irqsave(&priv->ieee80211->lock,flags);
5048 for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
5049 {
5050 if(QueueID == TXCMD_QUEUE)
5051 continue;
5052 #if 1
5053 if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0) && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
5054 continue;
5055 #endif
5056
5057 bCheckFwTxCnt = true;
5058 }
5059 // PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
5060 // spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
5061 // RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
5062 #if 1
5063 if(bCheckFwTxCnt)
5064 {
5065 if(HalTxCheckStuck819xUsb(dev))
5066 {
5067 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
5068 return RESET_TYPE_SILENT;
5069 }
5070 }
5071 #endif
5072 return RESET_TYPE_NORESET;
5073 }
5074
5075 bool
5076 HalRxCheckStuck819xUsb(struct net_device *dev)
5077 {
5078 u16 RegRxCounter = read_nic_word(dev, 0x130);
5079 struct r8192_priv *priv = ieee80211_priv(dev);
5080 bool bStuck = FALSE;
5081 //#ifdef RTL8192SU
5082
5083 //#else
5084 static u8 rx_chk_cnt = 0;
5085 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
5086 // If rssi is small, we should check rx for long time because of bad rx.
5087 // or maybe it will continuous silent reset every 2 seconds.
5088 rx_chk_cnt++;
5089 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
5090 {
5091 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
5092 }
5093 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
5094 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
5095 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
5096 {
5097 if(rx_chk_cnt < 2)
5098 {
5099 return bStuck;
5100 }
5101 else
5102 {
5103 rx_chk_cnt = 0;
5104 }
5105 }
5106 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
5107 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
5108 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
5109 {
5110 if(rx_chk_cnt < 4)
5111 {
5112 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5113 return bStuck;
5114 }
5115 else
5116 {
5117 rx_chk_cnt = 0;
5118 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5119 }
5120 }
5121 else
5122 {
5123 if(rx_chk_cnt < 8)
5124 {
5125 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
5126 return bStuck;
5127 }
5128 else
5129 {
5130 rx_chk_cnt = 0;
5131 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
5132 }
5133 }
5134 //#endif
5135
5136 if(priv->RxCounter==RegRxCounter)
5137 bStuck = TRUE;
5138
5139 priv->RxCounter = RegRxCounter;
5140
5141 return bStuck;
5142 }
5143
5144 RESET_TYPE
5145 RxCheckStuck(struct net_device *dev)
5146 {
5147 struct r8192_priv *priv = ieee80211_priv(dev);
5148 //int i;
5149 bool bRxCheck = FALSE;
5150
5151 // RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
5152 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
5153
5154 if(priv->IrpPendingCount > 1)
5155 bRxCheck = TRUE;
5156 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
5157
5158 // RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
5159 if(bRxCheck)
5160 {
5161 if(HalRxCheckStuck819xUsb(dev))
5162 {
5163 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
5164 return RESET_TYPE_SILENT;
5165 }
5166 }
5167 return RESET_TYPE_NORESET;
5168 }
5169
5170
5171 /**
5172 * This function is called by Checkforhang to check whether we should ask OS to reset driver
5173 *
5174 * \param pAdapter The adapter context for this miniport
5175 *
5176 * Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
5177 * to judge whether there is tx stuck.
5178 * Note: This function may be required to be rewrite for Vista OS.
5179 * <<<Assumption: Tx spinlock has been acquired >>>
5180 *
5181 * 8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
5182 */
5183 RESET_TYPE
5184 rtl819x_ifcheck_resetornot(struct net_device *dev)
5185 {
5186 struct r8192_priv *priv = ieee80211_priv(dev);
5187 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
5188 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
5189 RT_RF_POWER_STATE rfState;
5190
5191 return RESET_TYPE_NORESET;
5192
5193 rfState = priv->ieee80211->eRFPowerState;
5194
5195 TxResetType = TxCheckStuck(dev);
5196 #if 1
5197 if( rfState != eRfOff ||
5198 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
5199 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
5200 {
5201 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
5202 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
5203 // if driver is in firmware download failure status, driver should initialize RF in the following
5204 // silent reset procedure Emily, 2008.01.21
5205
5206 // Driver should not check RX stuck in IBSS mode because it is required to
5207 // set Check BSSID in order to send beacon, however, if check BSSID is
5208 // set, STA cannot hear any packet a all. Emily, 2008.04.12
5209 RxResetType = RxCheckStuck(dev);
5210 }
5211 #endif
5212 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
5213 return RESET_TYPE_NORMAL;
5214 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
5215 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
5216 return RESET_TYPE_SILENT;
5217 }
5218 else
5219 return RESET_TYPE_NORESET;
5220
5221 }
5222
5223 void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
5224 int _rtl8192_up(struct net_device *dev);
5225 int rtl8192_close(struct net_device *dev);
5226
5227
5228
5229 void
5230 CamRestoreAllEntry( struct net_device *dev)
5231 {
5232 u8 EntryId = 0;
5233 struct r8192_priv *priv = ieee80211_priv(dev);
5234 u8* MacAddr = priv->ieee80211->current_network.bssid;
5235
5236 static u8 CAM_CONST_ADDR[4][6] = {
5237 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
5238 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
5239 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
5240 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
5241 static u8 CAM_CONST_BROAD[] =
5242 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5243
5244 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
5245
5246
5247 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
5248 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
5249 {
5250
5251 for(EntryId=0; EntryId<4; EntryId++)
5252 {
5253 {
5254 MacAddr = CAM_CONST_ADDR[EntryId];
5255 setKey(dev,
5256 EntryId ,
5257 EntryId,
5258 priv->ieee80211->pairwise_key_type,
5259 MacAddr,
5260 0,
5261 NULL);
5262 }
5263 }
5264
5265 }
5266 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
5267 {
5268
5269 {
5270 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5271 setKey(dev,
5272 4,
5273 0,
5274 priv->ieee80211->pairwise_key_type,
5275 (u8*)dev->dev_addr,
5276 0,
5277 NULL);
5278 else
5279 setKey(dev,
5280 4,
5281 0,
5282 priv->ieee80211->pairwise_key_type,
5283 MacAddr,
5284 0,
5285 NULL);
5286 }
5287 }
5288 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
5289 {
5290
5291 {
5292 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5293 setKey(dev,
5294 4,
5295 0,
5296 priv->ieee80211->pairwise_key_type,
5297 (u8*)dev->dev_addr,
5298 0,
5299 NULL);
5300 else
5301 setKey(dev,
5302 4,
5303 0,
5304 priv->ieee80211->pairwise_key_type,
5305 MacAddr,
5306 0,
5307 NULL);
5308 }
5309 }
5310
5311
5312
5313 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
5314 {
5315 MacAddr = CAM_CONST_BROAD;
5316 for(EntryId=1 ; EntryId<4 ; EntryId++)
5317 {
5318 {
5319 setKey(dev,
5320 EntryId,
5321 EntryId,
5322 priv->ieee80211->group_key_type,
5323 MacAddr,
5324 0,
5325 NULL);
5326 }
5327 }
5328 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5329 setKey(dev,
5330 0,
5331 0,
5332 priv->ieee80211->group_key_type,
5333 CAM_CONST_ADDR[0],
5334 0,
5335 NULL);
5336 }
5337 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
5338 {
5339 MacAddr = CAM_CONST_BROAD;
5340 for(EntryId=1; EntryId<4 ; EntryId++)
5341 {
5342 {
5343 setKey(dev,
5344 EntryId ,
5345 EntryId,
5346 priv->ieee80211->group_key_type,
5347 MacAddr,
5348 0,
5349 NULL);
5350 }
5351 }
5352
5353 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5354 setKey(dev,
5355 0 ,
5356 0,
5357 priv->ieee80211->group_key_type,
5358 CAM_CONST_ADDR[0],
5359 0,
5360 NULL);
5361 }
5362 }
5363 //////////////////////////////////////////////////////////////
5364 // This function is used to fix Tx/Rx stop bug temporarily.
5365 // This function will do "system reset" to NIC when Tx or Rx is stuck.
5366 // The method checking Tx/Rx stuck of this function is supported by FW,
5367 // which reports Tx and Rx counter to register 0x128 and 0x130.
5368 //////////////////////////////////////////////////////////////
5369 void
5370 rtl819x_ifsilentreset(struct net_device *dev)
5371 {
5372 //OCTET_STRING asocpdu;
5373 struct r8192_priv *priv = ieee80211_priv(dev);
5374 u8 reset_times = 0;
5375 int reset_status = 0;
5376 struct ieee80211_device *ieee = priv->ieee80211;
5377
5378
5379 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
5380 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
5381
5382 if(priv->ResetProgress==RESET_TYPE_NORESET)
5383 {
5384 RESET_START:
5385
5386 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
5387
5388 // Set the variable for reset.
5389 priv->ResetProgress = RESET_TYPE_SILENT;
5390 // rtl8192_close(dev);
5391 #if 1
5392 down(&priv->wx_sem);
5393 if(priv->up == 0)
5394 {
5395 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
5396 up(&priv->wx_sem);
5397 return ;
5398 }
5399 priv->up = 0;
5400 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
5401 // if(!netif_queue_stopped(dev))
5402 // netif_stop_queue(dev);
5403
5404 rtl8192_rtx_disable(dev);
5405 rtl8192_cancel_deferred_work(priv);
5406 deinit_hal_dm(dev);
5407 del_timer_sync(&priv->watch_dog_timer);
5408
5409 ieee->sync_scan_hurryup = 1;
5410 if(ieee->state == IEEE80211_LINKED)
5411 {
5412 down(&ieee->wx_sem);
5413 printk("ieee->state is IEEE80211_LINKED\n");
5414 ieee80211_stop_send_beacons(priv->ieee80211);
5415 del_timer_sync(&ieee->associate_timer);
5416 cancel_delayed_work(&ieee->associate_retry_wq);
5417 ieee80211_stop_scan(ieee);
5418 netif_carrier_off(dev);
5419 up(&ieee->wx_sem);
5420 }
5421 else{
5422 printk("ieee->state is NOT LINKED\n");
5423 ieee80211_softmac_stop_protocol(priv->ieee80211); }
5424 up(&priv->wx_sem);
5425 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
5426 //rtl8192_irq_disable(dev);
5427 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
5428 reset_status = _rtl8192_up(dev);
5429
5430 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
5431 if(reset_status == -EAGAIN)
5432 {
5433 if(reset_times < 3)
5434 {
5435 reset_times++;
5436 goto RESET_START;
5437 }
5438 else
5439 {
5440 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n", __FUNCTION__);
5441 }
5442 }
5443 #endif
5444 ieee->is_silent_reset = 1;
5445 #if 1
5446 EnableHWSecurityConfig8192(dev);
5447 #if 1
5448 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
5449 {
5450 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5451
5452 #if 1
5453 queue_work(ieee->wq, &ieee->associate_complete_wq);
5454 #endif
5455
5456 }
5457 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
5458 {
5459 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5460 ieee->link_change(ieee->dev);
5461
5462 // notify_wx_assoc_event(ieee);
5463
5464 ieee80211_start_send_beacons(ieee);
5465
5466 if (ieee->data_hard_resume)
5467 ieee->data_hard_resume(ieee->dev);
5468 netif_carrier_on(ieee->dev);
5469 }
5470 #endif
5471
5472 CamRestoreAllEntry(dev);
5473
5474 priv->ResetProgress = RESET_TYPE_NORESET;
5475 priv->reset_count++;
5476
5477 priv->bForcedSilentReset =false;
5478 priv->bResetInProgress = false;
5479
5480 // For test --> force write UFWP.
5481 write_nic_byte(dev, UFWP, 1);
5482 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
5483 #endif
5484 }
5485 }
5486
5487 void CAM_read_entry(
5488 struct net_device *dev,
5489 u32 iIndex
5490 )
5491 {
5492 u32 target_command=0;
5493 u32 target_content=0;
5494 u8 entry_i=0;
5495 u32 ulStatus;
5496 s32 i=100;
5497 // printk("=======>start read CAM\n");
5498 for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
5499 {
5500 // polling bit, and No Write enable, and address
5501 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
5502 target_command= target_command | BIT31;
5503
5504 //Check polling bit is clear
5505 // mdelay(1);
5506 #if 1
5507 while((i--)>=0)
5508 {
5509 ulStatus = read_nic_dword(dev, RWCAM);
5510 if(ulStatus & BIT31){
5511 continue;
5512 }
5513 else{
5514 break;
5515 }
5516 }
5517 #endif
5518 write_nic_dword(dev, RWCAM, target_command);
5519 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
5520 // printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
5521 target_content = read_nic_dword(dev, RCAMO);
5522 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
5523 // printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
5524 }
5525 printk("\n");
5526 }
5527
5528 void rtl819x_update_rxcounts(
5529 struct r8192_priv *priv,
5530 u32* TotalRxBcnNum,
5531 u32* TotalRxDataNum
5532 )
5533 {
5534 u16 SlotIndex;
5535 u8 i;
5536
5537 *TotalRxBcnNum = 0;
5538 *TotalRxDataNum = 0;
5539
5540 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
5541 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
5542 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
5543 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
5544 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
5545 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
5546 }
5547 }
5548
5549 extern void rtl819x_watchdog_wqcallback(struct work_struct *work)
5550 {
5551 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5552 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
5553 struct net_device *dev = priv->ieee80211->dev;
5554 struct ieee80211_device* ieee = priv->ieee80211;
5555 RESET_TYPE ResetType = RESET_TYPE_NORESET;
5556 static u8 check_reset_cnt=0;
5557 bool bBusyTraffic = false;
5558
5559 if(!priv->up)
5560 return;
5561 hal_dm_watchdog(dev);
5562
5563 {//to get busy traffic condition
5564 if(ieee->state == IEEE80211_LINKED)
5565 {
5566 //windows mod 666 to 100.
5567 //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
5568 // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
5569 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
5570 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
5571 bBusyTraffic = true;
5572 }
5573 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5574 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5575 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5576 }
5577 }
5578 //added by amy for AP roaming
5579 {
5580 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
5581 {
5582 u32 TotalRxBcnNum = 0;
5583 u32 TotalRxDataNum = 0;
5584
5585 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5586 if((TotalRxBcnNum+TotalRxDataNum) == 0)
5587 {
5588 #ifdef TODO
5589 if(rfState == eRfOff)
5590 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
5591 #endif
5592 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
5593 // Dot11d_Reset(dev);
5594 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5595 notify_wx_assoc_event(priv->ieee80211);
5596 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
5597 ieee->is_roaming = true;
5598 priv->ieee80211->link_change(dev);
5599 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5600 }
5601 }
5602 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
5603 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
5604 }
5605 // CAM_read_entry(dev,4);
5606 //check if reset the driver
5607 if(check_reset_cnt++ >= 3 && !ieee->is_roaming)
5608 {
5609 ResetType = rtl819x_ifcheck_resetornot(dev);
5610 check_reset_cnt = 3;
5611 //DbgPrint("Start to check silent reset\n");
5612 }
5613 // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5614 #if 1
5615 if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
5616 (priv->bForcedSilentReset ||
5617 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo
5618 {
5619 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5620 rtl819x_ifsilentreset(dev);
5621 }
5622 #endif
5623 priv->force_reset = false;
5624 priv->bForcedSilentReset = false;
5625 priv->bResetInProgress = false;
5626 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
5627
5628 }
5629
5630 void watch_dog_timer_callback(unsigned long data)
5631 {
5632 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
5633 //printk("===============>watch_dog timer\n");
5634 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
5635 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
5636 }
5637 int _rtl8192_up(struct net_device *dev)
5638 {
5639 struct r8192_priv *priv = ieee80211_priv(dev);
5640 //int i;
5641 int init_status = 0;
5642 priv->up=1;
5643 priv->ieee80211->ieee_up=1;
5644 RT_TRACE(COMP_INIT, "Bringing up iface");
5645 init_status = priv->ops->rtl819x_adapter_start(dev);
5646 if(!init_status)
5647 {
5648 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
5649 priv->up=priv->ieee80211->ieee_up = 0;
5650 return -EAGAIN;
5651 }
5652 RT_TRACE(COMP_INIT, "start adapter finished\n");
5653 rtl8192_rx_enable(dev);
5654 // rtl8192_tx_enable(dev);
5655 if(priv->ieee80211->state != IEEE80211_LINKED)
5656 ieee80211_softmac_start_protocol(priv->ieee80211);
5657 ieee80211_reset_queue(priv->ieee80211);
5658 watch_dog_timer_callback((unsigned long) dev);
5659 if(!netif_queue_stopped(dev))
5660 netif_start_queue(dev);
5661 else
5662 netif_wake_queue(dev);
5663
5664 /*
5665 * Make sure that drop_unencrypted is initialized as "0"
5666 * No packets will be sent in non-security mode if we had set drop_unencrypted.
5667 * ex, After kill wpa_supplicant process, make the driver up again.
5668 * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
5669 */
5670 priv->ieee80211->drop_unencrypted = 0;
5671
5672 return 0;
5673 }
5674
5675
5676 int rtl8192_open(struct net_device *dev)
5677 {
5678 struct r8192_priv *priv = ieee80211_priv(dev);
5679 int ret;
5680 down(&priv->wx_sem);
5681 ret = rtl8192_up(dev);
5682 up(&priv->wx_sem);
5683 return ret;
5684
5685 }
5686
5687
5688 int rtl8192_up(struct net_device *dev)
5689 {
5690 struct r8192_priv *priv = ieee80211_priv(dev);
5691
5692 if (priv->up == 1) return -1;
5693
5694 return _rtl8192_up(dev);
5695 }
5696
5697
5698 int rtl8192_close(struct net_device *dev)
5699 {
5700 struct r8192_priv *priv = ieee80211_priv(dev);
5701 int ret;
5702
5703 down(&priv->wx_sem);
5704
5705 ret = rtl8192_down(dev);
5706
5707 up(&priv->wx_sem);
5708
5709 return ret;
5710
5711 }
5712
5713 int rtl8192_down(struct net_device *dev)
5714 {
5715 struct r8192_priv *priv = ieee80211_priv(dev);
5716 int i;
5717
5718 if (priv->up == 0) return -1;
5719
5720 priv->up=0;
5721 priv->ieee80211->ieee_up = 0;
5722 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
5723 /* FIXME */
5724 if (!netif_queue_stopped(dev))
5725 netif_stop_queue(dev);
5726
5727 rtl8192_rtx_disable(dev);
5728 //rtl8192_irq_disable(dev);
5729
5730 /* Tx related queue release */
5731 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5732 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
5733 }
5734 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5735 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
5736 }
5737
5738 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5739 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
5740 }
5741
5742 //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
5743 // flush_scheduled_work();
5744 rtl8192_cancel_deferred_work(priv);
5745 deinit_hal_dm(dev);
5746 del_timer_sync(&priv->watch_dog_timer);
5747
5748
5749 ieee80211_softmac_stop_protocol(priv->ieee80211);
5750 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
5751 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
5752
5753 return 0;
5754 }
5755
5756
5757 void rtl8192_commit(struct net_device *dev)
5758 {
5759 struct r8192_priv *priv = ieee80211_priv(dev);
5760 int reset_status = 0;
5761 //u8 reset_times = 0;
5762 if (priv->up == 0) return ;
5763 priv->up = 0;
5764
5765 rtl8192_cancel_deferred_work(priv);
5766 del_timer_sync(&priv->watch_dog_timer);
5767 //cancel_delayed_work(&priv->SwChnlWorkItem);
5768
5769 ieee80211_softmac_stop_protocol(priv->ieee80211);
5770
5771 //rtl8192_irq_disable(dev);
5772 rtl8192_rtx_disable(dev);
5773 reset_status = _rtl8192_up(dev);
5774
5775 }
5776
5777 /*
5778 void rtl8192_restart(struct net_device *dev)
5779 {
5780 struct r8192_priv *priv = ieee80211_priv(dev);
5781 */
5782 void rtl8192_restart(struct work_struct *work)
5783 {
5784 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
5785 struct net_device *dev = priv->ieee80211->dev;
5786
5787 down(&priv->wx_sem);
5788
5789 rtl8192_commit(dev);
5790
5791 up(&priv->wx_sem);
5792 }
5793
5794 static void r8192_set_multicast(struct net_device *dev)
5795 {
5796 struct r8192_priv *priv = ieee80211_priv(dev);
5797 short promisc;
5798
5799 //down(&priv->wx_sem);
5800
5801 /* FIXME FIXME */
5802
5803 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5804
5805 if (promisc != priv->promisc)
5806 // rtl8192_commit(dev);
5807
5808 priv->promisc = promisc;
5809
5810 //schedule_work(&priv->reset_wq);
5811 //up(&priv->wx_sem);
5812 }
5813
5814
5815 int r8192_set_mac_adr(struct net_device *dev, void *mac)
5816 {
5817 struct r8192_priv *priv = ieee80211_priv(dev);
5818 struct sockaddr *addr = mac;
5819
5820 down(&priv->wx_sem);
5821
5822 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5823
5824 schedule_work(&priv->reset_wq);
5825
5826 up(&priv->wx_sem);
5827
5828 return 0;
5829 }
5830
5831 /* based on ipw2200 driver */
5832 int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5833 {
5834 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5835 struct iwreq *wrq = (struct iwreq *)rq;
5836 int ret=-1;
5837 struct ieee80211_device *ieee = priv->ieee80211;
5838 u32 key[4];
5839 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5840 u8 zero_addr[6] = {0};
5841 struct iw_point *p = &wrq->u.data;
5842 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5843
5844 down(&priv->wx_sem);
5845
5846
5847 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5848 ret = -EINVAL;
5849 goto out;
5850 }
5851
5852 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
5853 if (ipw == NULL){
5854 ret = -ENOMEM;
5855 goto out;
5856 }
5857 if (copy_from_user(ipw, p->pointer, p->length)) {
5858 kfree(ipw);
5859 ret = -EFAULT;
5860 goto out;
5861 }
5862
5863 switch (cmd) {
5864 case RTL_IOCTL_WPA_SUPPLICANT:
5865 //parse here for HW security
5866 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5867 {
5868 if (ipw->u.crypt.set_tx)
5869 {
5870 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5871 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5872 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5873 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5874 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5875 {
5876 if (ipw->u.crypt.key_len == 13)
5877 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5878 else if (ipw->u.crypt.key_len == 5)
5879 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5880 }
5881 else
5882 ieee->pairwise_key_type = KEY_TYPE_NA;
5883
5884 if (ieee->pairwise_key_type)
5885 {
5886 // FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
5887 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
5888 ieee->iw_mode = IW_MODE_ADHOC;
5889 memcpy((u8*)key, ipw->u.crypt.key, 16);
5890 EnableHWSecurityConfig8192(dev);
5891 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5892 //added by WB.
5893 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5894 if (ieee->iw_mode == IW_MODE_ADHOC)
5895 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5896 }
5897 }
5898 else //if (ipw->u.crypt.idx) //group key use idx > 0
5899 {
5900 memcpy((u8*)key, ipw->u.crypt.key, 16);
5901 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5902 ieee->group_key_type= KEY_TYPE_CCMP;
5903 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5904 ieee->group_key_type = KEY_TYPE_TKIP;
5905 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5906 {
5907 if (ipw->u.crypt.key_len == 13)
5908 ieee->group_key_type = KEY_TYPE_WEP104;
5909 else if (ipw->u.crypt.key_len == 5)
5910 ieee->group_key_type = KEY_TYPE_WEP40;
5911 }
5912 else
5913 ieee->group_key_type = KEY_TYPE_NA;
5914
5915 if (ieee->group_key_type)
5916 {
5917 setKey( dev,
5918 ipw->u.crypt.idx,
5919 ipw->u.crypt.idx, //KeyIndex
5920 ieee->group_key_type, //KeyType
5921 broadcast_addr, //MacAddr
5922 0, //DefaultKey
5923 key); //KeyContent
5924 }
5925 }
5926 }
5927 #ifdef JOHN_HWSEC_DEBUG
5928 //john's test 0711
5929 printk("@@ wrq->u pointer = ");
5930 for(i=0;i<wrq->u.data.length;i++){
5931 if(i%10==0) printk("\n");
5932 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5933 }
5934 printk("\n");
5935 #endif /*JOHN_HWSEC_DEBUG*/
5936 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5937 break;
5938
5939 default:
5940 ret = -EOPNOTSUPP;
5941 break;
5942 }
5943 kfree(ipw);
5944 ipw = NULL;
5945 out:
5946 up(&priv->wx_sem);
5947 return ret;
5948 }
5949
5950 u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
5951 {
5952
5953 u8 ret_rate = 0x02;
5954
5955 if( bFirstAMPDU )
5956 {
5957 if(!bIsHT)
5958 {
5959 switch(rate)
5960 {
5961
5962 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5963 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5964 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5965 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5966 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5967 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5968 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5969 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5970 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5971 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5972 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5973 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5974
5975 default:
5976 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5977 break;
5978 }
5979 }
5980 else
5981 {
5982 switch(rate)
5983 {
5984
5985 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5986 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5987 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5988 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5989 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5990 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5991 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5992 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
5993 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
5994 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
5995 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
5996 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
5997 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
5998 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
5999 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6000 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6001 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6002
6003 default:
6004 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6005 break;
6006 }
6007
6008 }
6009 }
6010 else
6011 {
6012 switch(rate)
6013 {
6014
6015 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
6016 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
6017 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
6018 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
6019 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
6020 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
6021 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
6022 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
6023 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
6024 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
6025 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
6026 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
6027 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
6028 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
6029 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
6030 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
6031 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
6032 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
6033 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
6034 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
6035 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
6036 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
6037 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
6038 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6039 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6040 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6041 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6042 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6043 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6044
6045 default:
6046 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6047 break;
6048 }
6049 }
6050 return ret_rate;
6051 }
6052
6053 u8 HwRateToMRate90(bool bIsHT, u8 rate)
6054 {
6055 u8 ret_rate = 0xff;
6056
6057 if(!bIsHT) {
6058 switch(rate) {
6059 case DESC90_RATE1M: ret_rate = MGN_1M; break;
6060 case DESC90_RATE2M: ret_rate = MGN_2M; break;
6061 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
6062 case DESC90_RATE11M: ret_rate = MGN_11M; break;
6063 case DESC90_RATE6M: ret_rate = MGN_6M; break;
6064 case DESC90_RATE9M: ret_rate = MGN_9M; break;
6065 case DESC90_RATE12M: ret_rate = MGN_12M; break;
6066 case DESC90_RATE18M: ret_rate = MGN_18M; break;
6067 case DESC90_RATE24M: ret_rate = MGN_24M; break;
6068 case DESC90_RATE36M: ret_rate = MGN_36M; break;
6069 case DESC90_RATE48M: ret_rate = MGN_48M; break;
6070 case DESC90_RATE54M: ret_rate = MGN_54M; break;
6071
6072 default:
6073 ret_rate = 0xff;
6074 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
6075 break;
6076 }
6077
6078 } else {
6079 switch(rate) {
6080 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
6081 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
6082 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
6083 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
6084 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
6085 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
6086 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
6087 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
6088 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
6089 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
6090 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
6091 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
6092 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
6093 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
6094 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
6095 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
6096 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
6097
6098 default:
6099 ret_rate = 0xff;
6100 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
6101 break;
6102 }
6103 }
6104
6105 return ret_rate;
6106 }
6107
6108 /**
6109 * Function: UpdateRxPktTimeStamp
6110 * Overview: Recored down the TSF time stamp when receiving a packet
6111 *
6112 * Input:
6113 * PADAPTER Adapter
6114 * PRT_RFD pRfd,
6115 *
6116 * Output:
6117 * PRT_RFD pRfd
6118 * (pRfd->Status.TimeStampHigh is updated)
6119 * (pRfd->Status.TimeStampLow is updated)
6120 * Return:
6121 * None
6122 */
6123 void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
6124 {
6125 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6126
6127 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
6128 stats->mac_time[0] = priv->LastRxDescTSFLow;
6129 stats->mac_time[1] = priv->LastRxDescTSFHigh;
6130 } else {
6131 priv->LastRxDescTSFLow = stats->mac_time[0];
6132 priv->LastRxDescTSFHigh = stats->mac_time[1];
6133 }
6134 }
6135
6136 //by amy 080606
6137
6138 long rtl819x_translate_todbm(u8 signal_strength_index )// 0-100 index.
6139 {
6140 long signal_power; // in dBm.
6141
6142 // Translate to dBm (x=0.5y-95).
6143 signal_power = (long)((signal_strength_index + 1) >> 1);
6144 signal_power -= 95;
6145
6146 return signal_power;
6147 }
6148
6149
6150 /* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
6151 be a local static. Otherwise, it may increase when we return from S3/S4. The
6152 value will be kept in memory or disk. We must delcare the value in adapter
6153 and it will be reinitialized when return from S3/S4. */
6154 void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
6155 {
6156 bool bcheck = false;
6157 u8 rfpath;
6158 u32 nspatial_stream, tmp_val;
6159 //u8 i;
6160 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
6161 static u32 slide_evm_index=0, slide_evm_statistics=0;
6162 static u32 last_rssi=0, last_evm=0;
6163
6164 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
6165 static u32 last_beacon_adc_pwdb=0;
6166
6167 struct ieee80211_hdr_3addr *hdr;
6168 u16 sc ;
6169 unsigned int frag,seq;
6170 hdr = (struct ieee80211_hdr_3addr *)buffer;
6171 sc = le16_to_cpu(hdr->seq_ctrl);
6172 frag = WLAN_GET_SEQ_FRAG(sc);
6173 seq = WLAN_GET_SEQ_SEQ(sc);
6174 //cosa add 04292008 to record the sequence number
6175 pcurrent_stats->Seq_Num = seq;
6176 //
6177 // Check whether we should take the previous packet into accounting
6178 //
6179 if(!pprevious_stats->bIsAMPDU)
6180 {
6181 // if previous packet is not aggregated packet
6182 bcheck = true;
6183 }else
6184 {
6185 }
6186
6187
6188 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
6189 {
6190 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
6191 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
6192 priv->stats.slide_rssi_total -= last_rssi;
6193 }
6194 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
6195
6196 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
6197 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
6198 slide_rssi_index = 0;
6199
6200 // <1> Showed on UI for user, in dbm
6201 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
6202 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
6203 pcurrent_stats->rssi = priv->stats.signal_strength;
6204 //
6205 // If the previous packet does not match the criteria, neglect it
6206 //
6207 if(!pprevious_stats->bPacketMatchBSSID)
6208 {
6209 if(!pprevious_stats->bToSelfBA)
6210 return;
6211 }
6212
6213 if(!bcheck)
6214 return;
6215
6216
6217 //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
6218
6219 //
6220 // Check RSSI
6221 //
6222 priv->stats.num_process_phyinfo++;
6223
6224 /* record the general signal strength to the sliding window. */
6225
6226
6227 // <2> Showed on UI for engineering
6228 // hardware does not provide rssi information for each rf path in CCK
6229 if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
6230 {
6231 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
6232 {
6233 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
6234 continue;
6235
6236 //Fixed by Jacken 2008-03-20
6237 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
6238 {
6239 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
6240 //DbgPrint("MIMO RSSI initialize \n");
6241 }
6242 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
6243 {
6244 priv->stats.rx_rssi_percentage[rfpath] =
6245 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6246 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6247 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
6248 }
6249 else
6250 {
6251 priv->stats.rx_rssi_percentage[rfpath] =
6252 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6253 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6254 }
6255 RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
6256 }
6257 }
6258
6259
6260 //
6261 // Check PWDB.
6262 //
6263 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6264 pprevious_stats->bIsCCK? "CCK": "OFDM",
6265 pprevious_stats->RxPWDBAll);
6266
6267 if(pprevious_stats->bPacketBeacon)
6268 {
6269 /* record the beacon pwdb to the sliding window. */
6270 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6271 {
6272 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
6273 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
6274 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
6275 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
6276 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
6277 }
6278 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
6279 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
6280 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
6281 slide_beacon_adc_pwdb_index++;
6282 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6283 slide_beacon_adc_pwdb_index = 0;
6284 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
6285 if(pprevious_stats->RxPWDBAll >= 3)
6286 pprevious_stats->RxPWDBAll -= 3;
6287 }
6288
6289 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6290 pprevious_stats->bIsCCK? "CCK": "OFDM",
6291 pprevious_stats->RxPWDBAll);
6292
6293
6294 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6295 {
6296 if(priv->undecorated_smoothed_pwdb < 0) // initialize
6297 {
6298 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
6299 //DbgPrint("First pwdb initialize \n");
6300 }
6301 #if 1
6302 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
6303 {
6304 priv->undecorated_smoothed_pwdb =
6305 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6306 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6307 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
6308 }
6309 else
6310 {
6311 priv->undecorated_smoothed_pwdb =
6312 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6313 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6314 }
6315 #else
6316 //Fixed by Jacken 2008-03-20
6317 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
6318 {
6319 pHalData->UndecoratedSmoothedPWDB =
6320 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6321 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
6322 }
6323 else
6324 {
6325 pHalData->UndecoratedSmoothedPWDB =
6326 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6327 }
6328 #endif
6329
6330 }
6331
6332 //
6333 // Check EVM
6334 //
6335 /* record the general EVM to the sliding window. */
6336 if(pprevious_stats->SignalQuality == 0)
6337 {
6338 }
6339 else
6340 {
6341 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
6342 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
6343 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
6344 last_evm = priv->stats.slide_evm[slide_evm_index];
6345 priv->stats.slide_evm_total -= last_evm;
6346 }
6347
6348 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
6349
6350 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
6351 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
6352 slide_evm_index = 0;
6353
6354 // <1> Showed on UI for user, in percentage.
6355 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
6356 priv->stats.signal_quality = tmp_val;
6357 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
6358 priv->stats.last_signal_strength_inpercent = tmp_val;
6359 }
6360
6361 // <2> Showed on UI for engineering
6362 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6363 {
6364 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
6365 {
6366 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
6367 {
6368 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
6369 {
6370 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
6371 }
6372 priv->stats.rx_evm_percentage[nspatial_stream] =
6373 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
6374 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
6375 }
6376 }
6377 }
6378 }
6379
6380
6381 }
6382
6383 /*-----------------------------------------------------------------------------
6384 * Function: rtl819x_query_rxpwrpercentage()
6385 *
6386 * Overview:
6387 *
6388 * Input: char antpower
6389 *
6390 * Output: NONE
6391 *
6392 * Return: 0-100 percentage
6393 *
6394 * Revised History:
6395 * When Who Remark
6396 * 05/26/2008 amy Create Version 0 porting from windows code.
6397 *
6398 *---------------------------------------------------------------------------*/
6399 static u8 rtl819x_query_rxpwrpercentage(
6400 char antpower
6401 )
6402 {
6403 if ((antpower <= -100) || (antpower >= 20))
6404 {
6405 return 0;
6406 }
6407 else if (antpower >= 0)
6408 {
6409 return 100;
6410 }
6411 else
6412 {
6413 return (100+antpower);
6414 }
6415
6416 } /* QueryRxPwrPercentage */
6417
6418 static u8
6419 rtl819x_evm_dbtopercentage(
6420 char value
6421 )
6422 {
6423 char ret_val;
6424
6425 ret_val = value;
6426
6427 if(ret_val >= 0)
6428 ret_val = 0;
6429 if(ret_val <= -33)
6430 ret_val = -33;
6431 ret_val = 0 - ret_val;
6432 ret_val*=3;
6433 if(ret_val == 99)
6434 ret_val = 100;
6435 return(ret_val);
6436 }
6437 //
6438 // Description:
6439 // We want good-looking for signal strength/quality
6440 // 2007/7/19 01:09, by cosa.
6441 //
6442 long
6443 rtl819x_signal_scale_mapping(
6444 long currsig
6445 )
6446 {
6447 long retsig;
6448
6449 // Step 1. Scale mapping.
6450 if(currsig >= 61 && currsig <= 100)
6451 {
6452 retsig = 90 + ((currsig - 60) / 4);
6453 }
6454 else if(currsig >= 41 && currsig <= 60)
6455 {
6456 retsig = 78 + ((currsig - 40) / 2);
6457 }
6458 else if(currsig >= 31 && currsig <= 40)
6459 {
6460 retsig = 66 + (currsig - 30);
6461 }
6462 else if(currsig >= 21 && currsig <= 30)
6463 {
6464 retsig = 54 + (currsig - 20);
6465 }
6466 else if(currsig >= 5 && currsig <= 20)
6467 {
6468 retsig = 42 + (((currsig - 5) * 2) / 3);
6469 }
6470 else if(currsig == 4)
6471 {
6472 retsig = 36;
6473 }
6474 else if(currsig == 3)
6475 {
6476 retsig = 27;
6477 }
6478 else if(currsig == 2)
6479 {
6480 retsig = 18;
6481 }
6482 else if(currsig == 1)
6483 {
6484 retsig = 9;
6485 }
6486 else
6487 {
6488 retsig = currsig;
6489 }
6490
6491 return retsig;
6492 }
6493
6494 /*-----------------------------------------------------------------------------
6495 * Function: QueryRxPhyStatus8192S()
6496 *
6497 * Overview:
6498 *
6499 * Input: NONE
6500 *
6501 * Output: NONE
6502 *
6503 * Return: NONE
6504 *
6505 * Revised History:
6506 * When Who Remark
6507 * 06/01/2007 MHC Create Version 0.
6508 * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
6509 * descriptor definition.
6510 * 07/04/2007 MHC According to Jerry and Bryant's document. We read
6511 * ir_isolation and ext_lna for RF's init value and use
6512 * to compensate RSSI after receiving packets.
6513 * 09/10/2008 MHC Modify name and PHY status field for 92SE.
6514 * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
6515 *
6516 *---------------------------------------------------------------------------*/
6517 static void rtl8192SU_query_rxphystatus(
6518 struct r8192_priv * priv,
6519 struct ieee80211_rx_stats * pstats,
6520 rx_desc_819x_usb *pDesc,
6521 rx_drvinfo_819x_usb * pdrvinfo,
6522 struct ieee80211_rx_stats * precord_stats,
6523 bool bpacket_match_bssid,
6524 bool bpacket_toself,
6525 bool bPacketBeacon,
6526 bool bToSelfBA
6527 )
6528 {
6529 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
6530 //PHY_STS_CCK_8192S_T *pCck_buf;
6531 phy_sts_cck_819xusb_t * pcck_buf;
6532 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
6533 //u8 *prxpkt;
6534 //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
6535 u8 i, max_spatial_stream, rxsc_sgien_exflg;
6536 char rx_pwr[4], rx_pwr_all=0;
6537 //long rx_avg_pwr = 0;
6538 //char rx_snrX, rx_evmX;
6539 u8 evm, pwdb_all;
6540 u32 RSSI, total_rssi=0;//, total_evm=0;
6541 // long signal_strength_index = 0;
6542 u8 is_cck_rate=0;
6543 u8 rf_rx_num = 0;
6544
6545
6546
6547 priv->stats.numqry_phystatus++;
6548
6549 is_cck_rate = rx_hal_is_cck_rate(pDesc);
6550
6551 // Record it for next packet processing
6552 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
6553 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
6554 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
6555 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
6556 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
6557 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
6558
6559
6560 pstats->RxMIMOSignalQuality[0] = -1;
6561 pstats->RxMIMOSignalQuality[1] = -1;
6562 precord_stats->RxMIMOSignalQuality[0] = -1;
6563 precord_stats->RxMIMOSignalQuality[1] = -1;
6564
6565 if(is_cck_rate)
6566 {
6567 u8 report;//, tmp_pwdb;
6568 //char cck_adc_pwdb[4];
6569
6570 // CCK Driver info Structure is not the same as OFDM packet.
6571 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
6572
6573 //
6574 // (1)Hardware does not provide RSSI for CCK
6575 //
6576
6577 //
6578 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6579 //
6580
6581 priv->stats.numqry_phystatusCCK++;
6582
6583 if(!priv->bCckHighPower)
6584 {
6585 report = pcck_buf->cck_agc_rpt & 0xc0;
6586 report = report>>6;
6587 switch(report)
6588 {
6589 //Fixed by Jacken from Bryant 2008-03-20
6590 //Original value is -38 , -26 , -14 , -2
6591 //Fixed value is -35 , -23 , -11 , 6
6592 case 0x3:
6593 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
6594 break;
6595 case 0x2:
6596 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
6597 break;
6598 case 0x1:
6599 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
6600 break;
6601 case 0x0:
6602 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
6603 break;
6604 }
6605 }
6606 else
6607 {
6608 report = pdrvinfo->cfosho[0] & 0x60;
6609 report = report>>5;
6610 switch(report)
6611 {
6612 case 0x3:
6613 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6614 break;
6615 case 0x2:
6616 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
6617 break;
6618 case 0x1:
6619 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6620 break;
6621 case 0x0:
6622 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
6623 break;
6624 }
6625 }
6626
6627 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
6628 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6629 //pstats->RecvSignalPower = pwdb_all;
6630 pstats->RecvSignalPower = rx_pwr_all;
6631
6632 //
6633 // (3) Get Signal Quality (EVM)
6634 //
6635 //if(bpacket_match_bssid)
6636 {
6637 u8 sq;
6638
6639 if(pstats->RxPWDBAll > 40)
6640 {
6641 sq = 100;
6642 }else
6643 {
6644 sq = pcck_buf->sq_rpt;
6645
6646 if(pcck_buf->sq_rpt > 64)
6647 sq = 0;
6648 else if (pcck_buf->sq_rpt < 20)
6649 sq = 100;
6650 else
6651 sq = ((64-sq) * 100) / 44;
6652 }
6653 pstats->SignalQuality = precord_stats->SignalQuality = sq;
6654 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
6655 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
6656 }
6657 }
6658 else
6659 {
6660 priv->stats.numqry_phystatusHT++;
6661
6662 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
6663 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
6664
6665 //
6666 // (1)Get RSSI for HT rate
6667 //
6668 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
6669 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
6670 {
6671 // 2008/01/30 MH we will judge RF RX path now.
6672 if (priv->brfpath_rxenable[i])
6673 rf_rx_num++;
6674 //else
6675 // continue;
6676
6677 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
6678 // continue;
6679
6680 //Fixed by Jacken from Bryant 2008-03-20
6681 //Original value is 106
6682 //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
6683 rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
6684
6685 /* Translate DBM to percentage. */
6686 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
6687 total_rssi += RSSI;
6688 RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
6689
6690 //Get Rx snr value in DB
6691 //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
6692 //rx_snrX = (char)(tmp_rxsnr);
6693 //rx_snrX /= 2;
6694 //priv->stats.rxSNRdB[i] = (long)rx_snrX;
6695 priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
6696
6697 /* Translate DBM to percentage. */
6698 //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
6699 //total_rssi += RSSI;
6700
6701 /* Record Signal Strength for next packet */
6702 //if(bpacket_match_bssid)
6703 {
6704 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
6705 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
6706 }
6707 }
6708
6709
6710 //
6711 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6712 //
6713 //Fixed by Jacken from Bryant 2008-03-20
6714 //Original value is 106
6715 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
6716 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
6717 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
6718
6719 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6720 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
6721 pstats->RecvSignalPower = rx_pwr_all;
6722
6723 //
6724 // (3)EVM of HT rate
6725 //
6726 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
6727 // pdrvinfo->RxRate<=DESC90_RATEMCS15)
6728 if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
6729 pDesc->RxMCS<=DESC92S_RATEMCS15)
6730 max_spatial_stream = 2; //both spatial stream make sense
6731 else
6732 max_spatial_stream = 1; //only spatial stream 1 makes sense
6733
6734 for(i=0; i<max_spatial_stream; i++)
6735 {
6736 //tmp_rxevm = pofdm_buf->rxevm_X[i];
6737 //rx_evmX = (char)(tmp_rxevm);
6738
6739 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
6740 // fill most significant bit to "zero" when doing shifting operation which may change a negative
6741 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
6742 //rx_evmX /= 2; //dbm
6743
6744 //evm = rtl819x_evm_dbtopercentage(rx_evmX);
6745 evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
6746 RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
6747
6748 //if(bpacket_match_bssid)
6749 {
6750 if(i==0) // Fill value in RFD, Get the first spatial stream only
6751 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
6752 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
6753 }
6754 }
6755
6756
6757 /* record rx statistics for debug */
6758 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
6759 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
6760 //if(pdrvinfo->BW) //40M channel
6761 if(pDesc->BW) //40M channel
6762 priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
6763 else //20M channel
6764 priv->stats.received_bwtype[0]++;
6765 }
6766
6767 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
6768 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
6769 if(is_cck_rate)
6770 {
6771 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
6772
6773 }
6774 else
6775 {
6776 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
6777 // We can judge RX path number now.
6778 if (rf_rx_num != 0)
6779 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
6780 }
6781 }/* QueryRxPhyStatus8192S */
6782
6783 void
6784 rtl8192_record_rxdesc_forlateruse(
6785 struct ieee80211_rx_stats * psrc_stats,
6786 struct ieee80211_rx_stats * ptarget_stats
6787 )
6788 {
6789 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
6790 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
6791 ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
6792 }
6793
6794 static void rtl8192SU_query_rxphystatus(
6795 struct r8192_priv * priv,
6796 struct ieee80211_rx_stats * pstats,
6797 rx_desc_819x_usb *pDesc,
6798 rx_drvinfo_819x_usb * pdrvinfo,
6799 struct ieee80211_rx_stats * precord_stats,
6800 bool bpacket_match_bssid,
6801 bool bpacket_toself,
6802 bool bPacketBeacon,
6803 bool bToSelfBA
6804 );
6805 void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
6806 struct ieee80211_rx_stats * pstats,
6807 rx_desc_819x_usb *pDesc,
6808 rx_drvinfo_819x_usb *pdrvinfo)
6809 {
6810 // TODO: We must only check packet for current MAC address. Not finish
6811 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6812 struct net_device *dev=info->dev;
6813 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6814 bool bpacket_match_bssid, bpacket_toself;
6815 bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
6816 static struct ieee80211_rx_stats previous_stats;
6817 struct ieee80211_hdr_3addr *hdr;//by amy
6818 u16 fc,type;
6819
6820 // Get Signal Quality for only RX data queue (but not command queue)
6821
6822 u8* tmp_buf;
6823 //u16 tmp_buf_len = 0;
6824 u8 *praddr;
6825
6826 /* Get MAC frame start address. */
6827 tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
6828
6829 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
6830 fc = le16_to_cpu(hdr->frame_control);
6831 type = WLAN_FC_GET_TYPE(fc);
6832 praddr = hdr->addr1;
6833
6834 /* Check if the received packet is acceptabe. */
6835 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
6836 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
6837 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
6838 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
6839
6840 #if 1//cosa
6841 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
6842 {
6843 bPacketBeacon = true;
6844 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6845 }
6846 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6847 {
6848 if((eqMacAddr(praddr,dev->dev_addr)))
6849 bToSelfBA = true;
6850 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6851 }
6852
6853 #endif
6854
6855
6856 if(bpacket_match_bssid)
6857 {
6858 priv->stats.numpacket_matchbssid++;
6859 }
6860 if(bpacket_toself){
6861 priv->stats.numpacket_toself++;
6862 }
6863 //
6864 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6865 //
6866 // Because phy information is contained in the last packet of AMPDU only, so driver
6867 // should process phy information of previous packet
6868 rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
6869 rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
6870 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6871
6872 }
6873
6874 /**
6875 * Function: UpdateReceivedRateHistogramStatistics
6876 * Overview: Recored down the received data rate
6877 *
6878 * Input:
6879 * struct net_device *dev
6880 * struct ieee80211_rx_stats *stats
6881 *
6882 * Output:
6883 *
6884 * (priv->stats.ReceivedRateHistogram[] is updated)
6885 * Return:
6886 * None
6887 */
6888 void
6889 UpdateReceivedRateHistogramStatistics8190(
6890 struct net_device *dev,
6891 struct ieee80211_rx_stats *stats
6892 )
6893 {
6894 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6895 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6896 u32 rateIndex;
6897 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6898
6899
6900 if(stats->bCRC)
6901 rcvType = 2;
6902 else if(stats->bICV)
6903 rcvType = 3;
6904
6905 if(stats->bShortPreamble)
6906 preamble_guardinterval = 1;// short
6907 else
6908 preamble_guardinterval = 0;// long
6909
6910 switch(stats->rate)
6911 {
6912 //
6913 // CCK rate
6914 //
6915 case MGN_1M: rateIndex = 0; break;
6916 case MGN_2M: rateIndex = 1; break;
6917 case MGN_5_5M: rateIndex = 2; break;
6918 case MGN_11M: rateIndex = 3; break;
6919 //
6920 // Legacy OFDM rate
6921 //
6922 case MGN_6M: rateIndex = 4; break;
6923 case MGN_9M: rateIndex = 5; break;
6924 case MGN_12M: rateIndex = 6; break;
6925 case MGN_18M: rateIndex = 7; break;
6926 case MGN_24M: rateIndex = 8; break;
6927 case MGN_36M: rateIndex = 9; break;
6928 case MGN_48M: rateIndex = 10; break;
6929 case MGN_54M: rateIndex = 11; break;
6930 //
6931 // 11n High throughput rate
6932 //
6933 case MGN_MCS0: rateIndex = 12; break;
6934 case MGN_MCS1: rateIndex = 13; break;
6935 case MGN_MCS2: rateIndex = 14; break;
6936 case MGN_MCS3: rateIndex = 15; break;
6937 case MGN_MCS4: rateIndex = 16; break;
6938 case MGN_MCS5: rateIndex = 17; break;
6939 case MGN_MCS6: rateIndex = 18; break;
6940 case MGN_MCS7: rateIndex = 19; break;
6941 case MGN_MCS8: rateIndex = 20; break;
6942 case MGN_MCS9: rateIndex = 21; break;
6943 case MGN_MCS10: rateIndex = 22; break;
6944 case MGN_MCS11: rateIndex = 23; break;
6945 case MGN_MCS12: rateIndex = 24; break;
6946 case MGN_MCS13: rateIndex = 25; break;
6947 case MGN_MCS14: rateIndex = 26; break;
6948 case MGN_MCS15: rateIndex = 27; break;
6949 default: rateIndex = 28; break;
6950 }
6951 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6952 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6953 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6954 }
6955
6956 void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
6957 {
6958 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6959 struct net_device *dev=info->dev;
6960 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6961 //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6962 rx_drvinfo_819x_usb *driver_info = NULL;
6963
6964 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
6965 //PHAL_DATA_8192SUSB pHalData = GET_HAL_DATA(Adapter);
6966 //pu1Byte pDesc = (pu1Byte)pDescIn;
6967 //PRX_DRIVER_INFO_8192S pDrvInfo;
6968
6969 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6970
6971 if(0)
6972 {
6973 int m = 0;
6974 printk("========================");
6975 for(m=0; m<skb->len; m++){
6976 if((m%32) == 0)
6977 printk("\n");
6978 printk("%2x ",((u8*)skb->data)[m]);
6979 }
6980 printk("\n========================\n");
6981
6982 }
6983
6984
6985 //
6986 //Get Rx Descriptor Raw Information
6987 //
6988 stats->Length = desc->Length ;
6989 stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
6990 stats->RxBufShift = (desc->Shift)&0x03;
6991 stats->bICV = desc->ICV;
6992 stats->bCRC = desc->CRC32;
6993 stats->bHwError = stats->bCRC|stats->bICV;
6994 stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
6995 stats->bIsAMPDU = (desc->AMSDU==1);
6996 stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
6997 stats->bShortPreamble = desc->SPLCP;
6998 stats->RxIs40MHzPacket = (desc->BW==1);
6999 stats->TimeStampLow = desc->TSFL;
7000
7001 if((desc->FAGGR==1) || (desc->PAGGR==1))
7002 {// Rx A-MPDU
7003 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
7004 }
7005 //YJ,test,090310
7006 if(stats->bHwError)
7007 {
7008 if(stats->bICV)
7009 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7010 if(stats->bCRC)
7011 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7012 }
7013
7014 if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
7015 {
7016 // Always received ICV error packets in AES mode.
7017 // This fixed HW later MIC write bug.
7018 if(stats->bICV && !stats->bCRC)
7019 {
7020 stats->bICV = FALSE;
7021 stats->bHwError = FALSE;
7022 }
7023 }
7024
7025 // Transform HwRate to MRate
7026 if(!stats->bHwError)
7027 //stats->DataRate = HwRateToMRate(
7028 // (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
7029 // (u1Byte)GET_RX_DESC_RXMCS(pDesc),
7030 // (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
7031 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
7032 else
7033 stats->rate = MGN_1M;
7034
7035 //
7036 // Collect Rx rate/AMPDU/TSFL
7037 //
7038 //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
7039 //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
7040 //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
7041 UpdateReceivedRateHistogramStatistics8190(dev, stats);
7042 //UpdateRxAMPDUHistogramStatistics8192S(dev, stats); //FIXLZM
7043 UpdateRxPktTimeStamp8190(dev, stats);
7044
7045 //
7046 // Get PHY Status and RSVD parts.
7047 // <Roger_Notes> It only appears on last aggregated packet.
7048 //
7049 if (desc->PHYStatus)
7050 {
7051 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
7052 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
7053 stats->RxBufShift);
7054 if(0)
7055 {
7056 int m = 0;
7057 printk("========================\n");
7058 printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
7059 RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
7060 for(m=0; m<32; m++){
7061 printk("%2x ",((u8*)driver_info)[m]);
7062 }
7063 printk("\n========================\n");
7064
7065 }
7066
7067 }
7068
7069 //YJ,add,090107
7070 skb_pull(skb, sizeof(rx_desc_819x_usb));
7071 //YJ,add,090107,end
7072
7073 //
7074 // Get Total offset of MPDU Frame Body
7075 //
7076 if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
7077 {
7078 stats->bShift = 1;
7079 //YJ,add,090107
7080 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
7081 //YJ,add,090107,end
7082 }
7083
7084 //
7085 // Get PHY Status and RSVD parts.
7086 // <Roger_Notes> It only appears on last aggregated packet.
7087 //
7088 if (desc->PHYStatus)
7089 {
7090 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
7091 }
7092 }
7093
7094 //
7095 // Description:
7096 // The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
7097 // (1) QoS control : shift 2 bytes
7098 // (2) Mesh Network : shift 1 or 3 bytes
7099 // (3) RxDriverInfo occupies the front parts of Rx Packets buffer(shift units is in 8Bytes)
7100 //
7101 // It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
7102 // of IP header is not double word alignment.
7103 // This features is supported in 818xb and 8190 only, but not 818x.
7104 //
7105 // parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
7106 // Rx Descriptor
7107 // return value: unsigned int, number of total shifted bytes
7108 //
7109 // Notes: 2008/06/28, created by Roger
7110 //
7111 u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
7112 {
7113 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
7114
7115 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
7116 }
7117
7118 void rtl8192SU_rx_nomal(struct sk_buff* skb)
7119 {
7120 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7121 struct net_device *dev=info->dev;
7122 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7123 struct ieee80211_rx_stats stats = {
7124 .signal = 0,
7125 .noise = -98,
7126 .rate = 0,
7127 // .mac_time = jiffies,
7128 .freq = IEEE80211_24GHZ_BAND,
7129 };
7130 u32 rx_pkt_len = 0;
7131 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
7132 bool unicast_packet = false;
7133
7134 //printk("**********skb->len = %d\n", skb->len);
7135 /* 20 is for ps-poll */
7136 if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
7137
7138 /* first packet should not contain Rx aggregation header */
7139 rtl8192SU_query_rxdesc_status(skb, &stats, false);
7140 /* TODO */
7141
7142 /* hardware related info */
7143 priv->stats.rxoktotal++; //YJ,test,090108
7144
7145 /* Process the MPDU recevied */
7146 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
7147
7148 rx_pkt_len = skb->len;
7149 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
7150 unicast_packet = false;
7151 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
7152 //TODO
7153 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
7154 //TODO
7155 }else {
7156 /* unicast packet */
7157 unicast_packet = true;
7158 }
7159
7160 if(!ieee80211_rtl_rx(priv->ieee80211,skb, &stats)) {
7161 dev_kfree_skb_any(skb);
7162 } else {
7163 // priv->stats.rxoktotal++; //YJ,test,090108
7164 if(unicast_packet) {
7165 priv->stats.rxbytesunicast += rx_pkt_len;
7166 }
7167 }
7168
7169 //up is firs pkt, follow is next and next
7170 }
7171 else
7172 {
7173 priv->stats.rxurberr++;
7174 printk("actual_length:%d\n", skb->len);
7175 dev_kfree_skb_any(skb);
7176 }
7177
7178 }
7179
7180 void
7181 rtl819xusb_process_received_packet(
7182 struct net_device *dev,
7183 struct ieee80211_rx_stats *pstats
7184 )
7185 {
7186 // bool bfreerfd=false, bqueued=false;
7187 u8* frame;
7188 u16 frame_len=0;
7189 struct r8192_priv *priv = ieee80211_priv(dev);
7190 // u8 index = 0;
7191 // u8 TID = 0;
7192 //u16 seqnum = 0;
7193 //PRX_TS_RECORD pts = NULL;
7194
7195 // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
7196 //porting by amy 080508
7197 pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
7198 frame = pstats->virtual_address;
7199 frame_len = pstats->packetlength;
7200 #ifdef TODO // by amy about HCT
7201 if(!Adapter->bInHctTest)
7202 CountRxErrStatistics(Adapter, pRfd);
7203 #endif
7204 {
7205 #ifdef ENABLE_PS //by amy for adding ps function in future
7206 RT_RF_POWER_STATE rtState;
7207 // When RF is off, we should not count the packet for hw/sw synchronize
7208 // reason, ie. there may be a duration while sw switch is changed and hw
7209 // switch is being changed. 2006.12.04, by shien chang.
7210 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
7211 if (rtState == eRfOff)
7212 {
7213 return;
7214 }
7215 #endif
7216 priv->stats.rxframgment++;
7217
7218 }
7219 #ifdef TODO
7220 RmMonitorSignalStrength(Adapter, pRfd);
7221 #endif
7222 /* 2007/01/16 MH Add RX command packet handle here. */
7223 /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
7224 if (rtl819xusb_rx_command_packet(dev, pstats))
7225 {
7226 return;
7227 }
7228
7229 #ifdef SW_CRC_CHECK
7230 SwCrcCheck();
7231 #endif
7232
7233
7234 }
7235
7236 void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
7237 {
7238 // rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7239 // struct net_device *dev=info->dev;
7240 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7241 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
7242 // rx_drvinfo_819x_usb *driver_info;
7243
7244 //
7245 //Get Rx Descriptor Information
7246 //
7247 stats->virtual_address = (u8*)skb->data;
7248 stats->Length = desc->Length;
7249 stats->RxDrvInfoSize = 0;
7250 stats->RxBufShift = 0;
7251 stats->packetlength = stats->Length-scrclng;
7252 stats->fraglength = stats->packetlength;
7253 stats->fragoffset = 0;
7254 stats->ntotalfrag = 1;
7255 }
7256
7257 void rtl8192SU_rx_cmd(struct sk_buff *skb)
7258 {
7259 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7260 struct net_device *dev = info->dev;
7261
7262 /* TODO */
7263 struct ieee80211_rx_stats stats = {
7264 .signal = 0,
7265 .noise = -98,
7266 .rate = 0,
7267 // .mac_time = jiffies,
7268 .freq = IEEE80211_24GHZ_BAND,
7269 };
7270
7271 //
7272 // Check buffer length to determine if this is a valid MPDU.
7273 //
7274 if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
7275 //(pHalData->SwChnlInProgress == FALSE))
7276 {
7277 //
7278 // Collection information in Rx descriptor.
7279 //
7280 query_rx_cmdpkt_desc_status(skb,&stats);
7281 // this is to be done by amy 080508 prfd->queue_id = 1;
7282
7283 //
7284 // Process the MPDU recevied.
7285 //
7286 rtl819xusb_process_received_packet(dev,&stats);
7287
7288 dev_kfree_skb_any(skb);
7289 }
7290 else
7291 {
7292 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
7293 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
7294 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
7295 //pContext->BufLenUsed, pAdapter->NumIdleRfd));
7296 }
7297
7298 //
7299 // Reuse USB_IN_CONTEXT since we had finished processing the
7300 // buffer in USB_IN_CONTEXT.
7301 //
7302 //HalUsbReturnInContext(pAdapter, pContext);
7303
7304 //
7305 // Issue another bulk IN transfer.
7306 //
7307 //HalUsbInMpdu(pAdapter, PipeIndex);
7308
7309 RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
7310
7311 }
7312
7313 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
7314 {
7315 struct sk_buff *skb;
7316 struct rtl8192_rx_info *info;
7317
7318 while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
7319 info = (struct rtl8192_rx_info *)skb->cb;
7320 switch (info->out_pipe) {
7321 /* Nomal packet pipe */
7322 case 3:
7323 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
7324 priv->IrpPendingCount--;
7325 priv->ops->rtl819x_rx_nomal(skb);
7326 break;
7327
7328 /* Command packet pipe */
7329 case 9:
7330 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
7331 info->out_pipe);
7332 priv->ops->rtl819x_rx_cmd(skb);
7333 break;
7334
7335 default: /* should never get here! */
7336 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
7337 info->out_pipe);
7338 dev_kfree_skb(skb);
7339 break;
7340
7341 }
7342 }
7343 }
7344
7345
7346
7347 /****************************************************************************
7348 ---------------------------- USB_STUFF---------------------------
7349 *****************************************************************************/
7350 //LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
7351 static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
7352 {
7353 struct r8192_priv *priv = ieee80211_priv(dev);
7354 struct usb_host_interface *iface_desc;
7355 struct usb_endpoint_descriptor *endpoint;
7356 u8 i = 0;
7357
7358 priv->ep_in_num = 0;
7359 priv->ep_out_num = 0;
7360 memset(priv->RtOutPipes,0,16);
7361 memset(priv->RtInPipes,0,16);
7362
7363 iface_desc = intf->cur_altsetting;
7364 priv->ep_num = iface_desc->desc.bNumEndpoints;
7365
7366 for (i = 0; i < priv->ep_num; ++i) {
7367 endpoint = &iface_desc->endpoint[i].desc;
7368 if (usb_endpoint_is_bulk_in(endpoint)) {
7369 priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
7370 priv->ep_in_num ++;
7371 //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7372 } else if (usb_endpoint_is_bulk_out(endpoint)) {
7373 priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
7374 priv->ep_out_num ++;
7375 //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7376 }
7377 }
7378 {
7379 memset(priv->txqueue_to_outpipemap,0,9);
7380 if (priv->ep_num == 6) {
7381 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7382 u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
7383
7384 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7385 } else if (priv->ep_num == 4) {
7386 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7387 u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
7388
7389 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7390 } else if (priv->ep_num > 9) {
7391 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7392 u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
7393
7394 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7395 } else {//use sigle pipe
7396 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7397 u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
7398 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7399 }
7400 }
7401 printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
7402
7403 printk("==>RtInPipes:");
7404 for(i=0; i < priv->ep_in_num; i++)
7405 printk("%d ", priv->RtInPipes[i]);
7406 printk("\n");
7407
7408 printk("==>RtOutPipes:");
7409 for(i=0; i < priv->ep_out_num; i++)
7410 printk("%d ", priv->RtOutPipes[i]);
7411 printk("\n");
7412
7413 printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
7414 for(i=0; i < 9; i++)
7415 printk("%d ", priv->txqueue_to_outpipemap[i]);
7416 printk("\n");
7417
7418 return;
7419 }
7420
7421 static const struct net_device_ops rtl8192_netdev_ops = {
7422 .ndo_open = rtl8192_open,
7423 .ndo_stop = rtl8192_close,
7424 .ndo_get_stats = rtl8192_stats,
7425 .ndo_tx_timeout = tx_timeout,
7426 .ndo_do_ioctl = rtl8192_ioctl,
7427 .ndo_set_multicast_list = r8192_set_multicast,
7428 .ndo_set_mac_address = r8192_set_mac_adr,
7429 .ndo_validate_addr = eth_validate_addr,
7430 .ndo_change_mtu = eth_change_mtu,
7431 .ndo_start_xmit = rtl8192_ieee80211_rtl_xmit,
7432 };
7433
7434 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
7435 const struct usb_device_id *id)
7436 {
7437 // unsigned long ioaddr = 0;
7438 struct net_device *dev = NULL;
7439 struct r8192_priv *priv= NULL;
7440 struct usb_device *udev = interface_to_usbdev(intf);
7441
7442 RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
7443
7444 dev = alloc_ieee80211(sizeof(struct r8192_priv));
7445
7446 usb_set_intfdata(intf, dev);
7447 SET_NETDEV_DEV(dev, &intf->dev);
7448 priv = ieee80211_priv(dev);
7449 priv->ieee80211 = netdev_priv(dev);
7450 priv->udev=udev;
7451
7452 HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
7453
7454 //printk("===============>NIC 8192SU\n");
7455 priv->ops = &rtl8192su_ops;
7456
7457 dev->netdev_ops = &rtl8192_netdev_ops;
7458
7459 //DMESG("Oops: i'm coming\n");
7460 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
7461
7462 dev->type=ARPHRD_ETHER;
7463
7464 dev->watchdog_timeo = HZ*3; //modified by john, 0805
7465
7466 if (dev_alloc_name(dev, ifname) < 0){
7467 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
7468 ifname = "wlan%d";
7469 dev_alloc_name(dev, ifname);
7470 }
7471
7472 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
7473 #if 1
7474 if(rtl8192_init(dev)!=0){
7475 RT_TRACE(COMP_ERR, "Initialization failed");
7476 goto fail;
7477 }
7478 #endif
7479 netif_carrier_off(dev);
7480 netif_stop_queue(dev);
7481
7482 register_netdev(dev);
7483 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
7484 rtl8192_proc_init_one(dev);
7485
7486
7487 RT_TRACE(COMP_INIT, "Driver probe completed\n");
7488 return 0;
7489 fail:
7490 free_ieee80211(dev);
7491
7492 RT_TRACE(COMP_ERR, "wlan driver load failed\n");
7493 return -ENODEV;
7494 }
7495
7496 //detach all the work and timer structure declared or inititialize in r8192U_init function.
7497 void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
7498 {
7499 cancel_work_sync(&priv->reset_wq);
7500 cancel_work_sync(&priv->qos_activate);
7501 cancel_delayed_work(&priv->watch_dog_wq);
7502 cancel_delayed_work(&priv->update_beacon_wq);
7503 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
7504 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
7505 //cancel_work_sync(&priv->SetBWModeWorkItem);
7506 //cancel_work_sync(&priv->SwChnlWorkItem);
7507 }
7508
7509 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
7510 {
7511 struct net_device *dev = usb_get_intfdata(intf);
7512 struct r8192_priv *priv = ieee80211_priv(dev);
7513 if(dev){
7514
7515 unregister_netdev(dev);
7516
7517 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
7518 rtl8192_proc_remove_one(dev);
7519
7520 rtl8192_down(dev);
7521 if (priv->pFirmware)
7522 {
7523 vfree(priv->pFirmware);
7524 priv->pFirmware = NULL;
7525 }
7526 // priv->rf_close(dev);
7527 // rtl8192_SetRFPowerState(dev, eRfOff);
7528 destroy_workqueue(priv->priv_wq);
7529 //rtl8192_irq_disable(dev);
7530 //rtl8192_reset(dev);
7531 mdelay(10);
7532
7533 }
7534 free_ieee80211(dev);
7535 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
7536 }
7537
7538 /* fun with the built-in ieee80211 stack... */
7539 extern int ieee80211_debug_init(void);
7540 extern void ieee80211_debug_exit(void);
7541 extern int ieee80211_crypto_init(void);
7542 extern void ieee80211_crypto_deinit(void);
7543 extern int ieee80211_crypto_tkip_init(void);
7544 extern void ieee80211_crypto_tkip_exit(void);
7545 extern int ieee80211_crypto_ccmp_init(void);
7546 extern void ieee80211_crypto_ccmp_exit(void);
7547 extern int ieee80211_crypto_wep_init(void);
7548 extern void ieee80211_crypto_wep_exit(void);
7549
7550 static int __init rtl8192_usb_module_init(void)
7551 {
7552 int ret;
7553
7554 #ifdef CONFIG_IEEE80211_DEBUG
7555 ret = ieee80211_debug_init();
7556 if (ret) {
7557 printk(KERN_ERR "ieee80211_debug_init() failed %d\n", ret);
7558 return ret;
7559 }
7560 #endif
7561 ret = ieee80211_crypto_init();
7562 if (ret) {
7563 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
7564 return ret;
7565 }
7566
7567 ret = ieee80211_crypto_tkip_init();
7568 if (ret) {
7569 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
7570 ret);
7571 return ret;
7572 }
7573
7574 ret = ieee80211_crypto_ccmp_init();
7575 if (ret) {
7576 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
7577 ret);
7578 return ret;
7579 }
7580
7581 ret = ieee80211_crypto_wep_init();
7582 if (ret) {
7583 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
7584 return ret;
7585 }
7586
7587 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
7588 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
7589 RT_TRACE(COMP_INIT, "Initializing module");
7590 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
7591 rtl8192_proc_module_init();
7592 return usb_register(&rtl8192_usb_driver);
7593 }
7594
7595
7596 static void __exit rtl8192_usb_module_exit(void)
7597 {
7598 usb_deregister(&rtl8192_usb_driver);
7599
7600 RT_TRACE(COMP_DOWN, "Exiting");
7601 rtl8192_proc_module_remove();
7602
7603 ieee80211_crypto_tkip_exit();
7604 ieee80211_crypto_ccmp_exit();
7605 ieee80211_crypto_wep_exit();
7606 ieee80211_crypto_deinit();
7607 #ifdef CONFIG_IEEE80211_DEBUG
7608 ieee80211_debug_exit();
7609 #endif
7610 }
7611
7612
7613 void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7614 {
7615 unsigned long flags;
7616 short enough_desc;
7617 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7618
7619 spin_lock_irqsave(&priv->tx_lock,flags);
7620 enough_desc = check_nic_enough_desc(dev,pri);
7621 spin_unlock_irqrestore(&priv->tx_lock,flags);
7622
7623 if(enough_desc)
7624 ieee80211_rtl_wake_queue(priv->ieee80211);
7625 }
7626
7627 void EnableHWSecurityConfig8192(struct net_device *dev)
7628 {
7629 u8 SECR_value = 0x0;
7630 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7631 struct ieee80211_device* ieee = priv->ieee80211;
7632
7633 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
7634 #if 1
7635 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
7636 {
7637 SECR_value |= SCR_RxUseDK;
7638 SECR_value |= SCR_TxUseDK;
7639 }
7640 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
7641 {
7642 SECR_value |= SCR_RxUseDK;
7643 SECR_value |= SCR_TxUseDK;
7644 }
7645 #endif
7646 //add HWSec active enable here.
7647 //default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
7648
7649 ieee->hwsec_active = 1;
7650
7651 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
7652 {
7653 ieee->hwsec_active = 0;
7654 SECR_value &= ~SCR_RxDecEnable;
7655 }
7656
7657 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
7658 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
7659 {
7660 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
7661 }
7662 }
7663
7664
7665 void setKey( struct net_device *dev,
7666 u8 EntryNo,
7667 u8 KeyIndex,
7668 u16 KeyType,
7669 u8 *MacAddr,
7670 u8 DefaultKey,
7671 u32 *KeyContent )
7672 {
7673 u32 TargetCommand = 0;
7674 u32 TargetContent = 0;
7675 u16 usConfig = 0;
7676 u8 i;
7677 if (EntryNo >= TOTAL_CAM_ENTRY)
7678 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
7679
7680 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr));
7681
7682 if (DefaultKey)
7683 usConfig |= BIT15 | (KeyType<<2);
7684 else
7685 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
7686 // usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
7687
7688
7689 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
7690 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
7691 TargetCommand |= BIT31|BIT16;
7692
7693 if(i==0){//MAC|Config
7694 TargetContent = (u32)(*(MacAddr+0)) << 16|
7695 (u32)(*(MacAddr+1)) << 24|
7696 (u32)usConfig;
7697
7698 write_nic_dword(dev, WCAMI, TargetContent);
7699 write_nic_dword(dev, RWCAM, TargetCommand);
7700 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
7701 }
7702 else if(i==1){//MAC
7703 TargetContent = (u32)(*(MacAddr+2)) |
7704 (u32)(*(MacAddr+3)) << 8|
7705 (u32)(*(MacAddr+4)) << 16|
7706 (u32)(*(MacAddr+5)) << 24;
7707 write_nic_dword(dev, WCAMI, TargetContent);
7708 write_nic_dword(dev, RWCAM, TargetCommand);
7709 }
7710 else {
7711 //Key Material
7712 if(KeyContent !=NULL){
7713 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
7714 write_nic_dword(dev, RWCAM, TargetCommand);
7715 }
7716 }
7717 }
7718
7719 }
7720
7721 /***************************************************************************
7722 ------------------- module init / exit stubs ----------------
7723 ****************************************************************************/
7724 module_init(rtl8192_usb_module_init);
7725 module_exit(rtl8192_usb_module_exit);
kernel source for telekom puls (alcatel/mediatek)