Merge branch 'x86-mrst-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / rtl8192e / r8180_93cx6.c
1 /*
2 This files contains card eeprom (93c46 or 93c56) programming routines,
3 memory is addressed by 16 bits words.
4
5 This is part of rtl8180 OpenSource driver.
6 Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
7 Released under the terms of GPL (General Public Licence)
8
9 Parts of this driver are based on the GPL part of the
10 official realtek driver.
11
12 Parts of this driver are based on the rtl8180 driver skeleton
13 from Patric Schenke & Andres Salomon.
14
15 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
16
17 We want to tanks the Authors of those projects and the Ndiswrapper
18 project Authors.
19 */
20
21 #include "r8180_93cx6.h"
22
23 static void eprom_cs(struct net_device *dev, short bit)
24 {
25 if (bit)
26 write_nic_byte(dev, EPROM_CMD,
27 (1<<EPROM_CS_SHIFT) | \
28 read_nic_byte(dev, EPROM_CMD)); //enable EPROM
29 else
30 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
31 &~(1<<EPROM_CS_SHIFT)); //disable EPROM
32
33 force_pci_posting(dev);
34 udelay(EPROM_DELAY);
35 }
36
37
38 static void eprom_ck_cycle(struct net_device *dev)
39 {
40 write_nic_byte(dev, EPROM_CMD,
41 (1<<EPROM_CK_SHIFT) | read_nic_byte(dev, EPROM_CMD));
42 force_pci_posting(dev);
43 udelay(EPROM_DELAY);
44 write_nic_byte(dev, EPROM_CMD,
45 read_nic_byte(dev, EPROM_CMD) & ~(1<<EPROM_CK_SHIFT));
46 force_pci_posting(dev);
47 udelay(EPROM_DELAY);
48 }
49
50
51 static void eprom_w(struct net_device *dev, short bit)
52 {
53 if (bit)
54 write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
55 read_nic_byte(dev, EPROM_CMD));
56 else
57 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
58 &~(1<<EPROM_W_SHIFT));
59
60 force_pci_posting(dev);
61 udelay(EPROM_DELAY);
62 }
63
64
65 static short eprom_r(struct net_device *dev)
66 {
67 short bit;
68
69 bit = (read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT));
70 udelay(EPROM_DELAY);
71
72 if (bit)
73 return 1;
74 return 0;
75 }
76
77
78 static void eprom_send_bits_string(struct net_device *dev, short b[], int len)
79 {
80 int i;
81
82 for (i = 0; i < len; i++) {
83 eprom_w(dev, b[i]);
84 eprom_ck_cycle(dev);
85 }
86 }
87
88
89 u32 eprom_read(struct net_device *dev, u32 addr)
90 {
91 struct r8192_priv *priv = ieee80211_priv(dev);
92 short read_cmd[] = {1, 1, 0};
93 short addr_str[8];
94 int i;
95 int addr_len;
96 u32 ret;
97
98 ret = 0;
99 //enable EPROM programming
100 write_nic_byte(dev, EPROM_CMD,
101 (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
102 force_pci_posting(dev);
103 udelay(EPROM_DELAY);
104
105 if (priv->epromtype == EPROM_93c56) {
106 addr_str[7] = addr & 1;
107 addr_str[6] = addr & (1<<1);
108 addr_str[5] = addr & (1<<2);
109 addr_str[4] = addr & (1<<3);
110 addr_str[3] = addr & (1<<4);
111 addr_str[2] = addr & (1<<5);
112 addr_str[1] = addr & (1<<6);
113 addr_str[0] = addr & (1<<7);
114 addr_len = 8;
115 } else {
116 addr_str[5] = addr & 1;
117 addr_str[4] = addr & (1<<1);
118 addr_str[3] = addr & (1<<2);
119 addr_str[2] = addr & (1<<3);
120 addr_str[1] = addr & (1<<4);
121 addr_str[0] = addr & (1<<5);
122 addr_len = 6;
123 }
124 eprom_cs(dev, 1);
125 eprom_ck_cycle(dev);
126 eprom_send_bits_string(dev, read_cmd, 3);
127 eprom_send_bits_string(dev, addr_str, addr_len);
128
129 //keep chip pin D to low state while reading.
130 //I'm unsure if it is necessary, but anyway shouldn't hurt
131 eprom_w(dev, 0);
132
133 for (i = 0; i < 16; i++) {
134 //eeprom needs a clk cycle between writing opcode&adr
135 //and reading data. (eeprom outs a dummy 0)
136 eprom_ck_cycle(dev);
137 ret |= (eprom_r(dev)<<(15-i));
138 }
139
140 eprom_cs(dev, 0);
141 eprom_ck_cycle(dev);
142
143 //disable EPROM programming
144 write_nic_byte(dev, EPROM_CMD,
145 (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
146 return ret;
147 }