Staging: add rt2860 wireless driver
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / rt2860 / rt2860.h
1 /*
2 *************************************************************************
3 * Ralink Tech Inc.
4 * 5F., No.36, Taiyuan St., Jhubei City,
5 * Hsinchu County 302,
6 * Taiwan, R.O.C.
7 *
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
14 * *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
19 * *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 * *
25 *************************************************************************
26 */
27
28 #ifndef __RT2860_H__
29 #define __RT2860_H__
30
31 #define RT28xx_CHIP_NAME "RT2860"
32
33 #define TXINFO_SIZE 0
34 #define TXPADDING_SIZE 0
35
36 /* ----------------- EEPROM Related MACRO ----------------- */
37 #define RT28xx_EEPROM_READ16(pAd, offset, var) \
38 var = RTMP_EEPROM_READ16(pAd, offset)
39
40 #define RT28xx_EEPROM_WRITE16(pAd, offset, var) \
41 RTMP_EEPROM_WRITE16(pAd, offset, var)
42
43 /* ----------------- TASK/THREAD Related MACRO ----------------- */
44 #define RT28XX_TASK_THREAD_INIT(pAd, Status) \
45 init_thread_task(pAd); NICInitTxRxRingAndBacklogQueue(pAd); \
46 Status = NDIS_STATUS_SUCCESS;
47
48 /* function declarations */
49 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
50 #define IRQ_HANDLE_TYPE irqreturn_t
51 #else
52 #define IRQ_HANDLE_TYPE void
53 #endif
54
55 IRQ_HANDLE_TYPE
56 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19))
57 rt2860_interrupt(int irq, void *dev_instance);
58 #else
59 rt2860_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
60 #endif
61
62 /* ----------------- Frimware Related MACRO ----------------- */
63 #define RT28XX_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
64 do{ \
65 ULONG _i, _firm; \
66 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x10000); \
67 \
68 for(_i=0; _i<_FwLen; _i+=4) \
69 { \
70 _firm = _pFwImage[_i] + \
71 (_pFwImage[_i+3] << 24) + \
72 (_pFwImage[_i+2] << 16) + \
73 (_pFwImage[_i+1] << 8); \
74 RTMP_IO_WRITE32(_pAd, FIRMWARE_IMAGE_BASE + _i, _firm); \
75 } \
76 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00000); \
77 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00001); \
78 \
79 /* initialize BBP R/W access agent */ \
80 RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, 0); \
81 RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \
82 }while(0)
83
84 /* ----------------- TX Related MACRO ----------------- */
85 #define RT28XX_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
86 #define RT28XX_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
87
88
89 #define RT28XX_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
90 ((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */
91 #define RT28XX_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
92 do{}while(0)
93
94 #define NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, freeNum, _TxFrameType) \
95 (((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3))
96 //(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/))
97
98
99 #define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \
100 RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
101
102 #define RTMP_PKT_TAIL_PADDING 0
103
104 #define fRTMP_ADAPTER_NEED_STOP_TX 0
105
106 #define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
107 /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)*/
108
109 #define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \
110 RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
111
112 #define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
113 RtmpPCI_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
114
115 #define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber) \
116 RtmpPCI_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber)
117
118 #define HAL_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) \
119 RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)
120
121 #define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \
122 /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx)*/
123
124 #define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \
125 RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx)
126 /* RtmpPCIDataKickOut(_pAd, _pTxBlk, _QueIdx)*/
127
128 #define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen) \
129 MiniportMMRequest(_pAd, _QueIdx, _pNullFrame, _frameLen)
130
131 #define GET_TXRING_FREENO(_pAd, _QueIdx) \
132 (_pAd->TxRing[_QueIdx].TxSwFreeIdx > _pAd->TxRing[_QueIdx].TxCpuIdx) ? \
133 (_pAd->TxRing[_QueIdx].TxSwFreeIdx - _pAd->TxRing[_QueIdx].TxCpuIdx - 1) \
134 : \
135 (_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1);
136
137
138 #define GET_MGMTRING_FREENO(_pAd) \
139 (_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx) ? \
140 (_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \
141 : \
142 (_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1);
143
144
145 /* ----------------- RX Related MACRO ----------------- */
146
147 // no use
148 #define RT28XX_RCV_PKT_GET_INIT(pAd)
149 #define RT28XX_RV_A_BUF_END
150 //#define RT28XX_RV_ALL_BUF_END
151
152
153 /* ----------------- ASIC Related MACRO ----------------- */
154 // no use
155 #define RT28XX_DMA_POST_WRITE(pAd)
156
157 // reset MAC of a station entry to 0x000000000000
158 #define RT28XX_STA_ENTRY_MAC_RESET(pAd, Wcid) \
159 AsicDelWcidTab(pAd, Wcid);
160
161 // add this entry into ASIC RX WCID search table
162 #define RT28XX_STA_ENTRY_ADD(pAd, pEntry) \
163 AsicUpdateRxWCIDTable(pAd, pEntry->Aid, pEntry->Addr);
164
165 // remove Pair-wise key material from ASIC
166 #define RT28XX_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid) \
167 AsicRemovePairwiseKeyEntry(pAd, BssIdx, (UCHAR)Wcid);
168
169 // add Client security information into ASIC WCID table and IVEIV table
170 #define RT28XX_STA_SECURITY_INFO_ADD(pAd, apidx, KeyID, pEntry) \
171 RTMPAddWcidAttributeEntry(pAd, apidx, KeyID, \
172 pAd->SharedKey[apidx][KeyID].CipherAlg, pEntry);
173
174 #define RT28XX_SECURITY_KEY_ADD(pAd, apidx, KeyID, pEntry) \
175 { /* update pairwise key information to ASIC Shared Key Table */ \
176 AsicAddSharedKeyEntry(pAd, apidx, KeyID, \
177 pAd->SharedKey[apidx][KeyID].CipherAlg, \
178 pAd->SharedKey[apidx][KeyID].Key, \
179 pAd->SharedKey[apidx][KeyID].TxMic, \
180 pAd->SharedKey[apidx][KeyID].RxMic); \
181 /* update ASIC WCID attribute table and IVEIV table */ \
182 RTMPAddWcidAttributeEntry(pAd, apidx, KeyID, \
183 pAd->SharedKey[apidx][KeyID].CipherAlg, \
184 pEntry); }
185
186
187 // Insert the BA bitmap to ASIC for the Wcid entry
188 #define RT28XX_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
189 do{ \
190 UINT32 _Value = 0, _Offset; \
191 _Offset = MAC_WCID_BASE + (_Aid) * HW_WCID_ENTRY_SIZE + 4; \
192 RTMP_IO_READ32((_pAd), _Offset, &_Value); \
193 _Value |= (0x10000<<(_TID)); \
194 RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
195 }while(0)
196
197
198 // Remove the BA bitmap from ASIC for the Wcid entry
199 // bitmap field starts at 0x10000 in ASIC WCID table
200 #define RT28XX_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
201 do{ \
202 UINT32 _Value = 0, _Offset; \
203 _Offset = MAC_WCID_BASE + (_Wcid) * HW_WCID_ENTRY_SIZE + 4; \
204 RTMP_IO_READ32((_pAd), _Offset, &_Value); \
205 _Value &= (~(0x10000 << (_TID))); \
206 RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
207 }while(0)
208
209
210 /* ----------------- PCI/USB Related MACRO ----------------- */
211
212 #define RT28XX_HANDLE_DEV_ASSIGN(handle, dev_p) \
213 ((POS_COOKIE)handle)->pci_dev = dev_p;
214
215 // set driver data
216 #define RT28XX_DRVDATA_SET(_a) pci_set_drvdata(_a, net_dev);
217
218 #define RT28XX_UNMAP() \
219 { if (net_dev->base_addr) { \
220 iounmap((void *)(net_dev->base_addr)); \
221 release_mem_region(pci_resource_start(dev_p, 0), \
222 pci_resource_len(dev_p, 0)); } \
223 if (net_dev->irq) pci_release_regions(dev_p); }
224
225 #ifdef PCI_MSI_SUPPORT
226 #define RTMP_MSI_ENABLE(_pAd) \
227 { POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
228 (_pAd)->HaveMsi = pci_enable_msi(_pObj->pci_dev) == 0 ? TRUE : FALSE; }
229
230 #define RTMP_MSI_DISABLE(_pAd) \
231 { POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
232 if (_pAd->HaveMsi == TRUE) \
233 pci_disable_msi(_pObj->pci_dev); \
234 _pAd->HaveMsi = FALSE; }
235 #else
236 #define RTMP_MSI_ENABLE(_pAd)
237 #define RTMP_MSI_DISABLE(_pAd)
238 #endif // PCI_MSI_SUPPORT //
239
240 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
241 #define SA_SHIRQ IRQF_SHARED
242 #endif
243
244 #define RT28XX_IRQ_REQUEST(net_dev) \
245 { PRTMP_ADAPTER _pAd = (PRTMP_ADAPTER)((net_dev)->priv); \
246 POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
247 RTMP_MSI_ENABLE(_pAd); \
248 if ((retval = request_irq(_pObj->pci_dev->irq, \
249 rt2860_interrupt, SA_SHIRQ, \
250 (net_dev)->name, (net_dev)))) { \
251 printk("RT2860: request_irq ERROR(%d)\n", retval); \
252 return retval; } }
253
254 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
255 #define RT28XX_IRQ_RELEASE(net_dev) \
256 { PRTMP_ADAPTER _pAd = (PRTMP_ADAPTER)((net_dev)->priv); \
257 POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
258 synchronize_irq(_pObj->pci_dev->irq); \
259 free_irq(_pObj->pci_dev->irq, (net_dev)); \
260 RTMP_MSI_DISABLE(_pAd); }
261 #else
262 #define RT28XX_IRQ_RELEASE(net_dev) \
263 { PRTMP_ADAPTER _pAd = (PRTMP_ADAPTER)((net_dev)->priv); \
264 POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
265 free_irq(_pObj->pci_dev->irq, (net_dev)); \
266 RTMP_MSI_DISABLE(_pAd); }
267 #endif
268
269 #define RT28XX_IRQ_INIT(pAd) \
270 { pAd->int_enable_reg = ((DELAYINTMASK) | \
271 (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \
272 pAd->int_disable_mask = 0; \
273 pAd->int_pending = 0; }
274
275 #define RT28XX_IRQ_ENABLE(pAd) \
276 { /* clear garbage ints */ \
277 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff); \
278 NICEnableInterrupt(pAd); }
279
280 #define RT28XX_PUT_DEVICE(dev_p)
281
282
283 /* ----------------- MLME Related MACRO ----------------- */
284 #define RT28XX_MLME_HANDLER(pAd) MlmeHandler(pAd)
285
286 #define RT28XX_MLME_PRE_SANITY_CHECK(pAd)
287
288 #define RT28XX_MLME_STA_QUICK_RSP_WAKE_UP(pAd) \
289 RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
290
291 #define RT28XX_MLME_RESET_STATE_MACHINE(pAd) \
292 MlmeRestartStateMachine(pAd)
293
294 #define RT28XX_HANDLE_COUNTER_MEASURE(_pAd, _pEntry) \
295 HandleCounterMeasure(_pAd, _pEntry)
296
297 /* ----------------- Power Save Related MACRO ----------------- */
298 #define RT28XX_PS_POLL_ENQUEUE(pAd) EnqueuePsPoll(pAd)
299
300 //
301 // Device ID & Vendor ID, these values should match EEPROM value
302 //
303 #define NIC2860_PCI_DEVICE_ID 0x0601
304 #define NIC2860_PCIe_DEVICE_ID 0x0681
305 #define NIC2760_PCI_DEVICE_ID 0x0701 // 1T/2R Cardbus ???
306 #define NIC2790_PCIe_DEVICE_ID 0x0781 // 1T/2R miniCard
307
308 #define NIC_PCI_VENDOR_ID 0x1814
309
310 #define VEN_AWT_PCIe_DEVICE_ID 0x1059
311 #define VEN_AWT_PCI_VENDOR_ID 0x1A3B
312
313 // For RTMPPCIePowerLinkCtrlRestore () function
314 #define RESTORE_HALT 1
315 #define RESTORE_WAKEUP 2
316 #define RESTORE_CLOSE 3
317
318 #define PowerSafeCID 1
319 #define PowerRadioOffCID 2
320 #define PowerWakeCID 3
321 #define CID0MASK 0x000000ff
322 #define CID1MASK 0x0000ff00
323 #define CID2MASK 0x00ff0000
324 #define CID3MASK 0xff000000
325
326 #define PCI_REG_READ_WORD(pci_dev, offset, Configuration) \
327 if (pci_read_config_word(pci_dev, offset, &reg16) == 0) \
328 Configuration = le2cpu16(reg16); \
329 else \
330 Configuration = 0;
331
332 #define PCI_REG_WIRTE_WORD(pci_dev, offset, Configuration) \
333 reg16 = cpu2le16(Configuration); \
334 pci_write_config_word(pci_dev, offset, reg16); \
335
336 #define RT28XX_STA_FORCE_WAKEUP(pAd, bFromTx) \
337 RT28xxPciStaAsicForceWakeup(pAd, bFromTx);
338
339 #define RT28XX_STA_SLEEP_THEN_AUTO_WAKEUP(pAd, TbttNumToNextWakeUp) \
340 RT28xxPciStaAsicSleepThenAutoWakeup(pAd, TbttNumToNextWakeUp);
341
342 #define RT28XX_MLME_RADIO_ON(pAd) \
343 RT28xxPciMlmeRadioOn(pAd);
344
345 #define RT28XX_MLME_RADIO_OFF(pAd) \
346 RT28xxPciMlmeRadioOFF(pAd);
347
348 #endif //__RT2860_H__
349