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Merge branch 'message-callback' into kbuild/kconfig
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / dt3155v4l / dt3155v4l.c
1 /***************************************************************************
2 * Copyright (C) 2006-2010 by Marin Mitov *
3 * mitov@issp.bas.bg *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21 #include <linux/version.h>
22 #include <linux/stringify.h>
23 #include <linux/delay.h>
24 #include <linux/kthread.h>
25 #include <media/v4l2-dev.h>
26 #include <media/v4l2-ioctl.h>
27 #include <media/videobuf-dma-contig.h>
28
29 #include "dt3155v4l.h"
30
31 #define DT3155_VENDOR_ID 0x8086
32 #define DT3155_DEVICE_ID 0x1223
33
34 /* DT3155_CHUNK_SIZE is 4M (2^22) 8 full size buffers */
35 #define DT3155_CHUNK_SIZE (1U << 22)
36
37 #define DT3155_COH_FLAGS (GFP_KERNEL | GFP_DMA32 | __GFP_COLD | __GFP_NOWARN)
38
39 #define DT3155_BUF_SIZE (768 * 576)
40
41 /* global initializers (for all boards) */
42 #ifdef CONFIG_DT3155_CCIR
43 static const u8 csr2_init = VT_50HZ;
44 #define DT3155_CURRENT_NORM V4L2_STD_625_50
45 static const unsigned int img_width = 768;
46 static const unsigned int img_height = 576;
47 static const unsigned int frames_per_sec = 25;
48 static const struct v4l2_fmtdesc frame_std[] = {
49 {
50 .index = 0,
51 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
52 .flags = 0,
53 .description = "CCIR/50Hz 8 bits gray",
54 .pixelformat = V4L2_PIX_FMT_GREY,
55 },
56 };
57 #else
58 static const u8 csr2_init = VT_60HZ;
59 #define DT3155_CURRENT_NORM V4L2_STD_525_60
60 static const unsigned int img_width = 640;
61 static const unsigned int img_height = 480;
62 static const unsigned int frames_per_sec = 30;
63 static const struct v4l2_fmtdesc frame_std[] = {
64 {
65 .index = 0,
66 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
67 .flags = 0,
68 .description = "RS-170/60Hz 8 bits gray",
69 .pixelformat = V4L2_PIX_FMT_GREY,
70 },
71 };
72 #endif
73
74 #define NUM_OF_FORMATS ARRAY_SIZE(frame_std)
75
76 static u8 config_init = ACQ_MODE_EVEN;
77
78 /**
79 * read_i2c_reg - reads an internal i2c register
80 *
81 * @addr: dt3155 mmio base address
82 * @index: index (internal address) of register to read
83 * @data: pointer to byte the read data will be placed in
84 *
85 * returns: zero on success or error code
86 *
87 * This function starts reading the specified (by index) register
88 * and busy waits for the process to finish. The result is placed
89 * in a byte pointed by data.
90 */
91 static int
92 read_i2c_reg(void __iomem *addr, u8 index, u8 *data)
93 {
94 u32 tmp = index;
95
96 iowrite32((tmp<<17) | IIC_READ, addr + IIC_CSR2);
97 mmiowb();
98 udelay(45); /* wait at least 43 usec for NEW_CYCLE to clear */
99 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
100 /* error: NEW_CYCLE not cleared */
101 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
102 return -EIO;
103 }
104 tmp = ioread32(addr + IIC_CSR1);
105 if (tmp & DIRECT_ABORT) {
106 /* error: DIRECT_ABORT set */
107 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
108 /* reset DIRECT_ABORT bit */
109 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
110 return -EIO;
111 }
112 *data = tmp>>24;
113 return 0;
114 }
115
116 /**
117 * write_i2c_reg - writes to an internal i2c register
118 *
119 * @addr: dt3155 mmio base address
120 * @index: index (internal address) of register to read
121 * @data: data to be written
122 *
123 * returns: zero on success or error code
124 *
125 * This function starts writting the specified (by index) register
126 * and busy waits for the process to finish.
127 */
128 static int
129 write_i2c_reg(void __iomem *addr, u8 index, u8 data)
130 {
131 u32 tmp = index;
132
133 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
134 mmiowb();
135 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
136 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
137 /* error: NEW_CYCLE not cleared */
138 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
139 return -EIO;
140 }
141 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
142 /* error: DIRECT_ABORT set */
143 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
144 /* reset DIRECT_ABORT bit */
145 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
146 return -EIO;
147 }
148 return 0;
149 }
150
151 /**
152 * write_i2c_reg_nowait - writes to an internal i2c register
153 *
154 * @addr: dt3155 mmio base address
155 * @index: index (internal address) of register to read
156 * @data: data to be written
157 *
158 * This function starts writting the specified (by index) register
159 * and then returns.
160 */
161 static void write_i2c_reg_nowait(void __iomem *addr, u8 index, u8 data)
162 {
163 u32 tmp = index;
164
165 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
166 mmiowb();
167 }
168
169 /**
170 * wait_i2c_reg - waits the read/write to finish
171 *
172 * @addr: dt3155 mmio base address
173 *
174 * returns: zero on success or error code
175 *
176 * This function waits reading/writting to finish.
177 */
178 static int wait_i2c_reg(void __iomem *addr)
179 {
180 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE)
181 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
182 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
183 /* error: NEW_CYCLE not cleared */
184 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
185 return -EIO;
186 }
187 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
188 /* error: DIRECT_ABORT set */
189 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
190 /* reset DIRECT_ABORT bit */
191 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
192 return -EIO;
193 }
194 return 0;
195 }
196
197 static int
198 dt3155_start_acq(struct dt3155_priv *pd)
199 {
200 struct videobuf_buffer *vb = pd->curr_buf;
201 dma_addr_t dma_addr;
202
203 dma_addr = videobuf_to_dma_contig(vb);
204 iowrite32(dma_addr, pd->regs + EVEN_DMA_START);
205 iowrite32(dma_addr + vb->width, pd->regs + ODD_DMA_START);
206 iowrite32(vb->width, pd->regs + EVEN_DMA_STRIDE);
207 iowrite32(vb->width, pd->regs + ODD_DMA_STRIDE);
208 /* enable interrupts, clear all irq flags */
209 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
210 FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
211 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
212 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
213 pd->regs + CSR1);
214 wait_i2c_reg(pd->regs);
215 write_i2c_reg(pd->regs, CONFIG, pd->config);
216 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
217 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
218
219 /* start the board */
220 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD);
221 return 0; /* success */
222 }
223
224 static int
225 dt3155_stop_acq(struct dt3155_priv *pd)
226 {
227 int tmp;
228
229 /* stop the board */
230 wait_i2c_reg(pd->regs);
231 write_i2c_reg(pd->regs, CSR2, pd->csr2);
232
233 /* disable all irqs, clear all irq flags */
234 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
235 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
236 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
237 tmp = ioread32(pd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
238 if (tmp)
239 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
240 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
241 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
242 pd->regs + CSR1);
243 return 0;
244 }
245
246 /* Locking: Caller holds q->vb_lock */
247 static int
248 dt3155_buf_setup(struct videobuf_queue *q, unsigned int *count,
249 unsigned int *size)
250 {
251 *size = img_width * img_height;
252 return 0;
253 }
254
255 /* Locking: Caller holds q->vb_lock */
256 static int
257 dt3155_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
258 enum v4l2_field field)
259 {
260 int ret = 0;
261
262 vb->width = img_width;
263 vb->height = img_height;
264 vb->size = img_width * img_height;
265 vb->field = field;
266 if (vb->state == VIDEOBUF_NEEDS_INIT)
267 ret = videobuf_iolock(q, vb, NULL);
268 if (ret) {
269 vb->state = VIDEOBUF_ERROR;
270 printk(KERN_ERR "ERROR: videobuf_iolock() failed\n");
271 videobuf_dma_contig_free(q, vb); /* FIXME: needed? */
272 } else
273 vb->state = VIDEOBUF_PREPARED;
274 return ret;
275 }
276
277 /* Locking: Caller holds q->vb_lock & q->irqlock */
278 static void
279 dt3155_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
280 {
281 struct dt3155_priv *pd = q->priv_data;
282
283 if (vb->state != VIDEOBUF_NEEDS_INIT) {
284 vb->state = VIDEOBUF_QUEUED;
285 list_add_tail(&vb->queue, &pd->dmaq);
286 wake_up_interruptible_sync(&pd->do_dma);
287 } else
288 vb->state = VIDEOBUF_ERROR;
289 }
290
291 /* Locking: Caller holds q->vb_lock */
292 static void
293 dt3155_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
294 {
295 if (vb->state == VIDEOBUF_ACTIVE)
296 videobuf_waiton(vb, 0, 0); /* FIXME: cannot be interrupted */
297 videobuf_dma_contig_free(q, vb);
298 vb->state = VIDEOBUF_NEEDS_INIT;
299 }
300
301 static struct videobuf_queue_ops vbq_ops = {
302 .buf_setup = dt3155_buf_setup,
303 .buf_prepare = dt3155_buf_prepare,
304 .buf_queue = dt3155_buf_queue,
305 .buf_release = dt3155_buf_release,
306 };
307
308 static irqreturn_t
309 dt3155_irq_handler_even(int irq, void *dev_id)
310 {
311 struct dt3155_priv *ipd = dev_id;
312 struct videobuf_buffer *ivb;
313 dma_addr_t dma_addr;
314 u32 tmp;
315
316 tmp = ioread32(ipd->regs + INT_CSR) & (FLD_START | FLD_END_ODD);
317 if (!tmp)
318 return IRQ_NONE; /* not our irq */
319 if ((tmp & FLD_START) && !(tmp & FLD_END_ODD)) {
320 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START,
321 ipd->regs + INT_CSR);
322 ipd->field_count++;
323 return IRQ_HANDLED; /* start of field irq */
324 }
325 if ((tmp & FLD_START) && (tmp & FLD_END_ODD)) {
326 if (!ipd->stats.start_before_end++)
327 printk(KERN_ERR "dt3155: irq: START before END\n");
328 }
329 /* check for corrupted fields */
330 /* write_i2c_reg(ipd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); */
331 /* write_i2c_reg(ipd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); */
332 tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
333 if (tmp) {
334 if (!ipd->stats.corrupted_fields++)
335 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
336 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
337 FLD_DN_ODD | FLD_DN_EVEN |
338 CAP_CONT_EVEN | CAP_CONT_ODD,
339 ipd->regs + CSR1);
340 mmiowb();
341 }
342
343 spin_lock(&ipd->lock);
344 if (ipd->curr_buf && ipd->curr_buf->state == VIDEOBUF_ACTIVE) {
345 if (waitqueue_active(&ipd->curr_buf->done)) {
346 do_gettimeofday(&ipd->curr_buf->ts);
347 ipd->curr_buf->field_count = ipd->field_count;
348 ipd->curr_buf->state = VIDEOBUF_DONE;
349 wake_up(&ipd->curr_buf->done);
350 } else {
351 ivb = ipd->curr_buf;
352 goto load_dma;
353 }
354 } else
355 goto stop_dma;
356 if (list_empty(&ipd->dmaq))
357 goto stop_dma;
358 ivb = list_first_entry(&ipd->dmaq, typeof(*ivb), queue);
359 list_del(&ivb->queue);
360 if (ivb->state == VIDEOBUF_QUEUED) {
361 ivb->state = VIDEOBUF_ACTIVE;
362 ipd->curr_buf = ivb;
363 } else
364 goto stop_dma;
365 load_dma:
366 dma_addr = videobuf_to_dma_contig(ivb);
367 iowrite32(dma_addr, ipd->regs + EVEN_DMA_START);
368 iowrite32(dma_addr + ivb->width, ipd->regs + ODD_DMA_START);
369 iowrite32(ivb->width, ipd->regs + EVEN_DMA_STRIDE);
370 iowrite32(ivb->width, ipd->regs + ODD_DMA_STRIDE);
371 mmiowb();
372 /* enable interrupts, clear all irq flags */
373 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
374 FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
375 spin_unlock(&ipd->lock);
376 return IRQ_HANDLED;
377
378 stop_dma:
379 ipd->curr_buf = NULL;
380 /* stop the board */
381 write_i2c_reg_nowait(ipd->regs, CSR2, ipd->csr2);
382 /* disable interrupts, clear all irq flags */
383 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
384 spin_unlock(&ipd->lock);
385 return IRQ_HANDLED;
386 }
387
388 static int
389 dt3155_threadfn(void *arg)
390 {
391 struct dt3155_priv *pd = arg;
392 struct videobuf_buffer *vb;
393 unsigned long flags;
394
395 while (1) {
396 wait_event_interruptible(pd->do_dma,
397 kthread_should_stop() || !list_empty(&pd->dmaq));
398 if (kthread_should_stop())
399 break;
400
401 spin_lock_irqsave(&pd->lock, flags);
402 if (pd->curr_buf) /* dma is active */
403 goto done;
404 if (list_empty(&pd->dmaq)) /* no empty biffers */
405 goto done;
406 vb = list_first_entry(&pd->dmaq, typeof(*vb), queue);
407 list_del(&vb->queue);
408 if (vb->state == VIDEOBUF_QUEUED) {
409 vb->state = VIDEOBUF_ACTIVE;
410 pd->curr_buf = vb;
411 spin_unlock_irqrestore(&pd->lock, flags);
412 /* start dma */
413 dt3155_start_acq(pd);
414 continue;
415 } else
416 printk(KERN_DEBUG "%s(): This is a BUG\n", __func__);
417 done:
418 spin_unlock_irqrestore(&pd->lock, flags);
419 }
420 return 0;
421 }
422
423 static int
424 dt3155_open(struct file *filp)
425 {
426 int ret = 0;
427 struct dt3155_priv *pd = video_drvdata(filp);
428
429 printk(KERN_INFO "dt3155: open(): minor: %i\n", pd->vdev->minor);
430
431 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
432 return -ERESTARTSYS;
433 if (!pd->users) {
434 pd->vidq = kzalloc(sizeof(*pd->vidq), GFP_KERNEL);
435 if (!pd->vidq) {
436 printk(KERN_ERR "dt3155: error: alloc queue\n");
437 ret = -ENOMEM;
438 goto err_alloc_queue;
439 }
440 videobuf_queue_dma_contig_init(pd->vidq, &vbq_ops,
441 &pd->pdev->dev, &pd->lock,
442 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE,
443 sizeof(struct videobuf_buffer), pd);
444 /* disable all irqs, clear all irq flags */
445 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD,
446 pd->regs + INT_CSR);
447 pd->irq_handler = dt3155_irq_handler_even;
448 ret = request_irq(pd->pdev->irq, pd->irq_handler,
449 IRQF_SHARED, DT3155_NAME, pd);
450 if (ret) {
451 printk(KERN_ERR "dt3155: error: request_irq\n");
452 goto err_request_irq;
453 }
454 pd->curr_buf = NULL;
455 pd->thread = kthread_run(dt3155_threadfn, pd,
456 "dt3155_thread_%i", pd->vdev->minor);
457 if (IS_ERR(pd->thread)) {
458 printk(KERN_ERR "dt3155: kthread_run() failed\n");
459 ret = PTR_ERR(pd->thread);
460 goto err_thread;
461 }
462 pd->field_count = 0;
463 }
464 pd->users++;
465 goto done;
466 err_thread:
467 free_irq(pd->pdev->irq, pd);
468 err_request_irq:
469 kfree(pd->vidq);
470 pd->vidq = NULL;
471 err_alloc_queue:
472 done:
473 mutex_unlock(&pd->mux);
474 return ret;
475 }
476
477 static int
478 dt3155_release(struct file *filp)
479 {
480 struct dt3155_priv *pd = video_drvdata(filp);
481 struct videobuf_buffer *tmp;
482 unsigned long flags;
483 int ret = 0;
484
485 printk(KERN_INFO "dt3155: release(): minor: %i\n", pd->vdev->minor);
486
487 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
488 return -ERESTARTSYS;
489 pd->users--;
490 BUG_ON(pd->users < 0);
491 if (pd->acq_fp == filp) {
492 spin_lock_irqsave(&pd->lock, flags);
493 INIT_LIST_HEAD(&pd->dmaq); /* queue is emptied */
494 tmp = pd->curr_buf;
495 spin_unlock_irqrestore(&pd->lock, flags);
496 if (tmp)
497 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
498 dt3155_stop_acq(pd);
499 videobuf_stop(pd->vidq);
500 pd->acq_fp = NULL;
501 pd->streaming = 0;
502 }
503 if (!pd->users) {
504 kthread_stop(pd->thread);
505 free_irq(pd->pdev->irq, pd);
506 kfree(pd->vidq);
507 pd->vidq = NULL;
508 }
509 mutex_unlock(&pd->mux);
510 return ret;
511 }
512
513 static ssize_t
514 dt3155_read(struct file *filp, char __user *user, size_t size, loff_t *loff)
515 {
516 struct dt3155_priv *pd = video_drvdata(filp);
517 int ret;
518
519 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
520 return -ERESTARTSYS;
521 if (!pd->acq_fp) {
522 pd->acq_fp = filp;
523 pd->streaming = 0;
524 } else if (pd->acq_fp != filp) {
525 ret = -EBUSY;
526 goto done;
527 } else if (pd->streaming == 1) {
528 ret = -EINVAL;
529 goto done;
530 }
531 ret = videobuf_read_stream(pd->vidq, user, size, loff, 0,
532 filp->f_flags & O_NONBLOCK);
533 done:
534 mutex_unlock(&pd->mux);
535 return ret;
536 }
537
538 static unsigned int
539 dt3155_poll(struct file *filp, struct poll_table_struct *polltbl)
540 {
541 struct dt3155_priv *pd = video_drvdata(filp);
542
543 return videobuf_poll_stream(filp, pd->vidq, polltbl);
544 }
545
546 static int
547 dt3155_mmap(struct file *filp, struct vm_area_struct *vma)
548 {
549 struct dt3155_priv *pd = video_drvdata(filp);
550
551 return videobuf_mmap_mapper(pd->vidq, vma);
552 }
553
554 static const struct v4l2_file_operations dt3155_fops = {
555 .owner = THIS_MODULE,
556 .open = dt3155_open,
557 .release = dt3155_release,
558 .read = dt3155_read,
559 .poll = dt3155_poll,
560 .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
561 .mmap = dt3155_mmap,
562 };
563
564 static int
565 dt3155_ioc_streamon(struct file *filp, void *p, enum v4l2_buf_type type)
566 {
567 struct dt3155_priv *pd = video_drvdata(filp);
568 int ret = -ERESTARTSYS;
569
570 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
571 return ret;
572 if (!pd->acq_fp) {
573 ret = videobuf_streamon(pd->vidq);
574 if (ret)
575 goto unlock;
576 pd->acq_fp = filp;
577 pd->streaming = 1;
578 wake_up_interruptible_sync(&pd->do_dma);
579 } else if (pd->acq_fp == filp) {
580 pd->streaming = 1;
581 ret = videobuf_streamon(pd->vidq);
582 if (!ret)
583 wake_up_interruptible_sync(&pd->do_dma);
584 } else
585 ret = -EBUSY;
586 unlock:
587 mutex_unlock(&pd->mux);
588 return ret;
589 }
590
591 static int
592 dt3155_ioc_streamoff(struct file *filp, void *p, enum v4l2_buf_type type)
593 {
594 struct dt3155_priv *pd = video_drvdata(filp);
595 struct videobuf_buffer *tmp;
596 unsigned long flags;
597 int ret;
598
599 ret = videobuf_streamoff(pd->vidq);
600 if (ret)
601 return ret;
602 spin_lock_irqsave(&pd->lock, flags);
603 tmp = pd->curr_buf;
604 spin_unlock_irqrestore(&pd->lock, flags);
605 if (tmp)
606 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
607 return ret;
608 }
609
610 static int
611 dt3155_ioc_querycap(struct file *filp, void *p, struct v4l2_capability *cap)
612 {
613 struct dt3155_priv *pd = video_drvdata(filp);
614
615 strcpy(cap->driver, DT3155_NAME);
616 strcpy(cap->card, DT3155_NAME " frame grabber");
617 sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev));
618 cap->version =
619 KERNEL_VERSION(DT3155_VER_MAJ, DT3155_VER_MIN, DT3155_VER_EXT);
620 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
621 V4L2_CAP_STREAMING |
622 V4L2_CAP_READWRITE;
623 return 0;
624 }
625
626 static int
627 dt3155_ioc_enum_fmt_vid_cap(struct file *filp, void *p, struct v4l2_fmtdesc *f)
628 {
629 if (f->index >= NUM_OF_FORMATS)
630 return -EINVAL;
631 *f = frame_std[f->index];
632 return 0;
633 }
634
635 static int
636 dt3155_ioc_g_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
637 {
638 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
639 return -EINVAL;
640 f->fmt.pix.width = img_width;
641 f->fmt.pix.height = img_height;
642 f->fmt.pix.pixelformat = V4L2_PIX_FMT_GREY;
643 f->fmt.pix.field = V4L2_FIELD_NONE;
644 f->fmt.pix.bytesperline = f->fmt.pix.width;
645 f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height;
646 f->fmt.pix.colorspace = 0;
647 f->fmt.pix.priv = 0;
648 return 0;
649 }
650
651 static int
652 dt3155_ioc_try_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
653 {
654 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
655 return -EINVAL;
656 if (f->fmt.pix.width == img_width &&
657 f->fmt.pix.height == img_height &&
658 f->fmt.pix.pixelformat == V4L2_PIX_FMT_GREY &&
659 f->fmt.pix.field == V4L2_FIELD_NONE &&
660 f->fmt.pix.bytesperline == f->fmt.pix.width &&
661 f->fmt.pix.sizeimage == f->fmt.pix.width * f->fmt.pix.height)
662 return 0;
663 else
664 return -EINVAL;
665 }
666
667 static int
668 dt3155_ioc_s_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
669 {
670 struct dt3155_priv *pd = video_drvdata(filp);
671 int ret = -ERESTARTSYS;
672
673 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
674 return ret;
675 if (!pd->acq_fp) {
676 pd->acq_fp = filp;
677 pd->streaming = 0;
678 } else if (pd->acq_fp != filp) {
679 ret = -EBUSY;
680 goto done;
681 }
682 /* FIXME: we don't change the format for now
683 if (pd->vidq->streaming || pd->vidq->reading || pd->curr_buff) {
684 ret = -EBUSY;
685 goto done;
686 }
687 */
688 ret = dt3155_ioc_g_fmt_vid_cap(filp, p, f);
689 done:
690 mutex_unlock(&pd->mux);
691 return ret;
692 }
693
694 static int
695 dt3155_ioc_reqbufs(struct file *filp, void *p, struct v4l2_requestbuffers *b)
696 {
697 struct dt3155_priv *pd = video_drvdata(filp);
698 struct videobuf_queue *q = pd->vidq;
699 int ret = -ERESTARTSYS;
700
701 if (b->memory != V4L2_MEMORY_MMAP)
702 return -EINVAL;
703 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
704 return ret;
705 if (!pd->acq_fp)
706 pd->acq_fp = filp;
707 else if (pd->acq_fp != filp) {
708 ret = -EBUSY;
709 goto done;
710 }
711 pd->streaming = 1;
712 ret = 0;
713 done:
714 mutex_unlock(&pd->mux);
715 if (ret)
716 return ret;
717 if (b->count)
718 ret = videobuf_reqbufs(q, b);
719 else { /* FIXME: is it necessary? */
720 printk(KERN_DEBUG "dt3155: request to free buffers\n");
721 /* ret = videobuf_mmap_free(q); */
722 ret = dt3155_ioc_streamoff(filp, p,
723 V4L2_BUF_TYPE_VIDEO_CAPTURE);
724 }
725 return ret;
726 }
727
728 static int
729 dt3155_ioc_querybuf(struct file *filp, void *p, struct v4l2_buffer *b)
730 {
731 struct dt3155_priv *pd = video_drvdata(filp);
732 struct videobuf_queue *q = pd->vidq;
733
734 return videobuf_querybuf(q, b);
735 }
736
737 static int
738 dt3155_ioc_qbuf(struct file *filp, void *p, struct v4l2_buffer *b)
739 {
740 struct dt3155_priv *pd = video_drvdata(filp);
741 struct videobuf_queue *q = pd->vidq;
742 int ret;
743
744 ret = videobuf_qbuf(q, b);
745 if (ret)
746 return ret;
747 return videobuf_querybuf(q, b);
748 }
749
750 static int
751 dt3155_ioc_dqbuf(struct file *filp, void *p, struct v4l2_buffer *b)
752 {
753 struct dt3155_priv *pd = video_drvdata(filp);
754 struct videobuf_queue *q = pd->vidq;
755
756 return videobuf_dqbuf(q, b, filp->f_flags & O_NONBLOCK);
757 }
758
759 static int
760 dt3155_ioc_querystd(struct file *filp, void *p, v4l2_std_id *norm)
761 {
762 *norm = DT3155_CURRENT_NORM;
763 return 0;
764 }
765
766 static int
767 dt3155_ioc_g_std(struct file *filp, void *p, v4l2_std_id *norm)
768 {
769 *norm = DT3155_CURRENT_NORM;
770 return 0;
771 }
772
773 static int
774 dt3155_ioc_s_std(struct file *filp, void *p, v4l2_std_id *norm)
775 {
776 if (*norm & DT3155_CURRENT_NORM)
777 return 0;
778 return -EINVAL;
779 }
780
781 static int
782 dt3155_ioc_enum_input(struct file *filp, void *p, struct v4l2_input *input)
783 {
784 if (input->index)
785 return -EINVAL;
786 strcpy(input->name, "Coax in");
787 input->type = V4L2_INPUT_TYPE_CAMERA;
788 /*
789 * FIXME: input->std = 0 according to v4l2 API
790 * VIDIOC_G_STD, VIDIOC_S_STD, VIDIOC_QUERYSTD and VIDIOC_ENUMSTD
791 * should return -EINVAL
792 */
793 input->std = DT3155_CURRENT_NORM;
794 input->status = 0;/* FIXME: add sync detection & V4L2_IN_ST_NO_H_LOCK */
795 return 0;
796 }
797
798 static int
799 dt3155_ioc_g_input(struct file *filp, void *p, unsigned int *i)
800 {
801 *i = 0;
802 return 0;
803 }
804
805 static int
806 dt3155_ioc_s_input(struct file *filp, void *p, unsigned int i)
807 {
808 if (i)
809 return -EINVAL;
810 return 0;
811 }
812
813 static int
814 dt3155_ioc_g_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
815 {
816 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
817 return -EINVAL;
818 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
819 parms->parm.capture.capturemode = 0;
820 parms->parm.capture.timeperframe.numerator = 1001;
821 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
822 parms->parm.capture.extendedmode = 0;
823 parms->parm.capture.readbuffers = 1; /* FIXME: 2 buffers? */
824 return 0;
825 }
826
827 static int
828 dt3155_ioc_s_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
829 {
830 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
831 return -EINVAL;
832 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
833 parms->parm.capture.capturemode = 0;
834 parms->parm.capture.timeperframe.numerator = 1001;
835 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
836 parms->parm.capture.extendedmode = 0;
837 parms->parm.capture.readbuffers = 1; /* FIXME: 2 buffers? */
838 return 0;
839 }
840
841 static const struct v4l2_ioctl_ops dt3155_ioctl_ops = {
842 .vidioc_streamon = dt3155_ioc_streamon,
843 .vidioc_streamoff = dt3155_ioc_streamoff,
844 .vidioc_querycap = dt3155_ioc_querycap,
845 /*
846 .vidioc_g_priority = dt3155_ioc_g_priority,
847 .vidioc_s_priority = dt3155_ioc_s_priority,
848 */
849 .vidioc_enum_fmt_vid_cap = dt3155_ioc_enum_fmt_vid_cap,
850 .vidioc_try_fmt_vid_cap = dt3155_ioc_try_fmt_vid_cap,
851 .vidioc_g_fmt_vid_cap = dt3155_ioc_g_fmt_vid_cap,
852 .vidioc_s_fmt_vid_cap = dt3155_ioc_s_fmt_vid_cap,
853 .vidioc_reqbufs = dt3155_ioc_reqbufs,
854 .vidioc_querybuf = dt3155_ioc_querybuf,
855 .vidioc_qbuf = dt3155_ioc_qbuf,
856 .vidioc_dqbuf = dt3155_ioc_dqbuf,
857 .vidioc_querystd = dt3155_ioc_querystd,
858 .vidioc_g_std = dt3155_ioc_g_std,
859 .vidioc_s_std = dt3155_ioc_s_std,
860 .vidioc_enum_input = dt3155_ioc_enum_input,
861 .vidioc_g_input = dt3155_ioc_g_input,
862 .vidioc_s_input = dt3155_ioc_s_input,
863 /*
864 .vidioc_queryctrl = dt3155_ioc_queryctrl,
865 .vidioc_g_ctrl = dt3155_ioc_g_ctrl,
866 .vidioc_s_ctrl = dt3155_ioc_s_ctrl,
867 .vidioc_querymenu = dt3155_ioc_querymenu,
868 .vidioc_g_ext_ctrls = dt3155_ioc_g_ext_ctrls,
869 .vidioc_s_ext_ctrls = dt3155_ioc_s_ext_ctrls,
870 */
871 .vidioc_g_parm = dt3155_ioc_g_parm,
872 .vidioc_s_parm = dt3155_ioc_s_parm,
873 /*
874 .vidioc_cropcap = dt3155_ioc_cropcap,
875 .vidioc_g_crop = dt3155_ioc_g_crop,
876 .vidioc_s_crop = dt3155_ioc_s_crop,
877 .vidioc_enum_framesizes = dt3155_ioc_enum_framesizes,
878 .vidioc_enum_frameintervals = dt3155_ioc_enum_frameintervals,
879 #ifdef CONFIG_VIDEO_V4L1_COMPAT
880 .vidiocgmbuf = iocgmbuf,
881 #endif
882 */
883 };
884
885 static int __devinit
886 dt3155_init_board(struct pci_dev *dev)
887 {
888 struct dt3155_priv *pd = pci_get_drvdata(dev);
889 void *buf_cpu;
890 dma_addr_t buf_dma;
891 int i;
892 u8 tmp;
893
894 pci_set_master(dev); /* dt3155 needs it */
895
896 /* resetting the adapter */
897 iowrite32(FLD_CRPT_ODD | FLD_CRPT_EVEN | FLD_DN_ODD | FLD_DN_EVEN,
898 pd->regs + CSR1);
899 mmiowb();
900 msleep(10);
901
902 /* initializing adaper registers */
903 iowrite32(FIFO_EN | SRST, pd->regs + CSR1);
904 mmiowb();
905 iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT);
906 iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT);
907 iowrite32(0x00000020, pd->regs + FIFO_TRIGER);
908 iowrite32(0x00000103, pd->regs + XFER_MODE);
909 iowrite32(0, pd->regs + RETRY_WAIT_CNT);
910 iowrite32(0, pd->regs + INT_CSR);
911 iowrite32(1, pd->regs + EVEN_FLD_MASK);
912 iowrite32(1, pd->regs + ODD_FLD_MASK);
913 iowrite32(0, pd->regs + MASK_LENGTH);
914 iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT);
915 iowrite32(0x01010101, pd->regs + IIC_CLK_DUR);
916 mmiowb();
917
918 /* verifying that we have a DT3155 board (not just a SAA7116 chip) */
919 read_i2c_reg(pd->regs, DT_ID, &tmp);
920 if (tmp != DT3155_ID)
921 return -ENODEV;
922
923 /* initialize AD LUT */
924 write_i2c_reg(pd->regs, AD_ADDR, 0);
925 for (i = 0; i < 256; i++)
926 write_i2c_reg(pd->regs, AD_LUT, i);
927
928 /* initialize ADC references */
929 /* FIXME: pos_ref & neg_ref depend on VT_50HZ */
930 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
931 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
932 write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF);
933 write_i2c_reg(pd->regs, AD_CMD, 34);
934 write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF);
935 write_i2c_reg(pd->regs, AD_CMD, 0);
936
937 /* initialize PM LUT */
938 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM);
939 for (i = 0; i < 256; i++) {
940 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
941 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
942 }
943 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL);
944 for (i = 0; i < 256; i++) {
945 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
946 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
947 }
948 write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */
949
950 /* select chanel 1 for input and set sync level */
951 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
952 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
953
954 /* allocate memory, and initialize the DMA machine */
955 buf_cpu = dma_alloc_coherent(&dev->dev, DT3155_BUF_SIZE, &buf_dma,
956 GFP_KERNEL);
957 if (!buf_cpu) {
958 printk(KERN_ERR "dt3155: dma_alloc_coherent "
959 "(in dt3155_init_board) failed\n");
960 return -ENOMEM;
961 }
962 iowrite32(buf_dma, pd->regs + EVEN_DMA_START);
963 iowrite32(buf_dma, pd->regs + ODD_DMA_START);
964 iowrite32(0, pd->regs + EVEN_DMA_STRIDE);
965 iowrite32(0, pd->regs + ODD_DMA_STRIDE);
966
967 /* Perform a pseudo even field acquire */
968 iowrite32(FIFO_EN | SRST | CAP_CONT_ODD, pd->regs + CSR1);
969 write_i2c_reg(pd->regs, CSR2, pd->csr2 | SYNC_SNTL);
970 write_i2c_reg(pd->regs, CONFIG, pd->config);
971 write_i2c_reg(pd->regs, EVEN_CSR, CSR_SNGL);
972 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | SYNC_SNTL);
973 msleep(100);
974 read_i2c_reg(pd->regs, CSR2, &tmp);
975 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
976 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
977 write_i2c_reg(pd->regs, CSR2, pd->csr2);
978 iowrite32(FIFO_EN | SRST | FLD_DN_EVEN | FLD_DN_ODD, pd->regs + CSR1);
979
980 /* deallocate memory */
981 dma_free_coherent(&dev->dev, DT3155_BUF_SIZE, buf_cpu, buf_dma);
982 if (tmp & BUSY_EVEN) {
983 printk(KERN_ERR "dt3155: BUSY_EVEN not cleared\n");
984 return -EIO;
985 }
986 return 0;
987 }
988
989 static struct video_device dt3155_vdev = {
990 .name = DT3155_NAME,
991 .fops = &dt3155_fops,
992 .ioctl_ops = &dt3155_ioctl_ops,
993 .minor = -1,
994 .release = video_device_release,
995 .tvnorms = DT3155_CURRENT_NORM,
996 .current_norm = DT3155_CURRENT_NORM,
997 };
998
999 /* same as in drivers/base/dma-coherent.c */
1000 struct dma_coherent_mem {
1001 void *virt_base;
1002 u32 device_base;
1003 int size;
1004 int flags;
1005 unsigned long *bitmap;
1006 };
1007
1008 static int __devinit
1009 dt3155_alloc_coherent(struct device *dev, size_t size, int flags)
1010 {
1011 struct dma_coherent_mem *mem;
1012 dma_addr_t dev_base;
1013 int pages = size >> PAGE_SHIFT;
1014 int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
1015
1016 if ((flags & DMA_MEMORY_MAP) == 0)
1017 goto out;
1018 if (!size)
1019 goto out;
1020 if (dev->dma_mem)
1021 goto out;
1022
1023 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
1024 if (!mem)
1025 goto out;
1026 mem->virt_base = dma_alloc_coherent(dev, size, &dev_base,
1027 DT3155_COH_FLAGS);
1028 if (!mem->virt_base)
1029 goto err_alloc_coherent;
1030 mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1031 if (!mem->bitmap)
1032 goto err_bitmap;
1033
1034 /* coherent_dma_mask is already set to 32 bits */
1035 mem->device_base = dev_base;
1036 mem->size = pages;
1037 mem->flags = flags;
1038 dev->dma_mem = mem;
1039 return DMA_MEMORY_MAP;
1040
1041 err_bitmap:
1042 dma_free_coherent(dev, size, mem->virt_base, dev_base);
1043 err_alloc_coherent:
1044 kfree(mem);
1045 out:
1046 return 0;
1047 }
1048
1049 static void __devexit
1050 dt3155_free_coherent(struct device *dev)
1051 {
1052 struct dma_coherent_mem *mem = dev->dma_mem;
1053
1054 if (!mem)
1055 return;
1056 dev->dma_mem = NULL;
1057 dma_free_coherent(dev, mem->size << PAGE_SHIFT,
1058 mem->virt_base, mem->device_base);
1059 kfree(mem->bitmap);
1060 kfree(mem);
1061 }
1062
1063 static int __devinit
1064 dt3155_probe(struct pci_dev *dev, const struct pci_device_id *id)
1065 {
1066 int err;
1067 struct dt3155_priv *pd;
1068
1069 printk(KERN_INFO "dt3155: probe()\n");
1070 err = dma_set_mask(&dev->dev, DMA_BIT_MASK(32));
1071 if (err) {
1072 printk(KERN_ERR "dt3155: cannot set dma_mask\n");
1073 return -ENODEV;
1074 }
1075 err = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
1076 if (err) {
1077 printk(KERN_ERR "dt3155: cannot set dma_coherent_mask\n");
1078 return -ENODEV;
1079 }
1080 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
1081 if (!pd) {
1082 printk(KERN_ERR "dt3155: cannot allocate dt3155_priv\n");
1083 return -ENOMEM;
1084 }
1085 pd->vdev = video_device_alloc();
1086 if (!pd->vdev) {
1087 printk(KERN_ERR "dt3155: cannot allocate vdev structure\n");
1088 goto err_video_device_alloc;
1089 }
1090 *pd->vdev = dt3155_vdev;
1091 pci_set_drvdata(dev, pd); /* for use in dt3155_remove() */
1092 video_set_drvdata(pd->vdev, pd); /* for use in video_fops */
1093 pd->users = 0;
1094 pd->acq_fp = NULL;
1095 pd->pdev = dev;
1096 INIT_LIST_HEAD(&pd->dmaq);
1097 init_waitqueue_head(&pd->do_dma);
1098 mutex_init(&pd->mux);
1099 pd->csr2 = csr2_init;
1100 pd->config = config_init;
1101 err = pci_enable_device(pd->pdev);
1102 if (err) {
1103 printk(KERN_ERR "dt3155: pci_dev not enabled\n");
1104 goto err_enable_dev;
1105 }
1106 err = pci_request_region(pd->pdev, 0, pci_name(pd->pdev));
1107 if (err)
1108 goto err_req_region;
1109 pd->regs = pci_iomap(pd->pdev, 0, pci_resource_len(pd->pdev, 0));
1110 if (!pd->regs) {
1111 err = -ENOMEM;
1112 printk(KERN_ERR "dt3155: pci_iomap failed\n");
1113 goto err_pci_iomap;
1114 }
1115 err = dt3155_init_board(pd->pdev);
1116 if (err) {
1117 printk(KERN_ERR "dt3155: dt3155_init_board failed\n");
1118 goto err_init_board;
1119 }
1120 err = video_register_device(pd->vdev, VFL_TYPE_GRABBER, -1);
1121 if (err) {
1122 printk(KERN_ERR "dt3155: Cannot register video device\n");
1123 goto err_init_board;
1124 }
1125 err = dt3155_alloc_coherent(&dev->dev, DT3155_CHUNK_SIZE,
1126 DMA_MEMORY_MAP);
1127 if (err)
1128 printk(KERN_INFO "dt3155: preallocated 8 buffers\n");
1129 printk(KERN_INFO "dt3155: /dev/video%i is ready\n", pd->vdev->minor);
1130 return 0; /* success */
1131
1132 err_init_board:
1133 pci_iounmap(pd->pdev, pd->regs);
1134 err_pci_iomap:
1135 pci_release_region(pd->pdev, 0);
1136 err_req_region:
1137 pci_disable_device(pd->pdev);
1138 err_enable_dev:
1139 video_device_release(pd->vdev);
1140 err_video_device_alloc:
1141 kfree(pd);
1142 return err;
1143 }
1144
1145 static void __devexit
1146 dt3155_remove(struct pci_dev *dev)
1147 {
1148 struct dt3155_priv *pd = pci_get_drvdata(dev);
1149
1150 printk(KERN_INFO "dt3155: remove()\n");
1151 dt3155_free_coherent(&dev->dev);
1152 video_unregister_device(pd->vdev);
1153 pci_iounmap(dev, pd->regs);
1154 pci_release_region(pd->pdev, 0);
1155 pci_disable_device(pd->pdev);
1156 /*
1157 * video_device_release() is invoked automatically
1158 * see: struct video_device dt3155_vdev
1159 */
1160 kfree(pd);
1161 }
1162
1163 static DEFINE_PCI_DEVICE_TABLE(pci_ids) = {
1164 { PCI_DEVICE(DT3155_VENDOR_ID, DT3155_DEVICE_ID) },
1165 { 0, /* zero marks the end */ },
1166 };
1167 MODULE_DEVICE_TABLE(pci, pci_ids);
1168
1169 static struct pci_driver pci_driver = {
1170 .name = DT3155_NAME,
1171 .id_table = pci_ids,
1172 .probe = dt3155_probe,
1173 .remove = __devexit_p(dt3155_remove),
1174 };
1175
1176 static int __init
1177 dt3155_init_module(void)
1178 {
1179 int err;
1180
1181 printk(KERN_INFO "dt3155: ==================\n");
1182 printk(KERN_INFO "dt3155: init()\n");
1183 err = pci_register_driver(&pci_driver);
1184 if (err) {
1185 printk(KERN_ERR "dt3155: cannot register pci_driver\n");
1186 return err;
1187 }
1188 return 0; /* succes */
1189 }
1190
1191 static void __exit
1192 dt3155_exit_module(void)
1193 {
1194 pci_unregister_driver(&pci_driver);
1195 printk(KERN_INFO "dt3155: exit()\n");
1196 printk(KERN_INFO "dt3155: ==================\n");
1197 }
1198
1199 module_init(dt3155_init_module);
1200 module_exit(dt3155_exit_module);
1201
1202 MODULE_DESCRIPTION("video4linux pci-driver for dt3155 frame grabber");
1203 MODULE_AUTHOR("Marin Mitov <mitov@issp.bas.bg>");
1204 MODULE_VERSION(DT3155_VERSION);
1205 MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)