2 * Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
3 * Jason Lapenta, Scott Smedley
5 * This file is part of the DT3155 Device Driver.
7 * The DT3155 Device Driver is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * The DT3155 Device Driver is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
15 * Public License for more details.
19 * This file provides some basic register io routines. It is modified from
20 * demo code provided by Data Translations.
23 #include <linux/delay.h>
25 #include "dt3155_io.h"
26 #include "dt3155_drv.h"
29 /****** local copies of board's 32 bit registers ******/
30 u32 even_dma_start_r
; /* bit 0 should always be 0 */
31 u32 odd_dma_start_r
; /* .. */
32 u32 even_dma_stride_r
; /* bits 0&1 should always be 0 */
33 u32 odd_dma_stride_r
; /* .. */
37 FIFO_TRIGGER_R fifo_trigger_r
;
38 XFER_MODE_R xfer_mode_r
;
40 RETRY_WAIT_CNT_R retry_wait_cnt_r
;
46 MASK_LENGTH_R mask_length_r
;
47 FIFO_FLAG_CNT_R fifo_flag_cnt_r
;
48 IIC_CLK_DUR_R iic_clk_dur_r
;
49 IIC_CSR1_R iic_csr1_r
;
50 IIC_CSR2_R iic_csr2_r
;
51 DMA_UPPER_LMT_R even_dma_upper_lmt_r
;
52 DMA_UPPER_LMT_R odd_dma_upper_lmt_r
;
56 /******** local copies of board's 8 bit I2C registers ******/
58 I2C_EVEN_CSR i2c_even_csr
;
59 I2C_ODD_CSR i2c_odd_csr
;
60 I2C_CONFIG i2c_config
;
68 I2C_AD_CMD i2c_ad_cmd
;
76 * This function handles read/write timing and r/w timeout error
78 static int wait_ibsyclr(u8
*lpReg
)
80 /* wait 100 microseconds */
82 /* __delay(loops_per_sec/10000); */
84 ReadMReg(lpReg
+ IIC_CSR2
, iic_csr2_r
.reg
);
85 if (iic_csr2_r
.fld
.NEW_CYCLE
) {
86 /* if NEW_CYCLE didn't clear */
88 dt3155_errno
= DT_ERR_I2C_TIMEOUT
;
92 return 0; /* no error */
98 * This function handles writing to 8-bit DT3155 registers
100 * 1st parameter is pointer to 32-bit register base address
101 * 2nd parameter is reg. index;
102 * 3rd is value to be written
104 int WriteI2C(u8
*lpReg
, u_short wIregIndex
, u8 byVal
)
106 /* read 32 bit IIC_CSR2 register data into union */
108 ReadMReg((lpReg
+ IIC_CSR2
), iic_csr2_r
.reg
);
110 /* for write operation */
111 iic_csr2_r
.fld
.DIR_RD
= 0;
112 /* I2C address of I2C register: */
113 iic_csr2_r
.fld
.DIR_ADDR
= wIregIndex
;
114 /* 8 bit data to be written to I2C reg */
115 iic_csr2_r
.fld
.DIR_WR_DATA
= byVal
;
116 /* will start a direct I2C cycle: */
117 iic_csr2_r
.fld
.NEW_CYCLE
= 1;
119 /* xfer union data into 32 bit IIC_CSR2 register */
120 WriteMReg((lpReg
+ IIC_CSR2
), iic_csr2_r
.reg
);
122 /* wait for IIC cycle to finish */
123 return wait_ibsyclr(lpReg
);
129 * This function handles reading from 8-bit DT3155 registers
131 * 1st parameter is pointer to 32-bit register base address
132 * 2nd parameter is reg. index;
133 * 3rd is adrs of value to be read
135 int ReadI2C(u8
*lpReg
, u_short wIregIndex
, u8
*byVal
)
137 int writestat
; /* status for return */
139 /* read 32 bit IIC_CSR2 register data into union */
140 ReadMReg((lpReg
+ IIC_CSR2
), iic_csr2_r
.reg
);
142 /* for read operation */
143 iic_csr2_r
.fld
.DIR_RD
= 1;
145 /* I2C address of I2C register: */
146 iic_csr2_r
.fld
.DIR_ADDR
= wIregIndex
;
148 /* will start a direct I2C cycle: */
149 iic_csr2_r
.fld
.NEW_CYCLE
= 1;
151 /* xfer union's data into 32 bit IIC_CSR2 register */
152 WriteMReg((lpReg
+ IIC_CSR2
), iic_csr2_r
.reg
);
154 /* wait for IIC cycle to finish */
155 writestat
= wait_ibsyclr(lpReg
);
157 /* Next 2 commands read 32 bit IIC_CSR1 register's data into union */
158 /* first read data is in IIC_CSR1 */
159 ReadMReg((lpReg
+ IIC_CSR1
), iic_csr1_r
.reg
);
161 /* now get data u8 out of register */
162 *byVal
= (u8
) iic_csr1_r
.fld
.RD_DATA
;