2 comedi/drivers/ni_labpc.c
3 Driver for National Instruments Lab-PC series boards and compatibles
4 Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 ************************************************************************
24 Description: National Instruments Lab-PC (& compatibles)
25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
27 Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
30 Tested with lab-pc-1200. For the older Lab-PC+, not all input ranges
31 and analog references will work, the available ranges/arefs will
32 depend on how you have configured the jumpers on your board
33 (see your owner's manual).
35 Kernel-level ISA plug-and-play support for the lab-pc-1200
37 yet been added to the driver, mainly due to the fact that
38 I don't know the device id numbers. If you have one
40 please file a bug report at https://bugs.comedi.org/
41 so I can get the necessary information from you.
43 The 1200 series boards have onboard calibration dacs for correcting
44 analog input/output offsets and gains. The proper settings for these
45 caldacs are stored on the board's eeprom. To read the caldac values
46 from the eeprom and store them into a file that can be then be used by
47 comedilib, use the comedi_calibrate program.
49 Configuration options - ISA boards:
50 [0] - I/O port base address
51 [1] - IRQ (optional, required for timed or externally triggered conversions)
52 [2] - DMA channel (optional)
54 Configuration options - PCI boards:
58 The Lab-pc+ has quirky chanlist requirements
59 when scanning multiple channels. Multiple channel scan
60 sequence must start at highest channel, then decrement down to
61 channel 0. The rest of the cards can scan down like lab-pc+ or scan
62 up from channel zero. Chanlists consisting of all one channel
63 are also legal, and allow you to pace conversions in bursts.
70 341309a (labpc-1200 register manual)
77 /* #define LABPC_DEBUG enable debugging messages */
79 #include <linux/interrupt.h>
80 #include <linux/slab.h>
81 #include "../comedidev.h"
83 #include <linux/delay.h>
89 #include "comedi_fc.h"
92 #define DRV_NAME "ni_labpc"
94 /* size of io region used by board */
96 /* 2 MHz master clock */
97 #define LABPC_TIMER_BASE 500
99 /* Registers for the lab-pc+ */
101 /* write-only registers */
102 #define COMMAND1_REG 0x0
103 #define ADC_GAIN_MASK (0x7 << 4)
104 #define ADC_CHAN_BITS(x) ((x) & 0x7)
105 /* enables multi channel scans */
106 #define ADC_SCAN_EN_BIT 0x80
107 #define COMMAND2_REG 0x1
108 /* enable pretriggering (used in conjunction with SWTRIG) */
109 #define PRETRIG_BIT 0x1
110 /* enable paced conversions on external trigger */
111 #define HWTRIG_BIT 0x2
112 /* enable paced conversions */
113 #define SWTRIG_BIT 0x4
114 /* use two cascaded counters for pacing */
115 #define CASCADE_BIT 0x8
116 #define DAC_PACED_BIT(channel) (0x40 << ((channel) & 0x1))
117 #define COMMAND3_REG 0x2
118 /* enable dma transfers */
119 #define DMA_EN_BIT 0x1
120 /* enable interrupts for 8255 */
121 #define DIO_INTR_EN_BIT 0x2
122 /* enable dma terminal count interrupt */
123 #define DMATC_INTR_EN_BIT 0x4
124 /* enable timer interrupt */
125 #define TIMER_INTR_EN_BIT 0x8
126 /* enable error interrupt */
127 #define ERR_INTR_EN_BIT 0x10
128 /* enable fifo not empty interrupt */
129 #define ADC_FNE_INTR_EN_BIT 0x20
130 #define ADC_CONVERT_REG 0x3
131 #define DAC_LSB_REG(channel) (0x4 + 2 * ((channel) & 0x1))
132 #define DAC_MSB_REG(channel) (0x5 + 2 * ((channel) & 0x1))
133 #define ADC_CLEAR_REG 0x8
134 #define DMATC_CLEAR_REG 0xa
135 #define TIMER_CLEAR_REG 0xc
136 /* 1200 boards only */
137 #define COMMAND6_REG 0xe
138 /* select ground or common-mode reference */
139 #define ADC_COMMON_BIT 0x1
141 #define ADC_UNIP_BIT 0x2
143 #define DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
144 /* enable fifo half full interrupt */
145 #define ADC_FHF_INTR_EN_BIT 0x20
146 /* enable interrupt on end of hardware count */
147 #define A1_INTR_EN_BIT 0x40
148 /* scan up from channel zero instead of down to zero */
149 #define ADC_SCAN_UP_BIT 0x80
150 #define COMMAND4_REG 0xf
151 /* enables 'interval' scanning */
152 #define INTERVAL_SCAN_EN_BIT 0x1
153 /* enables external signal on counter b1 output to trigger scan */
154 #define EXT_SCAN_EN_BIT 0x2
155 /* chooses direction (output or input) for EXTCONV* line */
156 #define EXT_CONVERT_OUT_BIT 0x4
157 /* chooses differential inputs for adc (in conjunction with board jumper) */
158 #define ADC_DIFF_BIT 0x8
159 #define EXT_CONVERT_DISABLE_BIT 0x10
160 /* 1200 boards only, calibration stuff */
161 #define COMMAND5_REG 0x1c
162 /* enable eeprom for write */
163 #define EEPROM_WRITE_UNPROTECT_BIT 0x4
164 /* enable dithering */
165 #define DITHER_EN_BIT 0x8
166 /* load calibration dac */
167 #define CALDAC_LOAD_BIT 0x10
168 /* serial clock - rising edge writes, falling edge reads */
169 #define SCLOCK_BIT 0x20
170 /* serial data bit for writing to eeprom or calibration dacs */
171 #define SDATA_BIT 0x40
172 /* enable eeprom for read/write */
173 #define EEPROM_EN_BIT 0x80
174 #define INTERVAL_COUNT_REG 0x1e
175 #define INTERVAL_LOAD_REG 0x1f
176 #define INTERVAL_LOAD_BITS 0x1
178 /* read-only registers */
179 #define STATUS1_REG 0x0
180 /* data is available in fifo */
181 #define DATA_AVAIL_BIT 0x1
182 /* overrun has occurred */
183 #define OVERRUN_BIT 0x2
185 #define OVERFLOW_BIT 0x4
186 /* timer interrupt has occured */
187 #define TIMER_BIT 0x8
188 /* dma terminal count has occured */
189 #define DMATC_BIT 0x10
190 /* external trigger has occured */
191 #define EXT_TRIG_BIT 0x40
192 /* 1200 boards only */
193 #define STATUS2_REG 0x1d
194 /* programmable eeprom serial output */
195 #define EEPROM_OUT_BIT 0x1
196 /* counter A1 terminal count */
197 #define A1_TC_BIT 0x2
198 /* fifo not half full */
200 #define ADC_FIFO_REG 0xa
202 #define DIO_BASE_REG 0x10
203 #define COUNTER_A_BASE_REG 0x14
204 #define COUNTER_A_CONTROL_REG (COUNTER_A_BASE_REG + 0x3)
205 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
206 #define INIT_A0_BITS 0x14
207 /* put hardware conversion counter output in harmless state (a1 mode 0) */
208 #define INIT_A1_BITS 0x70
209 #define COUNTER_B_BASE_REG 0x18
211 static int labpc_attach(struct comedi_device
*dev
, struct comedi_devconfig
*it
);
212 static int labpc_cancel(struct comedi_device
*dev
, struct comedi_subdevice
*s
);
213 static irqreturn_t
labpc_interrupt(int irq
, void *d
);
214 static int labpc_drain_fifo(struct comedi_device
*dev
);
215 static void labpc_drain_dma(struct comedi_device
*dev
);
216 static void handle_isa_dma(struct comedi_device
*dev
);
217 static void labpc_drain_dregs(struct comedi_device
*dev
);
218 static int labpc_ai_cmdtest(struct comedi_device
*dev
,
219 struct comedi_subdevice
*s
, struct comedi_cmd
*cmd
);
220 static int labpc_ai_cmd(struct comedi_device
*dev
, struct comedi_subdevice
*s
);
221 static int labpc_ai_rinsn(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
222 struct comedi_insn
*insn
, unsigned int *data
);
223 static int labpc_ao_winsn(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
224 struct comedi_insn
*insn
, unsigned int *data
);
225 static int labpc_ao_rinsn(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
226 struct comedi_insn
*insn
, unsigned int *data
);
227 static int labpc_calib_read_insn(struct comedi_device
*dev
,
228 struct comedi_subdevice
*s
,
229 struct comedi_insn
*insn
, unsigned int *data
);
230 static int labpc_calib_write_insn(struct comedi_device
*dev
,
231 struct comedi_subdevice
*s
,
232 struct comedi_insn
*insn
, unsigned int *data
);
233 static int labpc_eeprom_read_insn(struct comedi_device
*dev
,
234 struct comedi_subdevice
*s
,
235 struct comedi_insn
*insn
, unsigned int *data
);
236 static int labpc_eeprom_write_insn(struct comedi_device
*dev
,
237 struct comedi_subdevice
*s
,
238 struct comedi_insn
*insn
,
240 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd
);
241 static void labpc_adc_timing(struct comedi_device
*dev
, struct comedi_cmd
*cmd
);
242 #ifdef CONFIG_COMEDI_PCI
243 static int labpc_find_device(struct comedi_device
*dev
, int bus
, int slot
);
245 static int labpc_dio_mem_callback(int dir
, int port
, int data
,
247 static void labpc_serial_out(struct comedi_device
*dev
, unsigned int value
,
248 unsigned int num_bits
);
249 static unsigned int labpc_serial_in(struct comedi_device
*dev
);
250 static unsigned int labpc_eeprom_read(struct comedi_device
*dev
,
251 unsigned int address
);
252 static unsigned int labpc_eeprom_read_status(struct comedi_device
*dev
);
253 static unsigned int labpc_eeprom_write(struct comedi_device
*dev
,
254 unsigned int address
,
256 static void write_caldac(struct comedi_device
*dev
, unsigned int channel
,
261 MODE_SINGLE_CHAN_INTERVAL
,
266 /* analog input ranges */
267 #define NUM_LABPC_PLUS_AI_RANGES 16
268 /* indicates unipolar ranges */
269 static const int labpc_plus_is_unipolar
[NUM_LABPC_PLUS_AI_RANGES
] = {
288 /* map range index to gain bits */
289 static const int labpc_plus_ai_gain_bits
[NUM_LABPC_PLUS_AI_RANGES
] = {
308 static const struct comedi_lrange range_labpc_plus_ai
= {
309 NUM_LABPC_PLUS_AI_RANGES
,
330 #define NUM_LABPC_1200_AI_RANGES 14
331 /* indicates unipolar ranges */
332 const int labpc_1200_is_unipolar
[NUM_LABPC_1200_AI_RANGES
] = {
349 /* map range index to gain bits */
350 const int labpc_1200_ai_gain_bits
[NUM_LABPC_1200_AI_RANGES
] = {
367 const struct comedi_lrange range_labpc_1200_ai
= {
368 NUM_LABPC_1200_AI_RANGES
,
387 /* analog output ranges */
388 #define AO_RANGE_IS_UNIPOLAR 0x1
389 static const struct comedi_lrange range_labpc_ao
= {
397 /* functions that do inb/outb and readb/writeb so we can use
398 * function pointers to decide which to use */
399 static inline unsigned int labpc_inb(unsigned long address
)
404 static inline void labpc_outb(unsigned int byte
, unsigned long address
)
409 static inline unsigned int labpc_readb(unsigned long address
)
411 return readb((void *)address
);
414 static inline void labpc_writeb(unsigned int byte
, unsigned long address
)
416 writeb(byte
, (void *)address
);
419 static const struct labpc_board_struct labpc_boards
[] = {
421 .name
= "lab-pc-1200",
423 .bustype
= isa_bustype
,
424 .register_layout
= labpc_1200_layout
,
426 .ai_range_table
= &range_labpc_1200_ai
,
427 .ai_range_code
= labpc_1200_ai_gain_bits
,
428 .ai_range_is_unipolar
= labpc_1200_is_unipolar
,
430 .memory_mapped_io
= 0,
433 .name
= "lab-pc-1200ai",
435 .bustype
= isa_bustype
,
436 .register_layout
= labpc_1200_layout
,
438 .ai_range_table
= &range_labpc_1200_ai
,
439 .ai_range_code
= labpc_1200_ai_gain_bits
,
440 .ai_range_is_unipolar
= labpc_1200_is_unipolar
,
442 .memory_mapped_io
= 0,
447 .bustype
= isa_bustype
,
448 .register_layout
= labpc_plus_layout
,
450 .ai_range_table
= &range_labpc_plus_ai
,
451 .ai_range_code
= labpc_plus_ai_gain_bits
,
452 .ai_range_is_unipolar
= labpc_plus_is_unipolar
,
454 .memory_mapped_io
= 0,
456 #ifdef CONFIG_COMEDI_PCI
461 .bustype
= pci_bustype
,
462 .register_layout
= labpc_1200_layout
,
464 .ai_range_table
= &range_labpc_1200_ai
,
465 .ai_range_code
= labpc_1200_ai_gain_bits
,
466 .ai_range_is_unipolar
= labpc_1200_is_unipolar
,
468 .memory_mapped_io
= 1,
470 /* dummy entry so pci board works when comedi_config is passed driver name */
473 .bustype
= pci_bustype
,
479 * Useful for shorthand access to the particular board structure
481 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
483 /* size in bytes of dma buffer */
484 static const int dma_buffer_size
= 0xff00;
485 /* 2 bytes per sample */
486 static const int sample_size
= 2;
488 #define devpriv ((struct labpc_private *)dev->private)
490 static struct comedi_driver driver_labpc
= {
491 .driver_name
= DRV_NAME
,
492 .module
= THIS_MODULE
,
493 .attach
= labpc_attach
,
494 .detach
= labpc_common_detach
,
495 .num_names
= ARRAY_SIZE(labpc_boards
),
496 .board_name
= &labpc_boards
[0].name
,
497 .offset
= sizeof(struct labpc_board_struct
),
500 #ifdef CONFIG_COMEDI_PCI
501 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table
) = {
502 {PCI_DEVICE(PCI_VENDOR_ID_NI
, 0x161)},
506 MODULE_DEVICE_TABLE(pci
, labpc_pci_table
);
507 #endif /* CONFIG_COMEDI_PCI */
509 static inline int labpc_counter_load(struct comedi_device
*dev
,
510 unsigned long base_address
,
511 unsigned int counter_number
,
512 unsigned int count
, unsigned int mode
)
514 if (thisboard
->memory_mapped_io
)
515 return i8254_mm_load((void *)base_address
, 0, counter_number
,
518 return i8254_load(base_address
, 0, counter_number
, count
, mode
);
521 int labpc_common_attach(struct comedi_device
*dev
, unsigned long iobase
,
522 unsigned int irq
, unsigned int dma_chan
)
524 struct comedi_subdevice
*s
;
526 unsigned long dma_flags
, isr_flags
;
529 printk(KERN_ERR
"comedi%d: ni_labpc: %s, io 0x%lx", dev
->minor
,
533 printk(", irq %u", irq
);
535 printk(", dma %u", dma_chan
);
539 printk(KERN_ERR
"io base address is zero!\n");
542 /* request io regions for isa boards */
543 if (thisboard
->bustype
== isa_bustype
) {
544 /* check if io addresses are available */
545 if (!request_region(iobase
, LABPC_SIZE
,
546 driver_labpc
.driver_name
)) {
547 printk(KERN_ERR
"I/O port conflict\n");
551 dev
->iobase
= iobase
;
553 if (thisboard
->memory_mapped_io
) {
554 devpriv
->read_byte
= labpc_readb
;
555 devpriv
->write_byte
= labpc_writeb
;
557 devpriv
->read_byte
= labpc_inb
;
558 devpriv
->write_byte
= labpc_outb
;
560 /* initialize board's command registers */
561 devpriv
->write_byte(devpriv
->command1_bits
, dev
->iobase
+ COMMAND1_REG
);
562 devpriv
->write_byte(devpriv
->command2_bits
, dev
->iobase
+ COMMAND2_REG
);
563 devpriv
->write_byte(devpriv
->command3_bits
, dev
->iobase
+ COMMAND3_REG
);
564 devpriv
->write_byte(devpriv
->command4_bits
, dev
->iobase
+ COMMAND4_REG
);
565 if (thisboard
->register_layout
== labpc_1200_layout
) {
566 devpriv
->write_byte(devpriv
->command5_bits
,
567 dev
->iobase
+ COMMAND5_REG
);
568 devpriv
->write_byte(devpriv
->command6_bits
,
569 dev
->iobase
+ COMMAND6_REG
);
575 if (thisboard
->bustype
== pci_bustype
)
576 isr_flags
|= IRQF_SHARED
;
577 if (request_irq(irq
, labpc_interrupt
, isr_flags
,
578 driver_labpc
.driver_name
, dev
)) {
579 printk(KERN_ERR
"unable to allocate irq %u\n", irq
);
585 /* grab dma channel */
587 printk(KERN_ERR
" invalid dma channel %u\n", dma_chan
);
589 } else if (dma_chan
) {
590 /* allocate dma buffer */
591 devpriv
->dma_buffer
=
592 kmalloc(dma_buffer_size
, GFP_KERNEL
| GFP_DMA
);
593 if (devpriv
->dma_buffer
== NULL
) {
594 printk(KERN_ERR
" failed to allocate dma buffer\n");
597 if (request_dma(dma_chan
, driver_labpc
.driver_name
)) {
598 printk(KERN_ERR
" failed to allocate dma channel %u\n",
602 devpriv
->dma_chan
= dma_chan
;
603 dma_flags
= claim_dma_lock();
604 disable_dma(devpriv
->dma_chan
);
605 set_dma_mode(devpriv
->dma_chan
, DMA_MODE_READ
);
606 release_dma_lock(dma_flags
);
609 dev
->board_name
= thisboard
->name
;
611 if (alloc_subdevices(dev
, 5) < 0)
614 /* analog input subdevice */
615 s
= dev
->subdevices
+ 0;
616 dev
->read_subdev
= s
;
617 s
->type
= COMEDI_SUBD_AI
;
619 SDF_READABLE
| SDF_GROUND
| SDF_COMMON
| SDF_DIFF
| SDF_CMD_READ
;
622 s
->maxdata
= (1 << 12) - 1; /* 12 bit resolution */
623 s
->range_table
= thisboard
->ai_range_table
;
624 s
->do_cmd
= labpc_ai_cmd
;
625 s
->do_cmdtest
= labpc_ai_cmdtest
;
626 s
->insn_read
= labpc_ai_rinsn
;
627 s
->cancel
= labpc_cancel
;
630 s
= dev
->subdevices
+ 1;
631 if (thisboard
->has_ao
) {
633 * Could provide command support, except it only has a
634 * one sample hardware buffer for analog output and no
637 s
->type
= COMEDI_SUBD_AO
;
638 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
| SDF_GROUND
;
639 s
->n_chan
= NUM_AO_CHAN
;
640 s
->maxdata
= (1 << 12) - 1; /* 12 bit resolution */
641 s
->range_table
= &range_labpc_ao
;
642 s
->insn_read
= labpc_ao_rinsn
;
643 s
->insn_write
= labpc_ao_winsn
;
644 /* initialize analog outputs to a known value */
645 for (i
= 0; i
< s
->n_chan
; i
++) {
646 devpriv
->ao_value
[i
] = s
->maxdata
/ 2;
647 lsb
= devpriv
->ao_value
[i
] & 0xff;
648 msb
= (devpriv
->ao_value
[i
] >> 8) & 0xff;
649 devpriv
->write_byte(lsb
, dev
->iobase
+ DAC_LSB_REG(i
));
650 devpriv
->write_byte(msb
, dev
->iobase
+ DAC_MSB_REG(i
));
653 s
->type
= COMEDI_SUBD_UNUSED
;
657 s
= dev
->subdevices
+ 2;
658 /* if board uses io memory we have to give a custom callback
659 * function to the 8255 driver */
660 if (thisboard
->memory_mapped_io
)
661 subdev_8255_init(dev
, s
, labpc_dio_mem_callback
,
662 (unsigned long)(dev
->iobase
+ DIO_BASE_REG
));
664 subdev_8255_init(dev
, s
, NULL
, dev
->iobase
+ DIO_BASE_REG
);
666 /* calibration subdevices for boards that have one */
667 s
= dev
->subdevices
+ 3;
668 if (thisboard
->register_layout
== labpc_1200_layout
) {
669 s
->type
= COMEDI_SUBD_CALIB
;
670 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
| SDF_INTERNAL
;
673 s
->insn_read
= labpc_calib_read_insn
;
674 s
->insn_write
= labpc_calib_write_insn
;
676 for (i
= 0; i
< s
->n_chan
; i
++)
677 write_caldac(dev
, i
, s
->maxdata
/ 2);
679 s
->type
= COMEDI_SUBD_UNUSED
;
682 s
= dev
->subdevices
+ 4;
683 if (thisboard
->register_layout
== labpc_1200_layout
) {
684 s
->type
= COMEDI_SUBD_MEMORY
;
685 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
| SDF_INTERNAL
;
686 s
->n_chan
= EEPROM_SIZE
;
688 s
->insn_read
= labpc_eeprom_read_insn
;
689 s
->insn_write
= labpc_eeprom_write_insn
;
691 for (i
= 0; i
< EEPROM_SIZE
; i
++)
692 devpriv
->eeprom_data
[i
] = labpc_eeprom_read(dev
, i
);
694 printk(KERN_ERR
" eeprom:");
695 for (i
= 0; i
< EEPROM_SIZE
; i
++)
696 printk(" %i:0x%x ", i
, devpriv
->eeprom_data
[i
]);
700 s
->type
= COMEDI_SUBD_UNUSED
;
705 static int labpc_attach(struct comedi_device
*dev
, struct comedi_devconfig
*it
)
707 unsigned long iobase
= 0;
708 unsigned int irq
= 0;
709 unsigned int dma_chan
= 0;
710 #ifdef CONFIG_COMEDI_PCI
714 /* allocate and initialize dev->private */
715 if (alloc_private(dev
, sizeof(struct labpc_private
)) < 0)
718 /* get base address, irq etc. based on bustype */
719 switch (thisboard
->bustype
) {
721 iobase
= it
->options
[0];
722 irq
= it
->options
[1];
723 dma_chan
= it
->options
[2];
726 #ifdef CONFIG_COMEDI_PCI
727 retval
= labpc_find_device(dev
, it
->options
[0], it
->options
[1]);
730 retval
= mite_setup(devpriv
->mite
);
733 iobase
= (unsigned long)devpriv
->mite
->daq_io_addr
;
734 irq
= mite_irq(devpriv
->mite
);
736 printk(KERN_ERR
" this driver has not been built with PCI "
743 (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
747 printk(KERN_ERR
"bug! couldn't determine board type\n");
752 return labpc_common_attach(dev
, iobase
, irq
, dma_chan
);
755 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
756 #ifdef CONFIG_COMEDI_PCI
757 static int labpc_find_device(struct comedi_device
*dev
, int bus
, int slot
)
759 struct mite_struct
*mite
;
761 for (mite
= mite_devices
; mite
; mite
= mite
->next
) {
764 /* if bus/slot are specified then make sure we have the right bus/slot */
766 if (bus
!= mite
->pcidev
->bus
->number
767 || slot
!= PCI_SLOT(mite
->pcidev
->devfn
))
770 for (i
= 0; i
< driver_labpc
.num_names
; i
++) {
771 if (labpc_boards
[i
].bustype
!= pci_bustype
)
773 if (mite_device_id(mite
) == labpc_boards
[i
].device_id
) {
774 devpriv
->mite
= mite
;
775 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
776 dev
->board_ptr
= &labpc_boards
[i
];
781 printk(KERN_ERR
"no device found\n");
787 int labpc_common_detach(struct comedi_device
*dev
)
789 printk(KERN_ERR
"comedi%d: ni_labpc: detach\n", dev
->minor
);
792 subdev_8255_cleanup(dev
, dev
->subdevices
+ 2);
794 /* only free stuff if it has been allocated by _attach */
795 if (devpriv
->dma_buffer
)
796 kfree(devpriv
->dma_buffer
);
797 if (devpriv
->dma_chan
)
798 free_dma(devpriv
->dma_chan
);
800 free_irq(dev
->irq
, dev
);
801 if (thisboard
->bustype
== isa_bustype
&& dev
->iobase
)
802 release_region(dev
->iobase
, LABPC_SIZE
);
803 #ifdef CONFIG_COMEDI_PCI
805 mite_unsetup(devpriv
->mite
);
811 static void labpc_clear_adc_fifo(const struct comedi_device
*dev
)
813 devpriv
->write_byte(0x1, dev
->iobase
+ ADC_CLEAR_REG
);
814 devpriv
->read_byte(dev
->iobase
+ ADC_FIFO_REG
);
815 devpriv
->read_byte(dev
->iobase
+ ADC_FIFO_REG
);
818 static int labpc_cancel(struct comedi_device
*dev
, struct comedi_subdevice
*s
)
822 spin_lock_irqsave(&dev
->spinlock
, flags
);
823 devpriv
->command2_bits
&= ~SWTRIG_BIT
& ~HWTRIG_BIT
& ~PRETRIG_BIT
;
824 devpriv
->write_byte(devpriv
->command2_bits
, dev
->iobase
+ COMMAND2_REG
);
825 spin_unlock_irqrestore(&dev
->spinlock
, flags
);
827 devpriv
->command3_bits
= 0;
828 devpriv
->write_byte(devpriv
->command3_bits
, dev
->iobase
+ COMMAND3_REG
);
833 static enum scan_mode
labpc_ai_scan_mode(const struct comedi_cmd
*cmd
)
835 if (cmd
->chanlist_len
== 1)
836 return MODE_SINGLE_CHAN
;
838 /* chanlist may be NULL during cmdtest. */
839 if (cmd
->chanlist
== NULL
)
840 return MODE_MULT_CHAN_UP
;
842 if (CR_CHAN(cmd
->chanlist
[0]) == CR_CHAN(cmd
->chanlist
[1]))
843 return MODE_SINGLE_CHAN_INTERVAL
;
845 if (CR_CHAN(cmd
->chanlist
[0]) < CR_CHAN(cmd
->chanlist
[1]))
846 return MODE_MULT_CHAN_UP
;
848 if (CR_CHAN(cmd
->chanlist
[0]) > CR_CHAN(cmd
->chanlist
[1]))
849 return MODE_MULT_CHAN_DOWN
;
851 printk(KERN_ERR
"ni_labpc: bug! this should never happen\n");
856 static int labpc_ai_chanlist_invalid(const struct comedi_device
*dev
,
857 const struct comedi_cmd
*cmd
)
859 int mode
, channel
, range
, aref
, i
;
861 if (cmd
->chanlist
== NULL
)
864 mode
= labpc_ai_scan_mode(cmd
);
866 if (mode
== MODE_SINGLE_CHAN
)
869 if (mode
== MODE_SINGLE_CHAN_INTERVAL
) {
870 if (cmd
->chanlist_len
> 0xff) {
872 "ni_labpc: chanlist too long for single channel interval mode\n");
877 channel
= CR_CHAN(cmd
->chanlist
[0]);
878 range
= CR_RANGE(cmd
->chanlist
[0]);
879 aref
= CR_AREF(cmd
->chanlist
[0]);
881 for (i
= 0; i
< cmd
->chanlist_len
; i
++) {
884 case MODE_SINGLE_CHAN_INTERVAL
:
885 if (CR_CHAN(cmd
->chanlist
[i
]) != channel
) {
887 "channel scanning order specified in chanlist is not supported by hardware.\n");
891 case MODE_MULT_CHAN_UP
:
892 if (CR_CHAN(cmd
->chanlist
[i
]) != i
) {
894 "channel scanning order specified in chanlist is not supported by hardware.\n");
898 case MODE_MULT_CHAN_DOWN
:
899 if (CR_CHAN(cmd
->chanlist
[i
]) !=
900 cmd
->chanlist_len
- i
- 1) {
902 "channel scanning order specified in chanlist is not supported by hardware.\n");
907 printk(KERN_ERR
"ni_labpc: bug! in chanlist check\n");
912 if (CR_RANGE(cmd
->chanlist
[i
]) != range
) {
914 "entries in chanlist must all have the same range\n");
918 if (CR_AREF(cmd
->chanlist
[i
]) != aref
) {
920 "entries in chanlist must all have the same reference\n");
928 static int labpc_use_continuous_mode(const struct comedi_cmd
*cmd
)
930 if (labpc_ai_scan_mode(cmd
) == MODE_SINGLE_CHAN
)
933 if (cmd
->scan_begin_src
== TRIG_FOLLOW
)
939 static unsigned int labpc_ai_convert_period(const struct comedi_cmd
*cmd
)
941 if (cmd
->convert_src
!= TRIG_TIMER
)
944 if (labpc_ai_scan_mode(cmd
) == MODE_SINGLE_CHAN
&&
945 cmd
->scan_begin_src
== TRIG_TIMER
)
946 return cmd
->scan_begin_arg
;
948 return cmd
->convert_arg
;
951 static void labpc_set_ai_convert_period(struct comedi_cmd
*cmd
, unsigned int ns
)
953 if (cmd
->convert_src
!= TRIG_TIMER
)
956 if (labpc_ai_scan_mode(cmd
) == MODE_SINGLE_CHAN
&&
957 cmd
->scan_begin_src
== TRIG_TIMER
) {
958 cmd
->scan_begin_arg
= ns
;
959 if (cmd
->convert_arg
> cmd
->scan_begin_arg
)
960 cmd
->convert_arg
= cmd
->scan_begin_arg
;
962 cmd
->convert_arg
= ns
;
965 static unsigned int labpc_ai_scan_period(const struct comedi_cmd
*cmd
)
967 if (cmd
->scan_begin_src
!= TRIG_TIMER
)
970 if (labpc_ai_scan_mode(cmd
) == MODE_SINGLE_CHAN
&&
971 cmd
->convert_src
== TRIG_TIMER
)
974 return cmd
->scan_begin_arg
;
977 static void labpc_set_ai_scan_period(struct comedi_cmd
*cmd
, unsigned int ns
)
979 if (cmd
->scan_begin_src
!= TRIG_TIMER
)
982 if (labpc_ai_scan_mode(cmd
) == MODE_SINGLE_CHAN
&&
983 cmd
->convert_src
== TRIG_TIMER
)
986 cmd
->scan_begin_arg
= ns
;
989 static int labpc_ai_cmdtest(struct comedi_device
*dev
,
990 struct comedi_subdevice
*s
, struct comedi_cmd
*cmd
)
996 /* step 1: make sure trigger sources are trivially valid */
998 tmp
= cmd
->start_src
;
999 cmd
->start_src
&= TRIG_NOW
| TRIG_EXT
;
1000 if (!cmd
->start_src
|| tmp
!= cmd
->start_src
)
1003 tmp
= cmd
->scan_begin_src
;
1004 cmd
->scan_begin_src
&= TRIG_TIMER
| TRIG_FOLLOW
| TRIG_EXT
;
1005 if (!cmd
->scan_begin_src
|| tmp
!= cmd
->scan_begin_src
)
1008 tmp
= cmd
->convert_src
;
1009 cmd
->convert_src
&= TRIG_TIMER
| TRIG_EXT
;
1010 if (!cmd
->convert_src
|| tmp
!= cmd
->convert_src
)
1013 tmp
= cmd
->scan_end_src
;
1014 cmd
->scan_end_src
&= TRIG_COUNT
;
1015 if (!cmd
->scan_end_src
|| tmp
!= cmd
->scan_end_src
)
1018 tmp
= cmd
->stop_src
;
1019 stop_mask
= TRIG_COUNT
| TRIG_NONE
;
1020 if (thisboard
->register_layout
== labpc_1200_layout
)
1021 stop_mask
|= TRIG_EXT
;
1022 cmd
->stop_src
&= stop_mask
;
1023 if (!cmd
->stop_src
|| tmp
!= cmd
->stop_src
)
1029 /* step 2: make sure trigger sources are unique and mutually compatible */
1031 if (cmd
->start_src
!= TRIG_NOW
&& cmd
->start_src
!= TRIG_EXT
)
1033 if (cmd
->scan_begin_src
!= TRIG_TIMER
&&
1034 cmd
->scan_begin_src
!= TRIG_FOLLOW
&&
1035 cmd
->scan_begin_src
!= TRIG_EXT
)
1037 if (cmd
->convert_src
!= TRIG_TIMER
&& cmd
->convert_src
!= TRIG_EXT
)
1039 if (cmd
->stop_src
!= TRIG_COUNT
&&
1040 cmd
->stop_src
!= TRIG_EXT
&& cmd
->stop_src
!= TRIG_NONE
)
1043 /* can't have external stop and start triggers at once */
1044 if (cmd
->start_src
== TRIG_EXT
&& cmd
->stop_src
== TRIG_EXT
)
1050 /* step 3: make sure arguments are trivially compatible */
1052 if (cmd
->start_arg
== TRIG_NOW
&& cmd
->start_arg
!= 0) {
1057 if (!cmd
->chanlist_len
)
1060 if (cmd
->scan_end_arg
!= cmd
->chanlist_len
) {
1061 cmd
->scan_end_arg
= cmd
->chanlist_len
;
1065 if (cmd
->convert_src
== TRIG_TIMER
) {
1066 if (cmd
->convert_arg
< thisboard
->ai_speed
) {
1067 cmd
->convert_arg
= thisboard
->ai_speed
;
1071 /* make sure scan timing is not too fast */
1072 if (cmd
->scan_begin_src
== TRIG_TIMER
) {
1073 if (cmd
->convert_src
== TRIG_TIMER
&&
1074 cmd
->scan_begin_arg
<
1075 cmd
->convert_arg
* cmd
->chanlist_len
) {
1076 cmd
->scan_begin_arg
=
1077 cmd
->convert_arg
* cmd
->chanlist_len
;
1080 if (cmd
->scan_begin_arg
<
1081 thisboard
->ai_speed
* cmd
->chanlist_len
) {
1082 cmd
->scan_begin_arg
=
1083 thisboard
->ai_speed
* cmd
->chanlist_len
;
1088 switch (cmd
->stop_src
) {
1090 if (!cmd
->stop_arg
) {
1096 if (cmd
->stop_arg
!= 0) {
1102 * TRIG_EXT doesn't care since it doesn't
1103 * trigger off a numbered channel
1112 /* step 4: fix up any arguments */
1114 tmp
= cmd
->convert_arg
;
1115 tmp2
= cmd
->scan_begin_arg
;
1116 labpc_adc_timing(dev
, cmd
);
1117 if (tmp
!= cmd
->convert_arg
|| tmp2
!= cmd
->scan_begin_arg
)
1123 if (labpc_ai_chanlist_invalid(dev
, cmd
))
1129 static int labpc_ai_cmd(struct comedi_device
*dev
, struct comedi_subdevice
*s
)
1131 int channel
, range
, aref
;
1132 unsigned long irq_flags
;
1134 struct comedi_async
*async
= s
->async
;
1135 struct comedi_cmd
*cmd
= &async
->cmd
;
1136 enum transfer_type xfer
;
1137 unsigned long flags
;
1140 comedi_error(dev
, "no irq assigned, cannot perform command");
1144 range
= CR_RANGE(cmd
->chanlist
[0]);
1145 aref
= CR_AREF(cmd
->chanlist
[0]);
1147 /* make sure board is disabled before setting up aquisition */
1148 spin_lock_irqsave(&dev
->spinlock
, flags
);
1149 devpriv
->command2_bits
&= ~SWTRIG_BIT
& ~HWTRIG_BIT
& ~PRETRIG_BIT
;
1150 devpriv
->write_byte(devpriv
->command2_bits
, dev
->iobase
+ COMMAND2_REG
);
1151 spin_unlock_irqrestore(&dev
->spinlock
, flags
);
1153 devpriv
->command3_bits
= 0;
1154 devpriv
->write_byte(devpriv
->command3_bits
, dev
->iobase
+ COMMAND3_REG
);
1156 /* initialize software conversion count */
1157 if (cmd
->stop_src
== TRIG_COUNT
)
1158 devpriv
->count
= cmd
->stop_arg
* cmd
->chanlist_len
;
1160 /* setup hardware conversion counter */
1161 if (cmd
->stop_src
== TRIG_EXT
) {
1163 * load counter a1 with count of 3
1164 * (pc+ manual says this is minimum allowed) using mode 0
1166 ret
= labpc_counter_load(dev
, dev
->iobase
+ COUNTER_A_BASE_REG
,
1169 comedi_error(dev
, "error loading counter a1");
1173 * otherwise, just put a1 in mode 0
1174 * with no count to set its output low
1176 devpriv
->write_byte(INIT_A1_BITS
,
1177 dev
->iobase
+ COUNTER_A_CONTROL_REG
);
1179 /* figure out what method we will use to transfer data */
1180 if (devpriv
->dma_chan
&& /* need a dma channel allocated */
1182 * dma unsafe at RT priority,
1183 * and too much setup time for TRIG_WAKE_EOS for
1185 (cmd
->flags
& (TRIG_WAKE_EOS
| TRIG_RT
)) == 0 &&
1186 /* only available on the isa boards */
1187 thisboard
->bustype
== isa_bustype
) {
1188 xfer
= isa_dma_transfer
;
1189 /* pc-plus has no fifo-half full interrupt */
1190 } else if (thisboard
->register_layout
== labpc_1200_layout
&&
1191 /* wake-end-of-scan should interrupt on fifo not empty */
1192 (cmd
->flags
& TRIG_WAKE_EOS
) == 0 &&
1193 /* make sure we are taking more than just a few points */
1194 (cmd
->stop_src
!= TRIG_COUNT
|| devpriv
->count
> 256)) {
1195 xfer
= fifo_half_full_transfer
;
1197 xfer
= fifo_not_empty_transfer
;
1198 devpriv
->current_transfer
= xfer
;
1200 /* setup command6 register for 1200 boards */
1201 if (thisboard
->register_layout
== labpc_1200_layout
) {
1202 /* reference inputs to ground or common? */
1203 if (aref
!= AREF_GROUND
)
1204 devpriv
->command6_bits
|= ADC_COMMON_BIT
;
1206 devpriv
->command6_bits
&= ~ADC_COMMON_BIT
;
1207 /* bipolar or unipolar range? */
1208 if (thisboard
->ai_range_is_unipolar
[range
])
1209 devpriv
->command6_bits
|= ADC_UNIP_BIT
;
1211 devpriv
->command6_bits
&= ~ADC_UNIP_BIT
;
1212 /* interrupt on fifo half full? */
1213 if (xfer
== fifo_half_full_transfer
)
1214 devpriv
->command6_bits
|= ADC_FHF_INTR_EN_BIT
;
1216 devpriv
->command6_bits
&= ~ADC_FHF_INTR_EN_BIT
;
1217 /* enable interrupt on counter a1 terminal count? */
1218 if (cmd
->stop_src
== TRIG_EXT
)
1219 devpriv
->command6_bits
|= A1_INTR_EN_BIT
;
1221 devpriv
->command6_bits
&= ~A1_INTR_EN_BIT
;
1222 /* are we scanning up or down through channels? */
1223 if (labpc_ai_scan_mode(cmd
) == MODE_MULT_CHAN_UP
)
1224 devpriv
->command6_bits
|= ADC_SCAN_UP_BIT
;
1226 devpriv
->command6_bits
&= ~ADC_SCAN_UP_BIT
;
1227 /* write to register */
1228 devpriv
->write_byte(devpriv
->command6_bits
,
1229 dev
->iobase
+ COMMAND6_REG
);
1232 /* setup channel list, etc (command1 register) */
1233 devpriv
->command1_bits
= 0;
1234 if (labpc_ai_scan_mode(cmd
) == MODE_MULT_CHAN_UP
)
1235 channel
= CR_CHAN(cmd
->chanlist
[cmd
->chanlist_len
- 1]);
1237 channel
= CR_CHAN(cmd
->chanlist
[0]);
1238 /* munge channel bits for differential / scan disabled mode */
1239 if (labpc_ai_scan_mode(cmd
) != MODE_SINGLE_CHAN
&& aref
== AREF_DIFF
)
1241 devpriv
->command1_bits
|= ADC_CHAN_BITS(channel
);
1242 devpriv
->command1_bits
|= thisboard
->ai_range_code
[range
];
1243 devpriv
->write_byte(devpriv
->command1_bits
, dev
->iobase
+ COMMAND1_REG
);
1244 /* manual says to set scan enable bit on second pass */
1245 if (labpc_ai_scan_mode(cmd
) == MODE_MULT_CHAN_UP
||
1246 labpc_ai_scan_mode(cmd
) == MODE_MULT_CHAN_DOWN
) {
1247 devpriv
->command1_bits
|= ADC_SCAN_EN_BIT
;
1248 /* need a brief delay before enabling scan, or scan
1249 * list will get screwed when you switch
1250 * between scan up to scan down mode - dunno why */
1252 devpriv
->write_byte(devpriv
->command1_bits
,
1253 dev
->iobase
+ COMMAND1_REG
);
1255 /* setup any external triggering/pacing (command4 register) */
1256 devpriv
->command4_bits
= 0;
1257 if (cmd
->convert_src
!= TRIG_EXT
)
1258 devpriv
->command4_bits
|= EXT_CONVERT_DISABLE_BIT
;
1259 /* XXX should discard first scan when using interval scanning
1260 * since manual says it is not synced with scan clock */
1261 if (labpc_use_continuous_mode(cmd
) == 0) {
1262 devpriv
->command4_bits
|= INTERVAL_SCAN_EN_BIT
;
1263 if (cmd
->scan_begin_src
== TRIG_EXT
)
1264 devpriv
->command4_bits
|= EXT_SCAN_EN_BIT
;
1266 /* single-ended/differential */
1267 if (aref
== AREF_DIFF
)
1268 devpriv
->command4_bits
|= ADC_DIFF_BIT
;
1269 devpriv
->write_byte(devpriv
->command4_bits
, dev
->iobase
+ COMMAND4_REG
);
1271 devpriv
->write_byte(cmd
->chanlist_len
,
1272 dev
->iobase
+ INTERVAL_COUNT_REG
);
1274 devpriv
->write_byte(INTERVAL_LOAD_BITS
,
1275 dev
->iobase
+ INTERVAL_LOAD_REG
);
1277 if (cmd
->convert_src
== TRIG_TIMER
|| cmd
->scan_begin_src
== TRIG_TIMER
) {
1279 labpc_adc_timing(dev
, cmd
);
1280 /* load counter b0 in mode 3 */
1281 ret
= labpc_counter_load(dev
, dev
->iobase
+ COUNTER_B_BASE_REG
,
1282 0, devpriv
->divisor_b0
, 3);
1284 comedi_error(dev
, "error loading counter b0");
1288 /* set up conversion pacing */
1289 if (labpc_ai_convert_period(cmd
)) {
1290 /* load counter a0 in mode 2 */
1291 ret
= labpc_counter_load(dev
, dev
->iobase
+ COUNTER_A_BASE_REG
,
1292 0, devpriv
->divisor_a0
, 2);
1294 comedi_error(dev
, "error loading counter a0");
1298 devpriv
->write_byte(INIT_A0_BITS
,
1299 dev
->iobase
+ COUNTER_A_CONTROL_REG
);
1301 /* set up scan pacing */
1302 if (labpc_ai_scan_period(cmd
)) {
1303 /* load counter b1 in mode 2 */
1304 ret
= labpc_counter_load(dev
, dev
->iobase
+ COUNTER_B_BASE_REG
,
1305 1, devpriv
->divisor_b1
, 2);
1307 comedi_error(dev
, "error loading counter b1");
1312 labpc_clear_adc_fifo(dev
);
1314 /* set up dma transfer */
1315 if (xfer
== isa_dma_transfer
) {
1316 irq_flags
= claim_dma_lock();
1317 disable_dma(devpriv
->dma_chan
);
1318 /* clear flip-flop to make sure 2-byte registers for
1319 * count and address get set correctly */
1320 clear_dma_ff(devpriv
->dma_chan
);
1321 set_dma_addr(devpriv
->dma_chan
,
1322 virt_to_bus(devpriv
->dma_buffer
));
1323 /* set appropriate size of transfer */
1324 devpriv
->dma_transfer_size
= labpc_suggest_transfer_size(*cmd
);
1325 if (cmd
->stop_src
== TRIG_COUNT
&&
1326 devpriv
->count
* sample_size
< devpriv
->dma_transfer_size
) {
1327 devpriv
->dma_transfer_size
=
1328 devpriv
->count
* sample_size
;
1330 set_dma_count(devpriv
->dma_chan
, devpriv
->dma_transfer_size
);
1331 enable_dma(devpriv
->dma_chan
);
1332 release_dma_lock(irq_flags
);
1333 /* enable board's dma */
1334 devpriv
->command3_bits
|= DMA_EN_BIT
| DMATC_INTR_EN_BIT
;
1336 devpriv
->command3_bits
&= ~DMA_EN_BIT
& ~DMATC_INTR_EN_BIT
;
1338 /* enable error interrupts */
1339 devpriv
->command3_bits
|= ERR_INTR_EN_BIT
;
1340 /* enable fifo not empty interrupt? */
1341 if (xfer
== fifo_not_empty_transfer
)
1342 devpriv
->command3_bits
|= ADC_FNE_INTR_EN_BIT
;
1344 devpriv
->command3_bits
&= ~ADC_FNE_INTR_EN_BIT
;
1345 devpriv
->write_byte(devpriv
->command3_bits
, dev
->iobase
+ COMMAND3_REG
);
1347 /* startup aquisition */
1350 /* use 2 cascaded counters for pacing */
1351 spin_lock_irqsave(&dev
->spinlock
, flags
);
1352 devpriv
->command2_bits
|= CASCADE_BIT
;
1353 switch (cmd
->start_src
) {
1355 devpriv
->command2_bits
|= HWTRIG_BIT
;
1356 devpriv
->command2_bits
&= ~PRETRIG_BIT
& ~SWTRIG_BIT
;
1359 devpriv
->command2_bits
|= SWTRIG_BIT
;
1360 devpriv
->command2_bits
&= ~PRETRIG_BIT
& ~HWTRIG_BIT
;
1363 comedi_error(dev
, "bug with start_src");
1367 switch (cmd
->stop_src
) {
1369 devpriv
->command2_bits
|= HWTRIG_BIT
| PRETRIG_BIT
;
1375 comedi_error(dev
, "bug with stop_src");
1378 devpriv
->write_byte(devpriv
->command2_bits
, dev
->iobase
+ COMMAND2_REG
);
1379 spin_unlock_irqrestore(&dev
->spinlock
, flags
);
1384 /* interrupt service routine */
1385 static irqreturn_t
labpc_interrupt(int irq
, void *d
)
1387 struct comedi_device
*dev
= d
;
1388 struct comedi_subdevice
*s
= dev
->read_subdev
;
1389 struct comedi_async
*async
;
1390 struct comedi_cmd
*cmd
;
1392 if (dev
->attached
== 0) {
1393 comedi_error(dev
, "premature interrupt");
1401 /* read board status */
1402 devpriv
->status1_bits
= devpriv
->read_byte(dev
->iobase
+ STATUS1_REG
);
1403 if (thisboard
->register_layout
== labpc_1200_layout
)
1404 devpriv
->status2_bits
=
1405 devpriv
->read_byte(dev
->iobase
+ STATUS2_REG
);
1407 if ((devpriv
->status1_bits
& (DMATC_BIT
| TIMER_BIT
| OVERFLOW_BIT
|
1408 OVERRUN_BIT
| DATA_AVAIL_BIT
)) == 0
1409 && (devpriv
->status2_bits
& A1_TC_BIT
) == 0
1410 && (devpriv
->status2_bits
& FNHF_BIT
)) {
1414 if (devpriv
->status1_bits
& OVERRUN_BIT
) {
1415 /* clear error interrupt */
1416 devpriv
->write_byte(0x1, dev
->iobase
+ ADC_CLEAR_REG
);
1417 async
->events
|= COMEDI_CB_ERROR
| COMEDI_CB_EOA
;
1418 comedi_event(dev
, s
);
1419 comedi_error(dev
, "overrun");
1423 if (devpriv
->current_transfer
== isa_dma_transfer
) {
1425 * if a dma terminal count of external stop trigger
1428 if (devpriv
->status1_bits
& DMATC_BIT
||
1429 (thisboard
->register_layout
== labpc_1200_layout
1430 && devpriv
->status2_bits
& A1_TC_BIT
)) {
1431 handle_isa_dma(dev
);
1434 labpc_drain_fifo(dev
);
1436 if (devpriv
->status1_bits
& TIMER_BIT
) {
1437 comedi_error(dev
, "handled timer interrupt?");
1439 devpriv
->write_byte(0x1, dev
->iobase
+ TIMER_CLEAR_REG
);
1442 if (devpriv
->status1_bits
& OVERFLOW_BIT
) {
1443 /* clear error interrupt */
1444 devpriv
->write_byte(0x1, dev
->iobase
+ ADC_CLEAR_REG
);
1445 async
->events
|= COMEDI_CB_ERROR
| COMEDI_CB_EOA
;
1446 comedi_event(dev
, s
);
1447 comedi_error(dev
, "overflow");
1450 /* handle external stop trigger */
1451 if (cmd
->stop_src
== TRIG_EXT
) {
1452 if (devpriv
->status2_bits
& A1_TC_BIT
) {
1453 labpc_drain_dregs(dev
);
1454 labpc_cancel(dev
, s
);
1455 async
->events
|= COMEDI_CB_EOA
;
1459 /* TRIG_COUNT end of acquisition */
1460 if (cmd
->stop_src
== TRIG_COUNT
) {
1461 if (devpriv
->count
== 0) {
1462 labpc_cancel(dev
, s
);
1463 async
->events
|= COMEDI_CB_EOA
;
1467 comedi_event(dev
, s
);
1471 /* read all available samples from ai fifo */
1472 static int labpc_drain_fifo(struct comedi_device
*dev
)
1474 unsigned int lsb
, msb
;
1476 struct comedi_async
*async
= dev
->read_subdev
->async
;
1477 const int timeout
= 10000;
1480 devpriv
->status1_bits
= devpriv
->read_byte(dev
->iobase
+ STATUS1_REG
);
1482 for (i
= 0; (devpriv
->status1_bits
& DATA_AVAIL_BIT
) && i
< timeout
;
1484 /* quit if we have all the data we want */
1485 if (async
->cmd
.stop_src
== TRIG_COUNT
) {
1486 if (devpriv
->count
== 0)
1490 lsb
= devpriv
->read_byte(dev
->iobase
+ ADC_FIFO_REG
);
1491 msb
= devpriv
->read_byte(dev
->iobase
+ ADC_FIFO_REG
);
1492 data
= (msb
<< 8) | lsb
;
1493 cfc_write_to_buffer(dev
->read_subdev
, data
);
1494 devpriv
->status1_bits
=
1495 devpriv
->read_byte(dev
->iobase
+ STATUS1_REG
);
1498 comedi_error(dev
, "ai timeout, fifo never empties");
1499 async
->events
|= COMEDI_CB_ERROR
| COMEDI_CB_EOA
;
1506 static void labpc_drain_dma(struct comedi_device
*dev
)
1508 struct comedi_subdevice
*s
= dev
->read_subdev
;
1509 struct comedi_async
*async
= s
->async
;
1511 unsigned long flags
;
1512 unsigned int max_points
, num_points
, residue
, leftover
;
1515 status
= devpriv
->status1_bits
;
1517 flags
= claim_dma_lock();
1518 disable_dma(devpriv
->dma_chan
);
1519 /* clear flip-flop to make sure 2-byte registers for
1520 * count and address get set correctly */
1521 clear_dma_ff(devpriv
->dma_chan
);
1523 /* figure out how many points to read */
1524 max_points
= devpriv
->dma_transfer_size
/ sample_size
;
1525 /* residue is the number of points left to be done on the dma
1526 * transfer. It should always be zero at this point unless
1527 * the stop_src is set to external triggering.
1529 residue
= get_dma_residue(devpriv
->dma_chan
) / sample_size
;
1530 num_points
= max_points
- residue
;
1531 if (devpriv
->count
< num_points
&& async
->cmd
.stop_src
== TRIG_COUNT
)
1532 num_points
= devpriv
->count
;
1534 /* figure out how many points will be stored next time */
1536 if (async
->cmd
.stop_src
!= TRIG_COUNT
) {
1537 leftover
= devpriv
->dma_transfer_size
/ sample_size
;
1538 } else if (devpriv
->count
> num_points
) {
1539 leftover
= devpriv
->count
- num_points
;
1540 if (leftover
> max_points
)
1541 leftover
= max_points
;
1544 /* write data to comedi buffer */
1545 for (i
= 0; i
< num_points
; i
++)
1546 cfc_write_to_buffer(s
, devpriv
->dma_buffer
[i
]);
1548 if (async
->cmd
.stop_src
== TRIG_COUNT
)
1549 devpriv
->count
-= num_points
;
1551 /* set address and count for next transfer */
1552 set_dma_addr(devpriv
->dma_chan
, virt_to_bus(devpriv
->dma_buffer
));
1553 set_dma_count(devpriv
->dma_chan
, leftover
* sample_size
);
1554 release_dma_lock(flags
);
1556 async
->events
|= COMEDI_CB_BLOCK
;
1559 static void handle_isa_dma(struct comedi_device
*dev
)
1561 labpc_drain_dma(dev
);
1563 enable_dma(devpriv
->dma_chan
);
1565 /* clear dma tc interrupt */
1566 devpriv
->write_byte(0x1, dev
->iobase
+ DMATC_CLEAR_REG
);
1569 /* makes sure all data acquired by board is transfered to comedi (used
1570 * when aquisition is terminated by stop_src == TRIG_EXT). */
1571 static void labpc_drain_dregs(struct comedi_device
*dev
)
1573 if (devpriv
->current_transfer
== isa_dma_transfer
)
1574 labpc_drain_dma(dev
);
1576 labpc_drain_fifo(dev
);
1579 static int labpc_ai_rinsn(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
1580 struct comedi_insn
*insn
, unsigned int *data
)
1586 unsigned long flags
;
1588 /* disable timed conversions */
1589 spin_lock_irqsave(&dev
->spinlock
, flags
);
1590 devpriv
->command2_bits
&= ~SWTRIG_BIT
& ~HWTRIG_BIT
& ~PRETRIG_BIT
;
1591 devpriv
->write_byte(devpriv
->command2_bits
, dev
->iobase
+ COMMAND2_REG
);
1592 spin_unlock_irqrestore(&dev
->spinlock
, flags
);
1594 /* disable interrupt generation and dma */
1595 devpriv
->command3_bits
= 0;
1596 devpriv
->write_byte(devpriv
->command3_bits
, dev
->iobase
+ COMMAND3_REG
);
1598 /* set gain and channel */
1599 devpriv
->command1_bits
= 0;
1600 chan
= CR_CHAN(insn
->chanspec
);
1601 range
= CR_RANGE(insn
->chanspec
);
1602 devpriv
->command1_bits
|= thisboard
->ai_range_code
[range
];
1603 /* munge channel bits for differential/scan disabled mode */
1604 if (CR_AREF(insn
->chanspec
) == AREF_DIFF
)
1606 devpriv
->command1_bits
|= ADC_CHAN_BITS(chan
);
1607 devpriv
->write_byte(devpriv
->command1_bits
, dev
->iobase
+ COMMAND1_REG
);
1609 /* setup command6 register for 1200 boards */
1610 if (thisboard
->register_layout
== labpc_1200_layout
) {
1611 /* reference inputs to ground or common? */
1612 if (CR_AREF(insn
->chanspec
) != AREF_GROUND
)
1613 devpriv
->command6_bits
|= ADC_COMMON_BIT
;
1615 devpriv
->command6_bits
&= ~ADC_COMMON_BIT
;
1616 /* bipolar or unipolar range? */
1617 if (thisboard
->ai_range_is_unipolar
[range
])
1618 devpriv
->command6_bits
|= ADC_UNIP_BIT
;
1620 devpriv
->command6_bits
&= ~ADC_UNIP_BIT
;
1621 /* don't interrupt on fifo half full */
1622 devpriv
->command6_bits
&= ~ADC_FHF_INTR_EN_BIT
;
1623 /* don't enable interrupt on counter a1 terminal count? */
1624 devpriv
->command6_bits
&= ~A1_INTR_EN_BIT
;
1625 /* write to register */
1626 devpriv
->write_byte(devpriv
->command6_bits
,
1627 dev
->iobase
+ COMMAND6_REG
);
1629 /* setup command4 register */
1630 devpriv
->command4_bits
= 0;
1631 devpriv
->command4_bits
|= EXT_CONVERT_DISABLE_BIT
;
1632 /* single-ended/differential */
1633 if (CR_AREF(insn
->chanspec
) == AREF_DIFF
)
1634 devpriv
->command4_bits
|= ADC_DIFF_BIT
;
1635 devpriv
->write_byte(devpriv
->command4_bits
, dev
->iobase
+ COMMAND4_REG
);
1638 * initialize pacer counter output to make sure it doesn't
1639 * cause any problems
1641 devpriv
->write_byte(INIT_A0_BITS
, dev
->iobase
+ COUNTER_A_CONTROL_REG
);
1643 labpc_clear_adc_fifo(dev
);
1645 for (n
= 0; n
< insn
->n
; n
++) {
1646 /* trigger conversion */
1647 devpriv
->write_byte(0x1, dev
->iobase
+ ADC_CONVERT_REG
);
1649 for (i
= 0; i
< timeout
; i
++) {
1650 if (devpriv
->read_byte(dev
->iobase
+
1651 STATUS1_REG
) & DATA_AVAIL_BIT
)
1656 comedi_error(dev
, "timeout");
1659 lsb
= devpriv
->read_byte(dev
->iobase
+ ADC_FIFO_REG
);
1660 msb
= devpriv
->read_byte(dev
->iobase
+ ADC_FIFO_REG
);
1661 data
[n
] = (msb
<< 8) | lsb
;
1667 /* analog output insn */
1668 static int labpc_ao_winsn(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
1669 struct comedi_insn
*insn
, unsigned int *data
)
1672 unsigned long flags
;
1675 channel
= CR_CHAN(insn
->chanspec
);
1677 /* turn off pacing of analog output channel */
1678 /* note: hardware bug in daqcard-1200 means pacing cannot
1679 * be independently enabled/disabled for its the two channels */
1680 spin_lock_irqsave(&dev
->spinlock
, flags
);
1681 devpriv
->command2_bits
&= ~DAC_PACED_BIT(channel
);
1682 devpriv
->write_byte(devpriv
->command2_bits
, dev
->iobase
+ COMMAND2_REG
);
1683 spin_unlock_irqrestore(&dev
->spinlock
, flags
);
1686 if (thisboard
->register_layout
== labpc_1200_layout
) {
1687 range
= CR_RANGE(insn
->chanspec
);
1688 if (range
& AO_RANGE_IS_UNIPOLAR
)
1689 devpriv
->command6_bits
|= DAC_UNIP_BIT(channel
);
1691 devpriv
->command6_bits
&= ~DAC_UNIP_BIT(channel
);
1692 /* write to register */
1693 devpriv
->write_byte(devpriv
->command6_bits
,
1694 dev
->iobase
+ COMMAND6_REG
);
1697 lsb
= data
[0] & 0xff;
1698 msb
= (data
[0] >> 8) & 0xff;
1699 devpriv
->write_byte(lsb
, dev
->iobase
+ DAC_LSB_REG(channel
));
1700 devpriv
->write_byte(msb
, dev
->iobase
+ DAC_MSB_REG(channel
));
1702 /* remember value for readback */
1703 devpriv
->ao_value
[channel
] = data
[0];
1708 /* analog output readback insn */
1709 static int labpc_ao_rinsn(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
1710 struct comedi_insn
*insn
, unsigned int *data
)
1712 data
[0] = devpriv
->ao_value
[CR_CHAN(insn
->chanspec
)];
1717 static int labpc_calib_read_insn(struct comedi_device
*dev
,
1718 struct comedi_subdevice
*s
,
1719 struct comedi_insn
*insn
, unsigned int *data
)
1721 data
[0] = devpriv
->caldac
[CR_CHAN(insn
->chanspec
)];
1726 static int labpc_calib_write_insn(struct comedi_device
*dev
,
1727 struct comedi_subdevice
*s
,
1728 struct comedi_insn
*insn
, unsigned int *data
)
1730 int channel
= CR_CHAN(insn
->chanspec
);
1732 write_caldac(dev
, channel
, data
[0]);
1736 static int labpc_eeprom_read_insn(struct comedi_device
*dev
,
1737 struct comedi_subdevice
*s
,
1738 struct comedi_insn
*insn
, unsigned int *data
)
1740 data
[0] = devpriv
->eeprom_data
[CR_CHAN(insn
->chanspec
)];
1745 static int labpc_eeprom_write_insn(struct comedi_device
*dev
,
1746 struct comedi_subdevice
*s
,
1747 struct comedi_insn
*insn
, unsigned int *data
)
1749 int channel
= CR_CHAN(insn
->chanspec
);
1752 /* only allow writes to user area of eeprom */
1753 if (channel
< 16 || channel
> 127) {
1755 ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1759 ret
= labpc_eeprom_write(dev
, channel
, data
[0]);
1766 /* utility function that suggests a dma transfer size in bytes */
1767 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd
)
1772 if (cmd
.convert_src
== TRIG_TIMER
)
1773 freq
= 1000000000 / cmd
.convert_arg
;
1774 /* return some default value */
1778 /* make buffer fill in no more than 1/3 second */
1779 size
= (freq
/ 3) * sample_size
;
1781 /* set a minimum and maximum size allowed */
1782 if (size
> dma_buffer_size
)
1783 size
= dma_buffer_size
- dma_buffer_size
% sample_size
;
1784 else if (size
< sample_size
)
1790 /* figures out what counter values to use based on command */
1791 static void labpc_adc_timing(struct comedi_device
*dev
, struct comedi_cmd
*cmd
)
1793 /* max value for 16 bit counter in mode 2 */
1794 const int max_counter_value
= 0x10000;
1795 /* min value for 16 bit counter in mode 2 */
1796 const int min_counter_value
= 2;
1797 unsigned int base_period
;
1800 * if both convert and scan triggers are TRIG_TIMER, then they
1801 * both rely on counter b0
1803 if (labpc_ai_convert_period(cmd
) && labpc_ai_scan_period(cmd
)) {
1805 * pick the lowest b0 divisor value we can (for maximum input
1806 * clock speed on convert and scan counters)
1808 devpriv
->divisor_b0
= (labpc_ai_scan_period(cmd
) - 1) /
1809 (LABPC_TIMER_BASE
* max_counter_value
) + 1;
1810 if (devpriv
->divisor_b0
< min_counter_value
)
1811 devpriv
->divisor_b0
= min_counter_value
;
1812 if (devpriv
->divisor_b0
> max_counter_value
)
1813 devpriv
->divisor_b0
= max_counter_value
;
1815 base_period
= LABPC_TIMER_BASE
* devpriv
->divisor_b0
;
1817 /* set a0 for conversion frequency and b1 for scan frequency */
1818 switch (cmd
->flags
& TRIG_ROUND_MASK
) {
1820 case TRIG_ROUND_NEAREST
:
1821 devpriv
->divisor_a0
=
1822 (labpc_ai_convert_period(cmd
) +
1823 (base_period
/ 2)) / base_period
;
1824 devpriv
->divisor_b1
=
1825 (labpc_ai_scan_period(cmd
) +
1826 (base_period
/ 2)) / base_period
;
1829 devpriv
->divisor_a0
=
1830 (labpc_ai_convert_period(cmd
) + (base_period
-
1832 devpriv
->divisor_b1
=
1833 (labpc_ai_scan_period(cmd
) + (base_period
-
1836 case TRIG_ROUND_DOWN
:
1837 devpriv
->divisor_a0
=
1838 labpc_ai_convert_period(cmd
) / base_period
;
1839 devpriv
->divisor_b1
=
1840 labpc_ai_scan_period(cmd
) / base_period
;
1843 /* make sure a0 and b1 values are acceptable */
1844 if (devpriv
->divisor_a0
< min_counter_value
)
1845 devpriv
->divisor_a0
= min_counter_value
;
1846 if (devpriv
->divisor_a0
> max_counter_value
)
1847 devpriv
->divisor_a0
= max_counter_value
;
1848 if (devpriv
->divisor_b1
< min_counter_value
)
1849 devpriv
->divisor_b1
= min_counter_value
;
1850 if (devpriv
->divisor_b1
> max_counter_value
)
1851 devpriv
->divisor_b1
= max_counter_value
;
1852 /* write corrected timings to command */
1853 labpc_set_ai_convert_period(cmd
,
1854 base_period
* devpriv
->divisor_a0
);
1855 labpc_set_ai_scan_period(cmd
,
1856 base_period
* devpriv
->divisor_b1
);
1858 * if only one TRIG_TIMER is used, we can employ the generic
1859 * cascaded timing functions
1861 } else if (labpc_ai_scan_period(cmd
)) {
1862 unsigned int scan_period
;
1864 scan_period
= labpc_ai_scan_period(cmd
);
1866 * calculate cascaded counter values
1867 * that give desired scan timing
1869 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE
,
1870 &(devpriv
->divisor_b1
),
1871 &(devpriv
->divisor_b0
),
1873 cmd
->flags
& TRIG_ROUND_MASK
);
1874 labpc_set_ai_scan_period(cmd
, scan_period
);
1875 } else if (labpc_ai_convert_period(cmd
)) {
1876 unsigned int convert_period
;
1878 convert_period
= labpc_ai_convert_period(cmd
);
1880 * calculate cascaded counter values
1881 * that give desired conversion timing
1883 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE
,
1884 &(devpriv
->divisor_a0
),
1885 &(devpriv
->divisor_b0
),
1887 cmd
->flags
& TRIG_ROUND_MASK
);
1888 labpc_set_ai_convert_period(cmd
, convert_period
);
1892 static int labpc_dio_mem_callback(int dir
, int port
, int data
,
1893 unsigned long iobase
)
1896 writeb(data
, (void *)(iobase
+ port
));
1899 return readb((void *)(iobase
+ port
));
1903 /* lowlevel write to eeprom/dac */
1904 static void labpc_serial_out(struct comedi_device
*dev
, unsigned int value
,
1905 unsigned int value_width
)
1909 for (i
= 1; i
<= value_width
; i
++) {
1910 /* clear serial clock */
1911 devpriv
->command5_bits
&= ~SCLOCK_BIT
;
1912 /* send bits most significant bit first */
1913 if (value
& (1 << (value_width
- i
)))
1914 devpriv
->command5_bits
|= SDATA_BIT
;
1916 devpriv
->command5_bits
&= ~SDATA_BIT
;
1918 devpriv
->write_byte(devpriv
->command5_bits
,
1919 dev
->iobase
+ COMMAND5_REG
);
1920 /* set clock to load bit */
1921 devpriv
->command5_bits
|= SCLOCK_BIT
;
1923 devpriv
->write_byte(devpriv
->command5_bits
,
1924 dev
->iobase
+ COMMAND5_REG
);
1928 /* lowlevel read from eeprom */
1929 static unsigned int labpc_serial_in(struct comedi_device
*dev
)
1931 unsigned int value
= 0;
1933 const int value_width
= 8; /* number of bits wide values are */
1935 for (i
= 1; i
<= value_width
; i
++) {
1936 /* set serial clock */
1937 devpriv
->command5_bits
|= SCLOCK_BIT
;
1939 devpriv
->write_byte(devpriv
->command5_bits
,
1940 dev
->iobase
+ COMMAND5_REG
);
1941 /* clear clock bit */
1942 devpriv
->command5_bits
&= ~SCLOCK_BIT
;
1944 devpriv
->write_byte(devpriv
->command5_bits
,
1945 dev
->iobase
+ COMMAND5_REG
);
1946 /* read bits most significant bit first */
1948 devpriv
->status2_bits
=
1949 devpriv
->read_byte(dev
->iobase
+ STATUS2_REG
);
1950 if (devpriv
->status2_bits
& EEPROM_OUT_BIT
)
1951 value
|= 1 << (value_width
- i
);
1957 static unsigned int labpc_eeprom_read(struct comedi_device
*dev
,
1958 unsigned int address
)
1961 /* bits to tell eeprom to expect a read */
1962 const int read_instruction
= 0x3;
1963 /* 8 bit write lengths to eeprom */
1964 const int write_length
= 8;
1966 /* enable read/write to eeprom */
1967 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
;
1969 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
1970 devpriv
->command5_bits
|= EEPROM_EN_BIT
| EEPROM_WRITE_UNPROTECT_BIT
;
1972 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
1974 /* send read instruction */
1975 labpc_serial_out(dev
, read_instruction
, write_length
);
1976 /* send 8 bit address to read from */
1977 labpc_serial_out(dev
, address
, write_length
);
1979 value
= labpc_serial_in(dev
);
1981 /* disable read/write to eeprom */
1982 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
& ~EEPROM_WRITE_UNPROTECT_BIT
;
1984 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
1989 static unsigned int labpc_eeprom_write(struct comedi_device
*dev
,
1990 unsigned int address
, unsigned int value
)
1992 const int write_enable_instruction
= 0x6;
1993 const int write_instruction
= 0x2;
1994 const int write_length
= 8; /* 8 bit write lengths to eeprom */
1995 const int write_in_progress_bit
= 0x1;
1996 const int timeout
= 10000;
1999 /* make sure there isn't already a write in progress */
2000 for (i
= 0; i
< timeout
; i
++) {
2001 if ((labpc_eeprom_read_status(dev
) & write_in_progress_bit
) ==
2006 comedi_error(dev
, "eeprom write timed out");
2009 /* update software copy of eeprom */
2010 devpriv
->eeprom_data
[address
] = value
;
2012 /* enable read/write to eeprom */
2013 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
;
2015 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2016 devpriv
->command5_bits
|= EEPROM_EN_BIT
| EEPROM_WRITE_UNPROTECT_BIT
;
2018 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2020 /* send write_enable instruction */
2021 labpc_serial_out(dev
, write_enable_instruction
, write_length
);
2022 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
;
2024 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2026 /* send write instruction */
2027 devpriv
->command5_bits
|= EEPROM_EN_BIT
;
2029 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2030 labpc_serial_out(dev
, write_instruction
, write_length
);
2031 /* send 8 bit address to write to */
2032 labpc_serial_out(dev
, address
, write_length
);
2034 labpc_serial_out(dev
, value
, write_length
);
2035 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
;
2037 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2039 /* disable read/write to eeprom */
2040 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
& ~EEPROM_WRITE_UNPROTECT_BIT
;
2042 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2047 static unsigned int labpc_eeprom_read_status(struct comedi_device
*dev
)
2050 const int read_status_instruction
= 0x5;
2051 const int write_length
= 8; /* 8 bit write lengths to eeprom */
2053 /* enable read/write to eeprom */
2054 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
;
2056 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2057 devpriv
->command5_bits
|= EEPROM_EN_BIT
| EEPROM_WRITE_UNPROTECT_BIT
;
2059 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2061 /* send read status instruction */
2062 labpc_serial_out(dev
, read_status_instruction
, write_length
);
2064 value
= labpc_serial_in(dev
);
2066 /* disable read/write to eeprom */
2067 devpriv
->command5_bits
&= ~EEPROM_EN_BIT
& ~EEPROM_WRITE_UNPROTECT_BIT
;
2069 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2074 /* writes to 8 bit calibration dacs */
2075 static void write_caldac(struct comedi_device
*dev
, unsigned int channel
,
2078 if (value
== devpriv
->caldac
[channel
])
2080 devpriv
->caldac
[channel
] = value
;
2082 /* clear caldac load bit and make sure we don't write to eeprom */
2083 devpriv
->command5_bits
&=
2084 ~CALDAC_LOAD_BIT
& ~EEPROM_EN_BIT
& ~EEPROM_WRITE_UNPROTECT_BIT
;
2086 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2088 /* write 4 bit channel */
2089 labpc_serial_out(dev
, channel
, 4);
2090 /* write 8 bit caldac value */
2091 labpc_serial_out(dev
, value
, 8);
2093 /* set and clear caldac bit to load caldac value */
2094 devpriv
->command5_bits
|= CALDAC_LOAD_BIT
;
2096 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2097 devpriv
->command5_bits
&= ~CALDAC_LOAD_BIT
;
2099 devpriv
->write_byte(devpriv
->command5_bits
, dev
->iobase
+ COMMAND5_REG
);
2102 #ifdef CONFIG_COMEDI_PCI
2103 static int __devinit
driver_labpc_pci_probe(struct pci_dev
*dev
,
2104 const struct pci_device_id
*ent
)
2106 return comedi_pci_auto_config(dev
, driver_labpc
.driver_name
);
2109 static void __devexit
driver_labpc_pci_remove(struct pci_dev
*dev
)
2111 comedi_pci_auto_unconfig(dev
);
2114 static struct pci_driver driver_labpc_pci_driver
= {
2115 .id_table
= labpc_pci_table
,
2116 .probe
= &driver_labpc_pci_probe
,
2117 .remove
= __devexit_p(&driver_labpc_pci_remove
)
2120 static int __init
driver_labpc_init_module(void)
2124 retval
= comedi_driver_register(&driver_labpc
);
2128 driver_labpc_pci_driver
.name
= (char *)driver_labpc
.driver_name
;
2129 return pci_register_driver(&driver_labpc_pci_driver
);
2132 static void __exit
driver_labpc_cleanup_module(void)
2134 pci_unregister_driver(&driver_labpc_pci_driver
);
2135 comedi_driver_unregister(&driver_labpc
);
2138 module_init(driver_labpc_init_module
);
2139 module_exit(driver_labpc_cleanup_module
);
2141 static int __init
driver_labpc_init_module(void)
2143 return comedi_driver_register(&driver_labpc
);
2146 static void __exit
driver_labpc_cleanup_module(void)
2148 comedi_driver_unregister(&driver_labpc
);
2151 module_init(driver_labpc_init_module
);
2152 module_exit(driver_labpc_cleanup_module
);
2155 EXPORT_SYMBOL_GPL(labpc_common_attach
);
2156 EXPORT_SYMBOL_GPL(labpc_common_detach
);
2157 EXPORT_SYMBOL_GPL(range_labpc_1200_ai
);
2158 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits
);
2159 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar
);
2161 MODULE_AUTHOR("Comedi http://www.comedi.org");
2162 MODULE_DESCRIPTION("Comedi low-level driver");
2163 MODULE_LICENSE("GPL");