2 comedi/drivers/ni_6514.c
3 driver for National Instruments PCI-6514
5 Copyright (C) 2006 Jon Grierson <jd@renko.co.uk>
6 Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
8 COMEDI - Linux Control and Measurement Device Interface
9 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 Description: National Instruments 65xx static dio boards
29 Author: Jon Grierson <jd@renko.co.uk>, Frank Mori Hess <fmhess@users.sourceforge.net>
31 Devices: [National Instruments] PCI-6509 (ni_65xx), PXI-6509, PCI-6510, PCI-6511,
32 PXI-6511, PCI-6512, PXI-6512, PCI-6513, PXI-6513, PCI-6514, PXI-6514, PCI-6515,
33 PXI-6515, PCI-6516, PCI-6517, PCI-6518, PCI-6519, PCI-6520, PCI-6521, PXI-6521,
35 Updated: Wed Oct 18 08:59:11 EDT 2006
37 Based on the PCI-6527 driver by ds.
38 The interrupt subdevice (subdevice 3) is probably broken for all boards
39 except maybe the 6514.
44 Manuals (available from ftp://ftp.natinst.com/support/manuals)
46 370106b.pdf 6514 Register Level Programmer Manual
53 #include "../comedidev.h"
57 #define NI6514_DIO_SIZE 4096
58 #define NI6514_MITE_SIZE 4096
60 #define NI_65XX_MAX_NUM_PORTS 12
61 static const unsigned ni_65xx_channels_per_port
= 8;
62 static const unsigned ni_65xx_port_offset
= 0x10;
64 static inline unsigned Port_Data(unsigned port
)
66 return 0x40 + port
* ni_65xx_port_offset
;
68 static inline unsigned Port_Select(unsigned port
)
70 return 0x41 + port
* ni_65xx_port_offset
;
72 static inline unsigned Rising_Edge_Detection_Enable(unsigned port
)
74 return 0x42 + port
* ni_65xx_port_offset
;
76 static inline unsigned Falling_Edge_Detection_Enable(unsigned port
)
78 return 0x43 + port
* ni_65xx_port_offset
;
80 static inline unsigned Filter_Enable(unsigned port
)
82 return 0x44 + port
* ni_65xx_port_offset
;
85 #define ID_Register 0x00
87 #define Clear_Register 0x01
89 #define ClrOverflow 0x04
91 #define Filter_Interval 0x08
93 #define Change_Status 0x02
94 #define MasterInterruptStatus 0x04
96 #define EdgeStatus 0x01
98 #define Master_Interrupt_Control 0x03
99 #define FallingEdgeIntEnable 0x10
100 #define RisingEdgeIntEnable 0x08
101 #define MasterInterruptEnable 0x04
102 #define OverflowIntEnable 0x02
103 #define EdgeIntEnable 0x01
105 static int ni_65xx_attach(struct comedi_device
* dev
, struct comedi_devconfig
* it
);
106 static int ni_65xx_detach(struct comedi_device
* dev
);
107 static struct comedi_driver driver_ni_65xx
= {
108 driver_name
:"ni_65xx",
110 attach
:ni_65xx_attach
,
111 detach
:ni_65xx_detach
,
117 unsigned num_dio_ports
;
118 unsigned num_di_ports
;
119 unsigned num_do_ports
;
120 unsigned invert_outputs
:1;
122 static const ni_65xx_board ni_65xx_boards
[] = {
241 #define n_ni_65xx_boards (sizeof(ni_65xx_boards)/sizeof(ni_65xx_boards[0]))
242 static inline const ni_65xx_board
*board(struct comedi_device
* dev
)
244 return dev
->board_ptr
;
246 static inline unsigned ni_65xx_port_by_channel(unsigned channel
)
248 return channel
/ ni_65xx_channels_per_port
;
250 static inline unsigned ni_65xx_total_num_ports(const ni_65xx_board
* board
)
252 return board
->num_dio_ports
+ board
->num_di_ports
+ board
->num_do_ports
;
255 static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table
) = {
256 {PCI_VENDOR_ID_NATINST
, 0x1710, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
257 {PCI_VENDOR_ID_NATINST
, 0x7085, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
258 {PCI_VENDOR_ID_NATINST
, 0x7086, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
259 {PCI_VENDOR_ID_NATINST
, 0x7087, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
260 {PCI_VENDOR_ID_NATINST
, 0x7088, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
261 {PCI_VENDOR_ID_NATINST
, 0x70a9, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
262 {PCI_VENDOR_ID_NATINST
, 0x70c3, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
263 {PCI_VENDOR_ID_NATINST
, 0x70c8, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
264 {PCI_VENDOR_ID_NATINST
, 0x70c9, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
265 {PCI_VENDOR_ID_NATINST
, 0x70cc, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
266 {PCI_VENDOR_ID_NATINST
, 0x70CD, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
267 {PCI_VENDOR_ID_NATINST
, 0x70d1, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
268 {PCI_VENDOR_ID_NATINST
, 0x70d2, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
269 {PCI_VENDOR_ID_NATINST
, 0x70d3, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
270 {PCI_VENDOR_ID_NATINST
, 0x7124, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
271 {PCI_VENDOR_ID_NATINST
, 0x7125, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
272 {PCI_VENDOR_ID_NATINST
, 0x7126, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
273 {PCI_VENDOR_ID_NATINST
, 0x7127, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
274 {PCI_VENDOR_ID_NATINST
, 0x7128, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
275 {PCI_VENDOR_ID_NATINST
, 0x718b, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
276 {PCI_VENDOR_ID_NATINST
, 0x718c, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
277 {PCI_VENDOR_ID_NATINST
, 0x71c5, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
281 MODULE_DEVICE_TABLE(pci
, ni_65xx_pci_table
);
284 struct mite_struct
*mite
;
285 unsigned int filter_interval
;
286 unsigned short filter_enable
[NI_65XX_MAX_NUM_PORTS
];
287 unsigned short output_bits
[NI_65XX_MAX_NUM_PORTS
];
288 unsigned short dio_direction
[NI_65XX_MAX_NUM_PORTS
];
290 static inline ni_65xx_private
*private(struct comedi_device
* dev
)
297 } ni_65xx_subdevice_private
;
298 static inline ni_65xx_subdevice_private
*sprivate(struct comedi_subdevice
* subdev
)
300 return subdev
->private;
302 static ni_65xx_subdevice_private
*ni_65xx_alloc_subdevice_private(void)
304 ni_65xx_subdevice_private
*subdev_private
=
305 kzalloc(sizeof(ni_65xx_subdevice_private
), GFP_KERNEL
);
306 if (subdev_private
== NULL
)
308 return subdev_private
;
311 static int ni_65xx_find_device(struct comedi_device
* dev
, int bus
, int slot
);
313 static int ni_65xx_config_filter(struct comedi_device
* dev
, struct comedi_subdevice
* s
,
314 struct comedi_insn
* insn
, unsigned int * data
)
316 const unsigned chan
= CR_CHAN(insn
->chanspec
);
317 const unsigned port
=
318 sprivate(s
)->base_port
+ ni_65xx_port_by_channel(chan
);
320 if (data
[0] != INSN_CONFIG_FILTER
)
323 static const unsigned filter_resolution_ns
= 200;
324 static const unsigned max_filter_interval
= 0xfffff;
327 (filter_resolution_ns
/ 2)) / filter_resolution_ns
;
328 if (interval
> max_filter_interval
)
329 interval
= max_filter_interval
;
330 data
[1] = interval
* filter_resolution_ns
;
332 if (interval
!= private(dev
)->filter_interval
) {
334 private(dev
)->mite
->daq_io_addr
+
336 private(dev
)->filter_interval
= interval
;
339 private(dev
)->filter_enable
[port
] |=
340 1 << (chan
% ni_65xx_channels_per_port
);
342 private(dev
)->filter_enable
[port
] &=
343 ~(1 << (chan
% ni_65xx_channels_per_port
));
346 writeb(private(dev
)->filter_enable
[port
],
347 private(dev
)->mite
->daq_io_addr
+ Filter_Enable(port
));
352 static int ni_65xx_dio_insn_config(struct comedi_device
* dev
, struct comedi_subdevice
* s
,
353 struct comedi_insn
* insn
, unsigned int * data
)
359 port
= sprivate(s
)->base_port
+
360 ni_65xx_port_by_channel(CR_CHAN(insn
->chanspec
));
362 case INSN_CONFIG_FILTER
:
363 return ni_65xx_config_filter(dev
, s
, insn
, data
);
365 case INSN_CONFIG_DIO_OUTPUT
:
366 if (s
->type
!= COMEDI_SUBD_DIO
)
368 private(dev
)->dio_direction
[port
] = COMEDI_OUTPUT
;
369 writeb(0, private(dev
)->mite
->daq_io_addr
+ Port_Select(port
));
372 case INSN_CONFIG_DIO_INPUT
:
373 if (s
->type
!= COMEDI_SUBD_DIO
)
375 private(dev
)->dio_direction
[port
] = COMEDI_INPUT
;
376 writeb(1, private(dev
)->mite
->daq_io_addr
+ Port_Select(port
));
379 case INSN_CONFIG_DIO_QUERY
:
380 if (s
->type
!= COMEDI_SUBD_DIO
)
382 data
[1] = private(dev
)->dio_direction
[port
];
391 static int ni_65xx_dio_insn_bits(struct comedi_device
* dev
, struct comedi_subdevice
* s
,
392 struct comedi_insn
* insn
, unsigned int * data
)
394 unsigned base_bitfield_channel
;
395 const unsigned max_ports_per_bitfield
= 5;
396 unsigned read_bits
= 0;
400 base_bitfield_channel
= CR_CHAN(insn
->chanspec
);
401 for (j
= 0; j
< max_ports_per_bitfield
; ++j
) {
402 const unsigned port
=
403 sprivate(s
)->base_port
+
404 ni_65xx_port_by_channel(base_bitfield_channel
) + j
;
405 unsigned base_port_channel
;
406 unsigned port_mask
, port_data
, port_read_bits
;
408 if (port
>= ni_65xx_total_num_ports(board(dev
)))
410 base_port_channel
= port
* ni_65xx_channels_per_port
;
413 bitshift
= base_port_channel
- base_bitfield_channel
;
414 if (bitshift
>= 32 || bitshift
<= -32)
417 port_mask
>>= bitshift
;
418 port_data
>>= bitshift
;
420 port_mask
<<= -bitshift
;
421 port_data
<<= -bitshift
;
427 private(dev
)->output_bits
[port
] &= ~port_mask
;
428 private(dev
)->output_bits
[port
] |=
429 port_data
& port_mask
;
430 bits
= private(dev
)->output_bits
[port
];
431 if (board(dev
)->invert_outputs
)
434 private(dev
)->mite
->daq_io_addr
+
436 // rt_printk("wrote 0x%x to port %i\n", bits, port);
439 readb(private(dev
)->mite
->daq_io_addr
+
441 // rt_printk("read 0x%x from port %i\n", port_read_bits, port);
443 port_read_bits
<<= bitshift
;
445 port_read_bits
>>= -bitshift
;
447 read_bits
|= port_read_bits
;
453 static irqreturn_t
ni_65xx_interrupt(int irq
, void *d PT_REGS_ARG
)
455 struct comedi_device
*dev
= d
;
456 struct comedi_subdevice
*s
= dev
->subdevices
+ 2;
459 status
= readb(private(dev
)->mite
->daq_io_addr
+ Change_Status
);
460 if ((status
& MasterInterruptStatus
) == 0)
462 if ((status
& EdgeStatus
) == 0)
465 writeb(ClrEdge
| ClrOverflow
,
466 private(dev
)->mite
->daq_io_addr
+ Clear_Register
);
468 comedi_buf_put(s
->async
, 0);
469 s
->async
->events
|= COMEDI_CB_EOS
;
470 comedi_event(dev
, s
);
474 static int ni_65xx_intr_cmdtest(struct comedi_device
* dev
, struct comedi_subdevice
* s
,
475 struct comedi_cmd
* cmd
)
480 /* step 1: make sure trigger sources are trivially valid */
482 tmp
= cmd
->start_src
;
483 cmd
->start_src
&= TRIG_NOW
;
484 if (!cmd
->start_src
|| tmp
!= cmd
->start_src
)
487 tmp
= cmd
->scan_begin_src
;
488 cmd
->scan_begin_src
&= TRIG_OTHER
;
489 if (!cmd
->scan_begin_src
|| tmp
!= cmd
->scan_begin_src
)
492 tmp
= cmd
->convert_src
;
493 cmd
->convert_src
&= TRIG_FOLLOW
;
494 if (!cmd
->convert_src
|| tmp
!= cmd
->convert_src
)
497 tmp
= cmd
->scan_end_src
;
498 cmd
->scan_end_src
&= TRIG_COUNT
;
499 if (!cmd
->scan_end_src
|| tmp
!= cmd
->scan_end_src
)
503 cmd
->stop_src
&= TRIG_COUNT
;
504 if (!cmd
->stop_src
|| tmp
!= cmd
->stop_src
)
510 /* step 2: make sure trigger sources are unique and mutually compatible */
515 /* step 3: make sure arguments are trivially compatible */
517 if (cmd
->start_arg
!= 0) {
521 if (cmd
->scan_begin_arg
!= 0) {
522 cmd
->scan_begin_arg
= 0;
525 if (cmd
->convert_arg
!= 0) {
526 cmd
->convert_arg
= 0;
530 if (cmd
->scan_end_arg
!= 1) {
531 cmd
->scan_end_arg
= 1;
534 if (cmd
->stop_arg
!= 0) {
542 /* step 4: fix up any arguments */
550 static int ni_65xx_intr_cmd(struct comedi_device
* dev
, struct comedi_subdevice
* s
)
552 //struct comedi_cmd *cmd = &s->async->cmd;
554 writeb(ClrEdge
| ClrOverflow
,
555 private(dev
)->mite
->daq_io_addr
+ Clear_Register
);
556 writeb(FallingEdgeIntEnable
| RisingEdgeIntEnable
|
557 MasterInterruptEnable
| EdgeIntEnable
,
558 private(dev
)->mite
->daq_io_addr
+ Master_Interrupt_Control
);
563 static int ni_65xx_intr_cancel(struct comedi_device
* dev
, struct comedi_subdevice
* s
)
566 private(dev
)->mite
->daq_io_addr
+ Master_Interrupt_Control
);
571 static int ni_65xx_intr_insn_bits(struct comedi_device
* dev
, struct comedi_subdevice
* s
,
572 struct comedi_insn
* insn
, unsigned int * data
)
581 static int ni_65xx_intr_insn_config(struct comedi_device
* dev
, struct comedi_subdevice
* s
,
582 struct comedi_insn
* insn
, unsigned int * data
)
586 if (data
[0] != INSN_CONFIG_CHANGE_NOTIFY
)
590 private(dev
)->mite
->daq_io_addr
+
591 Rising_Edge_Detection_Enable(0));
593 private(dev
)->mite
->daq_io_addr
+
594 Rising_Edge_Detection_Enable(0x10));
595 writeb(data
[1] >> 16,
596 private(dev
)->mite
->daq_io_addr
+
597 Rising_Edge_Detection_Enable(0x20));
598 writeb(data
[1] >> 24,
599 private(dev
)->mite
->daq_io_addr
+
600 Rising_Edge_Detection_Enable(0x30));
603 private(dev
)->mite
->daq_io_addr
+
604 Falling_Edge_Detection_Enable(0));
606 private(dev
)->mite
->daq_io_addr
+
607 Falling_Edge_Detection_Enable(0x10));
608 writeb(data
[2] >> 16,
609 private(dev
)->mite
->daq_io_addr
+
610 Falling_Edge_Detection_Enable(0x20));
611 writeb(data
[2] >> 24,
612 private(dev
)->mite
->daq_io_addr
+
613 Falling_Edge_Detection_Enable(0x30));
618 static int ni_65xx_attach(struct comedi_device
* dev
, struct comedi_devconfig
* it
)
620 struct comedi_subdevice
*s
;
624 printk("comedi%d: ni_65xx:", dev
->minor
);
626 if ((ret
= alloc_private(dev
, sizeof(ni_65xx_private
))) < 0)
629 ret
= ni_65xx_find_device(dev
, it
->options
[0], it
->options
[1]);
633 ret
= mite_setup(private(dev
)->mite
);
635 printk("error setting up mite\n");
639 dev
->board_name
= board(dev
)->name
;
640 dev
->irq
= mite_irq(private(dev
)->mite
);
641 printk(" %s", dev
->board_name
);
644 readb(private(dev
)->mite
->daq_io_addr
+ ID_Register
));
646 if ((ret
= alloc_subdevices(dev
, 4)) < 0)
649 s
= dev
->subdevices
+ 0;
650 if (board(dev
)->num_di_ports
) {
651 s
->type
= COMEDI_SUBD_DI
;
652 s
->subdev_flags
= SDF_READABLE
;
654 board(dev
)->num_di_ports
* ni_65xx_channels_per_port
;
655 s
->range_table
= &range_digital
;
657 s
->insn_config
= ni_65xx_dio_insn_config
;
658 s
->insn_bits
= ni_65xx_dio_insn_bits
;
659 s
->private = ni_65xx_alloc_subdevice_private();
660 if (s
->private == NULL
)
662 sprivate(s
)->base_port
= 0;
664 s
->type
= COMEDI_SUBD_UNUSED
;
667 s
= dev
->subdevices
+ 1;
668 if (board(dev
)->num_do_ports
) {
669 s
->type
= COMEDI_SUBD_DO
;
670 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
672 board(dev
)->num_do_ports
* ni_65xx_channels_per_port
;
673 s
->range_table
= &range_digital
;
675 s
->insn_bits
= ni_65xx_dio_insn_bits
;
676 s
->private = ni_65xx_alloc_subdevice_private();
677 if (s
->private == NULL
)
679 sprivate(s
)->base_port
= board(dev
)->num_di_ports
;
681 s
->type
= COMEDI_SUBD_UNUSED
;
684 s
= dev
->subdevices
+ 2;
685 if (board(dev
)->num_dio_ports
) {
686 s
->type
= COMEDI_SUBD_DIO
;
687 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
689 board(dev
)->num_dio_ports
* ni_65xx_channels_per_port
;
690 s
->range_table
= &range_digital
;
692 s
->insn_config
= ni_65xx_dio_insn_config
;
693 s
->insn_bits
= ni_65xx_dio_insn_bits
;
694 s
->private = ni_65xx_alloc_subdevice_private();
695 if (s
->private == NULL
)
697 sprivate(s
)->base_port
= 0;
698 for (i
= 0; i
< board(dev
)->num_dio_ports
; ++i
) {
699 // configure all ports for input
701 private(dev
)->mite
->daq_io_addr
+
705 s
->type
= COMEDI_SUBD_UNUSED
;
708 s
= dev
->subdevices
+ 3;
709 dev
->read_subdev
= s
;
710 s
->type
= COMEDI_SUBD_DI
;
711 s
->subdev_flags
= SDF_READABLE
| SDF_CMD_READ
;
713 s
->range_table
= &range_unknown
;
715 s
->do_cmdtest
= ni_65xx_intr_cmdtest
;
716 s
->do_cmd
= ni_65xx_intr_cmd
;
717 s
->cancel
= ni_65xx_intr_cancel
;
718 s
->insn_bits
= ni_65xx_intr_insn_bits
;
719 s
->insn_config
= ni_65xx_intr_insn_config
;
721 for (i
= 0; i
< ni_65xx_total_num_ports(board(dev
)); ++i
) {
723 private(dev
)->mite
->daq_io_addr
+ Filter_Enable(i
));
724 if (board(dev
)->invert_outputs
)
726 private(dev
)->mite
->daq_io_addr
+ Port_Data(i
));
729 private(dev
)->mite
->daq_io_addr
+ Port_Data(i
));
731 writeb(ClrEdge
| ClrOverflow
,
732 private(dev
)->mite
->daq_io_addr
+ Clear_Register
);
734 private(dev
)->mite
->daq_io_addr
+ Master_Interrupt_Control
);
736 /* Set filter interval to 0 (32bit reg) */
737 writeb(0x00000000, private(dev
)->mite
->daq_io_addr
+ Filter_Interval
);
739 ret
= comedi_request_irq(dev
->irq
, ni_65xx_interrupt
, IRQF_SHARED
,
743 printk(" irq not available");
751 static int ni_65xx_detach(struct comedi_device
* dev
)
753 if (private(dev
) && private(dev
)->mite
754 && private(dev
)->mite
->daq_io_addr
) {
756 private(dev
)->mite
->daq_io_addr
+
757 Master_Interrupt_Control
);
761 comedi_free_irq(dev
->irq
, dev
);
766 for (i
= 0; i
< dev
->n_subdevices
; ++i
) {
767 if (dev
->subdevices
[i
].private) {
768 kfree(dev
->subdevices
[i
].private);
769 dev
->subdevices
[i
].private = NULL
;
772 if (private(dev
)->mite
) {
773 mite_unsetup(private(dev
)->mite
);
779 static int ni_65xx_find_device(struct comedi_device
* dev
, int bus
, int slot
)
781 struct mite_struct
*mite
;
784 for (mite
= mite_devices
; mite
; mite
= mite
->next
) {
788 if (bus
!= mite
->pcidev
->bus
->number
||
789 slot
!= PCI_SLOT(mite
->pcidev
->devfn
))
792 for (i
= 0; i
< n_ni_65xx_boards
; i
++) {
793 if (mite_device_id(mite
) == ni_65xx_boards
[i
].dev_id
) {
794 dev
->board_ptr
= ni_65xx_boards
+ i
;
795 private(dev
)->mite
= mite
;
800 printk("no device found\n");
805 COMEDI_PCI_INITCLEANUP(driver_ni_65xx
, ni_65xx_pci_table
);