drivers/staging/comedi/drivers/multiq3.c

   1 /*
   2    comedi/drivers/multiq3.c
   3    Hardware driver for Quanser Consulting MultiQ-3 board
   4
   5    COMEDI - Linux Control and Measurement Device Interface
   6    Copyright (C) 1999 Anders Blomdell <anders.blomdell@control.lth.se>
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21
  22  */
  23 /*
  24 Driver: multiq3
  25 Description: Quanser Consulting MultiQ-3
  26 Author: Anders Blomdell <anders.blomdell@control.lth.se>
  27 Status: works
  28 Devices: [Quanser Consulting] MultiQ-3 (multiq3)
  29
  30 */
  31
  32 #include <linux/interrupt.h>
  33 #include "../comedidev.h"
  34
  35 #include <linux/ioport.h>
  36
  37 #define MULTIQ3_SIZE 16
  38
  39 /*
  40  * MULTIQ-3 port offsets
  41  */
  42 #define MULTIQ3_DIGIN_PORT 0
  43 #define MULTIQ3_DIGOUT_PORT 0
  44 #define MULTIQ3_DAC_DATA 2
  45 #define MULTIQ3_AD_DATA 4
  46 #define MULTIQ3_AD_CS 4
  47 #define MULTIQ3_STATUS 6
  48 #define MULTIQ3_CONTROL 6
  49 #define MULTIQ3_CLK_DATA 8
  50 #define MULTIQ3_ENC_DATA 12
  51 #define MULTIQ3_ENC_CONTROL 14
  52
  53 /*
  54  * flags for CONTROL register
  55  */
  56 #define MULTIQ3_AD_MUX_EN      0x0040
  57 #define MULTIQ3_AD_AUTOZ       0x0080
  58 #define MULTIQ3_AD_AUTOCAL     0x0100
  59 #define MULTIQ3_AD_SH          0x0200
  60 #define MULTIQ3_AD_CLOCK_4M    0x0400
  61 #define MULTIQ3_DA_LOAD                0x1800
  62
  63 #define MULTIQ3_CONTROL_MUST    0x0600
  64
  65 /*
  66  * flags for STATUS register
  67  */
  68 #define MULTIQ3_STATUS_EOC      0x008
  69 #define MULTIQ3_STATUS_EOC_I    0x010
  70
  71 /*
  72  * flags for encoder control
  73  */
  74 #define MULTIQ3_CLOCK_DATA      0x00
  75 #define MULTIQ3_CLOCK_SETUP     0x18
  76 #define MULTIQ3_INPUT_SETUP     0x41
  77 #define MULTIQ3_QUAD_X4         0x38
  78 #define MULTIQ3_BP_RESET        0x01
  79 #define MULTIQ3_CNTR_RESET      0x02
  80 #define MULTIQ3_TRSFRPR_CTR     0x08
  81 #define MULTIQ3_TRSFRCNTR_OL    0x10
  82 #define MULTIQ3_EFLAG_RESET     0x06
  83
  84 #define MULTIQ3_TIMEOUT 30
  85
  86 struct multiq3_private {
  87         unsigned int ao_readback[2];
  88 };
  89
  90 static int multiq3_ai_insn_read(struct comedi_device *dev,
  91                                 struct comedi_subdevice *s,
  92                                 struct comedi_insn *insn, unsigned int *data)
  93 {
  94         int i, n;
  95         int chan;
  96         unsigned int hi, lo;
  97
  98         chan = CR_CHAN(insn->chanspec);
  99         outw(MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3),
 100              dev->iobase + MULTIQ3_CONTROL);
 101
 102         for (i = 0; i < MULTIQ3_TIMEOUT; i++) {
 103                 if (inw(dev->iobase + MULTIQ3_STATUS) & MULTIQ3_STATUS_EOC)
 104                         break;
 105         }
 106         if (i == MULTIQ3_TIMEOUT)
 107                 return -ETIMEDOUT;
 108
 109         for (n = 0; n < insn->n; n++) {
 110                 outw(0, dev->iobase + MULTIQ3_AD_CS);
 111                 for (i = 0; i < MULTIQ3_TIMEOUT; i++) {
 112                         if (inw(dev->iobase +
 113                                 MULTIQ3_STATUS) & MULTIQ3_STATUS_EOC_I)
 114                                 break;
 115                 }
 116                 if (i == MULTIQ3_TIMEOUT)
 117                         return -ETIMEDOUT;
 118
 119                 hi = inb(dev->iobase + MULTIQ3_AD_CS);
 120                 lo = inb(dev->iobase + MULTIQ3_AD_CS);
 121                 data[n] = (((hi << 8) | lo) + 0x1000) & 0x1fff;
 122         }
 123
 124         return n;
 125 }
 126
 127 static int multiq3_ao_insn_read(struct comedi_device *dev,
 128                                 struct comedi_subdevice *s,
 129                                 struct comedi_insn *insn, unsigned int *data)
 130 {
 131         struct multiq3_private *devpriv = dev->private;
 132         int i;
 133         int chan = CR_CHAN(insn->chanspec);
 134
 135         for (i = 0; i < insn->n; i++)
 136                 data[i] = devpriv->ao_readback[chan];
 137
 138         return i;
 139 }
 140
 141 static int multiq3_ao_insn_write(struct comedi_device *dev,
 142                                  struct comedi_subdevice *s,
 143                                  struct comedi_insn *insn, unsigned int *data)
 144 {
 145         struct multiq3_private *devpriv = dev->private;
 146         int i;
 147         int chan = CR_CHAN(insn->chanspec);
 148
 149         for (i = 0; i < insn->n; i++) {
 150                 outw(MULTIQ3_CONTROL_MUST | MULTIQ3_DA_LOAD | chan,
 151                      dev->iobase + MULTIQ3_CONTROL);
 152                 outw(data[i], dev->iobase + MULTIQ3_DAC_DATA);
 153                 outw(MULTIQ3_CONTROL_MUST, dev->iobase + MULTIQ3_CONTROL);
 154
 155                 devpriv->ao_readback[chan] = data[i];
 156         }
 157
 158         return i;
 159 }
 160
 161 static int multiq3_di_insn_bits(struct comedi_device *dev,
 162                                 struct comedi_subdevice *s,
 163                                 struct comedi_insn *insn, unsigned int *data)
 164 {
 165         data[1] = inw(dev->iobase + MULTIQ3_DIGIN_PORT);
 166
 167         return insn->n;
 168 }
 169
 170 static int multiq3_do_insn_bits(struct comedi_device *dev,
 171                                 struct comedi_subdevice *s,
 172                                 struct comedi_insn *insn, unsigned int *data)
 173 {
 174         s->state &= ~data[0];
 175         s->state |= (data[0] & data[1]);
 176         outw(s->state, dev->iobase + MULTIQ3_DIGOUT_PORT);
 177
 178         data[1] = s->state;
 179
 180         return insn->n;
 181 }
 182
 183 static int multiq3_encoder_insn_read(struct comedi_device *dev,
 184                                      struct comedi_subdevice *s,
 185                                      struct comedi_insn *insn,
 186                                      unsigned int *data)
 187 {
 188         int n;
 189         int chan = CR_CHAN(insn->chanspec);
 190         int control = MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3);
 191
 192         for (n = 0; n < insn->n; n++) {
 193                 int value;
 194                 outw(control, dev->iobase + MULTIQ3_CONTROL);
 195                 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
 196                 outb(MULTIQ3_TRSFRCNTR_OL, dev->iobase + MULTIQ3_ENC_CONTROL);
 197                 value = inb(dev->iobase + MULTIQ3_ENC_DATA);
 198                 value |= (inb(dev->iobase + MULTIQ3_ENC_DATA) << 8);
 199                 value |= (inb(dev->iobase + MULTIQ3_ENC_DATA) << 16);
 200                 data[n] = (value + 0x800000) & 0xffffff;
 201         }
 202
 203         return n;
 204 }
 205
 206 static void encoder_reset(struct comedi_device *dev)
 207 {
 208         struct comedi_subdevice *s = &dev->subdevices[4];
 209         int chan;
 210
 211         for (chan = 0; chan < s->n_chan; chan++) {
 212                 int control =
 213                     MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3);
 214                 outw(control, dev->iobase + MULTIQ3_CONTROL);
 215                 outb(MULTIQ3_EFLAG_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
 216                 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
 217                 outb(MULTIQ3_CLOCK_DATA, dev->iobase + MULTIQ3_ENC_DATA);
 218                 outb(MULTIQ3_CLOCK_SETUP, dev->iobase + MULTIQ3_ENC_CONTROL);
 219                 outb(MULTIQ3_INPUT_SETUP, dev->iobase + MULTIQ3_ENC_CONTROL);
 220                 outb(MULTIQ3_QUAD_X4, dev->iobase + MULTIQ3_ENC_CONTROL);
 221                 outb(MULTIQ3_CNTR_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
 222         }
 223 }
 224
 225 static int multiq3_attach(struct comedi_device *dev,
 226                           struct comedi_devconfig *it)
 227 {
 228         struct multiq3_private *devpriv;
 229         struct comedi_subdevice *s;
 230         int ret;
 231
 232         ret = comedi_request_region(dev, it->options[0], MULTIQ3_SIZE);
 233         if (ret)
 234                 return ret;
 235
 236         ret = comedi_alloc_subdevices(dev, 5);
 237         if (ret)
 238                 return ret;
 239
 240         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
 241         if (!devpriv)
 242                 return -ENOMEM;
 243         dev->private = devpriv;
 244
 245         s = &dev->subdevices[0];
 246         /* ai subdevice */
 247         s->type = COMEDI_SUBD_AI;
 248         s->subdev_flags = SDF_READABLE | SDF_GROUND;
 249         s->n_chan = 8;
 250         s->insn_read = multiq3_ai_insn_read;
 251         s->maxdata = 0x1fff;
 252         s->range_table = &range_bipolar5;
 253
 254         s = &dev->subdevices[1];
 255         /* ao subdevice */
 256         s->type = COMEDI_SUBD_AO;
 257         s->subdev_flags = SDF_WRITABLE;
 258         s->n_chan = 8;
 259         s->insn_read = multiq3_ao_insn_read;
 260         s->insn_write = multiq3_ao_insn_write;
 261         s->maxdata = 0xfff;
 262         s->range_table = &range_bipolar5;
 263
 264         s = &dev->subdevices[2];
 265         /* di subdevice */
 266         s->type = COMEDI_SUBD_DI;
 267         s->subdev_flags = SDF_READABLE;
 268         s->n_chan = 16;
 269         s->insn_bits = multiq3_di_insn_bits;
 270         s->maxdata = 1;
 271         s->range_table = &range_digital;
 272
 273         s = &dev->subdevices[3];
 274         /* do subdevice */
 275         s->type = COMEDI_SUBD_DO;
 276         s->subdev_flags = SDF_WRITABLE;
 277         s->n_chan = 16;
 278         s->insn_bits = multiq3_do_insn_bits;
 279         s->maxdata = 1;
 280         s->range_table = &range_digital;
 281         s->state = 0;
 282
 283         s = &dev->subdevices[4];
 284         /* encoder (counter) subdevice */
 285         s->type = COMEDI_SUBD_COUNTER;
 286         s->subdev_flags = SDF_READABLE | SDF_LSAMPL;
 287         s->n_chan = it->options[2] * 2;
 288         s->insn_read = multiq3_encoder_insn_read;
 289         s->maxdata = 0xffffff;
 290         s->range_table = &range_unknown;
 291
 292         encoder_reset(dev);
 293
 294         return 0;
 295 }
 296
 297 static struct comedi_driver multiq3_driver = {
 298         .driver_name    = "multiq3",
 299         .module         = THIS_MODULE,
 300         .attach         = multiq3_attach,
 301         .detach         = comedi_legacy_detach,
 302 };
 303 module_comedi_driver(multiq3_driver);
 304
 305 MODULE_AUTHOR("Comedi http://www.comedi.org");
 306 MODULE_DESCRIPTION("Comedi low-level driver");
 307 MODULE_LICENSE("GPL");