2 comedi/drivers/me4000.c
3 Source code for the Meilhaus ME-4000 board family.
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Description: Meilhaus ME-4000 series boards
26 Devices: [Meilhaus] ME-4650 (me4000), ME-4670i, ME-4680, ME-4680i, ME-4680is
27 Author: gg (Guenter Gebhardt <g.gebhardt@meilhaus.com>)
28 Updated: Mon, 18 Mar 2002 15:34:01 -0800
29 Status: broken (no support for loading firmware)
38 Configuration Options:
40 [0] - PCI bus number (optional)
41 [1] - PCI slot number (optional)
43 If bus/slot is not specified, the first available PCI
46 The firmware required by these boards is available in the
47 comedi_nonfree_firmware tarball available from
48 http://www.comedi.org. However, the driver's support for
49 loading the firmware through comedi_config is currently
54 #include <linux/interrupt.h>
55 #include "../comedidev.h"
57 #include <linux/delay.h>
58 #include <linux/list.h>
59 #include <linux/spinlock.h>
61 #include "comedi_pci.h"
64 /* file removed due to GPL incompatibility */
65 #include "me4000_fw.h"
68 /*=============================================================================
70 This is used by modprobe to translate PCI IDs to drivers.
71 ===========================================================================*/
73 static DEFINE_PCI_DEVICE_TABLE(me4000_pci_table
) = {
75 PCI_VENDOR_ID_MEILHAUS
, 0x4650, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
76 PCI_VENDOR_ID_MEILHAUS
, 0x4660, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
77 PCI_VENDOR_ID_MEILHAUS
, 0x4661, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
78 PCI_VENDOR_ID_MEILHAUS
, 0x4662, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
79 PCI_VENDOR_ID_MEILHAUS
, 0x4663, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
80 PCI_VENDOR_ID_MEILHAUS
, 0x4670, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
81 PCI_VENDOR_ID_MEILHAUS
, 0x4671, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
82 PCI_VENDOR_ID_MEILHAUS
, 0x4672, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
83 PCI_VENDOR_ID_MEILHAUS
, 0x4673, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
84 PCI_VENDOR_ID_MEILHAUS
, 0x4680, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
85 PCI_VENDOR_ID_MEILHAUS
, 0x4681, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
86 PCI_VENDOR_ID_MEILHAUS
, 0x4682, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
87 PCI_VENDOR_ID_MEILHAUS
, 0x4683, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0}, {
91 MODULE_DEVICE_TABLE(pci
, me4000_pci_table
);
93 static const struct me4000_board me4000_boards
[] = {
94 {"ME-4650", 0x4650, {0, 0}, {16, 0, 0, 0}, {4}, {0}},
96 {"ME-4660", 0x4660, {0, 0}, {32, 0, 16, 0}, {4}, {3}},
97 {"ME-4660i", 0x4661, {0, 0}, {32, 0, 16, 0}, {4}, {3}},
98 {"ME-4660s", 0x4662, {0, 0}, {32, 8, 16, 0}, {4}, {3}},
99 {"ME-4660is", 0x4663, {0, 0}, {32, 8, 16, 0}, {4}, {3}},
101 {"ME-4670", 0x4670, {4, 0}, {32, 0, 16, 1}, {4}, {3}},
102 {"ME-4670i", 0x4671, {4, 0}, {32, 0, 16, 1}, {4}, {3}},
103 {"ME-4670s", 0x4672, {4, 0}, {32, 8, 16, 1}, {4}, {3}},
104 {"ME-4670is", 0x4673, {4, 0}, {32, 8, 16, 1}, {4}, {3}},
106 {"ME-4680", 0x4680, {4, 4}, {32, 0, 16, 1}, {4}, {3}},
107 {"ME-4680i", 0x4681, {4, 4}, {32, 0, 16, 1}, {4}, {3}},
108 {"ME-4680s", 0x4682, {4, 4}, {32, 8, 16, 1}, {4}, {3}},
109 {"ME-4680is", 0x4683, {4, 4}, {32, 8, 16, 1}, {4}, {3}},
114 #define ME4000_BOARD_VERSIONS (ARRAY_SIZE(me4000_boards) - 1)
116 /*-----------------------------------------------------------------------------
117 Comedi function prototypes
118 ---------------------------------------------------------------------------*/
119 static int me4000_attach(struct comedi_device
*dev
,
120 struct comedi_devconfig
*it
);
121 static int me4000_detach(struct comedi_device
*dev
);
122 static struct comedi_driver driver_me4000
= {
123 driver_name
:"me4000",
125 attach
:me4000_attach
,
126 detach
:me4000_detach
,
129 /*-----------------------------------------------------------------------------
130 Meilhaus function prototypes
131 ---------------------------------------------------------------------------*/
132 static int me4000_probe(struct comedi_device
*dev
, struct comedi_devconfig
*it
);
133 static int get_registers(struct comedi_device
*dev
, struct pci_dev
*pci_dev_p
);
134 static int init_board_info(struct comedi_device
*dev
,
135 struct pci_dev
*pci_dev_p
);
136 static int init_ao_context(struct comedi_device
*dev
);
137 static int init_ai_context(struct comedi_device
*dev
);
138 static int init_dio_context(struct comedi_device
*dev
);
139 static int init_cnt_context(struct comedi_device
*dev
);
140 static int xilinx_download(struct comedi_device
*dev
);
141 static int reset_board(struct comedi_device
*dev
);
143 static int me4000_dio_insn_bits(struct comedi_device
*dev
,
144 struct comedi_subdevice
*s
,
145 struct comedi_insn
*insn
, unsigned int *data
);
147 static int me4000_dio_insn_config(struct comedi_device
*dev
,
148 struct comedi_subdevice
*s
,
149 struct comedi_insn
*insn
, unsigned int *data
);
151 static int cnt_reset(struct comedi_device
*dev
, unsigned int channel
);
153 static int cnt_config(struct comedi_device
*dev
,
154 unsigned int channel
, unsigned int mode
);
156 static int me4000_cnt_insn_config(struct comedi_device
*dev
,
157 struct comedi_subdevice
*s
,
158 struct comedi_insn
*insn
, unsigned int *data
);
160 static int me4000_cnt_insn_write(struct comedi_device
*dev
,
161 struct comedi_subdevice
*s
,
162 struct comedi_insn
*insn
, unsigned int *data
);
164 static int me4000_cnt_insn_read(struct comedi_device
*dev
,
165 struct comedi_subdevice
*s
,
166 struct comedi_insn
*insn
, unsigned int *data
);
168 static int me4000_ai_insn_read(struct comedi_device
*dev
,
169 struct comedi_subdevice
*subdevice
,
170 struct comedi_insn
*insn
, unsigned int *data
);
172 static int me4000_ai_cancel(struct comedi_device
*dev
,
173 struct comedi_subdevice
*s
);
175 static int ai_check_chanlist(struct comedi_device
*dev
,
176 struct comedi_subdevice
*s
,
177 struct comedi_cmd
*cmd
);
179 static int ai_round_cmd_args(struct comedi_device
*dev
,
180 struct comedi_subdevice
*s
,
181 struct comedi_cmd
*cmd
,
182 unsigned int *init_ticks
,
183 unsigned int *scan_ticks
,
184 unsigned int *chan_ticks
);
186 static int ai_prepare(struct comedi_device
*dev
,
187 struct comedi_subdevice
*s
,
188 struct comedi_cmd
*cmd
,
189 unsigned int init_ticks
,
190 unsigned int scan_ticks
, unsigned int chan_ticks
);
192 static int ai_write_chanlist(struct comedi_device
*dev
,
193 struct comedi_subdevice
*s
,
194 struct comedi_cmd
*cmd
);
196 static irqreturn_t
me4000_ai_isr(int irq
, void *dev_id
);
198 static int me4000_ai_do_cmd_test(struct comedi_device
*dev
,
199 struct comedi_subdevice
*s
,
200 struct comedi_cmd
*cmd
);
202 static int me4000_ai_do_cmd(struct comedi_device
*dev
,
203 struct comedi_subdevice
*s
);
205 static int me4000_ao_insn_write(struct comedi_device
*dev
,
206 struct comedi_subdevice
*s
,
207 struct comedi_insn
*insn
, unsigned int *data
);
209 static int me4000_ao_insn_read(struct comedi_device
*dev
,
210 struct comedi_subdevice
*s
,
211 struct comedi_insn
*insn
, unsigned int *data
);
213 /*-----------------------------------------------------------------------------
214 Meilhaus inline functions
215 ---------------------------------------------------------------------------*/
217 static inline void me4000_outb(struct comedi_device
*dev
, unsigned char value
,
220 PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value
, port
);
224 static inline void me4000_outl(struct comedi_device
*dev
, unsigned long value
,
227 PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value
, port
);
231 static inline unsigned long me4000_inl(struct comedi_device
*dev
,
236 PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value
, port
);
240 static inline unsigned char me4000_inb(struct comedi_device
*dev
,
245 PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value
, port
);
249 static const struct comedi_lrange me4000_ai_range
= {
259 static const struct comedi_lrange me4000_ao_range
= {
266 static int me4000_attach(struct comedi_device
*dev
, struct comedi_devconfig
*it
)
268 struct comedi_subdevice
*s
;
271 CALL_PDEBUG("In me4000_attach()\n");
273 result
= me4000_probe(dev
, it
);
278 * Allocate the subdevice structures. alloc_subdevice() is a
279 * convenient macro defined in comedidev.h. It relies on
280 * n_subdevices being set correctly.
282 if (alloc_subdevices(dev
, 4) < 0)
285 /*=========================================================================
286 Analog input subdevice
287 ========================================================================*/
289 s
= dev
->subdevices
+ 0;
291 if (thisboard
->ai
.count
) {
292 s
->type
= COMEDI_SUBD_AI
;
294 SDF_READABLE
| SDF_COMMON
| SDF_GROUND
| SDF_DIFF
;
295 s
->n_chan
= thisboard
->ai
.count
;
296 s
->maxdata
= 0xFFFF; /* 16 bit ADC */
297 s
->len_chanlist
= ME4000_AI_CHANNEL_LIST_COUNT
;
298 s
->range_table
= &me4000_ai_range
;
299 s
->insn_read
= me4000_ai_insn_read
;
302 if (request_irq(info
->irq
, me4000_ai_isr
,
303 IRQF_SHARED
, "ME-4000", dev
)) {
305 ("comedi%d: me4000: me4000_attach(): Unable to allocate irq\n",
308 dev
->read_subdev
= s
;
309 s
->subdev_flags
|= SDF_CMD_READ
;
310 s
->cancel
= me4000_ai_cancel
;
311 s
->do_cmdtest
= me4000_ai_do_cmd_test
;
312 s
->do_cmd
= me4000_ai_do_cmd
;
316 "comedi%d: me4000: me4000_attach(): No interrupt available\n",
320 s
->type
= COMEDI_SUBD_UNUSED
;
323 /*=========================================================================
324 Analog output subdevice
325 ========================================================================*/
327 s
= dev
->subdevices
+ 1;
329 if (thisboard
->ao
.count
) {
330 s
->type
= COMEDI_SUBD_AO
;
331 s
->subdev_flags
= SDF_WRITEABLE
| SDF_COMMON
| SDF_GROUND
;
332 s
->n_chan
= thisboard
->ao
.count
;
333 s
->maxdata
= 0xFFFF; /* 16 bit DAC */
334 s
->range_table
= &me4000_ao_range
;
335 s
->insn_write
= me4000_ao_insn_write
;
336 s
->insn_read
= me4000_ao_insn_read
;
338 s
->type
= COMEDI_SUBD_UNUSED
;
341 /*=========================================================================
342 Digital I/O subdevice
343 ========================================================================*/
345 s
= dev
->subdevices
+ 2;
347 if (thisboard
->dio
.count
) {
348 s
->type
= COMEDI_SUBD_DIO
;
349 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
350 s
->n_chan
= thisboard
->dio
.count
* 8;
352 s
->range_table
= &range_digital
;
353 s
->insn_bits
= me4000_dio_insn_bits
;
354 s
->insn_config
= me4000_dio_insn_config
;
356 s
->type
= COMEDI_SUBD_UNUSED
;
360 * Check for optoisolated ME-4000 version. If one the first
361 * port is a fixed output port and the second is a fixed input port.
363 if (!me4000_inl(dev
, info
->dio_context
.dir_reg
)) {
365 me4000_outl(dev
, ME4000_DIO_CTRL_BIT_MODE_0
,
366 info
->dio_context
.dir_reg
);
369 /*=========================================================================
371 ========================================================================*/
373 s
= dev
->subdevices
+ 3;
375 if (thisboard
->cnt
.count
) {
376 s
->type
= COMEDI_SUBD_COUNTER
;
377 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
378 s
->n_chan
= thisboard
->cnt
.count
;
379 s
->maxdata
= 0xFFFF; /* 16 bit counters */
380 s
->insn_read
= me4000_cnt_insn_read
;
381 s
->insn_write
= me4000_cnt_insn_write
;
382 s
->insn_config
= me4000_cnt_insn_config
;
384 s
->type
= COMEDI_SUBD_UNUSED
;
390 static int me4000_probe(struct comedi_device
*dev
, struct comedi_devconfig
*it
)
392 struct pci_dev
*pci_device
;
394 struct me4000_board
*board
;
396 CALL_PDEBUG("In me4000_probe()\n");
398 /* Allocate private memory */
399 if (alloc_private(dev
, sizeof(struct me4000_info
)) < 0)
403 * Probe the device to determine what device in the series it is.
405 for (pci_device
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, NULL
);
407 pci_device
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, pci_device
)) {
408 if (pci_device
->vendor
== PCI_VENDOR_ID_MEILHAUS
) {
409 for (i
= 0; i
< ME4000_BOARD_VERSIONS
; i
++) {
410 if (me4000_boards
[i
].device_id
==
411 pci_device
->device
) {
412 /* Was a particular bus/slot requested? */
413 if ((it
->options
[0] != 0)
414 || (it
->options
[1] != 0)) {
415 /* Are we on the wrong bus/slot? */
416 if (pci_device
->bus
->number
!=
419 PCI_SLOT(pci_device
->devfn
)
424 dev
->board_ptr
= me4000_boards
+ i
;
426 (struct me4000_board
*)
428 info
->pci_dev_p
= pci_device
;
436 "comedi%d: me4000: me4000_probe(): No supported board found (req. bus/slot : %d/%d)\n",
437 dev
->minor
, it
->options
[0], it
->options
[1]);
443 "comedi%d: me4000: me4000_probe(): Found %s at PCI bus %d, slot %d\n",
444 dev
->minor
, me4000_boards
[i
].name
, pci_device
->bus
->number
,
445 PCI_SLOT(pci_device
->devfn
));
447 /* Set data in device structure */
448 dev
->board_name
= board
->name
;
450 /* Enable PCI device and request regions */
451 result
= comedi_pci_enable(pci_device
, dev
->board_name
);
454 "comedi%d: me4000: me4000_probe(): Cannot enable PCI device and request I/O regions\n",
459 /* Get the PCI base registers */
460 result
= get_registers(dev
, pci_device
);
463 "comedi%d: me4000: me4000_probe(): Cannot get registers\n",
467 /* Initialize board info */
468 result
= init_board_info(dev
, pci_device
);
471 "comedi%d: me4000: me4000_probe(): Cannot init baord info\n",
476 /* Init analog output context */
477 result
= init_ao_context(dev
);
480 "comedi%d: me4000: me4000_probe(): Cannot init ao context\n",
485 /* Init analog input context */
486 result
= init_ai_context(dev
);
489 "comedi%d: me4000: me4000_probe(): Cannot init ai context\n",
494 /* Init digital I/O context */
495 result
= init_dio_context(dev
);
498 "comedi%d: me4000: me4000_probe(): Cannot init dio context\n",
503 /* Init counter context */
504 result
= init_cnt_context(dev
);
507 "comedi%d: me4000: me4000_probe(): Cannot init cnt context\n",
512 /* Download the xilinx firmware */
513 result
= xilinx_download(dev
);
516 "comedi%d: me4000: me4000_probe(): Can't download firmware\n",
521 /* Make a hardware reset */
522 result
= reset_board(dev
);
525 "comedi%d: me4000: me4000_probe(): Can't reset board\n",
533 static int get_registers(struct comedi_device
*dev
, struct pci_dev
*pci_dev_p
)
536 CALL_PDEBUG("In get_registers()\n");
538 /*--------------------------- plx regbase ---------------------------------*/
540 info
->plx_regbase
= pci_resource_start(pci_dev_p
, 1);
541 if (info
->plx_regbase
== 0) {
543 "comedi%d: me4000: get_registers(): PCI base address 1 is not available\n",
547 info
->plx_regbase_size
= pci_resource_len(pci_dev_p
, 1);
549 /*--------------------------- me4000 regbase ------------------------------*/
551 info
->me4000_regbase
= pci_resource_start(pci_dev_p
, 2);
552 if (info
->me4000_regbase
== 0) {
554 "comedi%d: me4000: get_registers(): PCI base address 2 is not available\n",
558 info
->me4000_regbase_size
= pci_resource_len(pci_dev_p
, 2);
560 /*--------------------------- timer regbase ------------------------------*/
562 info
->timer_regbase
= pci_resource_start(pci_dev_p
, 3);
563 if (info
->timer_regbase
== 0) {
565 "comedi%d: me4000: get_registers(): PCI base address 3 is not available\n",
569 info
->timer_regbase_size
= pci_resource_len(pci_dev_p
, 3);
571 /*--------------------------- program regbase ------------------------------*/
573 info
->program_regbase
= pci_resource_start(pci_dev_p
, 5);
574 if (info
->program_regbase
== 0) {
576 "comedi%d: me4000: get_registers(): PCI base address 5 is not available\n",
580 info
->program_regbase_size
= pci_resource_len(pci_dev_p
, 5);
585 static int init_board_info(struct comedi_device
*dev
, struct pci_dev
*pci_dev_p
)
589 CALL_PDEBUG("In init_board_info()\n");
591 /* Init spin locks */
592 /* spin_lock_init(&info->preload_lock); */
593 /* spin_lock_init(&info->ai_ctrl_lock); */
595 /* Get the serial number */
596 result
= pci_read_config_dword(pci_dev_p
, 0x2C, &info
->serial_no
);
597 if (result
!= PCIBIOS_SUCCESSFUL
)
600 /* Get the hardware revision */
601 result
= pci_read_config_byte(pci_dev_p
, 0x08, &info
->hw_revision
);
602 if (result
!= PCIBIOS_SUCCESSFUL
)
605 /* Get the vendor id */
606 info
->vendor_id
= pci_dev_p
->vendor
;
608 /* Get the device id */
609 info
->device_id
= pci_dev_p
->device
;
611 /* Get the irq assigned to the board */
612 info
->irq
= pci_dev_p
->irq
;
617 static int init_ao_context(struct comedi_device
*dev
)
621 CALL_PDEBUG("In init_ao_context()\n");
623 for (i
= 0; i
< thisboard
->ao
.count
; i
++) {
624 /* spin_lock_init(&info->ao_context[i].use_lock); */
625 info
->ao_context
[i
].irq
= info
->irq
;
629 info
->ao_context
[i
].ctrl_reg
=
630 info
->me4000_regbase
+ ME4000_AO_00_CTRL_REG
;
631 info
->ao_context
[i
].status_reg
=
632 info
->me4000_regbase
+ ME4000_AO_00_STATUS_REG
;
633 info
->ao_context
[i
].fifo_reg
=
634 info
->me4000_regbase
+ ME4000_AO_00_FIFO_REG
;
635 info
->ao_context
[i
].single_reg
=
636 info
->me4000_regbase
+ ME4000_AO_00_SINGLE_REG
;
637 info
->ao_context
[i
].timer_reg
=
638 info
->me4000_regbase
+ ME4000_AO_00_TIMER_REG
;
639 info
->ao_context
[i
].irq_status_reg
=
640 info
->me4000_regbase
+ ME4000_IRQ_STATUS_REG
;
641 info
->ao_context
[i
].preload_reg
=
642 info
->me4000_regbase
+ ME4000_AO_LOADSETREG_XX
;
645 info
->ao_context
[i
].ctrl_reg
=
646 info
->me4000_regbase
+ ME4000_AO_01_CTRL_REG
;
647 info
->ao_context
[i
].status_reg
=
648 info
->me4000_regbase
+ ME4000_AO_01_STATUS_REG
;
649 info
->ao_context
[i
].fifo_reg
=
650 info
->me4000_regbase
+ ME4000_AO_01_FIFO_REG
;
651 info
->ao_context
[i
].single_reg
=
652 info
->me4000_regbase
+ ME4000_AO_01_SINGLE_REG
;
653 info
->ao_context
[i
].timer_reg
=
654 info
->me4000_regbase
+ ME4000_AO_01_TIMER_REG
;
655 info
->ao_context
[i
].irq_status_reg
=
656 info
->me4000_regbase
+ ME4000_IRQ_STATUS_REG
;
657 info
->ao_context
[i
].preload_reg
=
658 info
->me4000_regbase
+ ME4000_AO_LOADSETREG_XX
;
661 info
->ao_context
[i
].ctrl_reg
=
662 info
->me4000_regbase
+ ME4000_AO_02_CTRL_REG
;
663 info
->ao_context
[i
].status_reg
=
664 info
->me4000_regbase
+ ME4000_AO_02_STATUS_REG
;
665 info
->ao_context
[i
].fifo_reg
=
666 info
->me4000_regbase
+ ME4000_AO_02_FIFO_REG
;
667 info
->ao_context
[i
].single_reg
=
668 info
->me4000_regbase
+ ME4000_AO_02_SINGLE_REG
;
669 info
->ao_context
[i
].timer_reg
=
670 info
->me4000_regbase
+ ME4000_AO_02_TIMER_REG
;
671 info
->ao_context
[i
].irq_status_reg
=
672 info
->me4000_regbase
+ ME4000_IRQ_STATUS_REG
;
673 info
->ao_context
[i
].preload_reg
=
674 info
->me4000_regbase
+ ME4000_AO_LOADSETREG_XX
;
677 info
->ao_context
[i
].ctrl_reg
=
678 info
->me4000_regbase
+ ME4000_AO_03_CTRL_REG
;
679 info
->ao_context
[i
].status_reg
=
680 info
->me4000_regbase
+ ME4000_AO_03_STATUS_REG
;
681 info
->ao_context
[i
].fifo_reg
=
682 info
->me4000_regbase
+ ME4000_AO_03_FIFO_REG
;
683 info
->ao_context
[i
].single_reg
=
684 info
->me4000_regbase
+ ME4000_AO_03_SINGLE_REG
;
685 info
->ao_context
[i
].timer_reg
=
686 info
->me4000_regbase
+ ME4000_AO_03_TIMER_REG
;
687 info
->ao_context
[i
].irq_status_reg
=
688 info
->me4000_regbase
+ ME4000_IRQ_STATUS_REG
;
689 info
->ao_context
[i
].preload_reg
=
690 info
->me4000_regbase
+ ME4000_AO_LOADSETREG_XX
;
700 static int init_ai_context(struct comedi_device
*dev
)
703 CALL_PDEBUG("In init_ai_context()\n");
705 info
->ai_context
.irq
= info
->irq
;
707 info
->ai_context
.ctrl_reg
= info
->me4000_regbase
+ ME4000_AI_CTRL_REG
;
708 info
->ai_context
.status_reg
=
709 info
->me4000_regbase
+ ME4000_AI_STATUS_REG
;
710 info
->ai_context
.channel_list_reg
=
711 info
->me4000_regbase
+ ME4000_AI_CHANNEL_LIST_REG
;
712 info
->ai_context
.data_reg
= info
->me4000_regbase
+ ME4000_AI_DATA_REG
;
713 info
->ai_context
.chan_timer_reg
=
714 info
->me4000_regbase
+ ME4000_AI_CHAN_TIMER_REG
;
715 info
->ai_context
.chan_pre_timer_reg
=
716 info
->me4000_regbase
+ ME4000_AI_CHAN_PRE_TIMER_REG
;
717 info
->ai_context
.scan_timer_low_reg
=
718 info
->me4000_regbase
+ ME4000_AI_SCAN_TIMER_LOW_REG
;
719 info
->ai_context
.scan_timer_high_reg
=
720 info
->me4000_regbase
+ ME4000_AI_SCAN_TIMER_HIGH_REG
;
721 info
->ai_context
.scan_pre_timer_low_reg
=
722 info
->me4000_regbase
+ ME4000_AI_SCAN_PRE_TIMER_LOW_REG
;
723 info
->ai_context
.scan_pre_timer_high_reg
=
724 info
->me4000_regbase
+ ME4000_AI_SCAN_PRE_TIMER_HIGH_REG
;
725 info
->ai_context
.start_reg
= info
->me4000_regbase
+ ME4000_AI_START_REG
;
726 info
->ai_context
.irq_status_reg
=
727 info
->me4000_regbase
+ ME4000_IRQ_STATUS_REG
;
728 info
->ai_context
.sample_counter_reg
=
729 info
->me4000_regbase
+ ME4000_AI_SAMPLE_COUNTER_REG
;
734 static int init_dio_context(struct comedi_device
*dev
)
737 CALL_PDEBUG("In init_dio_context()\n");
739 info
->dio_context
.dir_reg
= info
->me4000_regbase
+ ME4000_DIO_DIR_REG
;
740 info
->dio_context
.ctrl_reg
= info
->me4000_regbase
+ ME4000_DIO_CTRL_REG
;
741 info
->dio_context
.port_0_reg
=
742 info
->me4000_regbase
+ ME4000_DIO_PORT_0_REG
;
743 info
->dio_context
.port_1_reg
=
744 info
->me4000_regbase
+ ME4000_DIO_PORT_1_REG
;
745 info
->dio_context
.port_2_reg
=
746 info
->me4000_regbase
+ ME4000_DIO_PORT_2_REG
;
747 info
->dio_context
.port_3_reg
=
748 info
->me4000_regbase
+ ME4000_DIO_PORT_3_REG
;
753 static int init_cnt_context(struct comedi_device
*dev
)
756 CALL_PDEBUG("In init_cnt_context()\n");
758 info
->cnt_context
.ctrl_reg
= info
->timer_regbase
+ ME4000_CNT_CTRL_REG
;
759 info
->cnt_context
.counter_0_reg
=
760 info
->timer_regbase
+ ME4000_CNT_COUNTER_0_REG
;
761 info
->cnt_context
.counter_1_reg
=
762 info
->timer_regbase
+ ME4000_CNT_COUNTER_1_REG
;
763 info
->cnt_context
.counter_2_reg
=
764 info
->timer_regbase
+ ME4000_CNT_COUNTER_2_REG
;
769 #define FIRMWARE_NOT_AVAILABLE 1
770 #if FIRMWARE_NOT_AVAILABLE
771 extern unsigned char *xilinx_firm
;
774 static int xilinx_download(struct comedi_device
*dev
)
777 wait_queue_head_t queue
;
781 CALL_PDEBUG("In xilinx_download()\n");
783 init_waitqueue_head(&queue
);
786 * Set PLX local interrupt 2 polarity to high.
787 * Interrupt is thrown by init pin of xilinx.
789 outl(0x10, info
->plx_regbase
+ PLX_INTCSR
);
791 /* Set /CS and /WRITE of the Xilinx */
792 value
= inl(info
->plx_regbase
+ PLX_ICR
);
794 outl(value
, info
->plx_regbase
+ PLX_ICR
);
796 /* Init Xilinx with CS1 */
797 inb(info
->program_regbase
+ 0xC8);
799 /* Wait until /INIT pin is set */
801 if (!(inl(info
->plx_regbase
+ PLX_INTCSR
) & 0x20)) {
803 "comedi%d: me4000: xilinx_download(): Can't init Xilinx\n",
808 /* Reset /CS and /WRITE of the Xilinx */
809 value
= inl(info
->plx_regbase
+ PLX_ICR
);
811 outl(value
, info
->plx_regbase
+ PLX_ICR
);
812 if (FIRMWARE_NOT_AVAILABLE
) {
814 "xilinx firmware unavailable due to licensing, aborting");
817 /* Download Xilinx firmware */
818 size
= (xilinx_firm
[0] << 24) + (xilinx_firm
[1] << 16) +
819 (xilinx_firm
[2] << 8) + xilinx_firm
[3];
822 for (idx
= 0; idx
< size
; idx
++) {
823 outb(xilinx_firm
[16 + idx
], info
->program_regbase
);
826 /* Check if BUSY flag is low */
827 if (inl(info
->plx_regbase
+ PLX_ICR
) & 0x20) {
829 "comedi%d: me4000: xilinx_download(): Xilinx is still busy (idx = %d)\n",
836 /* If done flag is high download was successful */
837 if (inl(info
->plx_regbase
+ PLX_ICR
) & 0x4) {
840 "comedi%d: me4000: xilinx_download(): DONE flag is not set\n",
843 "comedi%d: me4000: xilinx_download(): Download not successful\n",
848 /* Set /CS and /WRITE */
849 value
= inl(info
->plx_regbase
+ PLX_ICR
);
851 outl(value
, info
->plx_regbase
+ PLX_ICR
);
856 static int reset_board(struct comedi_device
*dev
)
860 CALL_PDEBUG("In reset_board()\n");
862 /* Make a hardware reset */
863 icr
= me4000_inl(dev
, info
->plx_regbase
+ PLX_ICR
);
865 me4000_outl(dev
, icr
, info
->plx_regbase
+ PLX_ICR
);
867 me4000_outl(dev
, icr
, info
->plx_regbase
+ PLX_ICR
);
869 /* 0x8000 to the DACs means an output voltage of 0V */
870 me4000_outl(dev
, 0x8000,
871 info
->me4000_regbase
+ ME4000_AO_00_SINGLE_REG
);
872 me4000_outl(dev
, 0x8000,
873 info
->me4000_regbase
+ ME4000_AO_01_SINGLE_REG
);
874 me4000_outl(dev
, 0x8000,
875 info
->me4000_regbase
+ ME4000_AO_02_SINGLE_REG
);
876 me4000_outl(dev
, 0x8000,
877 info
->me4000_regbase
+ ME4000_AO_03_SINGLE_REG
);
879 /* Set both stop bits in the analog input control register */
881 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP
| ME4000_AI_CTRL_BIT_STOP
,
882 info
->me4000_regbase
+ ME4000_AI_CTRL_REG
);
884 /* Set both stop bits in the analog output control register */
886 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP
| ME4000_AO_CTRL_BIT_STOP
,
887 info
->me4000_regbase
+ ME4000_AO_00_CTRL_REG
);
889 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP
| ME4000_AO_CTRL_BIT_STOP
,
890 info
->me4000_regbase
+ ME4000_AO_01_CTRL_REG
);
892 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP
| ME4000_AO_CTRL_BIT_STOP
,
893 info
->me4000_regbase
+ ME4000_AO_02_CTRL_REG
);
895 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP
| ME4000_AO_CTRL_BIT_STOP
,
896 info
->me4000_regbase
+ ME4000_AO_03_CTRL_REG
);
898 /* Enable interrupts on the PLX */
899 me4000_outl(dev
, 0x43, info
->plx_regbase
+ PLX_INTCSR
);
901 /* Set the adustment register for AO demux */
902 me4000_outl(dev
, ME4000_AO_DEMUX_ADJUST_VALUE
,
903 info
->me4000_regbase
+ ME4000_AO_DEMUX_ADJUST_REG
);
905 /* Set digital I/O direction for port 0 to output on isolated versions */
906 if (!(me4000_inl(dev
, info
->me4000_regbase
+ ME4000_DIO_DIR_REG
) & 0x1)) {
907 me4000_outl(dev
, 0x1,
908 info
->me4000_regbase
+ ME4000_DIO_CTRL_REG
);
914 static int me4000_detach(struct comedi_device
*dev
)
916 CALL_PDEBUG("In me4000_detach()\n");
919 if (info
->pci_dev_p
) {
921 if (info
->plx_regbase
)
922 comedi_pci_disable(info
->pci_dev_p
);
923 pci_dev_put(info
->pci_dev_p
);
930 /*=============================================================================
932 ===========================================================================*/
934 static int me4000_ai_insn_read(struct comedi_device
*dev
,
935 struct comedi_subdevice
*subdevice
,
936 struct comedi_insn
*insn
, unsigned int *data
)
939 int chan
= CR_CHAN(insn
->chanspec
);
940 int rang
= CR_RANGE(insn
->chanspec
);
941 int aref
= CR_AREF(insn
->chanspec
);
943 unsigned long entry
= 0;
947 CALL_PDEBUG("In me4000_ai_insn_read()\n");
951 } else if (insn
->n
> 1) {
953 "comedi%d: me4000: me4000_ai_insn_read(): Invalid instruction length %d\n",
954 dev
->minor
, insn
->n
);
960 entry
|= ME4000_AI_LIST_RANGE_UNIPOLAR_2_5
;
963 entry
|= ME4000_AI_LIST_RANGE_UNIPOLAR_10
;
966 entry
|= ME4000_AI_LIST_RANGE_BIPOLAR_2_5
;
969 entry
|= ME4000_AI_LIST_RANGE_BIPOLAR_10
;
973 "comedi%d: me4000: me4000_ai_insn_read(): Invalid range specified\n",
981 if (chan
>= thisboard
->ai
.count
) {
983 "comedi%d: me4000: me4000_ai_insn_read(): Analog input is not available\n",
987 entry
|= ME4000_AI_LIST_INPUT_SINGLE_ENDED
| chan
;
991 if (rang
== 0 || rang
== 1) {
993 "comedi%d: me4000: me4000_ai_insn_read(): Range must be bipolar when aref = diff\n",
998 if (chan
>= thisboard
->ai
.diff_count
) {
1000 "comedi%d: me4000: me4000_ai_insn_read(): Analog input is not available\n",
1004 entry
|= ME4000_AI_LIST_INPUT_DIFFERENTIAL
| chan
;
1008 "comedi%d: me4000: me4000_ai_insn_read(): Invalid aref specified\n",
1013 entry
|= ME4000_AI_LIST_LAST_ENTRY
;
1015 /* Clear channel list, data fifo and both stop bits */
1016 tmp
= me4000_inl(dev
, info
->ai_context
.ctrl_reg
);
1017 tmp
&= ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO
|
1018 ME4000_AI_CTRL_BIT_DATA_FIFO
|
1019 ME4000_AI_CTRL_BIT_STOP
| ME4000_AI_CTRL_BIT_IMMEDIATE_STOP
);
1020 me4000_outl(dev
, tmp
, info
->ai_context
.ctrl_reg
);
1022 /* Set the acquisition mode to single */
1023 tmp
&= ~(ME4000_AI_CTRL_BIT_MODE_0
| ME4000_AI_CTRL_BIT_MODE_1
|
1024 ME4000_AI_CTRL_BIT_MODE_2
);
1025 me4000_outl(dev
, tmp
, info
->ai_context
.ctrl_reg
);
1027 /* Enable channel list and data fifo */
1028 tmp
|= ME4000_AI_CTRL_BIT_CHANNEL_FIFO
| ME4000_AI_CTRL_BIT_DATA_FIFO
;
1029 me4000_outl(dev
, tmp
, info
->ai_context
.ctrl_reg
);
1031 /* Generate channel list entry */
1032 me4000_outl(dev
, entry
, info
->ai_context
.channel_list_reg
);
1034 /* Set the timer to maximum sample rate */
1035 me4000_outl(dev
, ME4000_AI_MIN_TICKS
, info
->ai_context
.chan_timer_reg
);
1036 me4000_outl(dev
, ME4000_AI_MIN_TICKS
,
1037 info
->ai_context
.chan_pre_timer_reg
);
1039 /* Start conversion by dummy read */
1040 me4000_inl(dev
, info
->ai_context
.start_reg
);
1042 /* Wait until ready */
1045 (me4000_inl(dev
, info
->ai_context
.status_reg
) &
1046 ME4000_AI_STATUS_BIT_EF_DATA
)) {
1048 "comedi%d: me4000: me4000_ai_insn_read(): Value not available after wait\n",
1053 /* Read value from data fifo */
1054 lval
= me4000_inl(dev
, info
->ai_context
.data_reg
) & 0xFFFF;
1055 data
[0] = lval
^ 0x8000;
1060 static int me4000_ai_cancel(struct comedi_device
*dev
,
1061 struct comedi_subdevice
*s
)
1065 CALL_PDEBUG("In me4000_ai_cancel()\n");
1067 /* Stop any running conversion */
1068 tmp
= me4000_inl(dev
, info
->ai_context
.ctrl_reg
);
1069 tmp
&= ~(ME4000_AI_CTRL_BIT_STOP
| ME4000_AI_CTRL_BIT_IMMEDIATE_STOP
);
1070 me4000_outl(dev
, tmp
, info
->ai_context
.ctrl_reg
);
1072 /* Clear the control register */
1073 me4000_outl(dev
, 0x0, info
->ai_context
.ctrl_reg
);
1078 static int ai_check_chanlist(struct comedi_device
*dev
,
1079 struct comedi_subdevice
*s
, struct comedi_cmd
*cmd
)
1084 CALL_PDEBUG("In ai_check_chanlist()\n");
1086 /* Check whether a channel list is available */
1087 if (!cmd
->chanlist_len
) {
1089 "comedi%d: me4000: ai_check_chanlist(): No channel list available\n",
1094 /* Check the channel list size */
1095 if (cmd
->chanlist_len
> ME4000_AI_CHANNEL_LIST_COUNT
) {
1097 "comedi%d: me4000: ai_check_chanlist(): Channel list is to large\n",
1102 /* Check the pointer */
1103 if (!cmd
->chanlist
) {
1105 "comedi%d: me4000: ai_check_chanlist(): NULL pointer to channel list\n",
1110 /* Check whether aref is equal for all entries */
1111 aref
= CR_AREF(cmd
->chanlist
[0]);
1112 for (i
= 0; i
< cmd
->chanlist_len
; i
++) {
1113 if (CR_AREF(cmd
->chanlist
[i
]) != aref
) {
1115 "comedi%d: me4000: ai_check_chanlist(): Mode is not equal for all entries\n",
1121 /* Check whether channels are available for this ending */
1122 if (aref
== SDF_DIFF
) {
1123 for (i
= 0; i
< cmd
->chanlist_len
; i
++) {
1124 if (CR_CHAN(cmd
->chanlist
[i
]) >=
1125 thisboard
->ai
.diff_count
) {
1127 "comedi%d: me4000: ai_check_chanlist(): Channel number to high\n",
1133 for (i
= 0; i
< cmd
->chanlist_len
; i
++) {
1134 if (CR_CHAN(cmd
->chanlist
[i
]) >= thisboard
->ai
.count
) {
1136 "comedi%d: me4000: ai_check_chanlist(): Channel number to high\n",
1143 /* Check if bipolar is set for all entries when in differential mode */
1144 if (aref
== SDF_DIFF
) {
1145 for (i
= 0; i
< cmd
->chanlist_len
; i
++) {
1146 if (CR_RANGE(cmd
->chanlist
[i
]) != 1 &&
1147 CR_RANGE(cmd
->chanlist
[i
]) != 2) {
1149 "comedi%d: me4000: ai_check_chanlist(): Bipolar is not selected in differential mode\n",
1159 static int ai_round_cmd_args(struct comedi_device
*dev
,
1160 struct comedi_subdevice
*s
,
1161 struct comedi_cmd
*cmd
,
1162 unsigned int *init_ticks
,
1163 unsigned int *scan_ticks
, unsigned int *chan_ticks
)
1168 CALL_PDEBUG("In ai_round_cmd_args()\n");
1174 PDEBUG("ai_round_cmd_arg(): start_arg = %d\n", cmd
->start_arg
);
1175 PDEBUG("ai_round_cmd_arg(): scan_begin_arg = %d\n",
1176 cmd
->scan_begin_arg
);
1177 PDEBUG("ai_round_cmd_arg(): convert_arg = %d\n", cmd
->convert_arg
);
1179 if (cmd
->start_arg
) {
1180 *init_ticks
= (cmd
->start_arg
* 33) / 1000;
1181 rest
= (cmd
->start_arg
* 33) % 1000;
1183 if (cmd
->flags
& TRIG_ROUND_NEAREST
) {
1186 } else if (cmd
->flags
& TRIG_ROUND_UP
) {
1192 if (cmd
->scan_begin_arg
) {
1193 *scan_ticks
= (cmd
->scan_begin_arg
* 33) / 1000;
1194 rest
= (cmd
->scan_begin_arg
* 33) % 1000;
1196 if (cmd
->flags
& TRIG_ROUND_NEAREST
) {
1199 } else if (cmd
->flags
& TRIG_ROUND_UP
) {
1205 if (cmd
->convert_arg
) {
1206 *chan_ticks
= (cmd
->convert_arg
* 33) / 1000;
1207 rest
= (cmd
->convert_arg
* 33) % 1000;
1209 if (cmd
->flags
& TRIG_ROUND_NEAREST
) {
1212 } else if (cmd
->flags
& TRIG_ROUND_UP
) {
1218 PDEBUG("ai_round_cmd_args(): init_ticks = %d\n", *init_ticks
);
1219 PDEBUG("ai_round_cmd_args(): scan_ticks = %d\n", *scan_ticks
);
1220 PDEBUG("ai_round_cmd_args(): chan_ticks = %d\n", *chan_ticks
);
1225 static void ai_write_timer(struct comedi_device
*dev
,
1226 unsigned int init_ticks
,
1227 unsigned int scan_ticks
, unsigned int chan_ticks
)
1230 CALL_PDEBUG("In ai_write_timer()\n");
1232 me4000_outl(dev
, init_ticks
- 1,
1233 info
->ai_context
.scan_pre_timer_low_reg
);
1234 me4000_outl(dev
, 0x0, info
->ai_context
.scan_pre_timer_high_reg
);
1237 me4000_outl(dev
, scan_ticks
- 1,
1238 info
->ai_context
.scan_timer_low_reg
);
1239 me4000_outl(dev
, 0x0, info
->ai_context
.scan_timer_high_reg
);
1242 me4000_outl(dev
, chan_ticks
- 1, info
->ai_context
.chan_pre_timer_reg
);
1243 me4000_outl(dev
, chan_ticks
- 1, info
->ai_context
.chan_timer_reg
);
1246 static int ai_prepare(struct comedi_device
*dev
,
1247 struct comedi_subdevice
*s
,
1248 struct comedi_cmd
*cmd
,
1249 unsigned int init_ticks
,
1250 unsigned int scan_ticks
, unsigned int chan_ticks
)
1253 unsigned long tmp
= 0;
1255 CALL_PDEBUG("In ai_prepare()\n");
1257 /* Write timer arguments */
1258 ai_write_timer(dev
, init_ticks
, scan_ticks
, chan_ticks
);
1260 /* Reset control register */
1261 me4000_outl(dev
, tmp
, info
->ai_context
.ctrl_reg
);
1264 if ((cmd
->start_src
== TRIG_EXT
&&
1265 cmd
->scan_begin_src
== TRIG_TIMER
&&
1266 cmd
->convert_src
== TRIG_TIMER
) ||
1267 (cmd
->start_src
== TRIG_EXT
&&
1268 cmd
->scan_begin_src
== TRIG_FOLLOW
&&
1269 cmd
->convert_src
== TRIG_TIMER
)) {
1270 tmp
= ME4000_AI_CTRL_BIT_MODE_1
|
1271 ME4000_AI_CTRL_BIT_CHANNEL_FIFO
|
1272 ME4000_AI_CTRL_BIT_DATA_FIFO
;
1273 } else if (cmd
->start_src
== TRIG_EXT
&&
1274 cmd
->scan_begin_src
== TRIG_EXT
&&
1275 cmd
->convert_src
== TRIG_TIMER
) {
1276 tmp
= ME4000_AI_CTRL_BIT_MODE_2
|
1277 ME4000_AI_CTRL_BIT_CHANNEL_FIFO
|
1278 ME4000_AI_CTRL_BIT_DATA_FIFO
;
1279 } else if (cmd
->start_src
== TRIG_EXT
&&
1280 cmd
->scan_begin_src
== TRIG_EXT
&&
1281 cmd
->convert_src
== TRIG_EXT
) {
1282 tmp
= ME4000_AI_CTRL_BIT_MODE_0
|
1283 ME4000_AI_CTRL_BIT_MODE_1
|
1284 ME4000_AI_CTRL_BIT_CHANNEL_FIFO
|
1285 ME4000_AI_CTRL_BIT_DATA_FIFO
;
1287 tmp
= ME4000_AI_CTRL_BIT_MODE_0
|
1288 ME4000_AI_CTRL_BIT_CHANNEL_FIFO
|
1289 ME4000_AI_CTRL_BIT_DATA_FIFO
;
1293 if (cmd
->stop_src
== TRIG_COUNT
) {
1294 me4000_outl(dev
, cmd
->chanlist_len
* cmd
->stop_arg
,
1295 info
->ai_context
.sample_counter_reg
);
1296 tmp
|= ME4000_AI_CTRL_BIT_HF_IRQ
| ME4000_AI_CTRL_BIT_SC_IRQ
;
1297 } else if (cmd
->stop_src
== TRIG_NONE
&&
1298 cmd
->scan_end_src
== TRIG_COUNT
) {
1299 me4000_outl(dev
, cmd
->scan_end_arg
,
1300 info
->ai_context
.sample_counter_reg
);
1301 tmp
|= ME4000_AI_CTRL_BIT_HF_IRQ
| ME4000_AI_CTRL_BIT_SC_IRQ
;
1303 tmp
|= ME4000_AI_CTRL_BIT_HF_IRQ
;
1306 /* Write the setup to the control register */
1307 me4000_outl(dev
, tmp
, info
->ai_context
.ctrl_reg
);
1309 /* Write the channel list */
1310 ai_write_chanlist(dev
, s
, cmd
);
1315 static int ai_write_chanlist(struct comedi_device
*dev
,
1316 struct comedi_subdevice
*s
, struct comedi_cmd
*cmd
)
1324 CALL_PDEBUG("In ai_write_chanlist()\n");
1326 for (i
= 0; i
< cmd
->chanlist_len
; i
++) {
1327 chan
= CR_CHAN(cmd
->chanlist
[i
]);
1328 rang
= CR_RANGE(cmd
->chanlist
[i
]);
1329 aref
= CR_AREF(cmd
->chanlist
[i
]);
1334 entry
|= ME4000_AI_LIST_RANGE_UNIPOLAR_2_5
;
1335 } else if (rang
== 1) {
1336 entry
|= ME4000_AI_LIST_RANGE_UNIPOLAR_10
;
1337 } else if (rang
== 2) {
1338 entry
|= ME4000_AI_LIST_RANGE_BIPOLAR_2_5
;
1340 entry
|= ME4000_AI_LIST_RANGE_BIPOLAR_10
;
1343 if (aref
== SDF_DIFF
) {
1344 entry
|= ME4000_AI_LIST_INPUT_DIFFERENTIAL
;
1346 entry
|= ME4000_AI_LIST_INPUT_SINGLE_ENDED
;
1349 me4000_outl(dev
, entry
, info
->ai_context
.channel_list_reg
);
1355 static int me4000_ai_do_cmd(struct comedi_device
*dev
,
1356 struct comedi_subdevice
*s
)
1359 unsigned int init_ticks
= 0;
1360 unsigned int scan_ticks
= 0;
1361 unsigned int chan_ticks
= 0;
1362 struct comedi_cmd
*cmd
= &s
->async
->cmd
;
1364 CALL_PDEBUG("In me4000_ai_do_cmd()\n");
1366 /* Reset the analog input */
1367 err
= me4000_ai_cancel(dev
, s
);
1371 /* Round the timer arguments */
1372 err
= ai_round_cmd_args(dev
,
1373 s
, cmd
, &init_ticks
, &scan_ticks
, &chan_ticks
);
1377 /* Prepare the AI for acquisition */
1378 err
= ai_prepare(dev
, s
, cmd
, init_ticks
, scan_ticks
, chan_ticks
);
1382 /* Start acquistion by dummy read */
1383 me4000_inl(dev
, info
->ai_context
.start_reg
);
1389 * me4000_ai_do_cmd_test():
1391 * The demo cmd.c in ./comedilib/demo specifies 6 return values:
1395 * - invalid argument
1396 * - argument conflict
1397 * - invalid chanlist
1398 * So I tried to adopt this scheme.
1400 static int me4000_ai_do_cmd_test(struct comedi_device
*dev
,
1401 struct comedi_subdevice
*s
,
1402 struct comedi_cmd
*cmd
)
1405 unsigned int init_ticks
;
1406 unsigned int chan_ticks
;
1407 unsigned int scan_ticks
;
1410 CALL_PDEBUG("In me4000_ai_do_cmd_test()\n");
1412 PDEBUG("me4000_ai_do_cmd_test(): subdev = %d\n", cmd
->subdev
);
1413 PDEBUG("me4000_ai_do_cmd_test(): flags = %08X\n", cmd
->flags
);
1414 PDEBUG("me4000_ai_do_cmd_test(): start_src = %08X\n",
1416 PDEBUG("me4000_ai_do_cmd_test(): start_arg = %d\n",
1418 PDEBUG("me4000_ai_do_cmd_test(): scan_begin_src = %08X\n",
1419 cmd
->scan_begin_src
);
1420 PDEBUG("me4000_ai_do_cmd_test(): scan_begin_arg = %d\n",
1421 cmd
->scan_begin_arg
);
1422 PDEBUG("me4000_ai_do_cmd_test(): convert_src = %08X\n",
1424 PDEBUG("me4000_ai_do_cmd_test(): convert_arg = %d\n",
1426 PDEBUG("me4000_ai_do_cmd_test(): scan_end_src = %08X\n",
1428 PDEBUG("me4000_ai_do_cmd_test(): scan_end_arg = %d\n",
1430 PDEBUG("me4000_ai_do_cmd_test(): stop_src = %08X\n",
1432 PDEBUG("me4000_ai_do_cmd_test(): stop_arg = %d\n", cmd
->stop_arg
);
1433 PDEBUG("me4000_ai_do_cmd_test(): chanlist = %d\n",
1434 (unsigned int)cmd
->chanlist
);
1435 PDEBUG("me4000_ai_do_cmd_test(): chanlist_len = %d\n",
1438 /* Only rounding flags are implemented */
1439 cmd
->flags
&= TRIG_ROUND_NEAREST
| TRIG_ROUND_UP
| TRIG_ROUND_DOWN
;
1441 /* Round the timer arguments */
1442 ai_round_cmd_args(dev
, s
, cmd
, &init_ticks
, &scan_ticks
, &chan_ticks
);
1445 * Stage 1. Check if the trigger sources are generally valid.
1447 switch (cmd
->start_src
) {
1452 cmd
->start_src
&= TRIG_NOW
| TRIG_EXT
;
1457 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start source\n",
1459 cmd
->start_src
= TRIG_NOW
;
1462 switch (cmd
->scan_begin_src
) {
1468 cmd
->scan_begin_src
&= TRIG_FOLLOW
| TRIG_TIMER
| TRIG_EXT
;
1473 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid scan begin source\n",
1475 cmd
->scan_begin_src
= TRIG_FOLLOW
;
1478 switch (cmd
->convert_src
) {
1483 cmd
->convert_src
&= TRIG_TIMER
| TRIG_EXT
;
1488 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert source\n",
1490 cmd
->convert_src
= TRIG_TIMER
;
1493 switch (cmd
->scan_end_src
) {
1498 cmd
->scan_end_src
&= TRIG_NONE
| TRIG_COUNT
;
1503 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid scan end source\n",
1505 cmd
->scan_end_src
= TRIG_NONE
;
1508 switch (cmd
->stop_src
) {
1513 cmd
->stop_src
&= TRIG_NONE
| TRIG_COUNT
;
1518 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid stop source\n",
1520 cmd
->stop_src
= TRIG_NONE
;
1527 * Stage 2. Check for trigger source conflicts.
1529 if (cmd
->start_src
== TRIG_NOW
&&
1530 cmd
->scan_begin_src
== TRIG_TIMER
&&
1531 cmd
->convert_src
== TRIG_TIMER
) {
1532 } else if (cmd
->start_src
== TRIG_NOW
&&
1533 cmd
->scan_begin_src
== TRIG_FOLLOW
&&
1534 cmd
->convert_src
== TRIG_TIMER
) {
1535 } else if (cmd
->start_src
== TRIG_EXT
&&
1536 cmd
->scan_begin_src
== TRIG_TIMER
&&
1537 cmd
->convert_src
== TRIG_TIMER
) {
1538 } else if (cmd
->start_src
== TRIG_EXT
&&
1539 cmd
->scan_begin_src
== TRIG_FOLLOW
&&
1540 cmd
->convert_src
== TRIG_TIMER
) {
1541 } else if (cmd
->start_src
== TRIG_EXT
&&
1542 cmd
->scan_begin_src
== TRIG_EXT
&&
1543 cmd
->convert_src
== TRIG_TIMER
) {
1544 } else if (cmd
->start_src
== TRIG_EXT
&&
1545 cmd
->scan_begin_src
== TRIG_EXT
&&
1546 cmd
->convert_src
== TRIG_EXT
) {
1549 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start trigger combination\n",
1551 cmd
->start_src
= TRIG_NOW
;
1552 cmd
->scan_begin_src
= TRIG_FOLLOW
;
1553 cmd
->convert_src
= TRIG_TIMER
;
1557 if (cmd
->stop_src
== TRIG_NONE
&& cmd
->scan_end_src
== TRIG_NONE
) {
1558 } else if (cmd
->stop_src
== TRIG_COUNT
&&
1559 cmd
->scan_end_src
== TRIG_NONE
) {
1560 } else if (cmd
->stop_src
== TRIG_NONE
&&
1561 cmd
->scan_end_src
== TRIG_COUNT
) {
1562 } else if (cmd
->stop_src
== TRIG_COUNT
&&
1563 cmd
->scan_end_src
== TRIG_COUNT
) {
1566 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid stop trigger combination\n",
1568 cmd
->stop_src
= TRIG_NONE
;
1569 cmd
->scan_end_src
= TRIG_NONE
;
1576 * Stage 3. Check if arguments are generally valid.
1578 if (cmd
->chanlist_len
< 1) {
1580 "comedi%d: me4000: me4000_ai_do_cmd_test(): No channel list\n",
1582 cmd
->chanlist_len
= 1;
1585 if (init_ticks
< 66) {
1587 "comedi%d: me4000: me4000_ai_do_cmd_test(): Start arg to low\n",
1589 cmd
->start_arg
= 2000;
1592 if (scan_ticks
&& scan_ticks
< 67) {
1594 "comedi%d: me4000: me4000_ai_do_cmd_test(): Scan begin arg to low\n",
1596 cmd
->scan_begin_arg
= 2031;
1599 if (chan_ticks
< 66) {
1601 "comedi%d: me4000: me4000_ai_do_cmd_test(): Convert arg to low\n",
1603 cmd
->convert_arg
= 2000;
1611 * Stage 4. Check for argument conflicts.
1613 if (cmd
->start_src
== TRIG_NOW
&&
1614 cmd
->scan_begin_src
== TRIG_TIMER
&&
1615 cmd
->convert_src
== TRIG_TIMER
) {
1617 /* Check timer arguments */
1618 if (init_ticks
< ME4000_AI_MIN_TICKS
) {
1620 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
1622 cmd
->start_arg
= 2000; /* 66 ticks at least */
1625 if (chan_ticks
< ME4000_AI_MIN_TICKS
) {
1627 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
1629 cmd
->convert_arg
= 2000; /* 66 ticks at least */
1632 if (scan_ticks
<= cmd
->chanlist_len
* chan_ticks
) {
1634 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid scan end arg\n",
1636 cmd
->scan_end_arg
= 2000 * cmd
->chanlist_len
+ 31; /* At least one tick more */
1639 } else if (cmd
->start_src
== TRIG_NOW
&&
1640 cmd
->scan_begin_src
== TRIG_FOLLOW
&&
1641 cmd
->convert_src
== TRIG_TIMER
) {
1643 /* Check timer arguments */
1644 if (init_ticks
< ME4000_AI_MIN_TICKS
) {
1646 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
1648 cmd
->start_arg
= 2000; /* 66 ticks at least */
1651 if (chan_ticks
< ME4000_AI_MIN_TICKS
) {
1653 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
1655 cmd
->convert_arg
= 2000; /* 66 ticks at least */
1658 } else if (cmd
->start_src
== TRIG_EXT
&&
1659 cmd
->scan_begin_src
== TRIG_TIMER
&&
1660 cmd
->convert_src
== TRIG_TIMER
) {
1662 /* Check timer arguments */
1663 if (init_ticks
< ME4000_AI_MIN_TICKS
) {
1665 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
1667 cmd
->start_arg
= 2000; /* 66 ticks at least */
1670 if (chan_ticks
< ME4000_AI_MIN_TICKS
) {
1672 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
1674 cmd
->convert_arg
= 2000; /* 66 ticks at least */
1677 if (scan_ticks
<= cmd
->chanlist_len
* chan_ticks
) {
1679 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid scan end arg\n",
1681 cmd
->scan_end_arg
= 2000 * cmd
->chanlist_len
+ 31; /* At least one tick more */
1684 } else if (cmd
->start_src
== TRIG_EXT
&&
1685 cmd
->scan_begin_src
== TRIG_FOLLOW
&&
1686 cmd
->convert_src
== TRIG_TIMER
) {
1688 /* Check timer arguments */
1689 if (init_ticks
< ME4000_AI_MIN_TICKS
) {
1691 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
1693 cmd
->start_arg
= 2000; /* 66 ticks at least */
1696 if (chan_ticks
< ME4000_AI_MIN_TICKS
) {
1698 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
1700 cmd
->convert_arg
= 2000; /* 66 ticks at least */
1703 } else if (cmd
->start_src
== TRIG_EXT
&&
1704 cmd
->scan_begin_src
== TRIG_EXT
&&
1705 cmd
->convert_src
== TRIG_TIMER
) {
1707 /* Check timer arguments */
1708 if (init_ticks
< ME4000_AI_MIN_TICKS
) {
1710 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
1712 cmd
->start_arg
= 2000; /* 66 ticks at least */
1715 if (chan_ticks
< ME4000_AI_MIN_TICKS
) {
1717 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
1719 cmd
->convert_arg
= 2000; /* 66 ticks at least */
1722 } else if (cmd
->start_src
== TRIG_EXT
&&
1723 cmd
->scan_begin_src
== TRIG_EXT
&&
1724 cmd
->convert_src
== TRIG_EXT
) {
1726 /* Check timer arguments */
1727 if (init_ticks
< ME4000_AI_MIN_TICKS
) {
1729 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
1731 cmd
->start_arg
= 2000; /* 66 ticks at least */
1735 if (cmd
->stop_src
== TRIG_COUNT
) {
1736 if (cmd
->stop_arg
== 0) {
1738 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid stop arg\n",
1744 if (cmd
->scan_end_src
== TRIG_COUNT
) {
1745 if (cmd
->scan_end_arg
== 0) {
1747 "comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid scan end arg\n",
1749 cmd
->scan_end_arg
= 1;
1758 * Stage 5. Check the channel list.
1760 if (ai_check_chanlist(dev
, s
, cmd
))
1766 static irqreturn_t
me4000_ai_isr(int irq
, void *dev_id
)
1769 struct comedi_device
*dev
= dev_id
;
1770 struct comedi_subdevice
*s
= dev
->subdevices
;
1771 struct me4000_ai_context
*ai_context
= &info
->ai_context
;
1776 ISR_PDEBUG("me4000_ai_isr() is executed\n");
1778 if (!dev
->attached
) {
1779 ISR_PDEBUG("me4000_ai_isr() premature interrupt\n");
1783 /* Reset all events */
1784 s
->async
->events
= 0;
1786 /* Check if irq number is right */
1787 if (irq
!= ai_context
->irq
) {
1789 "comedi%d: me4000: me4000_ai_isr(): Incorrect interrupt num: %d\n",
1795 ai_context
->irq_status_reg
) &
1796 ME4000_IRQ_STATUS_BIT_AI_HF
) {
1798 ("me4000_ai_isr(): Fifo half full interrupt occured\n");
1800 /* Read status register to find out what happened */
1801 tmp
= me4000_inl(dev
, ai_context
->ctrl_reg
);
1803 if (!(tmp
& ME4000_AI_STATUS_BIT_FF_DATA
) &&
1804 !(tmp
& ME4000_AI_STATUS_BIT_HF_DATA
) &&
1805 (tmp
& ME4000_AI_STATUS_BIT_EF_DATA
)) {
1806 ISR_PDEBUG("me4000_ai_isr(): Fifo full\n");
1807 c
= ME4000_AI_FIFO_COUNT
;
1809 /* FIFO overflow, so stop conversion and disable all interrupts */
1810 tmp
|= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP
;
1811 tmp
&= ~(ME4000_AI_CTRL_BIT_HF_IRQ
|
1812 ME4000_AI_CTRL_BIT_SC_IRQ
);
1813 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1815 s
->async
->events
|= COMEDI_CB_ERROR
| COMEDI_CB_EOA
;
1818 "comedi%d: me4000: me4000_ai_isr(): FIFO overflow\n",
1820 } else if ((tmp
& ME4000_AI_STATUS_BIT_FF_DATA
)
1821 && !(tmp
& ME4000_AI_STATUS_BIT_HF_DATA
)
1822 && (tmp
& ME4000_AI_STATUS_BIT_EF_DATA
)) {
1823 ISR_PDEBUG("me4000_ai_isr(): Fifo half full\n");
1825 s
->async
->events
|= COMEDI_CB_BLOCK
;
1827 c
= ME4000_AI_FIFO_COUNT
/ 2;
1830 "comedi%d: me4000: me4000_ai_isr(): Can't determine state of fifo\n",
1834 /* Undefined state, so stop conversion and disable all interrupts */
1835 tmp
|= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP
;
1836 tmp
&= ~(ME4000_AI_CTRL_BIT_HF_IRQ
|
1837 ME4000_AI_CTRL_BIT_SC_IRQ
);
1838 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1840 s
->async
->events
|= COMEDI_CB_ERROR
| COMEDI_CB_EOA
;
1843 "comedi%d: me4000: me4000_ai_isr(): Undefined FIFO state\n",
1847 ISR_PDEBUG("me4000_ai_isr(): Try to read %d values\n", c
);
1849 for (i
= 0; i
< c
; i
++) {
1850 /* Read value from data fifo */
1851 lval
= inl(ai_context
->data_reg
) & 0xFFFF;
1854 if (!comedi_buf_put(s
->async
, lval
)) {
1855 /* Buffer overflow, so stop conversion and disable all interrupts */
1856 tmp
|= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP
;
1857 tmp
&= ~(ME4000_AI_CTRL_BIT_HF_IRQ
|
1858 ME4000_AI_CTRL_BIT_SC_IRQ
);
1859 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1861 s
->async
->events
|= COMEDI_CB_OVERFLOW
;
1864 "comedi%d: me4000: me4000_ai_isr(): Buffer overflow\n",
1871 /* Work is done, so reset the interrupt */
1872 ISR_PDEBUG("me4000_ai_isr(): Reset fifo half full interrupt\n");
1873 tmp
|= ME4000_AI_CTRL_BIT_HF_IRQ_RESET
;
1874 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1875 tmp
&= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET
;
1876 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1880 ai_context
->irq_status_reg
) & ME4000_IRQ_STATUS_BIT_SC
) {
1882 ("me4000_ai_isr(): Sample counter interrupt occured\n");
1884 s
->async
->events
|= COMEDI_CB_BLOCK
| COMEDI_CB_EOA
;
1886 /* Acquisition is complete, so stop conversion and disable all interrupts */
1887 tmp
= me4000_inl(dev
, ai_context
->ctrl_reg
);
1888 tmp
|= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP
;
1889 tmp
&= ~(ME4000_AI_CTRL_BIT_HF_IRQ
| ME4000_AI_CTRL_BIT_SC_IRQ
);
1890 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1892 /* Poll data until fifo empty */
1893 while (inl(ai_context
->ctrl_reg
) & ME4000_AI_STATUS_BIT_EF_DATA
) {
1894 /* Read value from data fifo */
1895 lval
= inl(ai_context
->data_reg
) & 0xFFFF;
1898 if (!comedi_buf_put(s
->async
, lval
)) {
1900 "comedi%d: me4000: me4000_ai_isr(): Buffer overflow\n",
1902 s
->async
->events
|= COMEDI_CB_OVERFLOW
;
1907 /* Work is done, so reset the interrupt */
1909 ("me4000_ai_isr(): Reset interrupt from sample counter\n");
1910 tmp
|= ME4000_AI_CTRL_BIT_SC_IRQ_RESET
;
1911 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1912 tmp
&= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET
;
1913 me4000_outl(dev
, tmp
, ai_context
->ctrl_reg
);
1916 ISR_PDEBUG("me4000_ai_isr(): Events = 0x%X\n", s
->async
->events
);
1918 if (s
->async
->events
)
1919 comedi_event(dev
, s
);
1924 /*=============================================================================
1925 Analog output section
1926 ===========================================================================*/
1928 static int me4000_ao_insn_write(struct comedi_device
*dev
,
1929 struct comedi_subdevice
*s
,
1930 struct comedi_insn
*insn
, unsigned int *data
)
1933 int chan
= CR_CHAN(insn
->chanspec
);
1934 int rang
= CR_RANGE(insn
->chanspec
);
1935 int aref
= CR_AREF(insn
->chanspec
);
1938 CALL_PDEBUG("In me4000_ao_insn_write()\n");
1942 } else if (insn
->n
> 1) {
1944 "comedi%d: me4000: me4000_ao_insn_write(): Invalid instruction length %d\n",
1945 dev
->minor
, insn
->n
);
1949 if (chan
>= thisboard
->ao
.count
) {
1951 "comedi%d: me4000: me4000_ao_insn_write(): Invalid channel %d\n",
1952 dev
->minor
, insn
->n
);
1958 "comedi%d: me4000: me4000_ao_insn_write(): Invalid range %d\n",
1959 dev
->minor
, insn
->n
);
1963 if (aref
!= AREF_GROUND
&& aref
!= AREF_COMMON
) {
1965 "comedi%d: me4000: me4000_ao_insn_write(): Invalid aref %d\n",
1966 dev
->minor
, insn
->n
);
1970 /* Stop any running conversion */
1971 tmp
= me4000_inl(dev
, info
->ao_context
[chan
].ctrl_reg
);
1972 tmp
|= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP
;
1973 me4000_outl(dev
, tmp
, info
->ao_context
[chan
].ctrl_reg
);
1975 /* Clear control register and set to single mode */
1976 me4000_outl(dev
, 0x0, info
->ao_context
[chan
].ctrl_reg
);
1978 /* Write data value */
1979 me4000_outl(dev
, data
[0], info
->ao_context
[chan
].single_reg
);
1981 /* Store in the mirror */
1982 info
->ao_context
[chan
].mirror
= data
[0];
1987 static int me4000_ao_insn_read(struct comedi_device
*dev
,
1988 struct comedi_subdevice
*s
,
1989 struct comedi_insn
*insn
, unsigned int *data
)
1991 int chan
= CR_CHAN(insn
->chanspec
);
1995 } else if (insn
->n
> 1) {
1997 ("comedi%d: me4000: me4000_ao_insn_read(): Invalid instruction length\n",
2002 data
[0] = info
->ao_context
[chan
].mirror
;
2007 /*=============================================================================
2009 ===========================================================================*/
2011 static int me4000_dio_insn_bits(struct comedi_device
*dev
,
2012 struct comedi_subdevice
*s
,
2013 struct comedi_insn
*insn
, unsigned int *data
)
2016 CALL_PDEBUG("In me4000_dio_insn_bits()\n");
2018 /* Length of data must be 2 (mask and new data, see below) */
2024 ("comedi%d: me4000: me4000_dio_insn_bits(): Invalid instruction length\n",
2030 * The insn data consists of a mask in data[0] and the new data
2031 * in data[1]. The mask defines which bits we are concerning about.
2032 * The new data must be anded with the mask.
2033 * Each channel corresponds to a bit.
2036 /* Check if requested ports are configured for output */
2037 if ((s
->io_bits
& data
[0]) != data
[0])
2040 s
->state
&= ~data
[0];
2041 s
->state
|= data
[0] & data
[1];
2043 /* Write out the new digital output lines */
2044 me4000_outl(dev
, (s
->state
>> 0) & 0xFF,
2045 info
->dio_context
.port_0_reg
);
2046 me4000_outl(dev
, (s
->state
>> 8) & 0xFF,
2047 info
->dio_context
.port_1_reg
);
2048 me4000_outl(dev
, (s
->state
>> 16) & 0xFF,
2049 info
->dio_context
.port_2_reg
);
2050 me4000_outl(dev
, (s
->state
>> 24) & 0xFF,
2051 info
->dio_context
.port_3_reg
);
2054 /* On return, data[1] contains the value of
2055 the digital input and output lines. */
2057 ((me4000_inl(dev
, info
->dio_context
.port_0_reg
) & 0xFF) << 0) |
2058 ((me4000_inl(dev
, info
->dio_context
.port_1_reg
) & 0xFF) << 8) |
2059 ((me4000_inl(dev
, info
->dio_context
.port_2_reg
) & 0xFF) << 16) |
2060 ((me4000_inl(dev
, info
->dio_context
.port_3_reg
) & 0xFF) << 24);
2065 static int me4000_dio_insn_config(struct comedi_device
*dev
,
2066 struct comedi_subdevice
*s
,
2067 struct comedi_insn
*insn
, unsigned int *data
)
2070 int chan
= CR_CHAN(insn
->chanspec
);
2072 CALL_PDEBUG("In me4000_dio_insn_config()\n");
2074 if (data
[0] == INSN_CONFIG_DIO_QUERY
) {
2076 (s
->io_bits
& (1 << chan
)) ? COMEDI_OUTPUT
: COMEDI_INPUT
;
2081 * The input or output configuration of each digital line is
2082 * configured by a special insn_config instruction. chanspec
2083 * contains the channel to be changed, and data[0] contains the
2084 * value COMEDI_INPUT or COMEDI_OUTPUT.
2085 * On the ME-4000 it is only possible to switch port wise (8 bit)
2088 tmp
= me4000_inl(dev
, info
->dio_context
.ctrl_reg
);
2090 if (data
[0] == COMEDI_OUTPUT
) {
2093 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_0
|
2094 ME4000_DIO_CTRL_BIT_MODE_1
);
2095 tmp
|= ME4000_DIO_CTRL_BIT_MODE_0
;
2096 } else if (chan
< 16) {
2098 * Chech for optoisolated ME-4000 version. If one the first
2099 * port is a fixed output port and the second is a fixed input port.
2101 if (!me4000_inl(dev
, info
->dio_context
.dir_reg
))
2104 s
->io_bits
|= 0xFF00;
2105 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_2
|
2106 ME4000_DIO_CTRL_BIT_MODE_3
);
2107 tmp
|= ME4000_DIO_CTRL_BIT_MODE_2
;
2108 } else if (chan
< 24) {
2109 s
->io_bits
|= 0xFF0000;
2110 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_4
|
2111 ME4000_DIO_CTRL_BIT_MODE_5
);
2112 tmp
|= ME4000_DIO_CTRL_BIT_MODE_4
;
2113 } else if (chan
< 32) {
2114 s
->io_bits
|= 0xFF000000;
2115 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_6
|
2116 ME4000_DIO_CTRL_BIT_MODE_7
);
2117 tmp
|= ME4000_DIO_CTRL_BIT_MODE_6
;
2124 * Chech for optoisolated ME-4000 version. If one the first
2125 * port is a fixed output port and the second is a fixed input port.
2127 if (!me4000_inl(dev
, info
->dio_context
.dir_reg
))
2130 s
->io_bits
&= ~0xFF;
2131 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_0
|
2132 ME4000_DIO_CTRL_BIT_MODE_1
);
2133 } else if (chan
< 16) {
2134 s
->io_bits
&= ~0xFF00;
2135 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_2
|
2136 ME4000_DIO_CTRL_BIT_MODE_3
);
2137 } else if (chan
< 24) {
2138 s
->io_bits
&= ~0xFF0000;
2139 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_4
|
2140 ME4000_DIO_CTRL_BIT_MODE_5
);
2141 } else if (chan
< 32) {
2142 s
->io_bits
&= ~0xFF000000;
2143 tmp
&= ~(ME4000_DIO_CTRL_BIT_MODE_6
|
2144 ME4000_DIO_CTRL_BIT_MODE_7
);
2150 me4000_outl(dev
, tmp
, info
->dio_context
.ctrl_reg
);
2155 /*=============================================================================
2157 ===========================================================================*/
2159 static int cnt_reset(struct comedi_device
*dev
, unsigned int channel
)
2162 CALL_PDEBUG("In cnt_reset()\n");
2166 me4000_outb(dev
, 0x30, info
->cnt_context
.ctrl_reg
);
2167 me4000_outb(dev
, 0x00, info
->cnt_context
.counter_0_reg
);
2168 me4000_outb(dev
, 0x00, info
->cnt_context
.counter_0_reg
);
2171 me4000_outb(dev
, 0x70, info
->cnt_context
.ctrl_reg
);
2172 me4000_outb(dev
, 0x00, info
->cnt_context
.counter_1_reg
);
2173 me4000_outb(dev
, 0x00, info
->cnt_context
.counter_1_reg
);
2176 me4000_outb(dev
, 0xB0, info
->cnt_context
.ctrl_reg
);
2177 me4000_outb(dev
, 0x00, info
->cnt_context
.counter_2_reg
);
2178 me4000_outb(dev
, 0x00, info
->cnt_context
.counter_2_reg
);
2182 "comedi%d: me4000: cnt_reset(): Invalid channel\n",
2190 static int cnt_config(struct comedi_device
*dev
, unsigned int channel
,
2195 CALL_PDEBUG("In cnt_config()\n");
2199 tmp
|= ME4000_CNT_COUNTER_0
;
2202 tmp
|= ME4000_CNT_COUNTER_1
;
2205 tmp
|= ME4000_CNT_COUNTER_2
;
2209 "comedi%d: me4000: cnt_config(): Invalid channel\n",
2216 tmp
|= ME4000_CNT_MODE_0
;
2219 tmp
|= ME4000_CNT_MODE_1
;
2222 tmp
|= ME4000_CNT_MODE_2
;
2225 tmp
|= ME4000_CNT_MODE_3
;
2228 tmp
|= ME4000_CNT_MODE_4
;
2231 tmp
|= ME4000_CNT_MODE_5
;
2235 "comedi%d: me4000: cnt_config(): Invalid counter mode\n",
2240 /* Write the control word */
2242 me4000_outb(dev
, tmp
, info
->cnt_context
.ctrl_reg
);
2247 static int me4000_cnt_insn_config(struct comedi_device
*dev
,
2248 struct comedi_subdevice
*s
,
2249 struct comedi_insn
*insn
, unsigned int *data
)
2254 CALL_PDEBUG("In me4000_cnt_insn_config()\n");
2260 "comedi%d: me4000: me4000_cnt_insn_config(): Invalid instruction length%d\n",
2261 dev
->minor
, insn
->n
);
2265 err
= cnt_reset(dev
, insn
->chanspec
);
2269 case GPCT_SET_OPERATION
:
2272 "comedi%d: me4000: me4000_cnt_insn_config(): Invalid instruction length%d\n",
2273 dev
->minor
, insn
->n
);
2277 err
= cnt_config(dev
, insn
->chanspec
, data
[1]);
2283 "comedi%d: me4000: me4000_cnt_insn_config(): Invalid instruction\n",
2291 static int me4000_cnt_insn_read(struct comedi_device
*dev
,
2292 struct comedi_subdevice
*s
,
2293 struct comedi_insn
*insn
, unsigned int *data
)
2298 CALL_PDEBUG("In me4000_cnt_insn_read()\n");
2305 "comedi%d: me4000: me4000_cnt_insn_read(): Invalid instruction length %d\n",
2306 dev
->minor
, insn
->n
);
2310 switch (insn
->chanspec
) {
2312 tmp
= me4000_inb(dev
, info
->cnt_context
.counter_0_reg
);
2314 tmp
= me4000_inb(dev
, info
->cnt_context
.counter_0_reg
);
2315 data
[0] |= tmp
<< 8;
2318 tmp
= me4000_inb(dev
, info
->cnt_context
.counter_1_reg
);
2320 tmp
= me4000_inb(dev
, info
->cnt_context
.counter_1_reg
);
2321 data
[0] |= tmp
<< 8;
2324 tmp
= me4000_inb(dev
, info
->cnt_context
.counter_2_reg
);
2326 tmp
= me4000_inb(dev
, info
->cnt_context
.counter_2_reg
);
2327 data
[0] |= tmp
<< 8;
2331 "comedi%d: me4000: me4000_cnt_insn_read(): Invalid channel %d\n",
2332 dev
->minor
, insn
->chanspec
);
2339 static int me4000_cnt_insn_write(struct comedi_device
*dev
,
2340 struct comedi_subdevice
*s
,
2341 struct comedi_insn
*insn
, unsigned int *data
)
2346 CALL_PDEBUG("In me4000_cnt_insn_write()\n");
2350 } else if (insn
->n
> 1) {
2352 "comedi%d: me4000: me4000_cnt_insn_write(): Invalid instruction length %d\n",
2353 dev
->minor
, insn
->n
);
2357 switch (insn
->chanspec
) {
2359 tmp
= data
[0] & 0xFF;
2360 me4000_outb(dev
, tmp
, info
->cnt_context
.counter_0_reg
);
2361 tmp
= (data
[0] >> 8) & 0xFF;
2362 me4000_outb(dev
, tmp
, info
->cnt_context
.counter_0_reg
);
2365 tmp
= data
[0] & 0xFF;
2366 me4000_outb(dev
, tmp
, info
->cnt_context
.counter_1_reg
);
2367 tmp
= (data
[0] >> 8) & 0xFF;
2368 me4000_outb(dev
, tmp
, info
->cnt_context
.counter_1_reg
);
2371 tmp
= data
[0] & 0xFF;
2372 me4000_outb(dev
, tmp
, info
->cnt_context
.counter_2_reg
);
2373 tmp
= (data
[0] >> 8) & 0xFF;
2374 me4000_outb(dev
, tmp
, info
->cnt_context
.counter_2_reg
);
2378 "comedi%d: me4000: me4000_cnt_insn_write(): Invalid channel %d\n",
2379 dev
->minor
, insn
->chanspec
);
2386 COMEDI_PCI_INITCLEANUP(driver_me4000
, me4000_pci_table
);